2016-03-29 00:07:38 +00:00
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#include "DPSC.hpp"
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2017-12-29 08:08:12 +00:00
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namespace DataSpec::DNAParticle
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2016-03-29 00:07:38 +00:00
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{
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template <class IDType>
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void DPSM<IDType>::read(athena::io::YAMLDocReader& r)
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{
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for (const auto& elem : r.getCurNode()->m_mapChildren)
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{
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if (elem.first.size() < 4)
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{
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LogModule.report(logvisor::Warning, "short FourCC in element '%s'", elem.first.c_str());
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continue;
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}
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2017-02-12 23:56:03 +00:00
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if (auto rec = r.enterSubRecord(elem.first.c_str()))
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2016-03-29 00:07:38 +00:00
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{
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2017-02-12 23:56:03 +00:00
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bool loadFirstDesc = false;
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uint32_t clsId = *reinterpret_cast<const uint32_t*>(elem.first.c_str());
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switch(clsId)
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{
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case SBIG('1SZE'):
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case SBIG('1LFT'):
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case SBIG('1ROT'):
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case SBIG('1OFF'):
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case SBIG('1CLR'):
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case SBIG('1TEX'):
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case SBIG('1ADD'):
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loadFirstDesc = true;
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case SBIG('2SZE'):
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case SBIG('2LFT'):
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case SBIG('2ROT'):
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case SBIG('2OFF'):
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case SBIG('2CLR'):
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case SBIG('2TEX'):
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case SBIG('2ADD'):
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if (loadFirstDesc)
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readQuadDecalInfo(r, clsId, x0_quad);
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else
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readQuadDecalInfo(r, clsId, x1c_quad);
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break;
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case SBIG('DMDL'):
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x38_DMDL.read(r);
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break;
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case SBIG('DLFT'):
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x48_DLFT.read(r);
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break;
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case SBIG('DMOP'):
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x4c_DMOP.read(r);
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break;
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case SBIG('DMRT'):
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x50_DMRT.read(r);
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break;
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case SBIG('DMSC'):
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x54_DMSC.read(r);
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break;
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case SBIG('DMCL'):
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x58_DMCL.read(r);
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break;
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case SBIG('DMAB'):
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x5c_24_DMAB = r.readBool(nullptr);
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break;
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case SBIG('DMOO'):
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x5c_25_DMOO = r.readBool(nullptr);
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break;
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}
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2016-03-29 00:07:38 +00:00
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}
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}
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}
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template <class IDType>
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void DPSM<IDType>::write(athena::io::YAMLDocWriter& w) const
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{
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writeQuadDecalInfo(w, x0_quad, true);
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writeQuadDecalInfo(w, x1c_quad, false);
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if (x38_DMDL)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DMDL"))
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x38_DMDL.write(w);
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2016-03-29 00:07:38 +00:00
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if (x48_DLFT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DLFT"))
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x48_DLFT.write(w);
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2016-03-29 00:07:38 +00:00
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if (x4c_DMOP)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DMOP"))
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x4c_DMOP.write(w);
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2016-03-29 00:07:38 +00:00
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if (x50_DMRT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DMRT"))
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x50_DMRT.write(w);
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2016-03-29 00:07:38 +00:00
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if (x54_DMSC)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DMSC"))
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x54_DMSC.write(w);
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2016-03-29 00:07:38 +00:00
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if (x58_DMCL)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("DMCL"))
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x54_DMSC.write(w);
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2016-03-29 00:07:38 +00:00
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if (x5c_24_DMAB)
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w.writeBool("DMAB", x5c_24_DMAB);
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if (x5c_25_DMOO)
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w.writeBool("DMOO", x5c_25_DMOO);
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}
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template <class IDType>
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template <class Reader>
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2016-03-30 20:44:19 +00:00
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void DPSM<IDType>::readQuadDecalInfo(Reader& r, uint32_t clsId, typename DPSM<IDType>::SQuadDescr& quad)
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2016-03-29 00:07:38 +00:00
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{
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switch(clsId)
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{
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case SBIG('1LFT'):
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case SBIG('2LFT'):
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quad.x0_LFT.read(r);
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break;
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case SBIG('1SZE'):
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case SBIG('2SZE'):
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quad.x4_SZE.read(r);
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break;
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case SBIG('1ROT'):
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case SBIG('2ROT'):
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quad.x8_ROT.read(r);
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break;
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case SBIG('1OFF'):
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case SBIG('2OFF'):
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quad.xc_OFF.read(r);
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break;
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case SBIG('1CLR'):
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case SBIG('2CLR'):
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quad.x10_CLR.read(r);
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break;
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case SBIG('1TEX'):
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case SBIG('2TEX'):
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quad.x14_TEX.read(r);
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break;
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case SBIG('1ADD'):
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case SBIG('2ADD'):
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quad.x18_ADD.read(r);
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break;
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}
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}
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template <class IDType>
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2016-03-30 20:44:19 +00:00
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void DPSM<IDType>::writeQuadDecalInfo(athena::io::YAMLDocWriter& w,
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const typename DPSM<IDType>::SQuadDescr& quad, bool first) const
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2016-03-29 00:07:38 +00:00
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{
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if (quad.x0_LFT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1LFT" : "2LFT")))
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quad.x0_LFT.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.x4_SZE)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1SZE" : "2SZE")))
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quad.x4_SZE.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.x8_ROT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1ROT" : "2ROT")))
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quad.x8_ROT.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.xc_OFF)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1OFF" : "2OFF")))
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quad.xc_OFF.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.x10_CLR)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1CLR" : "2CLR")))
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quad.x10_CLR.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.x14_TEX)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1TEX" : "2TEX")))
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quad.x14_TEX.write(w);
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2016-03-29 00:07:38 +00:00
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if (quad.x18_ADD)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord((first ? "1ADD" : "2ADD")))
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quad.x18_ADD.write(w);
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2016-03-29 00:07:38 +00:00
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}
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template <class IDType>
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size_t DPSM<IDType>::binarySize(size_t __isz) const
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{
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__isz += 4;
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__isz = getQuadDecalBinarySize(__isz, x0_quad);
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__isz = getQuadDecalBinarySize(__isz, x1c_quad);
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if (x38_DMDL)
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__isz = x38_DMDL.binarySize(__isz + 4);
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if (x48_DLFT)
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__isz = x48_DLFT.binarySize(__isz + 4);
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if (x4c_DMOP)
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__isz = x4c_DMOP.binarySize(__isz + 4);
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if (x50_DMRT)
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__isz = x50_DMRT.binarySize(__isz + 4);
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if (x54_DMSC)
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__isz = x54_DMSC.binarySize(__isz + 4);
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if (x58_DMCL)
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__isz = x58_DMCL.binarySize(__isz + 4);
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if (x5c_24_DMAB)
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__isz += 9;
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if (x5c_25_DMOO)
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__isz += 9;
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return __isz;
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}
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template <class IDType>
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2016-03-30 20:44:19 +00:00
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size_t DPSM<IDType>::getQuadDecalBinarySize(size_t __isz, const typename DPSM<IDType>::SQuadDescr& quad) const
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2016-03-29 00:07:38 +00:00
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{
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if (quad.x0_LFT)
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__isz = quad.x0_LFT.binarySize(__isz + 4);
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if (quad.x4_SZE)
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__isz = quad.x4_SZE.binarySize(__isz + 4);
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if (quad.x8_ROT)
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__isz = quad.x8_ROT.binarySize(__isz + 4);
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if (quad.xc_OFF)
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__isz = quad.xc_OFF.binarySize(__isz + 4);
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if (quad.x10_CLR)
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__isz = quad.x10_CLR.binarySize(__isz + 4);
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if (quad.x14_TEX)
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__isz = quad.x14_TEX.binarySize(__isz + 4);
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if (quad.x18_ADD)
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__isz = quad.x18_ADD.binarySize(__isz + 4);
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return __isz;
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}
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template <class IDType>
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void DPSM<IDType>::read(athena::io::IStreamReader& r)
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{
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uint32_t clsId;
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r.readBytesToBuf(&clsId, 4);
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if (clsId != SBIG('DPSM'))
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{
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LogModule.report(logvisor::Warning, "non DPSM provided to DPSM parser");
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return;
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}
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bool loadFirstDesc = false;
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r.readBytesToBuf(&clsId, 4);
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while (clsId != SBIG('_END'))
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{
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switch(clsId)
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{
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case SBIG('1SZE'):
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case SBIG('1LFT'):
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case SBIG('1ROT'):
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case SBIG('1OFF'):
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case SBIG('1CLR'):
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case SBIG('1TEX'):
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case SBIG('1ADD'):
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loadFirstDesc = true;
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case SBIG('2SZE'):
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case SBIG('2LFT'):
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case SBIG('2ROT'):
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case SBIG('2OFF'):
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case SBIG('2CLR'):
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case SBIG('2TEX'):
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case SBIG('2ADD'):
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if (loadFirstDesc)
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readQuadDecalInfo(r, clsId, x0_quad);
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else
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readQuadDecalInfo(r, clsId, x1c_quad);
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break;
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case SBIG('DMDL'):
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x38_DMDL.read(r);
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break;
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case SBIG('DLFT'):
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x48_DLFT.read(r);
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break;
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case SBIG('DMOP'):
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x4c_DMOP.read(r);
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break;
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case SBIG('DMRT'):
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x50_DMRT.read(r);
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break;
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case SBIG('DMSC'):
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x54_DMSC.read(r);
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break;
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case SBIG('DMCL'):
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x58_DMCL.read(r);
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break;
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case SBIG('DMAB'):
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r.readUint32();
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x5c_24_DMAB = r.readBool();
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break;
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case SBIG('DMOO'):
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r.readUint32();
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x5c_25_DMOO = r.readBool();
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break;
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default:
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LogModule.report(logvisor::Fatal, "Unknown DPSM class %.4s @%" PRIi64, &clsId, r.position());
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break;
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}
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r.readBytesToBuf(&clsId, 4);
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}
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}
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template <class IDType>
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void DPSM<IDType>::write(athena::io::IStreamWriter& w) const
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{
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w.writeBytes("DPSM", 4);
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writeQuadDecalInfo(w, x0_quad, true);
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writeQuadDecalInfo(w, x1c_quad, false);
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if (x38_DMDL)
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{
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w.writeBytes("DMDL", 4);
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x38_DMDL.write(w);
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}
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if (x48_DLFT)
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{
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w.writeBytes("DLFT", 4);
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x48_DLFT.write(w);
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}
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if (x4c_DMOP)
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{
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w.writeBytes("DMOP", 4);
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x4c_DMOP.write(w);
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}
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if (x50_DMRT)
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{
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w.writeBytes("DMRT", 4);
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x50_DMRT.write(w);
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}
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if (x54_DMSC)
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{
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w.writeBytes("DMSC", 4);
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x54_DMSC.write(w);
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}
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if (x58_DMCL)
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{
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w.writeBytes("DMCL", 4);
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x58_DMCL.write(w);
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}
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if (x5c_24_DMAB)
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w.writeBytes("DMABCNST\x01", 9);
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if (x5c_25_DMOO)
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2016-03-29 00:10:47 +00:00
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w.writeBytes("DMOOCNST\x01", 9);
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2016-03-29 00:07:38 +00:00
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w.writeBytes("_END", 4);
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}
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template <class IDType>
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2016-03-30 20:44:19 +00:00
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void DPSM<IDType>::writeQuadDecalInfo(athena::io::IStreamWriter& w,
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const typename DPSM<IDType>::SQuadDescr& quad, bool first) const
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2016-03-29 00:07:38 +00:00
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{
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if (quad.x0_LFT)
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{
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w.writeBytes((first ? "1LFT" : "2LFT"), 4);
|
|
|
|
quad.x0_LFT.write(w);
|
|
|
|
}
|
|
|
|
if (quad.x4_SZE)
|
|
|
|
{
|
|
|
|
w.writeBytes((first ? "1SZE" : "2SZE"), 4);
|
|
|
|
quad.x4_SZE.write(w);
|
|
|
|
}
|
|
|
|
if (quad.x8_ROT)
|
|
|
|
{
|
|
|
|
w.writeBytes((first ? "1ROT" : "2ROT"), 4);
|
|
|
|
quad.x8_ROT.write(w);
|
|
|
|
}
|
|
|
|
if (quad.xc_OFF)
|
|
|
|
{
|
|
|
|
w.writeBytes((first ? "1OFF" : "2OFF"), 4);
|
|
|
|
quad.xc_OFF.write(w);
|
|
|
|
}
|
|
|
|
if (quad.x10_CLR)
|
|
|
|
{
|
2017-02-13 21:29:00 +00:00
|
|
|
w.writeBytes((first ? "1CLR" : "2CLR"), 4);
|
2016-03-29 00:07:38 +00:00
|
|
|
quad.x10_CLR.write(w);
|
|
|
|
}
|
|
|
|
if (quad.x14_TEX)
|
|
|
|
{
|
|
|
|
w.writeBytes((first ? "1TEX" : "2TEX"), 4);
|
|
|
|
quad.x14_TEX.write(w);
|
|
|
|
}
|
|
|
|
if (quad.x18_ADD)
|
|
|
|
{
|
|
|
|
w.writeBytes((first ? "1ADD" : "2ADD"), 4);
|
|
|
|
quad.x18_ADD.write(w);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2016-10-02 22:41:36 +00:00
|
|
|
template <class IDType>
|
|
|
|
void DPSM<IDType>::gatherDependencies(std::vector<hecl::ProjectPath>& pathsOut) const
|
|
|
|
{
|
|
|
|
if (x0_quad.x14_TEX.m_elem)
|
|
|
|
x0_quad.x14_TEX.m_elem->gatherDependencies(pathsOut);
|
|
|
|
if (x1c_quad.x14_TEX.m_elem)
|
|
|
|
x1c_quad.x14_TEX.m_elem->gatherDependencies(pathsOut);
|
|
|
|
g_curSpec->flattenDependencies(x38_DMDL.id, pathsOut);
|
|
|
|
}
|
|
|
|
|
2016-03-29 00:07:38 +00:00
|
|
|
template struct DPSM<UniqueID32>;
|
|
|
|
template struct DPSM<UniqueID64>;
|
|
|
|
|
|
|
|
template <class IDType>
|
|
|
|
bool ExtractDPSM(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath)
|
|
|
|
{
|
2016-08-22 03:47:48 +00:00
|
|
|
athena::io::FileWriter writer(outPath.getAbsolutePath());
|
|
|
|
if (writer.isOpen())
|
2016-03-29 00:07:38 +00:00
|
|
|
{
|
|
|
|
DPSM<IDType> dpsm;
|
|
|
|
dpsm.read(rs);
|
2016-08-22 03:47:48 +00:00
|
|
|
dpsm.toYAMLStream(writer);
|
2016-03-29 00:07:38 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
template bool ExtractDPSM<UniqueID32>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
|
|
|
|
template bool ExtractDPSM<UniqueID64>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
|
|
|
|
|
|
|
|
template <class IDType>
|
|
|
|
bool WriteDPSM(const DPSM<IDType>& dpsm, const hecl::ProjectPath& outPath)
|
|
|
|
{
|
|
|
|
athena::io::FileWriter w(outPath.getAbsolutePath(), true, false);
|
|
|
|
if (w.hasError())
|
|
|
|
return false;
|
|
|
|
dpsm.write(w);
|
|
|
|
int64_t rem = w.position() % 32;
|
|
|
|
if (rem)
|
|
|
|
for (int64_t i=0 ; i<32-rem ; ++i)
|
2017-10-22 06:11:22 +00:00
|
|
|
w.writeUByte(0xff);
|
2016-03-29 00:07:38 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
template bool WriteDPSM<UniqueID32>(const DPSM<UniqueID32>& dpsm, const hecl::ProjectPath& outPath);
|
|
|
|
template bool WriteDPSM<UniqueID64>(const DPSM<UniqueID64>& dpsm, const hecl::ProjectPath& outPath);
|
|
|
|
|
|
|
|
|
|
|
|
}
|