mirror of https://github.com/PrimeDecomp/prime.git
parent
b7d74c3237
commit
599aa5347e
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@ -21,7 +21,8 @@
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"sipriv.h": "c",
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"sipriv.h": "c",
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"dvd_regs.h": "c",
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"dvd_regs.h": "c",
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"dvd.h": "c",
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"dvd.h": "c",
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"dvdpriv.h": "c"
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"dvdpriv.h": "c",
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"__ppc_eabi_linker.h": "c"
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},
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},
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"files.autoSave": "onFocusChange",
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"files.autoSave": "onFocusChange",
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"files.insertFinalNewline": true,
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"files.insertFinalNewline": true,
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@ -759,7 +759,7 @@ LIBS = [
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"cflags": "$cflags_base",
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"cflags": "$cflags_base",
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"host": False,
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"host": False,
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"objects": [
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"objects": [
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["Dolphin/dsp/dsp", False],
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["Dolphin/dsp/dsp", True],
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["Dolphin/dsp/dsp_debug", True],
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["Dolphin/dsp/dsp_debug", True],
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"Dolphin/dsp/dsp_task",
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"Dolphin/dsp/dsp_task",
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],
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],
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@ -648,7 +648,7 @@ DB_FILES :=\
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$(BUILD_DIR)/src/Dolphin/db.ep.o\
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$(BUILD_DIR)/src/Dolphin/db.ep.o\
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DSP_FILES :=\
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DSP_FILES :=\
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$(BUILD_DIR)/asm/Dolphin/dsp/dsp.o\
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$(BUILD_DIR)/src/Dolphin/dsp/dsp.ep.o\
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$(BUILD_DIR)/src/Dolphin/dsp/dsp_debug.o\
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$(BUILD_DIR)/src/Dolphin/dsp/dsp_debug.o\
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$(BUILD_DIR)/asm/Dolphin/dsp/dsp_task.o
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$(BUILD_DIR)/asm/Dolphin/dsp/dsp_task.o
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@ -83,6 +83,7 @@ void DSPHalt(void) {
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u32 DSPGetDMAStatus(void) { return __DSPRegs[5] & 0x200; }
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u32 DSPGetDMAStatus(void) { return __DSPRegs[5] & 0x200; }
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#if NONMATCHING
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DSPTaskInfo* DSPAddTask(DSPTaskInfo* task) {
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DSPTaskInfo* DSPAddTask(DSPTaskInfo* task) {
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u32 oldInt;
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u32 oldInt;
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oldInt = OSDisableInterrupts();
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oldInt = OSDisableInterrupts();
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@ -96,7 +97,48 @@ DSPTaskInfo* DSPAddTask(DSPTaskInfo* task) {
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return task;
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return task;
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}
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}
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#else
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#pragma push
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#include "__ppc_eabi_linker.h"
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/* clang-format off */
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#pragma optimization_level 0
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#pragma optimizewithasm off
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extern void __DSP_insert_task(DSPTaskInfo* task);
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asm DSPTaskInfo* DSPAddTask(DSPTaskInfo* task) {
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nofralloc
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mflr r0
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stw r0, 4(r1)
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stwu r1, -0x18(r1)
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stw r31, 0x14(r1)
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stw r30, 0x10(r1)
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mr r30, r3
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bl OSDisableInterrupts
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addi r31, r3, 0
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addi r3, r30, 0
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bl __DSP_insert_task
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li r0, 0
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stw r0, 0(r30)
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li r0, 1
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addi r3, r31, 0
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stw r0, 8(r30)
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bl OSRestoreInterrupts
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lwz r0, __DSP_first_task
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cmplw r30, r0
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bne lbl_8036FBB4
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mr r3, r30
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bl __DSP_boot_task
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lbl_8036FBB4:
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mr r3, r30
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lwz r0, 0x1c(r1)
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lwz r31, 0x14(r1)
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lwz r30, 0x10(r1)
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addi r1, r1, 0x18
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mtlr r0
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blr
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}
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#endif
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/* clang-format on */
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#pragma pop
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#ifdef __cplusplus
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#ifdef __cplusplus
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}
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}
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#endif
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#endif
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