.include "macros.inc"

.section .sdata2, "a"

.global lbl_805AE290
lbl_805AE290:
    # ROM: 0x3FAB30
    .float 1.0
    .4byte 0
    
.global lbl_805AE298
lbl_805AE298:
    # ROM: 0x3FAB38
    .double 4.503599627370496E15

.section .text, "ax"
.global Initialize__Q210CStopwatch7CSWDataFv
Initialize__Q210CStopwatch7CSWDataFv:
/* 802D671C 002D367C  94 21 FF F0 */	stwu r1, -0x10(r1)
/* 802D6720 002D3680  7C 08 02 A6 */	mflr r0
/* 802D6724 002D3684  3C 80 00 0F */	lis r4, 0x000F4240@ha
/* 802D6728 002D3688  3C A0 80 00 */	lis r5, 0x800000F8@ha
/* 802D672C 002D368C  90 01 00 14 */	stw r0, 0x14(r1)
/* 802D6730 002D3690  38 00 00 00 */	li r0, 0
/* 802D6734 002D3694  38 C4 42 40 */	addi r6, r4, 0x000F4240@l
/* 802D6738 002D3698  93 E1 00 0C */	stw r31, 0xc(r1)
/* 802D673C 002D369C  7C 7F 1B 78 */	mr r31, r3
/* 802D6740 002D36A0  80 A5 00 F8 */	lwz r5, 0x800000F8@l(r5)
/* 802D6744 002D36A4  54 A3 F0 BE */	srwi r3, r5, 2
/* 802D6748 002D36A8  38 A0 00 00 */	li r5, 0
/* 802D674C 002D36AC  90 7F 00 04 */	stw r3, 4(r31)
/* 802D6750 002D36B0  90 1F 00 00 */	stw r0, 0(r31)
/* 802D6754 002D36B4  80 7F 00 00 */	lwz r3, 0(r31)
/* 802D6758 002D36B8  80 9F 00 04 */	lwz r4, 4(r31)
/* 802D675C 002D36BC  48 0B 34 71 */	bl __div2i
/* 802D6760 002D36C0  90 9F 00 0C */	stw r4, 0xc(r31)
/* 802D6764 002D36C4  90 7F 00 08 */	stw r3, 8(r31)
/* 802D6768 002D36C8  80 7F 00 00 */	lwz r3, 0(r31)
/* 802D676C 002D36CC  80 9F 00 04 */	lwz r4, 4(r31)
/* 802D6770 002D36D0  48 0B 37 F5 */	bl __cvt_sll_flt
/* 802D6774 002D36D4  C0 02 C5 70 */	lfs f0, lbl_805AE290@sda21(r2)
/* 802D6778 002D36D8  38 60 00 01 */	li r3, 1
/* 802D677C 002D36DC  EC 00 08 24 */	fdivs f0, f0, f1
/* 802D6780 002D36E0  D0 1F 00 10 */	stfs f0, 0x10(r31)
/* 802D6784 002D36E4  83 E1 00 0C */	lwz r31, 0xc(r1)
/* 802D6788 002D36E8  80 01 00 14 */	lwz r0, 0x14(r1)
/* 802D678C 002D36EC  7C 08 03 A6 */	mtlr r0
/* 802D6790 002D36F0  38 21 00 10 */	addi r1, r1, 0x10
/* 802D6794 002D36F4  4E 80 00 20 */	blr 

.global Wait__Q210CStopwatch7CSWDataCFf
Wait__Q210CStopwatch7CSWDataCFf:
/* 802D6798 002D36F8  94 21 FF D0 */	stwu r1, -0x30(r1)
/* 802D679C 002D36FC  7C 08 02 A6 */	mflr r0
/* 802D67A0 002D3700  3C 60 80 00 */	lis r3, 0x800000F8@ha
/* 802D67A4 002D3704  C8 42 C5 78 */	lfd f2, lbl_805AE298@sda21(r2)
/* 802D67A8 002D3708  90 01 00 34 */	stw r0, 0x34(r1)
/* 802D67AC 002D370C  3C 00 43 30 */	lis r0, 0x4330
/* 802D67B0 002D3710  93 E1 00 2C */	stw r31, 0x2c(r1)
/* 802D67B4 002D3714  93 C1 00 28 */	stw r30, 0x28(r1)
/* 802D67B8 002D3718  80 63 00 F8 */	lwz r3, 0x800000F8@l(r3)
/* 802D67BC 002D371C  90 01 00 18 */	stw r0, 0x18(r1)
/* 802D67C0 002D3720  54 60 F0 BE */	srwi r0, r3, 2
/* 802D67C4 002D3724  90 01 00 1C */	stw r0, 0x1c(r1)
/* 802D67C8 002D3728  C8 01 00 18 */	lfd f0, 0x18(r1)
/* 802D67CC 002D372C  EC 00 10 28 */	fsubs f0, f0, f2
/* 802D67D0 002D3730  EC 21 00 32 */	fmuls f1, f1, f0
/* 802D67D4 002D3734  48 0B 38 45 */	bl __cvt_dbl_usll
/* 802D67D8 002D3738  7C 9E 23 78 */	mr r30, r4
/* 802D67DC 002D373C  7C 7F 1B 78 */	mr r31, r3
/* 802D67E0 002D3740  48 0A EB C9 */	bl OSGetTime
/* 802D67E4 002D3744  7F DE 20 14 */	addc r30, r30, r4
/* 802D67E8 002D3748  7F FF 19 14 */	adde r31, r31, r3
lbl_802D67EC:
/* 802D67EC 002D374C  48 0A EB BD */	bl OSGetTime
/* 802D67F0 002D3750  90 81 00 14 */	stw r4, 0x14(r1)
/* 802D67F4 002D3754  90 61 00 10 */	stw r3, 0x10(r1)
/* 802D67F8 002D3758  80 61 00 10 */	lwz r3, 0x10(r1)
/* 802D67FC 002D375C  80 01 00 14 */	lwz r0, 0x14(r1)
/* 802D6800 002D3760  7C 1E 00 10 */	subfc r0, r30, r0
/* 802D6804 002D3764  90 01 00 08 */	stw r0, 8(r1)
/* 802D6808 002D3768  80 01 00 08 */	lwz r0, 8(r1)
/* 802D680C 002D376C  2C 00 00 00 */	cmpwi r0, 0
/* 802D6810 002D3770  41 80 FF DC */	blt lbl_802D67EC
/* 802D6814 002D3774  80 01 00 34 */	lwz r0, 0x34(r1)
/* 802D6818 002D3778  83 E1 00 2C */	lwz r31, 0x2c(r1)
/* 802D681C 002D377C  83 C1 00 28 */	lwz r30, 0x28(r1)
/* 802D6820 002D3780  7C 08 03 A6 */	mtlr r0
/* 802D6824 002D3784  38 21 00 30 */	addi r1, r1, 0x30
/* 802D6828 002D3788  4E 80 00 20 */	blr