2022-11-07 03:06:21 +00:00
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#include "compiler/PCodeUtilities.h"
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2022-12-29 12:32:55 +00:00
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#include "compiler/CError.h"
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#include "compiler/CParser.h"
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2022-11-07 03:06:21 +00:00
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#include "compiler/PCode.h"
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#include "compiler/PCodeInfo.h"
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2022-12-29 12:32:55 +00:00
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#include "compiler/Registers.h"
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2022-11-07 03:06:21 +00:00
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#include "compiler/enode.h"
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#include "compiler/objects.h"
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void pcsetrecordbit(PCode *pc) {
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int reg;
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PCodeArg *arg;
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short argCount;
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int argIdx;
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pc->flags &= ~(fPCodeFlag10 | fCommutative | fIsCSE);
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if ((pc->flags & (fPCodeFlag80000000 | fPCodeFlag40000000)) == fPCodeFlag40000000) {
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reg = 1;
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} else if ((pc->flags & (fPCodeFlag80000000 | fPCodeFlag40000000)) == (fPCodeFlag80000000 | fPCodeFlag40000000)) {
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reg = 6;
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} else {
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reg = 0;
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}
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if (pc->op == PC_ANDI || pc->op == PC_ANDIS) {
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pc->flags |= fPCodeFlag20000000;
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} else if (pc->op == PC_ADDI || pc->op == PC_ADDIC) {
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pc->flags |= fPCodeFlag10000000;
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pc->flags |= fPCodeFlag20000000;
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change_num_operands(pc, 5);
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pc->op = PC_ADDICR;
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(76, pc->args[3].kind == PCOp_PLACEHOLDEROPERAND);
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2022-11-07 03:06:21 +00:00
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pc->args[3].kind = PCOp_REGISTER;
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pc->args[3].arg = RegClass_SPR;
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pc->args[3].data.reg.reg = 0;
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pc->args[3].data.reg.effect = EffectWrite;
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(80, pc->args[4].kind == PCOp_PLACEHOLDEROPERAND);
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2022-11-07 03:06:21 +00:00
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pc->args[4].kind = PCOp_REGISTER;
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pc->args[4].arg = RegClass_CRFIELD;
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pc->args[4].data.reg.reg = reg;
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pc->args[4].data.reg.effect = EffectWrite;
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} else {
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arg = pc->args;
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argIdx = argCount = pc->argCount;
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while (arg->kind != PCOp_PLACEHOLDEROPERAND && argIdx) {
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if (arg->kind == PCOp_REGISTER && arg->arg == RegClass_CRFIELD && arg->data.reg.reg == reg) {
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arg->data.reg.effect |= EffectWrite;
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pc->flags |= fPCodeFlag20000000;
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return;
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}
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arg++;
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argIdx--;
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}
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if (argIdx <= 0) {
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arg = &pc->args[argCount];
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pc->argCount++;
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}
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(105, arg->kind == PCOp_PLACEHOLDEROPERAND);
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2022-11-07 03:06:21 +00:00
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arg->kind = PCOp_REGISTER;
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arg->arg = RegClass_CRFIELD;
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arg->data.reg.reg = reg;
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arg->data.reg.effect = EffectWrite;
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if (pc->op != PC_ADDICR)
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pc->flags |= fPCodeFlag20000000;
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}
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}
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void pcsetsideeffects(PCode *pc) {
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pc->flags &= ~(fPCodeFlag10 | fCommutative | fIsCSE);
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pc->flags |= fSideEffects;
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}
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void pcsetlinkbit(PCode *pc) {
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PCodeArg *arg;
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int argIdx;
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switch (pc->op) {
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case PC_B:
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pc->op = PC_BL;
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break;
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case PC_BCTR:
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pc->op = PC_BCTRL;
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break;
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case PC_BLR:
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pc->op = PC_BLRL;
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break;
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}
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arg = pc->args;
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argIdx = pc->argCount;
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while (arg->kind != PCOp_PLACEHOLDEROPERAND && argIdx) {
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if (arg->kind == PCOp_REGISTER && arg->arg == RegClass_SPR && arg->data.reg.reg == 1) {
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arg->data.reg.effect |= EffectWrite;
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pc->flags |= fLink;
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return;
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}
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arg++;
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argIdx--;
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}
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(169, arg->kind == PCOp_PLACEHOLDEROPERAND);
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2022-11-07 03:06:21 +00:00
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arg->kind = PCOp_REGISTER;
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arg->arg = RegClass_SPR;
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arg->data.reg.reg = 1;
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arg->data.reg.effect = EffectWrite;
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if (opcodeinfo[pc->op].flags & fPCodeFlag8) {
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pc->flags &= ~fPCodeFlag1;
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pc->flags |= fPCodeFlag8;
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}
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pc->flags |= fLink;
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}
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void branch_label(PCodeLabel *label) {
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if (pclastblock->pcodeCount) {
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pcbranch(pclastblock, label);
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makepcblock();
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}
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pclabel(pclastblock, label);
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}
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void branch_conditional(short a, short compareop, short c, PCodeLabel *label) {
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PCodeBlock *tmpblock;
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PCodeLabel *tmplabel;
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int r28;
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tmpblock = pclastblock;
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tmplabel = makepclabel();
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switch (compareop) {
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case ENOTEQU:
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c = !c;
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case EEQU:
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r28 = 2;
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break;
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case EGREATEREQU:
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c = !c;
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case ELESS:
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r28 = 0;
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break;
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case ELESSEQU:
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c = !c;
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case EGREATER:
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r28 = 1;
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break;
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}
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emitpcode(c ? PC_BT : PC_BF, a, r28, label);
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pcbranch(pclastblock, label);
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pcbranch(pclastblock, tmplabel);
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makepcblock();
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pclabel(pclastblock, tmplabel);
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}
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void branch_always(PCodeLabel *label) {
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emitpcode(PC_B, label);
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pcbranch(pclastblock, label);
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makepcblock();
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}
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2022-12-29 12:32:55 +00:00
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void branch_decrement_always(Opcode opcode, PCodeLabel *label) {
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2022-11-07 03:06:21 +00:00
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PCodeLabel *tmplabel = makepclabel();
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emitpcode(opcode, label);
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pcbranch(pclastblock, label);
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pcbranch(pclastblock, tmplabel);
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makepcblock();
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pclabel(pclastblock, tmplabel);
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}
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void branch_indirect(Object *obj) {
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emitpcode(PC_BCTR, obj, 0);
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makepcblock();
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}
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int branch_count_volatiles(void) {
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int count = 0;
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int i;
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2022-12-29 12:32:55 +00:00
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RegClass rclass;
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2022-11-07 03:06:21 +00:00
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for (rclass = 0; rclass < RegClassMax; rclass++) {
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2022-12-29 12:32:55 +00:00
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for (i = 0; i < n_scratch_registers[rclass]; i++) {
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2022-11-07 03:06:21 +00:00
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count++;
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}
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}
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return count;
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}
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PCodeArg *branch_record_volatiles(PCodeArg *arglist, UInt32 *masks) {
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int i;
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RegClass rclass;
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2022-11-07 03:06:21 +00:00
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for (rclass = RegClassMax - 1; rclass >= 0; rclass--) {
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2022-12-29 12:32:55 +00:00
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for (i = 0; i < n_scratch_registers[rclass]; i++) {
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2022-11-07 03:06:21 +00:00
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arglist->kind = PCOp_REGISTER;
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arglist->arg = rclass;
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2022-12-29 12:32:55 +00:00
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arglist->data.reg.reg = scratch_registers[rclass][i];
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2022-11-07 03:06:21 +00:00
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arglist->data.reg.effect = EffectWrite;
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2022-12-29 12:32:55 +00:00
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if (masks[rclass] & (1 << scratch_registers[rclass][i]))
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2022-11-07 03:06:21 +00:00
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arglist->data.reg.effect |= EffectRead;
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arglist++;
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}
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}
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return arglist;
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}
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void branch_subroutine(Object *obj, short add_nop, UInt32 *masks) {
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int count;
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PCode *pc;
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PCodeArg *arg;
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count = branch_count_volatiles();
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if (copts.exceptions && current_statement)
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count += countexceptionactionregisters(current_statement->dobjstack);
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pc = makepcode(PC_BL, count, obj, 0);
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arg = branch_record_volatiles(pc->args + 1, masks);
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if (copts.exceptions && current_statement)
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noteexceptionactionregisters(current_statement->dobjstack, arg);
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appendpcode(pclastblock, pc);
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if (add_nop)
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emitpcode(PC_NOP);
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branch_label(makepclabel());
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if (copts.exceptions && current_statement)
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recordexceptionactions(pc, current_statement->dobjstack);
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}
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void branch_subroutine_ctr(UInt32 *masks) {
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int count;
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PCode *pc;
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PCodeArg *arg;
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count = branch_count_volatiles();
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if (copts.exceptions && current_statement)
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count += countexceptionactionregisters(current_statement->dobjstack);
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pc = makepcode(PC_BCTRL, count);
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arg = branch_record_volatiles(pc->args + 1, masks);
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if (copts.exceptions && current_statement)
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noteexceptionactionregisters(current_statement->dobjstack, arg);
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appendpcode(pclastblock, pc);
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branch_label(makepclabel());
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if (copts.exceptions && current_statement)
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recordexceptionactions(pc, current_statement->dobjstack);
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}
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2022-12-29 12:32:55 +00:00
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void add_immediate(short dest_reg, short base_reg, Object *obj, SInt16 offset) {
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2022-11-07 03:06:21 +00:00
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short tmp_reg = base_reg;
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if (obj && offset && obj->datatype != DLOCAL) {
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tmp_reg = used_virtual_registers[RegClass_GPR]++;
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add_immediate_lo(tmp_reg, base_reg, obj, 0, 1);
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obj = NULL;
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}
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if (!obj && !offset)
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emitpcode(PC_MR, dest_reg, tmp_reg);
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else
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emitpcode(PC_ADDI, dest_reg, tmp_reg, obj, offset);
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}
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2022-12-29 12:32:55 +00:00
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PCode *add_immediate_lo(short dest_reg, short base_reg, Object *obj, SInt16 offset, char add_to_block) {
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2022-11-07 03:06:21 +00:00
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PCode *pc;
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(577, obj);
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2022-11-07 03:06:21 +00:00
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pc = makepcode(PC_ADDI, dest_reg, base_reg, obj, offset);
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if (add_to_block)
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appendpcode(pclastblock, pc);
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return pc;
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}
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PCode *op_absolute_ha(short dest_reg, short base_reg, Object *obj, short offset, char add_to_block) {
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PCode *pc;
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int tmp_reg;
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if (obj->datatype == DLOCAL) {
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pc = makepcode(PC_ADDIS, dest_reg, base_reg, obj, offset);
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} else if (copts.codegen_pic) {
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tmp_reg = base_reg;
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CError_ASSERT(601, tmp_reg);
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2022-11-07 03:06:21 +00:00
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pc = makepcode(PC_ADDIS, dest_reg, tmp_reg, obj, offset);
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} else {
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2022-12-29 12:32:55 +00:00
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CError_ASSERT(606, base_reg == 0);
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2022-11-07 03:06:21 +00:00
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pc = makepcode(PC_LIS, dest_reg, obj, offset);
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}
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if (add_to_block)
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appendpcode(pclastblock, pc);
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return pc;
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}
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2022-12-29 12:32:55 +00:00
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void load_store_register(Opcode opcode, short dest_reg, short base_reg, Object *obj, SInt32 offset) {
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2022-11-07 03:06:21 +00:00
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short addi_tmp;
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short offset_reg1;
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short offset_reg2;
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offset_reg1 = base_reg;
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if (obj && offset && obj->datatype != DLOCAL) {
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offset_reg1 = used_virtual_registers[RegClass_GPR]++;
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add_immediate_lo(offset_reg1, base_reg, obj, 0, 1);
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obj = NULL;
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}
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if (offset != (short)offset) {
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if (opcode == PC_LWZ && dest_reg == 12)
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offset_reg2 = 12;
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else if (opcode == PC_LWZ && dest_reg == 11)
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offset_reg2 = 11;
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else
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offset_reg2 = used_virtual_registers[RegClass_GPR]++;
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emitpcode(PC_ADDIS, offset_reg2, offset_reg1, 0, (short) ((offset >> 16) + ((offset & 0x8000) >> 15)));
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offset = (short) offset;
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offset_reg1 = offset_reg2;
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}
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if (opcode == PC_STVX || opcode == PC_LVX) {
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offset_reg2 = 0;
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if (obj) {
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addi_tmp = used_virtual_registers[RegClass_GPR]++;
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emitpcode(PC_ADDI, addi_tmp, offset_reg1, obj, offset);
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offset_reg1 = addi_tmp;
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} else if (offset) {
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offset_reg2 = used_virtual_registers[RegClass_GPR]++;
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emitpcode(PC_LI, offset_reg2, offset);
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}
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if (!offset_reg2)
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emitpcode(opcode, dest_reg, 0, offset_reg1);
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else
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emitpcode(opcode, dest_reg, offset_reg1, offset_reg2);
|
|
|
|
} else {
|
|
|
|
emitpcode(opcode, dest_reg, offset_reg1, obj, offset);
|
|
|
|
}
|
|
|
|
}
|