mirror of https://git.wuffs.org/MWCC
93 lines
3.9 KiB
C
93 lines
3.9 KiB
C
#ifndef COMPILER_INLINEASMPPC_H
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#define COMPILER_INLINEASMPPC_H
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#include "compiler/common.h"
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#include "compiler/InlineAsm.h"
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typedef enum AssemblerType {
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AssemblerType_0,
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AssemblerType_1
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} AssemblerType;
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enum {
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NO_REG = 0,
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INVALID_PIC_REG = -2
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};
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extern char asm_alloc_flags[10];
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extern Section sm_section;
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extern UInt32 cpu;
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extern SInt32 fralloc_parameter_area_size;
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extern Boolean user_responsible_for_frame;
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extern Boolean supports_hardware_fpu;
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extern UInt32 assembledinstructions;
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extern AssemblerType assembler_type;
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extern char volatileasm;
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extern Boolean InlineAsm_gccmode;
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extern Boolean InlineAsm_labelref;
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extern CLabel *pic_base_label;
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enum {
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IADirective_Null,
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IADirective_Entry,
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IADirective_FrAlloc,
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IADirective_NoFrAlloc,
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IADirective_FrFree,
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IADirective_Machine,
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IADirective_SmClass,
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IADirective_PicBase
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};
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enum {
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CPUFLAG_LOW_MASK = 0xFFFFF,
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CPUFLAG_100000 = 0x100000,
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CPUFLAG_200000 = 0x200000,
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CPUFLAG_400000 = 0x400000,
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CPUFLAG_800000 = 0x800000,
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CPUFLAG_1000000 = 0x1000000,
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CPUFLAG_2000000 = 0x2000000,
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CPUFLAG_4000000 = 0x4000000,
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CPUFLAG_8000000 = 0x8000000,
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CPUFLAG_10000000 = 0x10000000,
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CPUFLAG_20000000 = 0x20000000,
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CPUFLAG_40000000 = 0x40000000,
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CPUFLAG_80000000 = 0x80000000
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};
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#define OPCODE_PART_1(opcode) ( (opcode) >> 26 )
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#define OPCODE_PART_2(opcode) ( ((opcode) >> 21) & 0x1F )
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#define OPCODE_PART_3(opcode) ( ((opcode) >> 1) & 0x3FF )
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enum {
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CPUMask_401 = CPUFLAG_8000000 | 0x40,
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CPUMask_403 = CPUFLAG_8000000 | 0x80,
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CPUMask_50x = CPUFLAG_10000000 | CPUFLAG_80000000 | 0x800,
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CPUMask_55x_56x = CPUFLAG_10000000 | CPUFLAG_80000000 | 0x1000,
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CPUMask_601 = CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_80000000 | 1,
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CPUMask_602 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 2,
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CPUMask_8240 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 0x10000,
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CPUMask_8260 = CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x10000,
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CPUMask_603 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 4,
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CPUMask_604 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 8,
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CPUMask_740_750 = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_80000000 | 0x2000,
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CPUMask_801_821_860 = CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x10,
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CPUMask_823_850 = CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | 0x20,
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CPUMask_74xx = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0x6000,
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CPUMask_All = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0xFFFFF,
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CPUMask_Generic = CPUFLAG_800000 | CPUFLAG_1000000 | CPUFLAG_2000000 | CPUFLAG_4000000 | CPUFLAG_8000000 | CPUFLAG_10000000 | CPUFLAG_40000000 | CPUFLAG_80000000 | 0xE00E
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};
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extern void InlineAsm_InitializePPC(void);
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extern void InlineAsm_Initialize(AssemblerType assemblertype);
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extern SInt32 InlineAsm_IsDirective(AssemblerType assemblertype);
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extern void InlineAsm_ProcessDirective(SInt32 directive);
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extern void InlineAsm_ScanAssemblyDirective(void);
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extern void InlineAsm_ScanAssemblyInstruction(void);
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extern void InlineAsm_TranslateIRtoPCode(Statement *stmt);
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extern const char *InlineAsm_GetMnemonic(InlineAsm *ia);
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extern void CodeGen_GetAsmEffects(Statement *stmt, IAEffects *effects);
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extern void CodeGen_PropagateIntoAsm(Statement *stmt, Object *obj, ENode *expr);
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extern Statement *CodeGen_CopyAsmStat(Statement *stmt);
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#endif
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