2015-06-21 15:33:46 +00:00
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/*
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Simple DirectMedia Layer
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2019-01-05 06:01:14 +00:00
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Copyright (C) 1997-2019 Sam Lantinga <slouken@libsdl.org>
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2015-06-21 15:33:46 +00:00
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This software is provided 'as-is', without any express or implied
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warranty. In no event will the authors be held liable for any damages
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arising from the use of this software.
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Permission is granted to anyone to use this software for any purpose,
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including commercial applications, and to alter it and redistribute it
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freely, subject to the following restrictions:
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1. The origin of this software must not be misrepresented; you must not
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claim that you wrote the original software. If you use this software
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in a product, an acknowledgment in the product documentation would be
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appreciated but is not required.
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2. Altered source versions must be plainly marked as such, and must not be
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misrepresented as being the original software.
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3. This notice may not be removed or altered from any source distribution.
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*/
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#ifdef TEST_MAIN
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#include "SDL_config.h"
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#else
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#include "../SDL_internal.h"
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#endif
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2019-03-19 23:52:09 +00:00
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#if defined(__WIN32__) || defined(__WINRT__)
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2015-06-21 15:33:46 +00:00
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#include "../core/windows/SDL_windows.h"
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#endif
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2017-08-21 20:00:40 +00:00
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#if defined(__OS2__)
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#define INCL_DOS
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#include <os2.h>
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#ifndef QSV_NUMPROCESSORS
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#define QSV_NUMPROCESSORS 26
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#endif
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#endif
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2015-06-21 15:33:46 +00:00
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/* CPU feature detection for SDL */
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#include "SDL_cpuinfo.h"
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2018-05-21 15:34:57 +00:00
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#include "SDL_assert.h"
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2015-06-21 15:33:46 +00:00
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#ifdef HAVE_SYSCONF
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#include <unistd.h>
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#endif
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#ifdef HAVE_SYSCTLBYNAME
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#include <sys/types.h>
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#include <sys/sysctl.h>
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#endif
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#if defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))
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#include <sys/sysctl.h> /* For AltiVec check */
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#elif defined(__OpenBSD__) && defined(__powerpc__)
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#include <sys/param.h>
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#include <sys/sysctl.h> /* For AltiVec check */
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#include <machine/cpu.h>
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#elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
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#include <signal.h>
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#include <setjmp.h>
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#endif
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2017-08-17 01:31:03 +00:00
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#if defined(__QNXNTO__)
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#include <sys/syspage.h>
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#endif
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2016-11-17 21:04:00 +00:00
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#if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH)
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2016-11-17 21:10:32 +00:00
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/*#include <asm/hwcap.h>*/
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#ifndef AT_HWCAP
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#define AT_HWCAP 16
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#endif
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#ifndef HWCAP_NEON
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#define HWCAP_NEON (1 << 12)
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#endif
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2016-11-17 21:04:00 +00:00
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#if defined HAVE_GETAUXVAL
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#include <sys/auxv.h>
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#else
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2016-11-17 21:01:59 +00:00
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#include <fcntl.h>
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#endif
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2016-11-17 06:15:16 +00:00
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#endif
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2018-12-01 17:19:11 +00:00
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#if defined(__ANDROID__) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
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#if __ARM_ARCH < 8
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#include <cpu-features.h>
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#endif
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#endif
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2018-05-14 04:03:39 +00:00
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#define CPU_HAS_RDTSC (1 << 0)
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#define CPU_HAS_ALTIVEC (1 << 1)
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#define CPU_HAS_MMX (1 << 2)
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#define CPU_HAS_3DNOW (1 << 3)
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#define CPU_HAS_SSE (1 << 4)
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#define CPU_HAS_SSE2 (1 << 5)
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#define CPU_HAS_SSE3 (1 << 6)
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#define CPU_HAS_SSE41 (1 << 7)
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#define CPU_HAS_SSE42 (1 << 8)
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#define CPU_HAS_AVX (1 << 9)
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#define CPU_HAS_AVX2 (1 << 10)
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#define CPU_HAS_NEON (1 << 11)
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2018-05-21 15:35:42 +00:00
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#define CPU_HAS_AVX512F (1 << 12)
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2019-10-25 01:12:08 +00:00
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#define CPU_HAS_ARM_SIMD (1 << 13)
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2015-06-21 15:33:46 +00:00
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#if SDL_ALTIVEC_BLITTERS && HAVE_SETJMP && !__MACOSX__ && !__OpenBSD__
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/* This is the brute force way of detecting instruction sets...
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the idea is borrowed from the libmpeg2 library - thanks!
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*/
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static jmp_buf jmpbuf;
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static void
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illegal_instruction(int sig)
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{
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longjmp(jmpbuf, 1);
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}
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#endif /* HAVE_SETJMP */
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static int
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CPU_haveCPUID(void)
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{
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int has_CPUID = 0;
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2016-11-17 03:49:04 +00:00
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2015-06-21 15:33:46 +00:00
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/* *INDENT-OFF* */
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#ifndef SDL_CPUINFO_DISABLED
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#if defined(__GNUC__) && defined(i386)
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__asm__ (
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" pushfl # Get original EFLAGS \n"
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" popl %%eax \n"
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" movl %%eax,%%ecx \n"
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" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
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" pushl %%eax # Save new EFLAGS value on stack \n"
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" popfl # Replace current EFLAGS value \n"
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" pushfl # Get new EFLAGS \n"
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" popl %%eax # Store new EFLAGS in EAX \n"
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" xorl %%ecx,%%eax # Can not toggle ID bit, \n"
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" jz 1f # Processor=80486 \n"
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" movl $1,%0 # We have CPUID support \n"
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"1: \n"
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: "=m" (has_CPUID)
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:
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: "%eax", "%ecx"
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);
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#elif defined(__GNUC__) && defined(__x86_64__)
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/* Technically, if this is being compiled under __x86_64__ then it has
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CPUid by definition. But it's nice to be able to prove it. :) */
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__asm__ (
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" pushfq # Get original EFLAGS \n"
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" popq %%rax \n"
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" movq %%rax,%%rcx \n"
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" xorl $0x200000,%%eax # Flip ID bit in EFLAGS \n"
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" pushq %%rax # Save new EFLAGS value on stack \n"
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" popfq # Replace current EFLAGS value \n"
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" pushfq # Get new EFLAGS \n"
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" popq %%rax # Store new EFLAGS in EAX \n"
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" xorl %%ecx,%%eax # Can not toggle ID bit, \n"
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" jz 1f # Processor=80486 \n"
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" movl $1,%0 # We have CPUID support \n"
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"1: \n"
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: "=m" (has_CPUID)
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:
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: "%rax", "%rcx"
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);
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#elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
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__asm {
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pushfd ; Get original EFLAGS
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pop eax
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mov ecx, eax
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xor eax, 200000h ; Flip ID bit in EFLAGS
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push eax ; Save new EFLAGS value on stack
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popfd ; Replace current EFLAGS value
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pushfd ; Get new EFLAGS
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pop eax ; Store new EFLAGS in EAX
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xor eax, ecx ; Can not toggle ID bit,
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jz done ; Processor=80486
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mov has_CPUID,1 ; We have CPUID support
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done:
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}
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#elif defined(_MSC_VER) && defined(_M_X64)
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has_CPUID = 1;
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#elif defined(__sun) && defined(__i386)
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__asm (
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" pushfl \n"
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" popl %eax \n"
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" movl %eax,%ecx \n"
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" xorl $0x200000,%eax \n"
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" pushl %eax \n"
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" popfl \n"
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" pushfl \n"
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" popl %eax \n"
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" xorl %ecx,%eax \n"
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" jz 1f \n"
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" movl $1,-8(%ebp) \n"
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"1: \n"
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);
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#elif defined(__sun) && defined(__amd64)
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__asm (
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" pushfq \n"
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" popq %rax \n"
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" movq %rax,%rcx \n"
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" xorl $0x200000,%eax \n"
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" pushq %rax \n"
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" popfq \n"
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" pushfq \n"
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" popq %rax \n"
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" xorl %ecx,%eax \n"
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" jz 1f \n"
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" movl $1,-8(%rbp) \n"
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"1: \n"
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);
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#endif
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#endif
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/* *INDENT-ON* */
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return has_CPUID;
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}
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#if defined(__GNUC__) && defined(i386)
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#define cpuid(func, a, b, c, d) \
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__asm__ __volatile__ ( \
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" pushl %%ebx \n" \
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" xorl %%ecx,%%ecx \n" \
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" cpuid \n" \
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" movl %%ebx, %%esi \n" \
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" popl %%ebx \n" : \
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"=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
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#elif defined(__GNUC__) && defined(__x86_64__)
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#define cpuid(func, a, b, c, d) \
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__asm__ __volatile__ ( \
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" pushq %%rbx \n" \
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" xorq %%rcx,%%rcx \n" \
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" cpuid \n" \
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" movq %%rbx, %%rsi \n" \
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" popq %%rbx \n" : \
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"=a" (a), "=S" (b), "=c" (c), "=d" (d) : "a" (func))
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#elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
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#define cpuid(func, a, b, c, d) \
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__asm { \
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__asm mov eax, func \
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__asm xor ecx, ecx \
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__asm cpuid \
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__asm mov a, eax \
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__asm mov b, ebx \
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__asm mov c, ecx \
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__asm mov d, edx \
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}
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#elif defined(_MSC_VER) && defined(_M_X64)
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#define cpuid(func, a, b, c, d) \
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{ \
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int CPUInfo[4]; \
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__cpuid(CPUInfo, func); \
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a = CPUInfo[0]; \
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b = CPUInfo[1]; \
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c = CPUInfo[2]; \
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d = CPUInfo[3]; \
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}
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#else
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#define cpuid(func, a, b, c, d) \
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2017-03-03 21:38:17 +00:00
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do { a = b = c = d = 0; (void) a; (void) b; (void) c; (void) d; } while (0)
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2015-06-21 15:33:46 +00:00
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#endif
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2016-11-17 03:49:04 +00:00
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static int CPU_CPUIDFeatures[4];
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static int CPU_CPUIDMaxFunction = 0;
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static SDL_bool CPU_OSSavesYMM = SDL_FALSE;
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2018-05-21 15:35:42 +00:00
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static SDL_bool CPU_OSSavesZMM = SDL_FALSE;
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2015-06-21 15:33:46 +00:00
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2016-11-17 03:49:04 +00:00
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static void
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CPU_calcCPUIDFeatures(void)
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2015-06-21 15:33:46 +00:00
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{
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2016-11-17 03:49:04 +00:00
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static SDL_bool checked = SDL_FALSE;
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if (!checked) {
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checked = SDL_TRUE;
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if (CPU_haveCPUID()) {
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int a, b, c, d;
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cpuid(0, a, b, c, d);
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CPU_CPUIDMaxFunction = a;
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if (CPU_CPUIDMaxFunction >= 1) {
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cpuid(1, a, b, c, d);
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CPU_CPUIDFeatures[0] = a;
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CPU_CPUIDFeatures[1] = b;
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CPU_CPUIDFeatures[2] = c;
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CPU_CPUIDFeatures[3] = d;
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/* Check to make sure we can call xgetbv */
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if (c & 0x08000000) {
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2018-05-21 15:35:42 +00:00
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/* Call xgetbv to see if YMM (etc) register state is saved */
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2015-06-21 15:33:46 +00:00
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#if defined(__GNUC__) && (defined(i386) || defined(__x86_64__))
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2017-03-07 05:25:06 +00:00
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__asm__(".byte 0x0f, 0x01, 0xd0" : "=a" (a) : "c" (0) : "%edx");
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2015-06-21 15:33:46 +00:00
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#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64)) && (_MSC_FULL_VER >= 160040219) /* VS2010 SP1 */
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2016-11-17 03:49:04 +00:00
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a = (int)_xgetbv(0);
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2015-06-21 15:33:46 +00:00
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#elif (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__)
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2016-11-17 03:49:04 +00:00
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__asm
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{
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xor ecx, ecx
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_asm _emit 0x0f _asm _emit 0x01 _asm _emit 0xd0
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mov a, eax
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}
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2015-06-21 15:33:46 +00:00
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#endif
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2016-11-17 03:49:04 +00:00
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CPU_OSSavesYMM = ((a & 6) == 6) ? SDL_TRUE : SDL_FALSE;
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2018-05-21 15:35:42 +00:00
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CPU_OSSavesZMM = (CPU_OSSavesYMM && ((a & 0xe0) == 0xe0)) ? SDL_TRUE : SDL_FALSE;
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2016-11-17 03:49:04 +00:00
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}
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}
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}
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2015-06-21 15:33:46 +00:00
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}
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}
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static int
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CPU_haveAltiVec(void)
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{
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volatile int altivec = 0;
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#ifndef SDL_CPUINFO_DISABLED
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#if (defined(__MACOSX__) && (defined(__ppc__) || defined(__ppc64__))) || (defined(__OpenBSD__) && defined(__powerpc__))
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#ifdef __OpenBSD__
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int selectors[2] = { CTL_MACHDEP, CPU_ALTIVEC };
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#else
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int selectors[2] = { CTL_HW, HW_VECTORUNIT };
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#endif
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int hasVectorUnit = 0;
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size_t length = sizeof(hasVectorUnit);
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int error = sysctl(selectors, 2, &hasVectorUnit, &length, NULL, 0);
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if (0 == error)
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altivec = (hasVectorUnit != 0);
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#elif SDL_ALTIVEC_BLITTERS && HAVE_SETJMP
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void (*handler) (int sig);
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handler = signal(SIGILL, illegal_instruction);
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if (setjmp(jmpbuf) == 0) {
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|
|
asm volatile ("mtspr 256, %0\n\t" "vand %%v0, %%v0, %%v0"::"r" (-1));
|
|
|
|
altivec = 1;
|
|
|
|
}
|
|
|
|
signal(SIGILL, handler);
|
|
|
|
#endif
|
|
|
|
#endif
|
|
|
|
return altivec;
|
|
|
|
}
|
|
|
|
|
2019-10-25 01:12:08 +00:00
|
|
|
#ifdef __linux__
|
|
|
|
|
|
|
|
#include <unistd.h>
|
|
|
|
#include <sys/types.h>
|
|
|
|
#include <sys/stat.h>
|
|
|
|
#include <fcntl.h>
|
|
|
|
#include <elf.h>
|
|
|
|
|
|
|
|
static SDL_bool
|
|
|
|
CPU_haveARMSIMD(void)
|
|
|
|
{
|
|
|
|
int arm_simd = 0;
|
|
|
|
int fd;
|
|
|
|
|
|
|
|
fd = open("/proc/self/auxv", O_RDONLY);
|
|
|
|
if (fd >= 0)
|
|
|
|
{
|
|
|
|
Elf32_auxv_t aux;
|
|
|
|
while (read(fd, &aux, sizeof aux) == sizeof aux)
|
|
|
|
{
|
|
|
|
if (aux.a_type == AT_PLATFORM)
|
|
|
|
{
|
|
|
|
const char *plat = (const char *) aux.a_un.a_val;
|
|
|
|
arm_simd = strncmp(plat, "v6l", 3) == 0 ||
|
|
|
|
strncmp(plat, "v7l", 3) == 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
close(fd);
|
|
|
|
}
|
|
|
|
return arm_simd;
|
|
|
|
}
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
static SDL_bool
|
|
|
|
CPU_haveARMSIMD(void)
|
|
|
|
{
|
|
|
|
#warning SDL_HasARMSIMD is not implemented for this ARM platform. Write me.
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#if (defined(__LINUX__) || defined(__ANDROID__)) && defined(__ARM_ARCH) && !defined(HAVE_GETAUXVAL)
|
2016-11-17 06:15:16 +00:00
|
|
|
static int
|
2016-11-17 20:57:58 +00:00
|
|
|
readProcAuxvForNeon(void)
|
2016-11-17 06:15:16 +00:00
|
|
|
{
|
|
|
|
int neon = 0;
|
2016-11-17 20:57:58 +00:00
|
|
|
int kv[2];
|
|
|
|
const int fd = open("/proc/self/auxv", O_RDONLY);
|
2016-11-17 21:04:00 +00:00
|
|
|
if (fd != -1) {
|
|
|
|
while (read(fd, kv, sizeof (kv)) == sizeof (kv)) {
|
|
|
|
if (kv[0] == AT_HWCAP) {
|
|
|
|
neon = ((kv[1] & HWCAP_NEON) == HWCAP_NEON);
|
|
|
|
break;
|
|
|
|
}
|
2016-11-17 20:57:58 +00:00
|
|
|
}
|
2016-11-17 21:04:00 +00:00
|
|
|
close(fd);
|
2016-11-17 20:57:58 +00:00
|
|
|
}
|
|
|
|
return neon;
|
|
|
|
}
|
|
|
|
#endif
|
2016-11-17 06:15:16 +00:00
|
|
|
|
2016-11-17 20:57:58 +00:00
|
|
|
|
|
|
|
static int
|
|
|
|
CPU_haveNEON(void)
|
|
|
|
{
|
2016-11-17 06:15:16 +00:00
|
|
|
/* The way you detect NEON is a privileged instruction on ARM, so you have
|
|
|
|
query the OS kernel in a platform-specific way. :/ */
|
2018-12-04 15:50:31 +00:00
|
|
|
#if defined(SDL_CPUINFO_DISABLED)
|
|
|
|
return 0; /* disabled */
|
|
|
|
#elif (defined(__WINDOWS__) || defined(__WINRT__)) && (defined(_M_ARM) || defined(_M_ARM64))
|
|
|
|
/* Visual Studio, for ARM, doesn't define __ARM_ARCH. Handle this first. */
|
|
|
|
/* Seems to have been removed */
|
|
|
|
# if !defined(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE)
|
|
|
|
# define PF_ARM_NEON_INSTRUCTIONS_AVAILABLE 19
|
|
|
|
# endif
|
|
|
|
/* All WinRT ARM devices are required to support NEON, but just in case. */
|
|
|
|
return IsProcessorFeaturePresent(PF_ARM_NEON_INSTRUCTIONS_AVAILABLE) != 0;
|
|
|
|
#elif !defined(__ARM_ARCH)
|
|
|
|
return 0; /* not an ARM CPU at all. */
|
2016-11-17 20:57:58 +00:00
|
|
|
#elif __ARM_ARCH >= 8
|
2016-11-22 01:35:59 +00:00
|
|
|
return 1; /* ARMv8 always has non-optional NEON support. */
|
|
|
|
#elif defined(__APPLE__) && (__ARM_ARCH >= 7)
|
|
|
|
/* (note that sysctlbyname("hw.optional.neon") doesn't work!) */
|
|
|
|
return 1; /* all Apple ARMv7 chips and later have NEON. */
|
2016-11-17 20:57:58 +00:00
|
|
|
#elif defined(__APPLE__)
|
2017-11-12 01:21:47 +00:00
|
|
|
return 0; /* assume anything else from Apple doesn't have NEON. */
|
2017-08-17 01:31:03 +00:00
|
|
|
#elif defined(__QNXNTO__)
|
|
|
|
return SYSPAGE_ENTRY(cpuinfo)->flags & ARM_CPU_FLAG_NEON;
|
2016-11-17 21:01:59 +00:00
|
|
|
#elif (defined(__LINUX__) || defined(__ANDROID__)) && defined(HAVE_GETAUXVAL)
|
2016-11-17 22:03:43 +00:00
|
|
|
return ((getauxval(AT_HWCAP) & HWCAP_NEON) == HWCAP_NEON);
|
2018-12-01 17:19:11 +00:00
|
|
|
#elif defined(__LINUX__)
|
|
|
|
return readProcAuxvForNeon();
|
|
|
|
#elif defined(__ANDROID__)
|
|
|
|
/* Use NDK cpufeatures to read either /proc/self/auxv or /proc/cpuinfo */
|
|
|
|
{
|
|
|
|
AndroidCpuFamily cpu_family = android_getCpuFamily();
|
|
|
|
if (cpu_family == ANDROID_CPU_FAMILY_ARM) {
|
|
|
|
uint64_t cpu_features = android_getCpuFeatures();
|
|
|
|
if ((cpu_features & ANDROID_CPU_ARM_FEATURE_NEON) != 0) {
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
2016-11-17 20:57:58 +00:00
|
|
|
#else
|
|
|
|
#warning SDL_HasNEON is not implemented for this ARM platform. Write me.
|
2016-11-17 21:01:59 +00:00
|
|
|
return 0;
|
2016-11-17 06:15:16 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
2015-06-21 15:33:46 +00:00
|
|
|
static int
|
|
|
|
CPU_have3DNow(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
if (CPU_CPUIDMaxFunction > 0) { /* that is, do we have CPUID at all? */
|
2015-06-21 15:33:46 +00:00
|
|
|
int a, b, c, d;
|
|
|
|
cpuid(0x80000000, a, b, c, d);
|
|
|
|
if (a >= 0x80000001) {
|
|
|
|
cpuid(0x80000001, a, b, c, d);
|
|
|
|
return (d & 0x80000000);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-11-17 03:49:04 +00:00
|
|
|
#define CPU_haveRDTSC() (CPU_CPUIDFeatures[3] & 0x00000010)
|
|
|
|
#define CPU_haveMMX() (CPU_CPUIDFeatures[3] & 0x00800000)
|
|
|
|
#define CPU_haveSSE() (CPU_CPUIDFeatures[3] & 0x02000000)
|
|
|
|
#define CPU_haveSSE2() (CPU_CPUIDFeatures[3] & 0x04000000)
|
|
|
|
#define CPU_haveSSE3() (CPU_CPUIDFeatures[2] & 0x00000001)
|
|
|
|
#define CPU_haveSSE41() (CPU_CPUIDFeatures[2] & 0x00080000)
|
|
|
|
#define CPU_haveSSE42() (CPU_CPUIDFeatures[2] & 0x00100000)
|
|
|
|
#define CPU_haveAVX() (CPU_OSSavesYMM && (CPU_CPUIDFeatures[2] & 0x10000000))
|
2015-06-21 15:33:46 +00:00
|
|
|
|
|
|
|
static int
|
|
|
|
CPU_haveAVX2(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
if (CPU_OSSavesYMM && (CPU_CPUIDMaxFunction >= 7)) {
|
2015-06-21 15:33:46 +00:00
|
|
|
int a, b, c, d;
|
2016-11-17 06:41:56 +00:00
|
|
|
(void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
|
2016-11-17 03:49:04 +00:00
|
|
|
cpuid(7, a, b, c, d);
|
|
|
|
return (b & 0x00000020);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-05-21 15:35:42 +00:00
|
|
|
static int
|
|
|
|
CPU_haveAVX512F(void)
|
|
|
|
{
|
|
|
|
if (CPU_OSSavesZMM && (CPU_CPUIDMaxFunction >= 7)) {
|
|
|
|
int a, b, c, d;
|
|
|
|
(void) a; (void) b; (void) c; (void) d; /* compiler warnings... */
|
|
|
|
cpuid(7, a, b, c, d);
|
|
|
|
return (b & 0x00010000);
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-21 15:33:46 +00:00
|
|
|
static int SDL_CPUCount = 0;
|
|
|
|
|
|
|
|
int
|
|
|
|
SDL_GetCPUCount(void)
|
|
|
|
{
|
|
|
|
if (!SDL_CPUCount) {
|
|
|
|
#ifndef SDL_CPUINFO_DISABLED
|
|
|
|
#if defined(HAVE_SYSCONF) && defined(_SC_NPROCESSORS_ONLN)
|
|
|
|
if (SDL_CPUCount <= 0) {
|
|
|
|
SDL_CPUCount = (int)sysconf(_SC_NPROCESSORS_ONLN);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef HAVE_SYSCTLBYNAME
|
|
|
|
if (SDL_CPUCount <= 0) {
|
|
|
|
size_t size = sizeof(SDL_CPUCount);
|
|
|
|
sysctlbyname("hw.ncpu", &SDL_CPUCount, &size, NULL, 0);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef __WIN32__
|
|
|
|
if (SDL_CPUCount <= 0) {
|
|
|
|
SYSTEM_INFO info;
|
|
|
|
GetSystemInfo(&info);
|
|
|
|
SDL_CPUCount = info.dwNumberOfProcessors;
|
|
|
|
}
|
|
|
|
#endif
|
2017-08-21 20:00:40 +00:00
|
|
|
#ifdef __OS2__
|
|
|
|
if (SDL_CPUCount <= 0) {
|
|
|
|
DosQuerySysInfo(QSV_NUMPROCESSORS, QSV_NUMPROCESSORS,
|
|
|
|
&SDL_CPUCount, sizeof(SDL_CPUCount) );
|
|
|
|
}
|
|
|
|
#endif
|
2015-06-21 15:33:46 +00:00
|
|
|
#endif
|
|
|
|
/* There has to be at least 1, right? :) */
|
|
|
|
if (SDL_CPUCount <= 0) {
|
|
|
|
SDL_CPUCount = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return SDL_CPUCount;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Oh, such a sweet sweet trick, just not very useful. :) */
|
|
|
|
static const char *
|
|
|
|
SDL_GetCPUType(void)
|
|
|
|
{
|
|
|
|
static char SDL_CPUType[13];
|
|
|
|
|
|
|
|
if (!SDL_CPUType[0]) {
|
|
|
|
int i = 0;
|
|
|
|
|
2016-11-17 03:49:04 +00:00
|
|
|
CPU_calcCPUIDFeatures();
|
|
|
|
if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
|
2015-06-21 15:33:46 +00:00
|
|
|
int a, b, c, d;
|
|
|
|
cpuid(0x00000000, a, b, c, d);
|
|
|
|
(void) a;
|
|
|
|
SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(b & 0xff);
|
|
|
|
|
|
|
|
SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(d & 0xff);
|
|
|
|
|
|
|
|
SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUType[i++] = (char)(c & 0xff);
|
|
|
|
}
|
|
|
|
if (!SDL_CPUType[0]) {
|
|
|
|
SDL_strlcpy(SDL_CPUType, "Unknown", sizeof(SDL_CPUType));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return SDL_CPUType;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef TEST_MAIN /* !!! FIXME: only used for test at the moment. */
|
|
|
|
static const char *
|
|
|
|
SDL_GetCPUName(void)
|
|
|
|
{
|
|
|
|
static char SDL_CPUName[48];
|
|
|
|
|
|
|
|
if (!SDL_CPUName[0]) {
|
|
|
|
int i = 0;
|
|
|
|
int a, b, c, d;
|
|
|
|
|
2016-11-17 03:49:04 +00:00
|
|
|
CPU_calcCPUIDFeatures();
|
|
|
|
if (CPU_CPUIDMaxFunction > 0) { /* do we have CPUID at all? */
|
2015-06-21 15:33:46 +00:00
|
|
|
cpuid(0x80000000, a, b, c, d);
|
|
|
|
if (a >= 0x80000004) {
|
|
|
|
cpuid(0x80000002, a, b, c, d);
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
cpuid(0x80000003, a, b, c, d);
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
cpuid(0x80000004, a, b, c, d);
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(a & 0xff); a >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(b & 0xff); b >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(c & 0xff); c >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
SDL_CPUName[i++] = (char)(d & 0xff); d >>= 8;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
if (!SDL_CPUName[0]) {
|
|
|
|
SDL_strlcpy(SDL_CPUName, "Unknown", sizeof(SDL_CPUName));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return SDL_CPUName;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
int
|
|
|
|
SDL_GetCPUCacheLineSize(void)
|
|
|
|
{
|
|
|
|
const char *cpuType = SDL_GetCPUType();
|
|
|
|
int a, b, c, d;
|
|
|
|
(void) a; (void) b; (void) c; (void) d;
|
|
|
|
if (SDL_strcmp(cpuType, "GenuineIntel") == 0) {
|
|
|
|
cpuid(0x00000001, a, b, c, d);
|
|
|
|
return (((b >> 8) & 0xff) * 8);
|
2019-05-15 11:54:36 +00:00
|
|
|
} else if (SDL_strcmp(cpuType, "AuthenticAMD") == 0 || SDL_strcmp(cpuType, "HygonGenuine") == 0) {
|
2015-06-21 15:33:46 +00:00
|
|
|
cpuid(0x80000005, a, b, c, d);
|
|
|
|
return (c & 0xff);
|
|
|
|
} else {
|
|
|
|
/* Just make a guess here... */
|
|
|
|
return SDL_CACHELINE_SIZE;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static Uint32 SDL_CPUFeatures = 0xFFFFFFFF;
|
2018-05-21 15:34:57 +00:00
|
|
|
static Uint32 SDL_SIMDAlignment = 0xFFFFFFFF;
|
2015-06-21 15:33:46 +00:00
|
|
|
|
|
|
|
static Uint32
|
|
|
|
SDL_GetCPUFeatures(void)
|
|
|
|
{
|
|
|
|
if (SDL_CPUFeatures == 0xFFFFFFFF) {
|
2016-11-17 03:49:04 +00:00
|
|
|
CPU_calcCPUIDFeatures();
|
2015-06-21 15:33:46 +00:00
|
|
|
SDL_CPUFeatures = 0;
|
2019-10-21 02:17:59 +00:00
|
|
|
SDL_SIMDAlignment = sizeof(void *); /* a good safe base value */
|
2015-06-21 15:33:46 +00:00
|
|
|
if (CPU_haveRDTSC()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_RDTSC;
|
|
|
|
}
|
|
|
|
if (CPU_haveAltiVec()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_ALTIVEC;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveMMX()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_MMX;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_have3DNow()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_3DNOW;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 8);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveSSE()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_SSE;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveSSE2()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_SSE2;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveSSE3()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_SSE3;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveSSE41()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_SSE41;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveSSE42()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_SSE42;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveAVX()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_AVX;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
if (CPU_haveAVX2()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_AVX2;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 32);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
2018-05-21 15:35:42 +00:00
|
|
|
if (CPU_haveAVX512F()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_AVX512F;
|
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 64);
|
|
|
|
}
|
2019-10-25 01:12:08 +00:00
|
|
|
if (CPU_haveARMSIMD()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_ARM_SIMD;
|
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
|
|
|
}
|
2016-11-17 06:15:16 +00:00
|
|
|
if (CPU_haveNEON()) {
|
|
|
|
SDL_CPUFeatures |= CPU_HAS_NEON;
|
2018-05-21 15:34:57 +00:00
|
|
|
SDL_SIMDAlignment = SDL_max(SDL_SIMDAlignment, 16);
|
2016-11-17 06:15:16 +00:00
|
|
|
}
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
return SDL_CPUFeatures;
|
|
|
|
}
|
|
|
|
|
2016-11-17 03:49:04 +00:00
|
|
|
#define CPU_FEATURE_AVAILABLE(f) ((SDL_GetCPUFeatures() & f) ? SDL_TRUE : SDL_FALSE)
|
|
|
|
|
|
|
|
SDL_bool SDL_HasRDTSC(void)
|
2015-06-21 15:33:46 +00:00
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_RDTSC);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasAltiVec(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_ALTIVEC);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasMMX(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_MMX);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_Has3DNow(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_3DNOW);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasSSE(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasSSE2(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE2);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasSSE3(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE3);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasSSE41(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE41);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasSSE42(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_SSE42);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasAVX(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
SDL_bool
|
|
|
|
SDL_HasAVX2(void)
|
|
|
|
{
|
2016-11-17 03:49:04 +00:00
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX2);
|
2015-06-21 15:33:46 +00:00
|
|
|
}
|
|
|
|
|
2018-05-21 15:35:42 +00:00
|
|
|
SDL_bool
|
|
|
|
SDL_HasAVX512F(void)
|
|
|
|
{
|
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_AVX512F);
|
|
|
|
}
|
|
|
|
|
2019-10-25 01:12:08 +00:00
|
|
|
SDL_bool
|
|
|
|
SDL_HasARMSIMD(void)
|
|
|
|
{
|
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_ARM_SIMD);
|
|
|
|
}
|
|
|
|
|
2016-11-17 06:15:16 +00:00
|
|
|
SDL_bool
|
|
|
|
SDL_HasNEON(void)
|
|
|
|
{
|
|
|
|
return CPU_FEATURE_AVAILABLE(CPU_HAS_NEON);
|
|
|
|
}
|
|
|
|
|
2015-06-21 15:33:46 +00:00
|
|
|
static int SDL_SystemRAM = 0;
|
|
|
|
|
|
|
|
int
|
|
|
|
SDL_GetSystemRAM(void)
|
|
|
|
{
|
|
|
|
if (!SDL_SystemRAM) {
|
|
|
|
#ifndef SDL_CPUINFO_DISABLED
|
|
|
|
#if defined(HAVE_SYSCONF) && defined(_SC_PHYS_PAGES) && defined(_SC_PAGESIZE)
|
|
|
|
if (SDL_SystemRAM <= 0) {
|
|
|
|
SDL_SystemRAM = (int)((Sint64)sysconf(_SC_PHYS_PAGES) * sysconf(_SC_PAGESIZE) / (1024*1024));
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef HAVE_SYSCTLBYNAME
|
|
|
|
if (SDL_SystemRAM <= 0) {
|
2015-12-29 07:32:47 +00:00
|
|
|
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || defined(__NetBSD__)
|
2015-06-21 15:33:46 +00:00
|
|
|
#ifdef HW_REALMEM
|
|
|
|
int mib[2] = {CTL_HW, HW_REALMEM};
|
|
|
|
#else
|
|
|
|
/* might only report up to 2 GiB */
|
|
|
|
int mib[2] = {CTL_HW, HW_PHYSMEM};
|
|
|
|
#endif /* HW_REALMEM */
|
|
|
|
#else
|
|
|
|
int mib[2] = {CTL_HW, HW_MEMSIZE};
|
|
|
|
#endif /* __FreeBSD__ || __FreeBSD_kernel__ */
|
|
|
|
Uint64 memsize = 0;
|
|
|
|
size_t len = sizeof(memsize);
|
|
|
|
|
|
|
|
if (sysctl(mib, 2, &memsize, &len, NULL, 0) == 0) {
|
|
|
|
SDL_SystemRAM = (int)(memsize / (1024*1024));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
#ifdef __WIN32__
|
|
|
|
if (SDL_SystemRAM <= 0) {
|
|
|
|
MEMORYSTATUSEX stat;
|
|
|
|
stat.dwLength = sizeof(stat);
|
|
|
|
if (GlobalMemoryStatusEx(&stat)) {
|
|
|
|
SDL_SystemRAM = (int)(stat.ullTotalPhys / (1024 * 1024));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
2017-08-21 20:00:40 +00:00
|
|
|
#ifdef __OS2__
|
|
|
|
if (SDL_SystemRAM <= 0) {
|
|
|
|
Uint32 sysram = 0;
|
|
|
|
DosQuerySysInfo(QSV_TOTPHYSMEM, QSV_TOTPHYSMEM, &sysram, 4);
|
|
|
|
SDL_SystemRAM = (int) (sysram / 0x100000U);
|
|
|
|
}
|
|
|
|
#endif
|
2015-06-21 15:33:46 +00:00
|
|
|
#endif
|
|
|
|
}
|
|
|
|
return SDL_SystemRAM;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2018-05-21 15:34:57 +00:00
|
|
|
size_t
|
|
|
|
SDL_SIMDGetAlignment(void)
|
|
|
|
{
|
|
|
|
if (SDL_SIMDAlignment == 0xFFFFFFFF) {
|
|
|
|
SDL_GetCPUFeatures(); /* make sure this has been calculated */
|
|
|
|
}
|
|
|
|
SDL_assert(SDL_SIMDAlignment != 0);
|
|
|
|
return SDL_SIMDAlignment;
|
|
|
|
}
|
|
|
|
|
|
|
|
void *
|
|
|
|
SDL_SIMDAlloc(const size_t len)
|
|
|
|
{
|
|
|
|
const size_t alignment = SDL_SIMDGetAlignment();
|
|
|
|
const size_t padding = alignment - (len % alignment);
|
|
|
|
const size_t padded = (padding != alignment) ? (len + padding) : len;
|
|
|
|
Uint8 *retval = NULL;
|
|
|
|
Uint8 *ptr = (Uint8 *) SDL_malloc(padded + alignment + sizeof (void *));
|
|
|
|
if (ptr) {
|
|
|
|
/* store the actual malloc pointer right before our aligned pointer. */
|
|
|
|
retval = ptr + sizeof (void *);
|
|
|
|
retval += alignment - (((size_t) retval) % alignment);
|
|
|
|
*(((void **) retval) - 1) = ptr;
|
|
|
|
}
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
SDL_SIMDFree(void *ptr)
|
|
|
|
{
|
|
|
|
if (ptr) {
|
|
|
|
void **realptr = (void **) ptr;
|
|
|
|
realptr--;
|
|
|
|
SDL_free(*(((void **) ptr) - 1));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2015-06-21 15:33:46 +00:00
|
|
|
#ifdef TEST_MAIN
|
|
|
|
|
|
|
|
#include <stdio.h>
|
|
|
|
|
|
|
|
int
|
|
|
|
main()
|
|
|
|
{
|
|
|
|
printf("CPU count: %d\n", SDL_GetCPUCount());
|
|
|
|
printf("CPU type: %s\n", SDL_GetCPUType());
|
|
|
|
printf("CPU name: %s\n", SDL_GetCPUName());
|
|
|
|
printf("CacheLine size: %d\n", SDL_GetCPUCacheLineSize());
|
|
|
|
printf("RDTSC: %d\n", SDL_HasRDTSC());
|
|
|
|
printf("Altivec: %d\n", SDL_HasAltiVec());
|
|
|
|
printf("MMX: %d\n", SDL_HasMMX());
|
|
|
|
printf("3DNow: %d\n", SDL_Has3DNow());
|
|
|
|
printf("SSE: %d\n", SDL_HasSSE());
|
|
|
|
printf("SSE2: %d\n", SDL_HasSSE2());
|
|
|
|
printf("SSE3: %d\n", SDL_HasSSE3());
|
|
|
|
printf("SSE4.1: %d\n", SDL_HasSSE41());
|
|
|
|
printf("SSE4.2: %d\n", SDL_HasSSE42());
|
|
|
|
printf("AVX: %d\n", SDL_HasAVX());
|
|
|
|
printf("AVX2: %d\n", SDL_HasAVX2());
|
2018-05-21 15:35:42 +00:00
|
|
|
printf("AVX-512F: %d\n", SDL_HasAVX512F());
|
2019-10-25 01:12:08 +00:00
|
|
|
printf("ARM SIMD: %d\n", SDL_HasARMSIMD());
|
2016-11-17 06:15:16 +00:00
|
|
|
printf("NEON: %d\n", SDL_HasNEON());
|
2015-06-21 15:33:46 +00:00
|
|
|
printf("RAM: %d MB\n", SDL_GetSystemRAM());
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif /* TEST_MAIN */
|
|
|
|
|
|
|
|
/* vi: set ts=4 sw=4 expandtab: */
|