From b83c651654204dec22d2aec9b4dcfed1aa7b940f Mon Sep 17 00:00:00 2001 From: David Neto Date: Mon, 1 Jun 2020 16:59:24 +0000 Subject: [PATCH] [spirv-reader] Add problematic CFG case as disabled test In this case, a basic block is a continue target for both an outer loop and is also for itself as a single-block loop. Bug: Tint:3 Change-Id: If361004a4b871966674ca972922c45e712ce7c9c Reviewed-on: https://dawn-review.googlesource.com/c/tint/+/22420 Reviewed-by: dan sinclair --- src/reader/spirv/function_cfg_test.cc | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/src/reader/spirv/function_cfg_test.cc b/src/reader/spirv/function_cfg_test.cc index 0e29f5f2b2..7f4b81eae3 100644 --- a/src/reader/spirv/function_cfg_test.cc +++ b/src/reader/spirv/function_cfg_test.cc @@ -6702,6 +6702,33 @@ TEST_F(SpvParserTest, DISABLED_Codegen_IfBreak_FromElse_ForwardWithinElse) { )"; } +TEST_F(SpvParserTest, DISABLED_BlockIsContinueForMoreThanOneHeader) { + // This is valid SPIR-V for Vulkan, but breaks my assumption that a block + // could only be a continue target for at most one header. Block 50 + // is a single block loop but also the continue target for the outer loop. + auto assembly = CommonTypes() + R"( + %100 = OpFunction %void None %voidfn + + %10 = OpLabel + OpBranch %20 + + %20 = OpLabel ; outer loop + OpLoopMerge %99 %50 None + OpBranchConditional %cond %50 %99 + + %50 = OpLabel ; continue target, but also single-block loop + OpLoopMerge %80 %50 None + OpBranchConditional %cond2 %50 %80 + + %80 = OpLabel + OpBranch %20 ; backedge for outer loop + + %99 = OpLabel + OpReturn + OpFunctionEnd +)"; +} + } // namespace } // namespace spirv } // namespace reader