From 0c48d711c7bd51f791b353d7d85ba948b277e2f2 Mon Sep 17 00:00:00 2001 From: Luke Street Date: Wed, 7 May 2025 22:53:10 -0600 Subject: [PATCH] Improve local branch relocation handling Reworks the local-branch handling logic to be more unified: scan_instructions does all the work up front, and process_instruction / display_instruction can simply use the calculated branch destination instead of performing their own is-relocation-target- function-local checks. (Hopefully) Fixes #192 --- objdiff-core/src/arch/arm.rs | 34 +- objdiff-core/src/arch/arm64.rs | 29 +- objdiff-core/src/arch/mips.rs | 45 +- objdiff-core/src/arch/mod.rs | 124 ++++- objdiff-core/src/arch/ppc.rs | 18 +- objdiff-core/src/arch/superh/mod.rs | 78 +++- objdiff-core/src/arch/x86.rs | 57 ++- objdiff-core/src/diff/code.rs | 95 ++-- objdiff-core/src/diff/display.rs | 14 +- objdiff-core/src/obj/mod.rs | 15 +- .../arch_arm__combine_text_sections.snap | 4 +- .../tests/snapshots/arch_arm__read_arm-2.snap | 172 +++++++ .../tests/snapshots/arch_arm__read_arm-3.snap | 3 +- .../snapshots/arch_arm__read_thumb-2.snap | 128 ++++++ .../snapshots/arch_mips__read_mips-2.snap | 54 +++ .../tests/snapshots/arch_ppc__diff_ppc-2.snap | 422 ++++++++++++++++++ .../tests/snapshots/arch_ppc__read_ppc-2.snap | 90 ++++ .../tests/snapshots/arch_x86__read_x86-2.snap | 7 + .../snapshots/arch_x86__read_x86_64-2.snap | 21 + .../arch_x86__read_x86_jumptable-2.snap | 53 +++ .../arch_x86__read_x86_jumptable-3.snap | 16 +- 21 files changed, 1253 insertions(+), 226 deletions(-) diff --git a/objdiff-core/src/arch/arm.rs b/objdiff-core/src/arch/arm.rs index 3ff73e0..6c1412f 100644 --- a/objdiff-core/src/arch/arm.rs +++ b/objdiff-core/src/arch/arm.rs @@ -15,7 +15,7 @@ use crate::{ diff::{ArmArchVersion, ArmR9Usage, DiffObjConfig, display::InstructionPart}, obj::{ InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation, - ScannedInstruction, Section, SectionKind, Symbol, SymbolFlag, SymbolFlagSet, SymbolKind, + Section, SectionKind, Symbol, SymbolFlag, SymbolFlagSet, SymbolKind, }, }; @@ -187,14 +187,14 @@ impl Arch for ArchArm { self.disasm_modes = Self::get_mapping_symbols(sections, symbols); } - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], section_index: usize, _relocations: &[Relocation], diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { let start_addr = address as u32; let end_addr = start_addr + code.len() as u32; @@ -219,7 +219,7 @@ impl Arch for ArchArm { let mut next_mapping = mappings_iter.next(); let ins_count = code.len() / mode.instruction_size(start_addr); - let mut ops = Vec::::with_capacity(ins_count); + let mut ops = Vec::::with_capacity(ins_count); let parse_flags = self.parse_flags(diff_config); @@ -235,12 +235,10 @@ impl Arch for ArchArm { let data = &code[(address - start_addr) as usize..]; if data.len() < ins_size { // Push the remainder as data - ops.push(ScannedInstruction { - ins_ref: InstructionRef { - address: address as u64, - size: data.len() as u8, - opcode: u16::MAX, - }, + ops.push(InstructionRef { + address: address as u64, + size: data.len() as u8, + opcode: u16::MAX, branch_dest: None, }); break; @@ -256,12 +254,10 @@ impl Arch for ArchArm { } _ => { // Invalid instruction size - ops.push(ScannedInstruction { - ins_ref: InstructionRef { - address: address as u64, - size: ins_size as u8, - opcode: u16::MAX, - }, + ops.push(InstructionRef { + address: address as u64, + size: ins_size as u8, + opcode: u16::MAX, branch_dest: None, }); address += ins_size as u32; @@ -325,8 +321,10 @@ impl Arch for ArchArm { unarm::ParseMode::Data => (u16::MAX, None), }; - ops.push(ScannedInstruction { - ins_ref: InstructionRef { address: address as u64, size: ins_size as u8, opcode }, + ops.push(InstructionRef { + address: address as u64, + size: ins_size as u8, + opcode, branch_dest: branch_dest.map(|x| x as u64), }); address += ins_size as u32; diff --git a/objdiff-core/src/arch/arm64.rs b/objdiff-core/src/arch/arm64.rs index a39c727..c086029 100644 --- a/objdiff-core/src/arch/arm64.rs +++ b/objdiff-core/src/arch/arm64.rs @@ -18,7 +18,6 @@ use crate::{ diff::{DiffObjConfig, display::InstructionPart}, obj::{ InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ResolvedRelocation, - ScannedInstruction, }, }; @@ -30,16 +29,16 @@ impl ArchArm64 { } impl Arch for ArchArm64 { - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], _section_index: usize, _relocations: &[Relocation], _diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { let start_address = address; - let mut ops = Vec::::with_capacity(code.len() / 4); + let mut ops = Vec::::with_capacity(code.len() / 4); let mut reader = U8Reader::new(code); let decoder = InstDecoder::default(); @@ -58,8 +57,10 @@ impl Arch for ArchArm64 { DecodeError::InvalidOpcode | DecodeError::InvalidOperand | DecodeError::IncompleteDecoder => { - ops.push(ScannedInstruction { - ins_ref: InstructionRef { address, size: 4, opcode: u16::MAX }, + ops.push(InstructionRef { + address, + size: 4, + opcode: u16::MAX, branch_dest: None, }); continue; @@ -68,9 +69,9 @@ impl Arch for ArchArm64 { } let opcode = opcode_to_u16(ins.opcode); - let ins_ref = InstructionRef { address, size: 4, opcode }; - let branch_dest = branch_dest(ins_ref, &code[offset as usize..offset as usize + 4]); - ops.push(ScannedInstruction { ins_ref, branch_dest }); + let branch_dest = + branch_dest(opcode, address, &code[offset as usize..offset as usize + 4]); + ops.push(InstructionRef { address, size: 4, opcode, branch_dest }); } Ok(ops) @@ -163,7 +164,7 @@ impl Arch for ArchArm64 { } } -fn branch_dest(ins_ref: InstructionRef, code: &[u8]) -> Option { +fn branch_dest(opcode: u16, address: u64, code: &[u8]) -> Option { const OPCODE_B: u16 = opcode_to_u16(Opcode::B); const OPCODE_BL: u16 = opcode_to_u16(Opcode::BL); const OPCODE_BCC: u16 = opcode_to_u16(Opcode::Bcc(0)); @@ -173,21 +174,21 @@ fn branch_dest(ins_ref: InstructionRef, code: &[u8]) -> Option { const OPCODE_TBNZ: u16 = opcode_to_u16(Opcode::TBNZ); let word = u32::from_le_bytes(code.try_into().ok()?); - match ins_ref.opcode { + match opcode { OPCODE_B | OPCODE_BL => { let offset = ((word & 0x03ff_ffff) << 2) as i32; let extended_offset = (offset << 4) >> 4; - ins_ref.address.checked_add_signed(extended_offset as i64) + address.checked_add_signed(extended_offset as i64) } OPCODE_BCC | OPCODE_CBZ | OPCODE_CBNZ => { let offset = (word as i32 & 0x00ff_ffe0) >> 3; let extended_offset = (offset << 11) >> 11; - ins_ref.address.checked_add_signed(extended_offset as i64) + address.checked_add_signed(extended_offset as i64) } OPCODE_TBZ | OPCODE_TBNZ => { let offset = (word as i32 & 0x0007_ffe0) >> 3; let extended_offset = (offset << 16) >> 16; - ins_ref.address.checked_add_signed(extended_offset as i64) + address.checked_add_signed(extended_offset as i64) } _ => None, } diff --git a/objdiff-core/src/arch/mips.rs b/objdiff-core/src/arch/mips.rs index 6f5147d..2608de6 100644 --- a/objdiff-core/src/arch/mips.rs +++ b/objdiff-core/src/arch/mips.rs @@ -3,7 +3,6 @@ use alloc::{ string::{String, ToString}, vec::Vec, }; -use core::ops::Range; use anyhow::{Result, bail}; use object::{Endian as _, Object as _, ObjectSection as _, ObjectSymbol as _, elf}; @@ -19,7 +18,7 @@ use crate::{ diff::{DiffObjConfig, MipsAbi, MipsInstrCategory, display::InstructionPart}, obj::{ InstructionArg, InstructionArgValue, InstructionRef, Relocation, RelocationFlags, - ResolvedInstructionRef, ResolvedRelocation, ScannedInstruction, SymbolFlag, SymbolFlagSet, + ResolvedInstructionRef, ResolvedRelocation, SymbolFlag, SymbolFlagSet, }, }; @@ -189,16 +188,16 @@ impl ArchMips { } impl Arch for ArchMips { - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], _section_index: usize, _relocations: &[Relocation], diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { let instruction_flags = self.instruction_flags(diff_config); - let mut ops = Vec::::with_capacity(code.len() / 4); + let mut ops = Vec::::with_capacity(code.len() / 4); let mut cur_addr = address as u32; for chunk in code.chunks_exact(4) { let code = self.endianness.read_u32_bytes(chunk.try_into()?); @@ -206,10 +205,7 @@ impl Arch for ArchMips { rabbitizer::Instruction::new(code, Vram::new(cur_addr), instruction_flags); let opcode = instruction.opcode() as u16; let branch_dest = instruction.get_branch_vram_generic().map(|v| v.inner() as u64); - ops.push(ScannedInstruction { - ins_ref: InstructionRef { address: cur_addr as u64, size: 4, opcode }, - branch_dest, - }); + ops.push(InstructionRef { address: cur_addr as u64, size: 4, opcode, branch_dest }); cur_addr += 4; } Ok(ops) @@ -225,16 +221,7 @@ impl Arch for ArchMips { let display_flags = self.instruction_display_flags(diff_config); let opcode = instruction.opcode(); cb(InstructionPart::opcode(opcode.name(), opcode as u16))?; - let start_address = resolved.symbol.address; - let function_range = start_address..start_address + resolved.symbol.size; - push_args( - &instruction, - resolved.relocation, - function_range, - resolved.section_index, - &display_flags, - cb, - )?; + push_args(&instruction, resolved.relocation, &display_flags, cb)?; Ok(()) } @@ -338,8 +325,6 @@ impl Arch for ArchMips { fn push_args( instruction: &rabbitizer::Instruction, relocation: Option, - function_range: Range, - section_index: usize, display_flags: &rabbitizer::InstructionDisplayFlags, mut arg_cb: impl FnMut(InstructionPart) -> Result<()>, ) -> Result<()> { @@ -362,23 +347,7 @@ fn push_args( } ValuedOperand::core_label(..) | ValuedOperand::core_branch_target_label(..) => { if let Some(resolved) = relocation { - // If the relocation target is within the current function, we can - // convert it into a relative branch target. Note that we check - // target_address > start_address instead of >= so that recursive - // tail calls are not considered branch targets. - let target_address = - resolved.symbol.address.checked_add_signed(resolved.relocation.addend); - if resolved.symbol.section == Some(section_index) - && target_address.is_some_and(|addr| { - addr > function_range.start && addr < function_range.end - }) - { - // TODO move this logic up a level - let target_address = target_address.unwrap(); - arg_cb(InstructionPart::branch_dest(target_address))?; - } else { - push_reloc(resolved.relocation, &mut arg_cb)?; - } + push_reloc(resolved.relocation, &mut arg_cb)?; } else if let Some(branch_dest) = instruction .get_branch_offset_generic() .map(|o| (instruction.vram() + o).inner() as u64) diff --git a/objdiff-core/src/arch/mod.rs b/objdiff-core/src/arch/mod.rs index ed8f2db..5cedba8 100644 --- a/objdiff-core/src/arch/mod.rs +++ b/objdiff-core/src/arch/mod.rs @@ -11,8 +11,8 @@ use crate::{ display::{ContextItem, HoverItem, InstructionPart}, }, obj::{ - InstructionArg, Object, ParsedInstruction, Relocation, RelocationFlags, - ResolvedInstructionRef, ScannedInstruction, Section, Symbol, SymbolFlagSet, SymbolKind, + InstructionArg, InstructionRef, Object, ParsedInstruction, Relocation, RelocationFlags, + ResolvedInstructionRef, ResolvedSymbol, Section, Symbol, SymbolFlagSet, SymbolKind, }, util::ReallySigned, }; @@ -182,46 +182,108 @@ impl DataType { } } -pub trait Arch: Send + Sync + Debug { - // Finishes arch-specific initialization that must be done after sections have been combined. - fn post_init(&mut self, _sections: &[Section], _symbols: &[Symbol]) {} - +impl dyn Arch { /// Generate a list of instructions references (offset, size, opcode) from the given code. /// - /// The opcode IDs are used to generate the initial diff. Implementations should do as little - /// parsing as possible here: just enough to identify the base instruction opcode, size, and - /// possible branch destination (for visual representation). As needed, instructions are parsed - /// via `process_instruction` to compare their arguments. - fn scan_instructions( + /// See [`scan_instructions_internal`] for more details. + pub fn scan_instructions( &self, - address: u64, - code: &[u8], - section_index: usize, - relocations: &[Relocation], + resolved: ResolvedSymbol, diff_config: &DiffObjConfig, - ) -> Result>; + ) -> Result> { + let mut result = self.scan_instructions_internal( + resolved.symbol.address, + resolved.data, + resolved.section_index, + &resolved.section.relocations, + diff_config, + )?; + + let function_start = resolved.symbol.address; + let function_end = function_start + resolved.symbol.size; + + // Remove any branch destinations that are outside the function range + for ins in result.iter_mut() { + if let Some(branch_dest) = ins.branch_dest { + if branch_dest < function_start || branch_dest >= function_end { + ins.branch_dest = None; + } + } + } + + // Resolve relocation targets within the same function to branch destinations + let mut ins_iter = result.iter_mut().peekable(); + 'outer: for reloc in resolved + .section + .relocations + .iter() + .skip_while(|r| r.address < function_start) + .take_while(|r| r.address < function_end) + { + let ins = loop { + let Some(ins) = ins_iter.peek_mut() else { + break 'outer; + }; + if reloc.address < ins.address { + continue 'outer; + } + let ins = ins_iter.next().unwrap(); + if reloc.address >= ins.address && reloc.address < ins.address + ins.size as u64 { + break ins; + } + }; + // Clear existing branch destination for instructions with relocations + ins.branch_dest = None; + let Some(target) = resolved.obj.symbols.get(reloc.target_symbol) else { + continue; + }; + if target.section != Some(resolved.section_index) { + continue; + } + let Some(target_address) = target.address.checked_add_signed(reloc.addend) else { + continue; + }; + // If the target address is within the function range, set it as a branch destination + if target_address >= function_start && target_address < function_end { + ins.branch_dest = Some(target_address); + } + } + + Ok(result) + } /// Parse an instruction to gather its mnemonic and arguments for more detailed comparison. /// /// This is called only when we need to compare the arguments of an instruction. - fn process_instruction( + pub fn process_instruction( &self, resolved: ResolvedInstructionRef, diff_config: &DiffObjConfig, ) -> Result { let mut mnemonic = None; let mut args = Vec::with_capacity(8); + let mut relocation_emitted = false; self.display_instruction(resolved, diff_config, &mut |part| { match part { InstructionPart::Opcode(m, _) => mnemonic = Some(Cow::Owned(m.into_owned())), - InstructionPart::Arg(arg) => args.push(arg.into_static()), + InstructionPart::Arg(arg) => { + if arg == InstructionArg::Reloc { + relocation_emitted = true; + // If the relocation was resolved to a branch destination, emit that instead. + if let Some(dest) = resolved.ins_ref.branch_dest { + args.push(InstructionArg::BranchDest(dest)); + return Ok(()); + } + } + args.push(arg.into_static()); + } _ => {} } Ok(()) })?; // If the instruction has a relocation, but we didn't format it in the display, add it to // the end of the arguments list. - if resolved.relocation.is_some() && !args.contains(&InstructionArg::Reloc) { + if resolved.relocation.is_some() && !relocation_emitted { args.push(InstructionArg::Reloc); } Ok(ParsedInstruction { @@ -230,6 +292,26 @@ pub trait Arch: Send + Sync + Debug { args, }) } +} + +pub trait Arch: Send + Sync + Debug { + /// Finishes arch-specific initialization that must be done after sections have been combined. + fn post_init(&mut self, _sections: &[Section], _symbols: &[Symbol]) {} + + /// Generate a list of instructions references (offset, size, opcode) from the given code. + /// + /// The opcode IDs are used to generate the initial diff. Implementations should do as little + /// parsing as possible here: just enough to identify the base instruction opcode, size, and + /// possible branch destination (for visual representation). As needed, instructions are parsed + /// via `process_instruction` to compare their arguments. + fn scan_instructions_internal( + &self, + address: u64, + code: &[u8], + section_index: usize, + relocations: &[Relocation], + diff_config: &DiffObjConfig, + ) -> Result>; /// Format an instruction for display. /// @@ -332,14 +414,14 @@ impl ArchDummy { } impl Arch for ArchDummy { - fn scan_instructions( + fn scan_instructions_internal( &self, _address: u64, _code: &[u8], _section_index: usize, _relocations: &[Relocation], _diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { Ok(Vec::new()) } diff --git a/objdiff-core/src/arch/ppc.rs b/objdiff-core/src/arch/ppc.rs index 3e2a3c8..f62b38f 100644 --- a/objdiff-core/src/arch/ppc.rs +++ b/objdiff-core/src/arch/ppc.rs @@ -19,7 +19,7 @@ use crate::{ }, obj::{ InstructionRef, Object, Relocation, RelocationFlags, ResolvedInstructionRef, - ResolvedRelocation, ScannedInstruction, Symbol, SymbolFlag, SymbolFlagSet, + ResolvedRelocation, Symbol, SymbolFlag, SymbolFlagSet, }, }; @@ -82,24 +82,22 @@ impl ArchPpc { } impl Arch for ArchPpc { - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], _section_index: usize, _relocations: &[Relocation], _diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { ensure!(code.len() & 3 == 0, "Code length must be a multiple of 4"); let ins_count = code.len() / 4; - let mut insts = Vec::::with_capacity(ins_count); + let mut insts = Vec::::with_capacity(ins_count); for (cur_addr, ins) in ppc750cl::InsIter::new(code, address as u32) { - insts.push(ScannedInstruction { - ins_ref: InstructionRef { - address: cur_addr as u64, - size: 4, - opcode: u8::from(ins.op) as u16, - }, + insts.push(InstructionRef { + address: cur_addr as u64, + size: 4, + opcode: u8::from(ins.op) as u16, branch_dest: ins.branch_dest(cur_addr).map(u64::from), }); } diff --git a/objdiff-core/src/arch/superh/mod.rs b/objdiff-core/src/arch/superh/mod.rs index e349a0b..e4cde00 100644 --- a/objdiff-core/src/arch/superh/mod.rs +++ b/objdiff-core/src/arch/superh/mod.rs @@ -6,9 +6,7 @@ use object::elf; use crate::{ arch::{Arch, superh::disasm::sh2_disasm}, diff::{DiffObjConfig, display::InstructionPart}, - obj::{ - InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ScannedInstruction, - }, + obj::{InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef}, }; pub mod disasm; @@ -26,15 +24,15 @@ struct DataInfo { } impl Arch for ArchSuperH { - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], _section_index: usize, _relocations: &[Relocation], _diff_config: &DiffObjConfig, - ) -> Result> { - let mut ops = Vec::::with_capacity(code.len() / 2); + ) -> Result> { + let mut ops = Vec::::with_capacity(code.len() / 2); let mut offset = address; for chunk in code.chunks_exact(2) { @@ -55,9 +53,7 @@ impl Arch for ArchSuperH { Some(InstructionPart::Opcode(_, val)) => *val, _ => 0, }; - let ins_ref: InstructionRef = - InstructionRef { address: offset, size: 2, opcode: opcode_enum }; - ops.push(ScannedInstruction { ins_ref, branch_dest }); + ops.push(InstructionRef { address: offset, size: 2, opcode: opcode_enum, branch_dest }); offset += 2; } @@ -256,7 +252,7 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1000, size: 2, opcode }, + ins_ref: InstructionRef { address: 0x1000, size: 2, opcode, branch_dest: None }, code: &code, ..Default::default() }, @@ -334,7 +330,7 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1000, size: 2, opcode }, + ins_ref: InstructionRef { address: 0x1000, size: 2, opcode, branch_dest: None }, code: &code, ..Default::default() }, @@ -417,7 +413,7 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1000, size: 2, opcode }, + ins_ref: InstructionRef { address: 0x1000, size: 2, opcode, branch_dest: None }, code: &code, ..Default::default() }, @@ -454,7 +450,7 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1000, size: 2, opcode }, + ins_ref: InstructionRef { address: 0x1000, size: 2, opcode, branch_dest: None }, code: &code, ..Default::default() }, @@ -503,7 +499,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -539,7 +540,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -578,7 +584,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -617,7 +628,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -649,7 +665,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -678,7 +699,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &code, ..Default::default() }, @@ -710,7 +736,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &opcode.to_be_bytes(), symbol: &Symbol { address: 0x0606F378, // func base address @@ -755,7 +786,12 @@ mod test { arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: addr as u64, size: 2, opcode }, + ins_ref: InstructionRef { + address: addr as u64, + size: 2, + opcode, + branch_dest: None, + }, code: &opcode.to_be_bytes(), symbol: &Symbol { address: 0x0606F378, // func base address diff --git a/objdiff-core/src/arch/x86.rs b/objdiff-core/src/arch/x86.rs index 42c330f..d01b0c0 100644 --- a/objdiff-core/src/arch/x86.rs +++ b/objdiff-core/src/arch/x86.rs @@ -11,9 +11,7 @@ use object::{Endian as _, Object as _, ObjectSection as _, pe}; use crate::{ arch::Arch, diff::{DiffObjConfig, X86Formatter, display::InstructionPart}, - obj::{ - InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef, ScannedInstruction, - }, + obj::{InstructionRef, Relocation, RelocationFlags, ResolvedInstructionRef}, }; #[derive(Debug)] @@ -86,14 +84,14 @@ impl ArchX86 { const DATA_OPCODE: u16 = u16::MAX - 1; impl Arch for ArchX86 { - fn scan_instructions( + fn scan_instructions_internal( &self, address: u64, code: &[u8], _section_index: usize, relocations: &[Relocation], _diff_config: &DiffObjConfig, - ) -> Result> { + ) -> Result> { let mut out = Vec::with_capacity(code.len() / 2); let mut decoder = self.decoder(code, address); let mut instruction = Instruction::default(); @@ -112,12 +110,10 @@ impl Arch for ArchX86 { })?; if decoder.set_position(decoder.position() + size).is_ok() { decoder.set_ip(address + size as u64); - out.push(ScannedInstruction { - ins_ref: InstructionRef { - address, - size: size as u8, - opcode: DATA_OPCODE, - }, + out.push(InstructionRef { + address, + size: size as u8, + opcode: DATA_OPCODE, branch_dest: None, }); reloc_iter.next(); @@ -134,12 +130,10 @@ impl Arch for ArchX86 { OpKind::NearBranch64 => Some(instruction.near_branch64()), _ => None, }; - out.push(ScannedInstruction { - ins_ref: InstructionRef { - address, - size: instruction.len() as u8, - opcode: instruction.mnemonic() as u16, - }, + out.push(InstructionRef { + address, + size: instruction.len() as u8, + opcode: instruction.mnemonic() as u16, branch_dest, }); } @@ -457,15 +451,16 @@ mod test { 0xc7, 0x85, 0x68, 0xff, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00, 0x8b, 0x04, 0x85, 0x00, 0x00, 0x00, 0x00, ]; - let scanned = arch.scan_instructions(0, &code, 0, &[], &DiffObjConfig::default()).unwrap(); + let scanned = + arch.scan_instructions_internal(0, &code, 0, &[], &DiffObjConfig::default()).unwrap(); assert_eq!(scanned.len(), 2); - assert_eq!(scanned[0].ins_ref.address, 0); - assert_eq!(scanned[0].ins_ref.size, 10); - assert_eq!(scanned[0].ins_ref.opcode, iced_x86::Mnemonic::Mov as u16); + assert_eq!(scanned[0].address, 0); + assert_eq!(scanned[0].size, 10); + assert_eq!(scanned[0].opcode, iced_x86::Mnemonic::Mov as u16); assert_eq!(scanned[0].branch_dest, None); - assert_eq!(scanned[1].ins_ref.address, 10); - assert_eq!(scanned[1].ins_ref.size, 7); - assert_eq!(scanned[1].ins_ref.opcode, iced_x86::Mnemonic::Mov as u16); + assert_eq!(scanned[1].address, 10); + assert_eq!(scanned[1].size, 7); + assert_eq!(scanned[1].opcode, iced_x86::Mnemonic::Mov as u16); assert_eq!(scanned[1].branch_dest, None); } @@ -477,7 +472,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 10, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 10, opcode, branch_dest: None }, code: &code, ..Default::default() }, @@ -513,7 +508,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 10, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 10, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { @@ -558,7 +553,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 7, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 7, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { @@ -601,7 +596,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 5, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 5, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { @@ -632,7 +627,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 6, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 6, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { @@ -671,7 +666,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 7, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 7, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { @@ -710,7 +705,7 @@ mod test { let mut parts = Vec::new(); arch.display_instruction( ResolvedInstructionRef { - ins_ref: InstructionRef { address: 0x1234, size: 5, opcode }, + ins_ref: InstructionRef { address: 0x1234, size: 5, opcode, branch_dest: None }, code: &code, relocation: Some(ResolvedRelocation { relocation: &Relocation { diff --git a/objdiff-core/src/diff/code.rs b/objdiff-core/src/diff/code.rs index 97a1b13..e0d74d7 100644 --- a/objdiff-core/src/diff/code.rs +++ b/objdiff-core/src/diff/code.rs @@ -14,15 +14,15 @@ use super::{ }; use crate::obj::{ InstructionArg, InstructionArgValue, InstructionRef, Object, ResolvedInstructionRef, - ResolvedRelocation, ScannedInstruction, SymbolFlag, SymbolKind, + ResolvedRelocation, ResolvedSymbol, SymbolFlag, SymbolKind, }; pub fn no_diff_code( obj: &Object, - symbol_idx: usize, + symbol_index: usize, diff_config: &DiffObjConfig, ) -> Result { - let symbol = &obj.symbols[symbol_idx]; + let symbol = &obj.symbols[symbol_index]; let section_index = symbol.section.ok_or_else(|| anyhow!("Missing section for symbol"))?; let section = &obj.sections[section_index]; let data = section.data_range(symbol.address, symbol.size as usize).ok_or_else(|| { @@ -33,18 +33,14 @@ pub fn no_diff_code( ) })?; let ops = obj.arch.scan_instructions( - symbol.address, - data, - section_index, - §ion.relocations, + ResolvedSymbol { obj, symbol_index, symbol, section_index, section, data }, diff_config, )?; let mut instruction_rows = Vec::::new(); for i in &ops { - instruction_rows - .push(InstructionDiffRow { ins_ref: Some(i.ins_ref), ..Default::default() }); + instruction_rows.push(InstructionDiffRow { ins_ref: Some(*i), ..Default::default() }); } - resolve_branches(obj, section_index, &ops, &mut instruction_rows); + resolve_branches(&ops, &mut instruction_rows); Ok(SymbolDiff { target_symbol: None, match_percent: None, diff_score: None, instruction_rows }) } @@ -92,22 +88,30 @@ pub fn diff_code( let left_section_idx = left_symbol.section.unwrap(); let right_section_idx = right_symbol.section.unwrap(); let left_ops = left_obj.arch.scan_instructions( - left_symbol.address, - left_data, - left_section_idx, - &left_section.relocations, + ResolvedSymbol { + obj: left_obj, + symbol_index: left_symbol_idx, + symbol: left_symbol, + section_index: left_section_idx, + section: left_section, + data: left_data, + }, diff_config, )?; let right_ops = right_obj.arch.scan_instructions( - right_symbol.address, - right_data, - right_section_idx, - &right_section.relocations, + ResolvedSymbol { + obj: right_obj, + symbol_index: right_symbol_idx, + symbol: right_symbol, + section_index: right_section_idx, + section: right_section, + data: right_data, + }, diff_config, )?; let (mut left_rows, mut right_rows) = diff_instructions(&left_ops, &right_ops)?; - resolve_branches(left_obj, left_section_idx, &left_ops, &mut left_rows); - resolve_branches(right_obj, right_section_idx, &right_ops, &mut right_rows); + resolve_branches(&left_ops, &mut left_rows); + resolve_branches(&right_ops, &mut right_rows); let mut diff_state = InstructionDiffState::default(); for (left_row, right_row) in left_rows.iter_mut().zip(right_rows.iter_mut()) { @@ -154,21 +158,21 @@ pub fn diff_code( } fn diff_instructions( - left_insts: &[ScannedInstruction], - right_insts: &[ScannedInstruction], + left_insts: &[InstructionRef], + right_insts: &[InstructionRef], ) -> Result<(Vec, Vec)> { - let left_ops = left_insts.iter().map(|i| i.ins_ref.opcode).collect::>(); - let right_ops = right_insts.iter().map(|i| i.ins_ref.opcode).collect::>(); + let left_ops = left_insts.iter().map(|i| i.opcode).collect::>(); + let right_ops = right_insts.iter().map(|i| i.opcode).collect::>(); let ops = similar::capture_diff_slices(similar::Algorithm::Patience, &left_ops, &right_ops); if ops.is_empty() { ensure!(left_insts.len() == right_insts.len()); let left_diff = left_insts .iter() - .map(|i| InstructionDiffRow { ins_ref: Some(i.ins_ref), ..Default::default() }) + .map(|i| InstructionDiffRow { ins_ref: Some(*i), ..Default::default() }) .collect(); let right_diff = right_insts .iter() - .map(|i| InstructionDiffRow { ins_ref: Some(i.ins_ref), ..Default::default() }) + .map(|i| InstructionDiffRow { ins_ref: Some(*i), ..Default::default() }) .collect(); return Ok((left_diff, right_diff)); } @@ -187,14 +191,17 @@ fn diff_instructions( for op in ops { let (_tag, left_range, right_range) = op.as_tag_tuple(); let len = left_range.len().max(right_range.len()); - left_diff.extend(left_range.clone().map(|i| InstructionDiffRow { - ins_ref: Some(left_insts[i].ins_ref), - ..Default::default() - })); - right_diff.extend(right_range.clone().map(|i| InstructionDiffRow { - ins_ref: Some(right_insts[i].ins_ref), - ..Default::default() - })); + left_diff.extend( + left_range + .clone() + .map(|i| InstructionDiffRow { ins_ref: Some(left_insts[i]), ..Default::default() }), + ); + right_diff.extend( + right_range.clone().map(|i| InstructionDiffRow { + ins_ref: Some(right_insts[i]), + ..Default::default() + }), + ); if left_range.len() < len { left_diff.extend((left_range.len()..len).map(|_| InstructionDiffRow::default())); } @@ -215,13 +222,7 @@ fn arg_to_string(arg: &InstructionArg, reloc: Option) -> Str } } -fn resolve_branches( - obj: &Object, - section_index: usize, - ops: &[ScannedInstruction], - rows: &mut [InstructionDiffRow], -) { - let section = &obj.sections[section_index]; +fn resolve_branches(ops: &[InstructionRef], rows: &mut [InstructionDiffRow]) { let mut branch_idx = 0u32; // Map addresses to indices let mut addr_map = BTreeMap::::new(); @@ -235,17 +236,7 @@ fn resolve_branches( for ((i, ins_diff), ins) in rows.iter_mut().enumerate().filter(|(_, row)| row.ins_ref.is_some()).zip(ops) { - let branch_dest = if let Some(resolved) = section.relocation_at(obj, ins.ins_ref) { - if resolved.symbol.section == Some(section_index) { - // If the relocation target is in the same section, use it as the branch destination - resolved.symbol.address.checked_add_signed(resolved.relocation.addend) - } else { - None - } - } else { - ins.branch_dest - }; - if let Some(ins_idx) = branch_dest.and_then(|a| addr_map.get(&a).copied()) { + if let Some(ins_idx) = ins.branch_dest.and_then(|a| addr_map.get(&a).copied()) { match branches.entry(ins_idx) { btree_map::Entry::Vacant(e) => { ins_diff.branch_to = Some(InstructionBranchTo { ins_idx, branch_idx }); diff --git a/objdiff-core/src/diff/display.rs b/objdiff-core/src/diff/display.rs index a35834a..3ac315b 100644 --- a/objdiff-core/src/diff/display.rs +++ b/objdiff-core/src/diff/display.rs @@ -205,16 +205,18 @@ pub fn display_row( InstructionPart::Arg(arg) => { let diff_index = ins_row.arg_diff.get(arg_idx).copied().unwrap_or_default(); arg_idx += 1; - match arg { - InstructionArg::Value(value) => cb(DiffTextSegment { + if arg == InstructionArg::Reloc { + displayed_relocation = true; + } + match (arg, resolved.ins_ref.branch_dest) { + (InstructionArg::Value(value), _) => cb(DiffTextSegment { text: DiffText::Argument(value), color: diff_index .get() .map_or(base_color, |i| DiffTextColor::Rotating(i as u8)), pad_to: 0, }), - InstructionArg::Reloc => { - displayed_relocation = true; + (InstructionArg::Reloc, None) => { let resolved = resolved.relocation.unwrap(); let color = diff_index .get() @@ -233,7 +235,9 @@ pub fn display_row( } Ok(()) } - InstructionArg::BranchDest(dest) => { + (InstructionArg::BranchDest(dest), _) | + // If the relocation was resolved to a branch destination, emit that instead. + (InstructionArg::Reloc, Some(dest)) => { if let Some(addr) = dest.checked_sub(resolved.symbol.address) { cb(DiffTextSegment { text: DiffText::BranchDest(addr), diff --git a/objdiff-core/src/obj/mod.rs b/objdiff-core/src/obj/mod.rs index 58e29ea..f111f6e 100644 --- a/objdiff-core/src/obj/mod.rs +++ b/objdiff-core/src/obj/mod.rs @@ -214,11 +214,6 @@ pub struct InstructionRef { pub address: u64, pub size: u8, pub opcode: u16, -} - -#[derive(Copy, Clone, Debug)] -pub struct ScannedInstruction { - pub ins_ref: InstructionRef, pub branch_dest: Option, } @@ -335,6 +330,16 @@ pub struct ResolvedRelocation<'a> { pub symbol: &'a Symbol, } +#[derive(Debug, Copy, Clone)] +pub struct ResolvedSymbol<'obj> { + pub obj: &'obj Object, + pub symbol_index: usize, + pub symbol: &'obj Symbol, + pub section_index: usize, + pub section: &'obj Section, + pub data: &'obj [u8], +} + #[derive(Debug, Copy, Clone)] pub struct ResolvedInstructionRef<'obj> { pub ins_ref: InstructionRef, diff --git a/objdiff-core/tests/snapshots/arch_arm__combine_text_sections.snap b/objdiff-core/tests/snapshots/arch_arm__combine_text_sections.snap index 3a6bcd4..29e8d6e 100644 --- a/objdiff-core/tests/snapshots/arch_arm__combine_text_sections.snap +++ b/objdiff-core/tests/snapshots/arch_arm__combine_text_sections.snap @@ -1,6 +1,5 @@ --- source: objdiff-core/tests/arch_arm.rs -assertion_line: 43 expression: diff.instruction_rows --- [ @@ -10,6 +9,7 @@ expression: diff.instruction_rows address: 76, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -23,6 +23,7 @@ expression: diff.instruction_rows address: 80, size: 4, opcode: 32779, + branch_dest: None, }, ), kind: None, @@ -36,6 +37,7 @@ expression: diff.instruction_rows address: 84, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_arm__read_arm-2.snap b/objdiff-core/tests/snapshots/arch_arm__read_arm-2.snap index eb6020a..20f0f2f 100644 --- a/objdiff-core/tests/snapshots/arch_arm__read_arm-2.snap +++ b/objdiff-core/tests/snapshots/arch_arm__read_arm-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 40, size: 4, opcode: 32895, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 44, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 48, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,7 @@ expression: diff.instruction_rows address: 52, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -61,6 +65,7 @@ expression: diff.instruction_rows address: 56, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -74,6 +79,7 @@ expression: diff.instruction_rows address: 60, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -87,6 +93,7 @@ expression: diff.instruction_rows address: 64, size: 4, opcode: 32770, + branch_dest: None, }, ), kind: None, @@ -100,6 +107,9 @@ expression: diff.instruction_rows address: 68, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -118,6 +128,9 @@ expression: diff.instruction_rows address: 72, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -136,6 +149,9 @@ expression: diff.instruction_rows address: 76, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -154,6 +170,9 @@ expression: diff.instruction_rows address: 80, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -172,6 +191,9 @@ expression: diff.instruction_rows address: 84, size: 4, opcode: 32773, + branch_dest: Some( + 232, + ), }, ), kind: None, @@ -190,6 +212,9 @@ expression: diff.instruction_rows address: 88, size: 4, opcode: 32773, + branch_dest: Some( + 164, + ), }, ), kind: None, @@ -208,6 +233,9 @@ expression: diff.instruction_rows address: 92, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -226,6 +254,9 @@ expression: diff.instruction_rows address: 96, size: 4, opcode: 32773, + branch_dest: Some( + 180, + ), }, ), kind: None, @@ -244,6 +275,9 @@ expression: diff.instruction_rows address: 100, size: 4, opcode: 32773, + branch_dest: Some( + 116, + ), }, ), kind: None, @@ -262,6 +296,9 @@ expression: diff.instruction_rows address: 104, size: 4, opcode: 32773, + branch_dest: Some( + 192, + ), }, ), kind: None, @@ -280,6 +317,9 @@ expression: diff.instruction_rows address: 108, size: 4, opcode: 32773, + branch_dest: Some( + 204, + ), }, ), kind: None, @@ -298,6 +338,9 @@ expression: diff.instruction_rows address: 112, size: 4, opcode: 32773, + branch_dest: Some( + 204, + ), }, ), kind: None, @@ -316,6 +359,7 @@ expression: diff.instruction_rows address: 116, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -336,6 +380,7 @@ expression: diff.instruction_rows address: 120, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -349,6 +394,7 @@ expression: diff.instruction_rows address: 124, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -362,6 +408,7 @@ expression: diff.instruction_rows address: 128, size: 4, opcode: 32800, + branch_dest: None, }, ), kind: None, @@ -375,6 +422,7 @@ expression: diff.instruction_rows address: 132, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -388,6 +436,9 @@ expression: diff.instruction_rows address: 136, size: 4, opcode: 32773, + branch_dest: Some( + 148, + ), }, ), kind: None, @@ -406,6 +457,9 @@ expression: diff.instruction_rows address: 140, size: 4, opcode: 32774, + branch_dest: Some( + 464, + ), }, ), kind: None, @@ -424,6 +478,7 @@ expression: diff.instruction_rows address: 144, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -437,6 +492,7 @@ expression: diff.instruction_rows address: 148, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -457,6 +513,7 @@ expression: diff.instruction_rows address: 152, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -470,6 +527,7 @@ expression: diff.instruction_rows address: 156, size: 4, opcode: 32777, + branch_dest: None, }, ), kind: None, @@ -483,6 +541,9 @@ expression: diff.instruction_rows address: 160, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -501,6 +562,7 @@ expression: diff.instruction_rows address: 164, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -521,6 +583,7 @@ expression: diff.instruction_rows address: 168, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -534,6 +597,7 @@ expression: diff.instruction_rows address: 172, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -547,6 +611,9 @@ expression: diff.instruction_rows address: 176, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -565,6 +632,7 @@ expression: diff.instruction_rows address: 180, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -585,6 +653,7 @@ expression: diff.instruction_rows address: 184, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -598,6 +667,9 @@ expression: diff.instruction_rows address: 188, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -616,6 +688,7 @@ expression: diff.instruction_rows address: 192, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -636,6 +709,7 @@ expression: diff.instruction_rows address: 196, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -649,6 +723,9 @@ expression: diff.instruction_rows address: 200, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -667,6 +744,7 @@ expression: diff.instruction_rows address: 204, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -688,6 +766,7 @@ expression: diff.instruction_rows address: 208, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -701,6 +780,7 @@ expression: diff.instruction_rows address: 212, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -714,6 +794,7 @@ expression: diff.instruction_rows address: 216, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -727,6 +808,7 @@ expression: diff.instruction_rows address: 220, size: 4, opcode: 32899, + branch_dest: None, }, ), kind: None, @@ -740,6 +822,7 @@ expression: diff.instruction_rows address: 224, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -753,6 +836,9 @@ expression: diff.instruction_rows address: 228, size: 4, opcode: 32773, + branch_dest: Some( + 240, + ), }, ), kind: None, @@ -771,6 +857,7 @@ expression: diff.instruction_rows address: 232, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -791,6 +878,7 @@ expression: diff.instruction_rows address: 236, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -804,6 +892,7 @@ expression: diff.instruction_rows address: 240, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -833,6 +922,7 @@ expression: diff.instruction_rows address: 244, size: 4, opcode: 32829, + branch_dest: None, }, ), kind: None, @@ -846,6 +936,7 @@ expression: diff.instruction_rows address: 248, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -859,6 +950,9 @@ expression: diff.instruction_rows address: 252, size: 4, opcode: 32773, + branch_dest: Some( + 276, + ), }, ), kind: None, @@ -877,6 +971,7 @@ expression: diff.instruction_rows address: 256, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -890,6 +985,7 @@ expression: diff.instruction_rows address: 260, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -903,6 +999,7 @@ expression: diff.instruction_rows address: 264, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -916,6 +1013,7 @@ expression: diff.instruction_rows address: 268, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -929,6 +1027,7 @@ expression: diff.instruction_rows address: 272, size: 4, opcode: 32778, + branch_dest: None, }, ), kind: None, @@ -942,6 +1041,7 @@ expression: diff.instruction_rows address: 276, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -962,6 +1062,7 @@ expression: diff.instruction_rows address: 280, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -975,6 +1076,9 @@ expression: diff.instruction_rows address: 284, size: 4, opcode: 32773, + branch_dest: Some( + 328, + ), }, ), kind: None, @@ -993,6 +1097,9 @@ expression: diff.instruction_rows address: 288, size: 4, opcode: 32773, + branch_dest: Some( + 336, + ), }, ), kind: None, @@ -1011,6 +1118,7 @@ expression: diff.instruction_rows address: 292, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1024,6 +1132,9 @@ expression: diff.instruction_rows address: 296, size: 4, opcode: 32773, + branch_dest: Some( + 348, + ), }, ), kind: None, @@ -1042,6 +1153,7 @@ expression: diff.instruction_rows address: 300, size: 4, opcode: 32829, + branch_dest: None, }, ), kind: None, @@ -1055,6 +1167,7 @@ expression: diff.instruction_rows address: 304, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1068,6 +1181,9 @@ expression: diff.instruction_rows address: 308, size: 4, opcode: 32773, + branch_dest: Some( + 348, + ), }, ), kind: None, @@ -1086,6 +1202,7 @@ expression: diff.instruction_rows address: 312, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1099,6 +1216,7 @@ expression: diff.instruction_rows address: 316, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1112,6 +1230,9 @@ expression: diff.instruction_rows address: 320, size: 4, opcode: 32773, + branch_dest: Some( + 380, + ), }, ), kind: None, @@ -1130,6 +1251,9 @@ expression: diff.instruction_rows address: 324, size: 4, opcode: 32773, + branch_dest: Some( + 348, + ), }, ), kind: None, @@ -1148,6 +1272,7 @@ expression: diff.instruction_rows address: 328, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1168,6 +1293,9 @@ expression: diff.instruction_rows address: 332, size: 4, opcode: 32773, + branch_dest: Some( + 348, + ), }, ), kind: None, @@ -1186,6 +1314,7 @@ expression: diff.instruction_rows address: 336, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -1206,6 +1335,7 @@ expression: diff.instruction_rows address: 340, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -1219,6 +1349,9 @@ expression: diff.instruction_rows address: 344, size: 4, opcode: 32773, + branch_dest: Some( + 380, + ), }, ), kind: None, @@ -1237,6 +1370,7 @@ expression: diff.instruction_rows address: 348, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -1260,6 +1394,7 @@ expression: diff.instruction_rows address: 352, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -1273,6 +1408,7 @@ expression: diff.instruction_rows address: 356, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1286,6 +1422,7 @@ expression: diff.instruction_rows address: 360, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1299,6 +1436,9 @@ expression: diff.instruction_rows address: 364, size: 4, opcode: 32773, + branch_dest: Some( + 380, + ), }, ), kind: None, @@ -1317,6 +1457,7 @@ expression: diff.instruction_rows address: 368, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -1330,6 +1471,7 @@ expression: diff.instruction_rows address: 372, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -1343,6 +1485,7 @@ expression: diff.instruction_rows address: 376, size: 4, opcode: 32899, + branch_dest: None, }, ), kind: None, @@ -1356,6 +1499,7 @@ expression: diff.instruction_rows address: 380, size: 4, opcode: 32829, + branch_dest: None, }, ), kind: None, @@ -1378,6 +1522,7 @@ expression: diff.instruction_rows address: 384, size: 4, opcode: 32770, + branch_dest: None, }, ), kind: None, @@ -1391,6 +1536,7 @@ expression: diff.instruction_rows address: 388, size: 4, opcode: 32770, + branch_dest: None, }, ), kind: None, @@ -1404,6 +1550,7 @@ expression: diff.instruction_rows address: 392, size: 4, opcode: 32898, + branch_dest: None, }, ), kind: None, @@ -1417,6 +1564,7 @@ expression: diff.instruction_rows address: 396, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1430,6 +1578,9 @@ expression: diff.instruction_rows address: 400, size: 4, opcode: 32773, + branch_dest: Some( + 424, + ), }, ), kind: None, @@ -1448,6 +1599,7 @@ expression: diff.instruction_rows address: 404, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -1468,6 +1620,7 @@ expression: diff.instruction_rows address: 408, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -1481,6 +1634,7 @@ expression: diff.instruction_rows address: 412, size: 4, opcode: 32770, + branch_dest: None, }, ), kind: None, @@ -1494,6 +1648,7 @@ expression: diff.instruction_rows address: 416, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1507,6 +1662,9 @@ expression: diff.instruction_rows address: 420, size: 4, opcode: 32773, + branch_dest: Some( + 404, + ), }, ), kind: None, @@ -1525,6 +1683,7 @@ expression: diff.instruction_rows address: 424, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -1545,6 +1704,7 @@ expression: diff.instruction_rows address: 428, size: 4, opcode: 32799, + branch_dest: None, }, ), kind: None, @@ -1558,6 +1718,7 @@ expression: diff.instruction_rows address: 432, size: 4, opcode: 32800, + branch_dest: None, }, ), kind: None, @@ -1571,6 +1732,7 @@ expression: diff.instruction_rows address: 436, size: 4, opcode: 32786, + branch_dest: None, }, ), kind: None, @@ -1584,6 +1746,9 @@ expression: diff.instruction_rows address: 440, size: 4, opcode: 32773, + branch_dest: Some( + 448, + ), }, ), kind: None, @@ -1602,6 +1767,7 @@ expression: diff.instruction_rows address: 444, size: 4, opcode: 32774, + branch_dest: None, }, ), kind: None, @@ -1615,6 +1781,7 @@ expression: diff.instruction_rows address: 448, size: 4, opcode: 32818, + branch_dest: None, }, ), kind: None, @@ -1635,6 +1802,7 @@ expression: diff.instruction_rows address: 452, size: 4, opcode: 32899, + branch_dest: None, }, ), kind: None, @@ -1648,6 +1816,7 @@ expression: diff.instruction_rows address: 456, size: 4, opcode: 32793, + branch_dest: None, }, ), kind: None, @@ -1661,6 +1830,7 @@ expression: diff.instruction_rows address: 460, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1674,6 +1844,7 @@ expression: diff.instruction_rows address: 464, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1694,6 +1865,7 @@ expression: diff.instruction_rows address: 468, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_arm__read_arm-3.snap b/objdiff-core/tests/snapshots/arch_arm__read_arm-3.snap index 3dee85f..9365a68 100644 --- a/objdiff-core/tests/snapshots/arch_arm__read_arm-3.snap +++ b/objdiff-core/tests/snapshots/arch_arm__read_arm-3.snap @@ -1,6 +1,5 @@ --- source: objdiff-core/tests/arch_arm.rs -assertion_line: 16 expression: output --- [(Address(0), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stmdb", 32895), Normal, 10), (Argument(Opaque("sp")), Normal, 0), (Argument(Opaque("!")), Normal, 0), (Basic(", "), Normal, 0), (Basic("{"), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r6")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("lr")), Normal, 0), (Basic("}"), Normal, 0), (Eol, Normal, 0)] @@ -28,7 +27,7 @@ expression: output [(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ldrb", 32800), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(224)), Normal, 0), (Basic("]"), Normal, 0), (Eol, Normal, 0)] [(Address(92), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmp", 32786), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Unsigned(0)), Normal, 0), (Eol, Normal, 0)] [(Address(96), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 32773), Normal, 10), (BranchDest(108), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)] -[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (Symbol(Symbol { name: "_ZN13LinkStateItem15GetEquipBombchuEv", demangled_name: Some("LinkStateItem::GetEquipBombchu()"), address: 472, size: 16, kind: Function, section: Some(0), flags: FlagSet(Global), align: None, virtual_address: None }), Bright, 0), (Addend(-8), Bright, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] +[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (BranchDest(424), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] [(Address(104), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (Symbol(Symbol { name: "_ZN12EquipBombchu19func_ov014_0213ec64Ev", demangled_name: Some("EquipBombchu::func_ov014_0213ec64()"), address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global | Weak), align: None, virtual_address: None }), Bright, 0), (Addend(-8), Bright, 0), (Eol, Normal, 0)] [(Address(108), Normal, 5), (Basic(" ~> "), Rotating(7), 0), (Opcode("ldr", 32799), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("pc")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(308)), Normal, 0), (Basic("]"), Normal, 0), (Basic(" (->"), Normal, 0), (BranchDest(424), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(112), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ldr", 32799), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("]"), Normal, 0), (Eol, Normal, 0)] diff --git a/objdiff-core/tests/snapshots/arch_arm__read_thumb-2.snap b/objdiff-core/tests/snapshots/arch_arm__read_thumb-2.snap index 57e3894..a8bfcab 100644 --- a/objdiff-core/tests/snapshots/arch_arm__read_thumb-2.snap +++ b/objdiff-core/tests/snapshots/arch_arm__read_thumb-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 2, opcode: 56, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 2, size: 2, opcode: 74, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 4, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,7 @@ expression: diff.instruction_rows address: 6, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -61,6 +65,7 @@ expression: diff.instruction_rows address: 8, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -74,6 +79,7 @@ expression: diff.instruction_rows address: 10, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -87,6 +93,7 @@ expression: diff.instruction_rows address: 12, size: 2, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -100,6 +107,7 @@ expression: diff.instruction_rows address: 14, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -113,6 +121,7 @@ expression: diff.instruction_rows address: 18, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -126,6 +135,9 @@ expression: diff.instruction_rows address: 20, size: 2, opcode: 15, + branch_dest: Some( + 212, + ), }, ), kind: None, @@ -144,6 +156,7 @@ expression: diff.instruction_rows address: 22, size: 2, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -157,6 +170,7 @@ expression: diff.instruction_rows address: 24, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -170,6 +184,9 @@ expression: diff.instruction_rows address: 26, size: 2, opcode: 15, + branch_dest: Some( + 48, + ), }, ), kind: None, @@ -188,6 +205,7 @@ expression: diff.instruction_rows address: 28, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -201,6 +219,7 @@ expression: diff.instruction_rows address: 30, size: 2, opcode: 26, + branch_dest: None, }, ), kind: None, @@ -214,6 +233,9 @@ expression: diff.instruction_rows address: 32, size: 2, opcode: 15, + branch_dest: Some( + 94, + ), }, ), kind: None, @@ -232,6 +254,7 @@ expression: diff.instruction_rows address: 34, size: 2, opcode: 35, + branch_dest: None, }, ), kind: None, @@ -245,6 +268,7 @@ expression: diff.instruction_rows address: 36, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -258,6 +282,7 @@ expression: diff.instruction_rows address: 38, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -271,6 +296,7 @@ expression: diff.instruction_rows address: 40, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -284,6 +310,7 @@ expression: diff.instruction_rows address: 44, size: 2, opcode: 7, + branch_dest: None, }, ), kind: None, @@ -297,6 +324,7 @@ expression: diff.instruction_rows address: 46, size: 2, opcode: 55, + branch_dest: None, }, ), kind: None, @@ -310,6 +338,7 @@ expression: diff.instruction_rows address: 48, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -330,6 +359,7 @@ expression: diff.instruction_rows address: 50, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -343,6 +373,7 @@ expression: diff.instruction_rows address: 52, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -356,6 +387,7 @@ expression: diff.instruction_rows address: 56, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -369,6 +401,9 @@ expression: diff.instruction_rows address: 58, size: 2, opcode: 15, + branch_dest: Some( + 212, + ), }, ), kind: None, @@ -387,6 +422,7 @@ expression: diff.instruction_rows address: 60, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -400,6 +436,7 @@ expression: diff.instruction_rows address: 62, size: 2, opcode: 33, + branch_dest: None, }, ), kind: None, @@ -413,6 +450,7 @@ expression: diff.instruction_rows address: 64, size: 2, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -426,6 +464,7 @@ expression: diff.instruction_rows address: 66, size: 2, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -439,6 +478,7 @@ expression: diff.instruction_rows address: 68, size: 2, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -452,6 +492,9 @@ expression: diff.instruction_rows address: 70, size: 2, opcode: 15, + branch_dest: Some( + 212, + ), }, ), kind: None, @@ -470,6 +513,7 @@ expression: diff.instruction_rows address: 72, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -483,6 +527,7 @@ expression: diff.instruction_rows address: 74, size: 2, opcode: 17, + branch_dest: None, }, ), kind: None, @@ -496,6 +541,7 @@ expression: diff.instruction_rows address: 76, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -509,6 +555,7 @@ expression: diff.instruction_rows address: 78, size: 2, opcode: 54, + branch_dest: None, }, ), kind: None, @@ -522,6 +569,7 @@ expression: diff.instruction_rows address: 80, size: 2, opcode: 67, + branch_dest: None, }, ), kind: None, @@ -535,6 +583,7 @@ expression: diff.instruction_rows address: 82, size: 2, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -548,6 +597,7 @@ expression: diff.instruction_rows address: 84, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -561,6 +611,7 @@ expression: diff.instruction_rows address: 86, size: 2, opcode: 7, + branch_dest: None, }, ), kind: None, @@ -574,6 +625,7 @@ expression: diff.instruction_rows address: 88, size: 2, opcode: 54, + branch_dest: None, }, ), kind: None, @@ -587,6 +639,7 @@ expression: diff.instruction_rows address: 90, size: 2, opcode: 67, + branch_dest: None, }, ), kind: None, @@ -600,6 +653,7 @@ expression: diff.instruction_rows address: 92, size: 2, opcode: 55, + branch_dest: None, }, ), kind: None, @@ -613,6 +667,7 @@ expression: diff.instruction_rows address: 94, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -633,6 +688,7 @@ expression: diff.instruction_rows address: 96, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -646,6 +702,7 @@ expression: diff.instruction_rows address: 98, size: 2, opcode: 4, + branch_dest: None, }, ), kind: None, @@ -659,6 +716,7 @@ expression: diff.instruction_rows address: 100, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -672,6 +730,7 @@ expression: diff.instruction_rows address: 104, size: 2, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -685,6 +744,7 @@ expression: diff.instruction_rows address: 106, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -698,6 +758,7 @@ expression: diff.instruction_rows address: 108, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -711,6 +772,7 @@ expression: diff.instruction_rows address: 112, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -724,6 +786,7 @@ expression: diff.instruction_rows address: 114, size: 2, opcode: 6, + branch_dest: None, }, ), kind: None, @@ -737,6 +800,7 @@ expression: diff.instruction_rows address: 116, size: 2, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -750,6 +814,7 @@ expression: diff.instruction_rows address: 118, size: 2, opcode: 35, + branch_dest: None, }, ), kind: None, @@ -763,6 +828,7 @@ expression: diff.instruction_rows address: 120, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -776,6 +842,7 @@ expression: diff.instruction_rows address: 122, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -789,6 +856,7 @@ expression: diff.instruction_rows address: 124, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -802,6 +870,7 @@ expression: diff.instruction_rows address: 126, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -815,6 +884,7 @@ expression: diff.instruction_rows address: 130, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -828,6 +898,9 @@ expression: diff.instruction_rows address: 132, size: 2, opcode: 15, + branch_dest: Some( + 168, + ), }, ), kind: None, @@ -846,6 +919,7 @@ expression: diff.instruction_rows address: 134, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -859,6 +933,7 @@ expression: diff.instruction_rows address: 136, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -872,6 +947,7 @@ expression: diff.instruction_rows address: 140, size: 2, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -885,6 +961,7 @@ expression: diff.instruction_rows address: 142, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -898,6 +975,9 @@ expression: diff.instruction_rows address: 144, size: 2, opcode: 15, + branch_dest: Some( + 168, + ), }, ), kind: None, @@ -916,6 +996,7 @@ expression: diff.instruction_rows address: 146, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -929,6 +1010,7 @@ expression: diff.instruction_rows address: 148, size: 2, opcode: 33, + branch_dest: None, }, ), kind: None, @@ -942,6 +1024,7 @@ expression: diff.instruction_rows address: 150, size: 2, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -955,6 +1038,7 @@ expression: diff.instruction_rows address: 152, size: 2, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -968,6 +1052,7 @@ expression: diff.instruction_rows address: 154, size: 2, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -981,6 +1066,9 @@ expression: diff.instruction_rows address: 156, size: 2, opcode: 15, + branch_dest: Some( + 168, + ), }, ), kind: None, @@ -999,6 +1087,7 @@ expression: diff.instruction_rows address: 158, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -1012,6 +1101,7 @@ expression: diff.instruction_rows address: 160, size: 2, opcode: 17, + branch_dest: None, }, ), kind: None, @@ -1025,6 +1115,7 @@ expression: diff.instruction_rows address: 162, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -1038,6 +1129,7 @@ expression: diff.instruction_rows address: 164, size: 2, opcode: 54, + branch_dest: None, }, ), kind: None, @@ -1051,6 +1143,7 @@ expression: diff.instruction_rows address: 166, size: 2, opcode: 67, + branch_dest: None, }, ), kind: None, @@ -1064,6 +1157,7 @@ expression: diff.instruction_rows address: 168, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -1086,6 +1180,9 @@ expression: diff.instruction_rows address: 170, size: 2, opcode: 15, + branch_dest: Some( + 200, + ), }, ), kind: None, @@ -1104,6 +1201,7 @@ expression: diff.instruction_rows address: 172, size: 2, opcode: 35, + branch_dest: None, }, ), kind: None, @@ -1117,6 +1215,7 @@ expression: diff.instruction_rows address: 174, size: 2, opcode: 25, + branch_dest: None, }, ), kind: None, @@ -1130,6 +1229,9 @@ expression: diff.instruction_rows address: 176, size: 2, opcode: 15, + branch_dest: Some( + 200, + ), }, ), kind: None, @@ -1148,6 +1250,7 @@ expression: diff.instruction_rows address: 178, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -1161,6 +1264,7 @@ expression: diff.instruction_rows address: 180, size: 2, opcode: 37, + branch_dest: None, }, ), kind: None, @@ -1174,6 +1278,7 @@ expression: diff.instruction_rows address: 182, size: 2, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -1187,6 +1292,7 @@ expression: diff.instruction_rows address: 184, size: 2, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -1200,6 +1306,9 @@ expression: diff.instruction_rows address: 186, size: 2, opcode: 15, + branch_dest: Some( + 200, + ), }, ), kind: None, @@ -1218,6 +1327,7 @@ expression: diff.instruction_rows address: 188, size: 2, opcode: 32, + branch_dest: None, }, ), kind: None, @@ -1231,6 +1341,7 @@ expression: diff.instruction_rows address: 190, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -1244,6 +1355,7 @@ expression: diff.instruction_rows address: 192, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -1257,6 +1369,7 @@ expression: diff.instruction_rows address: 194, size: 2, opcode: 46, + branch_dest: None, }, ), kind: None, @@ -1270,6 +1383,7 @@ expression: diff.instruction_rows address: 196, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -1283,6 +1397,7 @@ expression: diff.instruction_rows address: 200, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -1305,6 +1420,7 @@ expression: diff.instruction_rows address: 202, size: 2, opcode: 35, + branch_dest: None, }, ), kind: None, @@ -1318,6 +1434,7 @@ expression: diff.instruction_rows address: 204, size: 2, opcode: 34, + branch_dest: None, }, ), kind: None, @@ -1331,6 +1448,7 @@ expression: diff.instruction_rows address: 206, size: 2, opcode: 4, + branch_dest: None, }, ), kind: None, @@ -1344,6 +1462,7 @@ expression: diff.instruction_rows address: 208, size: 4, opcode: 19, + branch_dest: None, }, ), kind: None, @@ -1357,6 +1476,7 @@ expression: diff.instruction_rows address: 212, size: 2, opcode: 7, + branch_dest: None, }, ), kind: None, @@ -1379,6 +1499,7 @@ expression: diff.instruction_rows address: 214, size: 2, opcode: 55, + branch_dest: None, }, ), kind: None, @@ -1392,6 +1513,7 @@ expression: diff.instruction_rows address: 216, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1405,6 +1527,7 @@ expression: diff.instruction_rows address: 220, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1418,6 +1541,7 @@ expression: diff.instruction_rows address: 224, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1431,6 +1555,7 @@ expression: diff.instruction_rows address: 228, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1444,6 +1569,7 @@ expression: diff.instruction_rows address: 232, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1457,6 +1583,7 @@ expression: diff.instruction_rows address: 236, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, @@ -1470,6 +1597,7 @@ expression: diff.instruction_rows address: 240, size: 4, opcode: 65535, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_mips__read_mips-2.snap b/objdiff-core/tests/snapshots/arch_mips__read_mips-2.snap index 40f8098..04b4e96 100644 --- a/objdiff-core/tests/snapshots/arch_mips__read_mips-2.snap +++ b/objdiff-core/tests/snapshots/arch_mips__read_mips-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 4, size: 4, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 8, size: 4, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,7 @@ expression: diff.instruction_rows address: 12, size: 4, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -61,6 +65,7 @@ expression: diff.instruction_rows address: 16, size: 4, opcode: 44, + branch_dest: None, }, ), kind: None, @@ -74,6 +79,7 @@ expression: diff.instruction_rows address: 20, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -87,6 +93,7 @@ expression: diff.instruction_rows address: 24, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, @@ -100,6 +107,7 @@ expression: diff.instruction_rows address: 28, size: 4, opcode: 26, + branch_dest: None, }, ), kind: None, @@ -113,6 +121,7 @@ expression: diff.instruction_rows address: 32, size: 4, opcode: 20, + branch_dest: None, }, ), kind: None, @@ -126,6 +135,7 @@ expression: diff.instruction_rows address: 36, size: 4, opcode: 97, + branch_dest: None, }, ), kind: None, @@ -139,6 +149,7 @@ expression: diff.instruction_rows address: 40, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -152,6 +163,7 @@ expression: diff.instruction_rows address: 44, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -165,6 +177,7 @@ expression: diff.instruction_rows address: 48, size: 4, opcode: 20, + branch_dest: None, }, ), kind: None, @@ -178,6 +191,7 @@ expression: diff.instruction_rows address: 52, size: 4, opcode: 26, + branch_dest: None, }, ), kind: None, @@ -191,6 +205,7 @@ expression: diff.instruction_rows address: 56, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -204,6 +219,7 @@ expression: diff.instruction_rows address: 60, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -217,6 +233,7 @@ expression: diff.instruction_rows address: 64, size: 4, opcode: 26, + branch_dest: None, }, ), kind: None, @@ -230,6 +247,7 @@ expression: diff.instruction_rows address: 68, size: 4, opcode: 97, + branch_dest: None, }, ), kind: None, @@ -243,6 +261,7 @@ expression: diff.instruction_rows address: 72, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -256,6 +275,7 @@ expression: diff.instruction_rows address: 76, size: 4, opcode: 97, + branch_dest: None, }, ), kind: None, @@ -269,6 +289,7 @@ expression: diff.instruction_rows address: 80, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -289,6 +310,7 @@ expression: diff.instruction_rows address: 84, size: 4, opcode: 97, + branch_dest: None, }, ), kind: None, @@ -302,6 +324,9 @@ expression: diff.instruction_rows address: 88, size: 4, opcode: 56, + branch_dest: Some( + 80, + ), }, ), kind: None, @@ -320,6 +345,7 @@ expression: diff.instruction_rows address: 92, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, @@ -333,6 +359,7 @@ expression: diff.instruction_rows address: 96, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -346,6 +373,7 @@ expression: diff.instruction_rows address: 100, size: 4, opcode: 20, + branch_dest: None, }, ), kind: None, @@ -359,6 +387,7 @@ expression: diff.instruction_rows address: 104, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -372,6 +401,7 @@ expression: diff.instruction_rows address: 108, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -385,6 +415,7 @@ expression: diff.instruction_rows address: 112, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -398,6 +429,7 @@ expression: diff.instruction_rows address: 116, size: 4, opcode: 16, + branch_dest: None, }, ), kind: None, @@ -411,6 +443,7 @@ expression: diff.instruction_rows address: 120, size: 4, opcode: 20, + branch_dest: None, }, ), kind: None, @@ -424,6 +457,7 @@ expression: diff.instruction_rows address: 124, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -437,6 +471,7 @@ expression: diff.instruction_rows address: 128, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -459,6 +494,7 @@ expression: diff.instruction_rows address: 132, size: 4, opcode: 12, + branch_dest: None, }, ), kind: None, @@ -472,6 +508,7 @@ expression: diff.instruction_rows address: 136, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -485,6 +522,7 @@ expression: diff.instruction_rows address: 140, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, @@ -498,6 +536,9 @@ expression: diff.instruction_rows address: 144, size: 4, opcode: 55, + branch_dest: Some( + 128, + ), }, ), kind: None, @@ -516,6 +557,7 @@ expression: diff.instruction_rows address: 148, size: 4, opcode: 90, + branch_dest: None, }, ), kind: None, @@ -529,6 +571,9 @@ expression: diff.instruction_rows address: 152, size: 4, opcode: 3, + branch_dest: Some( + 128, + ), }, ), kind: None, @@ -547,6 +592,7 @@ expression: diff.instruction_rows address: 156, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, @@ -560,6 +606,7 @@ expression: diff.instruction_rows address: 160, size: 4, opcode: 2, + branch_dest: None, }, ), kind: None, @@ -573,6 +620,7 @@ expression: diff.instruction_rows address: 164, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -586,6 +634,7 @@ expression: diff.instruction_rows address: 168, size: 4, opcode: 77, + branch_dest: None, }, ), kind: None, @@ -599,6 +648,7 @@ expression: diff.instruction_rows address: 172, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, @@ -612,6 +662,9 @@ expression: diff.instruction_rows address: 176, size: 4, opcode: 54, + branch_dest: Some( + 128, + ), }, ), kind: None, @@ -630,6 +683,7 @@ expression: diff.instruction_rows address: 180, size: 4, opcode: 113, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap b/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap index 81b58a9..36e1a06 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap @@ -23,6 +23,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 632, size: 4, opcode: 160, + branch_dest: None, }, ), kind: None, @@ -36,6 +37,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 636, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -49,6 +51,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 640, size: 4, opcode: 43, + branch_dest: Some( + 652, + ), }, ), kind: None, @@ -67,6 +72,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 644, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -80,6 +86,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 648, size: 4, opcode: 43, + branch_dest: Some( + 660, + ), }, ), kind: None, @@ -98,6 +107,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 652, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -118,6 +128,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 656, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -131,6 +142,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 660, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -151,6 +163,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 664, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -164,6 +177,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 668, size: 4, opcode: 43, + branch_dest: Some( + 680, + ), }, ), kind: None, @@ -182,6 +198,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 672, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -195,6 +212,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 676, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -208,6 +226,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 680, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -228,6 +247,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 684, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -241,6 +261,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 688, size: 4, opcode: 109, + branch_dest: None, }, ), kind: None, @@ -254,6 +275,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 692, size: 4, opcode: 43, + branch_dest: Some( + 780, + ), }, ), kind: None, @@ -272,6 +296,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 696, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -285,6 +310,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 700, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -298,6 +324,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 704, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -311,6 +338,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 708, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -324,6 +352,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 712, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -337,6 +366,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 716, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -350,6 +380,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 720, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -363,6 +394,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 724, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -376,6 +408,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 728, size: 4, opcode: 43, + branch_dest: Some( + 736, + ), }, ), kind: None, @@ -394,6 +429,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 732, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -407,6 +443,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 736, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -427,6 +464,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 740, size: 4, opcode: 43, + branch_dest: Some( + 756, + ), }, ), kind: None, @@ -445,6 +485,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 744, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -458,6 +499,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 748, size: 4, opcode: 43, + branch_dest: Some( + 756, + ), }, ), kind: None, @@ -476,6 +520,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 752, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -489,6 +534,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 756, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -510,6 +556,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 760, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -528,6 +577,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 764, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -541,6 +591,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 768, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -559,6 +612,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 772, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -572,6 +626,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 776, size: 4, opcode: 45, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -590,6 +647,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 780, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -610,6 +668,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 784, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -623,6 +682,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 788, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -636,6 +696,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 792, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -649,6 +710,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 796, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -662,6 +724,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 800, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -675,6 +738,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 804, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -693,6 +759,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 808, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -706,6 +773,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 812, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -729,6 +797,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 816, size: 4, opcode: 43, + branch_dest: Some( + 956, + ), }, ), kind: None, @@ -747,6 +818,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 820, size: 4, opcode: 68, + branch_dest: None, }, ), kind: None, @@ -760,6 +832,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 824, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -773,6 +846,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 828, size: 4, opcode: 160, + branch_dest: None, }, ), kind: None, @@ -786,6 +860,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 832, size: 4, opcode: 43, + branch_dest: Some( + 920, + ), }, ), kind: None, @@ -804,6 +881,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 836, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -817,6 +895,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 840, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -830,6 +909,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 844, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -843,6 +923,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 848, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -856,6 +937,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 852, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -869,6 +951,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 856, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -882,6 +965,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 860, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -895,6 +979,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 864, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -908,6 +993,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 868, size: 4, opcode: 43, + branch_dest: Some( + 876, + ), }, ), kind: None, @@ -926,6 +1014,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 872, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -939,6 +1028,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 876, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -959,6 +1049,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 880, size: 4, opcode: 43, + branch_dest: Some( + 896, + ), }, ), kind: None, @@ -977,6 +1070,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 884, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -990,6 +1084,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 888, size: 4, opcode: 43, + branch_dest: Some( + 896, + ), }, ), kind: None, @@ -1008,6 +1105,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 892, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -1021,6 +1119,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 896, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1042,6 +1141,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 900, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -1060,6 +1162,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 904, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -1073,6 +1176,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 908, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -1091,6 +1197,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 912, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -1104,6 +1211,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 916, size: 4, opcode: 45, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -1122,6 +1232,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 920, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -1142,6 +1253,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 924, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -1155,6 +1267,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 928, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -1168,6 +1281,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 932, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1181,6 +1295,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 936, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -1194,6 +1309,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 940, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1207,6 +1323,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 944, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -1225,6 +1344,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 948, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -1238,6 +1358,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 952, size: 4, opcode: 45, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -1256,6 +1379,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 956, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -1276,6 +1400,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 960, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -1300,6 +1425,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 964, size: 4, opcode: 43, + branch_dest: Some( + 1104, + ), }, ), kind: None, @@ -1318,6 +1446,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 968, size: 4, opcode: 68, + branch_dest: None, }, ), kind: None, @@ -1331,6 +1460,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 972, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -1344,6 +1474,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 976, size: 4, opcode: 160, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1369,6 +1500,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 980, size: 4, opcode: 43, + branch_dest: Some( + 1068, + ), }, ), kind: None, @@ -1387,6 +1521,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 984, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1409,6 +1544,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 988, size: 4, opcode: 36, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1434,6 +1570,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 992, size: 4, opcode: 129, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1463,6 +1600,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 996, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1476,6 +1614,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1000, size: 4, opcode: 128, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1500,6 +1639,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1004, size: 4, opcode: 150, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1525,6 +1665,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1008, size: 4, opcode: 128, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1549,6 +1690,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1012, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1562,6 +1704,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1016, size: 4, opcode: 43, + branch_dest: Some( + 1024, + ), }, ), kind: None, @@ -1580,6 +1725,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1020, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1602,6 +1748,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1024, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1634,6 +1781,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1028, size: 4, opcode: 43, + branch_dest: Some( + 1044, + ), }, ), kind: None, @@ -1652,6 +1802,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1032, size: 4, opcode: 38, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1674,6 +1825,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1036, size: 4, opcode: 43, + branch_dest: Some( + 1044, + ), }, ), kind: None, @@ -1692,6 +1846,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1040, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1714,6 +1869,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1044, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1747,6 +1903,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1048, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -1765,6 +1924,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1052, size: 4, opcode: 38, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1787,6 +1947,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1056, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -1805,6 +1968,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1060, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1827,6 +1991,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1064, size: 4, opcode: 45, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -1845,6 +2012,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1068, size: 4, opcode: 36, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1877,6 +2045,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1072, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1899,6 +2068,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1076, size: 4, opcode: 129, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1928,6 +2098,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1080, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1941,6 +2112,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1084, size: 4, opcode: 150, + branch_dest: None, }, ), kind: ArgMismatch, @@ -1966,6 +2138,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1088, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -1979,6 +2152,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1092, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -1997,6 +2173,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1096, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2019,6 +2196,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1100, size: 4, opcode: 45, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -2037,6 +2217,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1104, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2066,6 +2247,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1108, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2090,6 +2272,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1112, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2103,6 +2286,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1116, size: 4, opcode: 43, + branch_dest: Some( + 1140, + ), }, ), kind: None, @@ -2121,6 +2307,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1120, size: 4, opcode: 162, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2146,6 +2333,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1124, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2174,6 +2362,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1128, size: 4, opcode: 43, + branch_dest: Some( + 1140, + ), }, ), kind: None, @@ -2192,6 +2383,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1132, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2220,6 +2412,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1136, size: 4, opcode: 43, + branch_dest: Some( + 1180, + ), }, ), kind: None, @@ -2238,6 +2433,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1140, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2259,6 +2455,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1144, size: 4, opcode: 43, + branch_dest: Some( + 1160, + ), }, ), kind: None, @@ -2277,6 +2476,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1148, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -2290,6 +2490,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1152, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2303,6 +2504,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1156, size: 4, opcode: 43, + branch_dest: Some( + 1180, + ), }, ), kind: None, @@ -2321,6 +2525,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1160, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -2353,6 +2558,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1164, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -2366,6 +2572,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1168, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -2379,6 +2586,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1172, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2392,6 +2600,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1176, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -2405,6 +2614,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1180, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2426,6 +2636,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1184, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -2455,6 +2666,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 632, size: 4, opcode: 160, + branch_dest: None, }, ), kind: None, @@ -2468,6 +2680,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 636, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -2481,6 +2694,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 640, size: 4, opcode: 43, + branch_dest: Some( + 652, + ), }, ), kind: None, @@ -2499,6 +2715,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 644, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -2512,6 +2729,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 648, size: 4, opcode: 43, + branch_dest: Some( + 660, + ), }, ), kind: None, @@ -2530,6 +2750,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 652, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2550,6 +2771,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 656, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -2563,6 +2785,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 660, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -2583,6 +2806,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 664, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2596,6 +2820,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 668, size: 4, opcode: 43, + branch_dest: Some( + 680, + ), }, ), kind: None, @@ -2614,6 +2841,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 672, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2627,6 +2855,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 676, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -2640,6 +2869,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 680, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2660,6 +2890,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 684, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -2673,6 +2904,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 688, size: 4, opcode: 109, + branch_dest: None, }, ), kind: None, @@ -2686,6 +2918,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 692, size: 4, opcode: 43, + branch_dest: Some( + 780, + ), }, ), kind: None, @@ -2704,6 +2939,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 696, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2717,6 +2953,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 700, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -2730,6 +2967,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 704, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -2743,6 +2981,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 708, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2756,6 +2995,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 712, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -2769,6 +3009,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 716, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -2782,6 +3023,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 720, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -2795,6 +3037,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 724, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2808,6 +3051,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 728, size: 4, opcode: 43, + branch_dest: Some( + 736, + ), }, ), kind: None, @@ -2826,6 +3072,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 732, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2839,6 +3086,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 736, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2859,6 +3107,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 740, size: 4, opcode: 43, + branch_dest: Some( + 756, + ), }, ), kind: None, @@ -2877,6 +3128,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 744, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -2890,6 +3142,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 748, size: 4, opcode: 43, + branch_dest: Some( + 756, + ), }, ), kind: None, @@ -2908,6 +3163,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 752, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -2921,6 +3177,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 756, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -2942,6 +3199,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 760, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -2960,6 +3220,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 764, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -2973,6 +3234,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 768, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -2991,6 +3255,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 772, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3004,6 +3269,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 776, size: 4, opcode: 45, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -3022,6 +3290,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 780, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -3042,6 +3311,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 784, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3055,6 +3325,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 788, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -3068,6 +3339,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 792, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3081,6 +3353,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 796, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -3094,6 +3367,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 800, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3107,6 +3381,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 804, size: 4, opcode: 43, + branch_dest: Some( + 812, + ), }, ), kind: None, @@ -3125,6 +3402,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 808, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3138,6 +3416,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 812, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3161,6 +3440,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 816, size: 4, opcode: 43, + branch_dest: Some( + 956, + ), }, ), kind: None, @@ -3179,6 +3461,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 820, size: 4, opcode: 68, + branch_dest: None, }, ), kind: None, @@ -3192,6 +3475,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 824, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3205,6 +3489,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 828, size: 4, opcode: 160, + branch_dest: None, }, ), kind: None, @@ -3218,6 +3503,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 832, size: 4, opcode: 43, + branch_dest: Some( + 920, + ), }, ), kind: None, @@ -3236,6 +3524,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 836, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3249,6 +3538,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 840, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -3262,6 +3552,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 844, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -3275,6 +3566,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 848, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3288,6 +3580,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 852, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -3301,6 +3594,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 856, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -3314,6 +3608,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 860, size: 4, opcode: 128, + branch_dest: None, }, ), kind: None, @@ -3327,6 +3622,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 864, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3340,6 +3636,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 868, size: 4, opcode: 43, + branch_dest: Some( + 876, + ), }, ), kind: None, @@ -3358,6 +3657,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 872, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3371,6 +3671,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 876, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3391,6 +3692,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 880, size: 4, opcode: 43, + branch_dest: Some( + 896, + ), }, ), kind: None, @@ -3409,6 +3713,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 884, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3422,6 +3727,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 888, size: 4, opcode: 43, + branch_dest: Some( + 896, + ), }, ), kind: None, @@ -3440,6 +3748,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 892, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3453,6 +3762,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 896, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3474,6 +3784,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 900, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -3492,6 +3805,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 904, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3505,6 +3819,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 908, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -3523,6 +3840,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 912, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3536,6 +3854,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 916, size: 4, opcode: 45, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -3554,6 +3875,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 920, size: 4, opcode: 36, + branch_dest: None, }, ), kind: None, @@ -3574,6 +3896,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 924, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3587,6 +3910,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 928, size: 4, opcode: 129, + branch_dest: None, }, ), kind: None, @@ -3600,6 +3924,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 932, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3613,6 +3938,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 936, size: 4, opcode: 150, + branch_dest: None, }, ), kind: None, @@ -3626,6 +3952,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 940, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3639,6 +3966,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 944, size: 4, opcode: 43, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -3657,6 +3987,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 948, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3670,6 +4001,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 952, size: 4, opcode: 45, + branch_dest: Some( + 960, + ), }, ), kind: None, @@ -3688,6 +4022,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 956, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -3708,6 +4043,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 960, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3732,6 +4068,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 964, size: 4, opcode: 43, + branch_dest: Some( + 1104, + ), }, ), kind: None, @@ -3750,6 +4089,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 968, size: 4, opcode: 68, + branch_dest: None, }, ), kind: None, @@ -3763,6 +4103,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 972, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -3776,6 +4117,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 976, size: 4, opcode: 160, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3801,6 +4143,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 980, size: 4, opcode: 43, + branch_dest: Some( + 1068, + ), }, ), kind: None, @@ -3819,6 +4164,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 984, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3841,6 +4187,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 988, size: 4, opcode: 36, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3866,6 +4213,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 992, size: 4, opcode: 129, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3895,6 +4243,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 996, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3908,6 +4257,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1000, size: 4, opcode: 128, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3932,6 +4282,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1004, size: 4, opcode: 150, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3957,6 +4308,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1008, size: 4, opcode: 128, + branch_dest: None, }, ), kind: ArgMismatch, @@ -3981,6 +4333,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1012, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -3994,6 +4347,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1016, size: 4, opcode: 43, + branch_dest: Some( + 1024, + ), }, ), kind: None, @@ -4012,6 +4368,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1020, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4034,6 +4391,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1024, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4066,6 +4424,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1028, size: 4, opcode: 43, + branch_dest: Some( + 1044, + ), }, ), kind: None, @@ -4084,6 +4445,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1032, size: 4, opcode: 38, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4106,6 +4468,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1036, size: 4, opcode: 43, + branch_dest: Some( + 1044, + ), }, ), kind: None, @@ -4124,6 +4489,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1040, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4146,6 +4512,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1044, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4179,6 +4546,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1048, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -4197,6 +4567,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1052, size: 4, opcode: 38, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4219,6 +4590,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1056, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -4237,6 +4611,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1060, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4259,6 +4634,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1064, size: 4, opcode: 45, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -4277,6 +4655,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1068, size: 4, opcode: 36, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4309,6 +4688,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1072, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4331,6 +4711,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1076, size: 4, opcode: 129, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4360,6 +4741,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1080, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4373,6 +4755,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1084, size: 4, opcode: 150, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4398,6 +4781,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1088, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4411,6 +4795,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1092, size: 4, opcode: 43, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -4429,6 +4816,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1096, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4451,6 +4839,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1100, size: 4, opcode: 45, + branch_dest: Some( + 1108, + ), }, ), kind: None, @@ -4469,6 +4860,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1104, size: 4, opcode: 41, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4498,6 +4890,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1108, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4522,6 +4915,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1112, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -4535,6 +4929,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1116, size: 4, opcode: 43, + branch_dest: Some( + 1140, + ), }, ), kind: None, @@ -4553,6 +4950,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1120, size: 4, opcode: 162, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4578,6 +4976,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1124, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4606,6 +5005,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1128, size: 4, opcode: 43, + branch_dest: Some( + 1140, + ), }, ), kind: None, @@ -4624,6 +5026,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1132, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4652,6 +5055,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1136, size: 4, opcode: 43, + branch_dest: Some( + 1180, + ), }, ), kind: None, @@ -4670,6 +5076,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1140, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4691,6 +5098,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1144, size: 4, opcode: 43, + branch_dest: Some( + 1160, + ), }, ), kind: None, @@ -4709,6 +5119,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1148, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -4722,6 +5133,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1152, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4735,6 +5147,9 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1156, size: 4, opcode: 43, + branch_dest: Some( + 1180, + ), }, ), kind: None, @@ -4753,6 +5168,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1160, size: 4, opcode: 60, + branch_dest: None, }, ), kind: ArgMismatch, @@ -4785,6 +5201,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1164, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -4798,6 +5215,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1168, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -4811,6 +5229,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1172, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -4824,6 +5243,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1176, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, @@ -4837,6 +5257,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1180, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -4858,6 +5279,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" address: 1184, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap index b56c053..9d5be1d 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 4, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,9 @@ expression: diff.instruction_rows address: 8, size: 4, opcode: 43, + branch_dest: Some( + 20, + ), }, ), kind: None, @@ -53,6 +58,7 @@ expression: diff.instruction_rows address: 12, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -66,6 +72,9 @@ expression: diff.instruction_rows address: 16, size: 4, opcode: 45, + branch_dest: Some( + 32, + ), }, ), kind: None, @@ -84,6 +93,7 @@ expression: diff.instruction_rows address: 20, size: 4, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -104,6 +114,7 @@ expression: diff.instruction_rows address: 24, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -117,6 +128,7 @@ expression: diff.instruction_rows address: 28, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -130,6 +142,7 @@ expression: diff.instruction_rows address: 32, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -150,6 +163,7 @@ expression: diff.instruction_rows address: 36, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -163,6 +177,7 @@ expression: diff.instruction_rows address: 40, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -176,6 +191,9 @@ expression: diff.instruction_rows address: 44, size: 4, opcode: 43, + branch_dest: Some( + 56, + ), }, ), kind: None, @@ -194,6 +212,7 @@ expression: diff.instruction_rows address: 48, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -207,6 +226,9 @@ expression: diff.instruction_rows address: 52, size: 4, opcode: 45, + branch_dest: Some( + 68, + ), }, ), kind: None, @@ -225,6 +247,7 @@ expression: diff.instruction_rows address: 56, size: 4, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -245,6 +268,7 @@ expression: diff.instruction_rows address: 60, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -258,6 +282,7 @@ expression: diff.instruction_rows address: 64, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -271,6 +296,7 @@ expression: diff.instruction_rows address: 68, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -291,6 +317,7 @@ expression: diff.instruction_rows address: 72, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -304,6 +331,7 @@ expression: diff.instruction_rows address: 76, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -317,6 +345,7 @@ expression: diff.instruction_rows address: 80, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -330,6 +359,9 @@ expression: diff.instruction_rows address: 84, size: 4, opcode: 43, + branch_dest: Some( + 96, + ), }, ), kind: None, @@ -348,6 +380,7 @@ expression: diff.instruction_rows address: 88, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -361,6 +394,9 @@ expression: diff.instruction_rows address: 92, size: 4, opcode: 45, + branch_dest: Some( + 108, + ), }, ), kind: None, @@ -379,6 +415,7 @@ expression: diff.instruction_rows address: 96, size: 4, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -399,6 +436,7 @@ expression: diff.instruction_rows address: 100, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -412,6 +450,7 @@ expression: diff.instruction_rows address: 104, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -425,6 +464,7 @@ expression: diff.instruction_rows address: 108, size: 4, opcode: 60, + branch_dest: None, }, ), kind: None, @@ -445,6 +485,7 @@ expression: diff.instruction_rows address: 112, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -458,6 +499,7 @@ expression: diff.instruction_rows address: 116, size: 4, opcode: 38, + branch_dest: None, }, ), kind: None, @@ -471,6 +513,7 @@ expression: diff.instruction_rows address: 120, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -484,6 +527,9 @@ expression: diff.instruction_rows address: 124, size: 4, opcode: 43, + branch_dest: Some( + 136, + ), }, ), kind: None, @@ -502,6 +548,7 @@ expression: diff.instruction_rows address: 128, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -515,6 +562,9 @@ expression: diff.instruction_rows address: 132, size: 4, opcode: 45, + branch_dest: Some( + 148, + ), }, ), kind: None, @@ -533,6 +583,7 @@ expression: diff.instruction_rows address: 136, size: 4, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -553,6 +604,7 @@ expression: diff.instruction_rows address: 140, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -566,6 +618,7 @@ expression: diff.instruction_rows address: 144, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -579,6 +632,7 @@ expression: diff.instruction_rows address: 148, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -599,6 +653,7 @@ expression: diff.instruction_rows address: 152, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -612,6 +667,7 @@ expression: diff.instruction_rows address: 156, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -625,6 +681,7 @@ expression: diff.instruction_rows address: 160, size: 4, opcode: 42, + branch_dest: None, }, ), kind: None, @@ -638,6 +695,7 @@ expression: diff.instruction_rows address: 164, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -651,6 +709,7 @@ expression: diff.instruction_rows address: 168, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -664,6 +723,7 @@ expression: diff.instruction_rows address: 172, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -677,6 +737,7 @@ expression: diff.instruction_rows address: 176, size: 4, opcode: 162, + branch_dest: None, }, ), kind: None, @@ -690,6 +751,7 @@ expression: diff.instruction_rows address: 180, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -703,6 +765,7 @@ expression: diff.instruction_rows address: 184, size: 4, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -716,6 +779,9 @@ expression: diff.instruction_rows address: 188, size: 4, opcode: 43, + branch_dest: Some( + 196, + ), }, ), kind: None, @@ -734,6 +800,7 @@ expression: diff.instruction_rows address: 192, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -747,6 +814,7 @@ expression: diff.instruction_rows address: 196, size: 4, opcode: 163, + branch_dest: None, }, ), kind: None, @@ -767,6 +835,7 @@ expression: diff.instruction_rows address: 200, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -780,6 +849,7 @@ expression: diff.instruction_rows address: 204, size: 4, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -793,6 +863,9 @@ expression: diff.instruction_rows address: 208, size: 4, opcode: 43, + branch_dest: Some( + 216, + ), }, ), kind: None, @@ -811,6 +884,7 @@ expression: diff.instruction_rows address: 212, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -824,6 +898,7 @@ expression: diff.instruction_rows address: 216, size: 4, opcode: 163, + branch_dest: None, }, ), kind: None, @@ -844,6 +919,7 @@ expression: diff.instruction_rows address: 220, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -857,6 +933,7 @@ expression: diff.instruction_rows address: 224, size: 4, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -870,6 +947,9 @@ expression: diff.instruction_rows address: 228, size: 4, opcode: 43, + branch_dest: Some( + 236, + ), }, ), kind: None, @@ -888,6 +968,7 @@ expression: diff.instruction_rows address: 232, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -901,6 +982,7 @@ expression: diff.instruction_rows address: 236, size: 4, opcode: 163, + branch_dest: None, }, ), kind: None, @@ -921,6 +1003,7 @@ expression: diff.instruction_rows address: 240, size: 4, opcode: 94, + branch_dest: None, }, ), kind: None, @@ -934,6 +1017,7 @@ expression: diff.instruction_rows address: 244, size: 4, opcode: 66, + branch_dest: None, }, ), kind: None, @@ -947,6 +1031,9 @@ expression: diff.instruction_rows address: 248, size: 4, opcode: 43, + branch_dest: Some( + 256, + ), }, ), kind: None, @@ -965,6 +1052,7 @@ expression: diff.instruction_rows address: 252, size: 4, opcode: 166, + branch_dest: None, }, ), kind: None, @@ -978,6 +1066,7 @@ expression: diff.instruction_rows address: 256, size: 4, opcode: 41, + branch_dest: None, }, ), kind: None, @@ -998,6 +1087,7 @@ expression: diff.instruction_rows address: 260, size: 4, opcode: 47, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_x86__read_x86-2.snap b/objdiff-core/tests/snapshots/arch_x86__read_x86-2.snap index b1f6270..b6ecbce 100644 --- a/objdiff-core/tests/snapshots/arch_x86__read_x86-2.snap +++ b/objdiff-core/tests/snapshots/arch_x86__read_x86-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 1, opcode: 640, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 1, size: 2, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 3, size: 5, opcode: 640, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,7 @@ expression: diff.instruction_rows address: 8, size: 5, opcode: 59, + branch_dest: None, }, ), kind: None, @@ -61,6 +65,7 @@ expression: diff.instruction_rows address: 13, size: 3, opcode: 7, + branch_dest: None, }, ), kind: None, @@ -74,6 +79,7 @@ expression: diff.instruction_rows address: 16, size: 1, opcode: 590, + branch_dest: None, }, ), kind: None, @@ -87,6 +93,7 @@ expression: diff.instruction_rows address: 17, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_x86__read_x86_64-2.snap b/objdiff-core/tests/snapshots/arch_x86__read_x86_64-2.snap index 64657a7..2cfc38b 100644 --- a/objdiff-core/tests/snapshots/arch_x86__read_x86_64-2.snap +++ b/objdiff-core/tests/snapshots/arch_x86__read_x86_64-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 5, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 10, size: 1, opcode: 640, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,7 @@ expression: diff.instruction_rows address: 11, size: 4, opcode: 740, + branch_dest: None, }, ), kind: None, @@ -61,6 +65,7 @@ expression: diff.instruction_rows address: 15, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -74,6 +79,7 @@ expression: diff.instruction_rows address: 20, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -87,6 +93,7 @@ expression: diff.instruction_rows address: 25, size: 4, opcode: 448, + branch_dest: None, }, ), kind: None, @@ -100,6 +107,7 @@ expression: diff.instruction_rows address: 29, size: 4, opcode: 460, + branch_dest: None, }, ), kind: None, @@ -113,6 +121,7 @@ expression: diff.instruction_rows address: 33, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -126,6 +135,7 @@ expression: diff.instruction_rows address: 38, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -139,6 +149,7 @@ expression: diff.instruction_rows address: 43, size: 5, opcode: 448, + branch_dest: None, }, ), kind: None, @@ -152,6 +163,7 @@ expression: diff.instruction_rows address: 48, size: 5, opcode: 460, + branch_dest: None, }, ), kind: None, @@ -165,6 +177,7 @@ expression: diff.instruction_rows address: 53, size: 4, opcode: 11, + branch_dest: None, }, ), kind: None, @@ -178,6 +191,7 @@ expression: diff.instruction_rows address: 57, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -191,6 +205,7 @@ expression: diff.instruction_rows address: 62, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -204,6 +219,7 @@ expression: diff.instruction_rows address: 67, size: 5, opcode: 448, + branch_dest: None, }, ), kind: None, @@ -217,6 +233,7 @@ expression: diff.instruction_rows address: 72, size: 5, opcode: 460, + branch_dest: None, }, ), kind: None, @@ -230,6 +247,7 @@ expression: diff.instruction_rows address: 77, size: 4, opcode: 11, + branch_dest: None, }, ), kind: None, @@ -243,6 +261,7 @@ expression: diff.instruction_rows address: 81, size: 4, opcode: 7, + branch_dest: None, }, ), kind: None, @@ -256,6 +275,7 @@ expression: diff.instruction_rows address: 85, size: 1, opcode: 590, + branch_dest: None, }, ), kind: None, @@ -269,6 +289,7 @@ expression: diff.instruction_rows address: 86, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-2.snap b/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-2.snap index 1ce84c3..bf713fb 100644 --- a/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-2.snap +++ b/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-2.snap @@ -9,6 +9,7 @@ expression: diff.instruction_rows address: 0, size: 4, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -22,6 +23,7 @@ expression: diff.instruction_rows address: 4, size: 1, opcode: 137, + branch_dest: None, }, ), kind: None, @@ -35,6 +37,7 @@ expression: diff.instruction_rows address: 5, size: 3, opcode: 93, + branch_dest: None, }, ), kind: None, @@ -48,6 +51,9 @@ expression: diff.instruction_rows address: 8, size: 2, opcode: 297, + branch_dest: Some( + 58, + ), }, ), kind: None, @@ -66,6 +72,9 @@ expression: diff.instruction_rows address: 10, size: 7, opcode: 308, + branch_dest: Some( + 60, + ), }, ), kind: None, @@ -84,6 +93,7 @@ expression: diff.instruction_rows address: 17, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -104,6 +114,7 @@ expression: diff.instruction_rows address: 22, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -117,6 +128,7 @@ expression: diff.instruction_rows address: 23, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -137,6 +149,7 @@ expression: diff.instruction_rows address: 28, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -150,6 +163,7 @@ expression: diff.instruction_rows address: 29, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -170,6 +184,7 @@ expression: diff.instruction_rows address: 34, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -183,6 +198,7 @@ expression: diff.instruction_rows address: 35, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -203,6 +219,7 @@ expression: diff.instruction_rows address: 40, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -216,6 +233,7 @@ expression: diff.instruction_rows address: 41, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -236,6 +254,7 @@ expression: diff.instruction_rows address: 46, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -249,6 +268,7 @@ expression: diff.instruction_rows address: 47, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -269,6 +289,7 @@ expression: diff.instruction_rows address: 52, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -282,6 +303,7 @@ expression: diff.instruction_rows address: 53, size: 5, opcode: 414, + branch_dest: None, }, ), kind: None, @@ -302,6 +324,7 @@ expression: diff.instruction_rows address: 58, size: 1, opcode: 662, + branch_dest: None, }, ), kind: None, @@ -322,6 +345,7 @@ expression: diff.instruction_rows address: 59, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -335,6 +359,9 @@ expression: diff.instruction_rows address: 60, size: 4, opcode: 65534, + branch_dest: Some( + 17, + ), }, ), kind: None, @@ -360,6 +387,9 @@ expression: diff.instruction_rows address: 64, size: 4, opcode: 65534, + branch_dest: Some( + 23, + ), }, ), kind: None, @@ -378,6 +408,9 @@ expression: diff.instruction_rows address: 68, size: 4, opcode: 65534, + branch_dest: Some( + 29, + ), }, ), kind: None, @@ -396,6 +429,9 @@ expression: diff.instruction_rows address: 72, size: 4, opcode: 65534, + branch_dest: Some( + 35, + ), }, ), kind: None, @@ -414,6 +450,9 @@ expression: diff.instruction_rows address: 76, size: 4, opcode: 65534, + branch_dest: Some( + 41, + ), }, ), kind: None, @@ -432,6 +471,9 @@ expression: diff.instruction_rows address: 80, size: 4, opcode: 65534, + branch_dest: Some( + 47, + ), }, ), kind: None, @@ -450,6 +492,9 @@ expression: diff.instruction_rows address: 84, size: 4, opcode: 65534, + branch_dest: Some( + 53, + ), }, ), kind: None, @@ -468,6 +513,7 @@ expression: diff.instruction_rows address: 88, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -481,6 +527,7 @@ expression: diff.instruction_rows address: 89, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -494,6 +541,7 @@ expression: diff.instruction_rows address: 90, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -507,6 +555,7 @@ expression: diff.instruction_rows address: 91, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -520,6 +569,7 @@ expression: diff.instruction_rows address: 92, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -533,6 +583,7 @@ expression: diff.instruction_rows address: 93, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -546,6 +597,7 @@ expression: diff.instruction_rows address: 94, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, @@ -559,6 +611,7 @@ expression: diff.instruction_rows address: 95, size: 1, opcode: 465, + branch_dest: None, }, ), kind: None, diff --git a/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-3.snap b/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-3.snap index 0de5915..afdb512 100644 --- a/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-3.snap +++ b/objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-3.snap @@ -6,7 +6,7 @@ expression: output [(Address(4), Normal, 5), (Spacing(4), Normal, 0), (Opcode("dec", 137), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Eol, Normal, 0)] [(Address(5), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmp", 93), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(6)), Normal, 0), (Eol, Normal, 0)] [(Address(8), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ja", 297), Normal, 10), (Argument(Opaque("short")), Normal, 0), (Spacing(1), Normal, 0), (BranchDest(58), Normal, 0), (Basic(" ~>"), Rotating(0), 0), (Eol, Normal, 0)] -[(Address(10), Normal, 5), (Spacing(4), Normal, 0), (Opcode("jmp", 308), Normal, 10), (Argument(Opaque("dword")), Normal, 0), (Spacing(1), Normal, 0), (Argument(Opaque("ptr")), Normal, 0), (Spacing(1), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("eax")), Normal, 0), (Argument(Opaque("*")), Normal, 0), (Argument(Signed(4)), Normal, 0), (Argument(Opaque("+")), Normal, 0), (Symbol(Symbol { name: "$L282", demangled_name: None, address: 60, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic("]"), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)] +[(Address(10), Normal, 5), (Spacing(4), Normal, 0), (Opcode("jmp", 308), Normal, 10), (Argument(Opaque("dword")), Normal, 0), (Spacing(1), Normal, 0), (Argument(Opaque("ptr")), Normal, 0), (Spacing(1), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("eax")), Normal, 0), (Argument(Opaque("*")), Normal, 0), (Argument(Signed(4)), Normal, 0), (Argument(Opaque("+")), Normal, 0), (BranchDest(60), Normal, 0), (Basic("]"), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)] [(Address(17), Normal, 5), (Basic(" ~> "), Rotating(2), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(8)), Normal, 0), (Eol, Normal, 0)] [(Address(22), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ret", 662), Normal, 10), (Eol, Normal, 0)] [(Address(23), Normal, 5), (Basic(" ~> "), Rotating(3), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(7)), Normal, 0), (Eol, Normal, 0)] @@ -22,13 +22,13 @@ expression: output [(Address(53), Normal, 5), (Basic(" ~> "), Rotating(8), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(2)), Normal, 0), (Eol, Normal, 0)] [(Address(58), Normal, 5), (Basic(" ~> "), Rotating(0), 0), (Opcode("ret", 662), Normal, 10), (Eol, Normal, 0)] [(Address(59), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)] -[(Address(60), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L272", demangled_name: None, address: 17, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)] -[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L273", demangled_name: None, address: 23, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)] -[(Address(68), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L274", demangled_name: None, address: 29, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)] -[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L275", demangled_name: None, address: 35, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)] -[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L276", demangled_name: None, address: 41, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)] -[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L277", demangled_name: None, address: 47, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)] -[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L278", demangled_name: None, address: 53, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] +[(Address(60), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(17), Normal, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)] +[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(23), Normal, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)] +[(Address(68), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(29), Normal, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)] +[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(35), Normal, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)] +[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(41), Normal, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)] +[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(47), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)] +[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(53), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] [(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)] [(Address(89), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)] [(Address(90), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)]