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Improve local branch relocation handling

Browse Source 
Reworks the local-branch handling logic to be more
unified: scan_instructions does all the work up front,
and process_instruction / display_instruction can
simply use the calculated branch destination instead
of performing their own is-relocation-target-
function-local checks.

(Hopefully) Fixes #192
This commit is contained in:
Luke Street
2025-05-07 22:53:10 -06:00
parent 34220a8e26
commit 0c48d711c7
21 changed files with 1253 additions and 226 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
objdiff-core/tests/snapshots/arch_arm__combine_text_sections.snap
View File

@@ -1,6 +1,5 @@
---
source: objdiff-core/tests/arch_arm.rs
assertion_line: 43
expression: diff.instruction_rows
---
[
@@ -10,6 +9,7 @@ expression: diff.instruction_rows
address: 76,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -23,6 +23,7 @@ expression: diff.instruction_rows
address: 80,
size: 4,
opcode: 32779,
branch_dest: None,
},
),
kind: None,
@@ -36,6 +37,7 @@ expression: diff.instruction_rows
address: 84,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,

172
objdiff-core/tests/snapshots/arch_arm__read_arm-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 40,
size: 4,
opcode: 32895,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 44,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 48,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,7 @@ expression: diff.instruction_rows
address: 52,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -61,6 +65,7 @@ expression: diff.instruction_rows
address: 56,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -74,6 +79,7 @@ expression: diff.instruction_rows
address: 60,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -87,6 +93,7 @@ expression: diff.instruction_rows
address: 64,
size: 4,
opcode: 32770,
branch_dest: None,
},
),
kind: None,
@@ -100,6 +107,9 @@ expression: diff.instruction_rows
address: 68,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -118,6 +128,9 @@ expression: diff.instruction_rows
address: 72,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -136,6 +149,9 @@ expression: diff.instruction_rows
address: 76,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -154,6 +170,9 @@ expression: diff.instruction_rows
address: 80,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -172,6 +191,9 @@ expression: diff.instruction_rows
address: 84,
size: 4,
opcode: 32773,
branch_dest: Some(
232,
),
},
),
kind: None,
@@ -190,6 +212,9 @@ expression: diff.instruction_rows
address: 88,
size: 4,
opcode: 32773,
branch_dest: Some(
164,
),
},
),
kind: None,
@@ -208,6 +233,9 @@ expression: diff.instruction_rows
address: 92,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -226,6 +254,9 @@ expression: diff.instruction_rows
address: 96,
size: 4,
opcode: 32773,
branch_dest: Some(
180,
),
},
),
kind: None,
@@ -244,6 +275,9 @@ expression: diff.instruction_rows
address: 100,
size: 4,
opcode: 32773,
branch_dest: Some(
116,
),
},
),
kind: None,
@@ -262,6 +296,9 @@ expression: diff.instruction_rows
address: 104,
size: 4,
opcode: 32773,
branch_dest: Some(
192,
),
},
),
kind: None,
@@ -280,6 +317,9 @@ expression: diff.instruction_rows
address: 108,
size: 4,
opcode: 32773,
branch_dest: Some(
204,
),
},
),
kind: None,
@@ -298,6 +338,9 @@ expression: diff.instruction_rows
address: 112,
size: 4,
opcode: 32773,
branch_dest: Some(
204,
),
},
),
kind: None,
@@ -316,6 +359,7 @@ expression: diff.instruction_rows
address: 116,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -336,6 +380,7 @@ expression: diff.instruction_rows
address: 120,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -349,6 +394,7 @@ expression: diff.instruction_rows
address: 124,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -362,6 +408,7 @@ expression: diff.instruction_rows
address: 128,
size: 4,
opcode: 32800,
branch_dest: None,
},
),
kind: None,
@@ -375,6 +422,7 @@ expression: diff.instruction_rows
address: 132,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -388,6 +436,9 @@ expression: diff.instruction_rows
address: 136,
size: 4,
opcode: 32773,
branch_dest: Some(
148,
),
},
),
kind: None,
@@ -406,6 +457,9 @@ expression: diff.instruction_rows
address: 140,
size: 4,
opcode: 32774,
branch_dest: Some(
464,
),
},
),
kind: None,
@@ -424,6 +478,7 @@ expression: diff.instruction_rows
address: 144,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -437,6 +492,7 @@ expression: diff.instruction_rows
address: 148,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -457,6 +513,7 @@ expression: diff.instruction_rows
address: 152,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -470,6 +527,7 @@ expression: diff.instruction_rows
address: 156,
size: 4,
opcode: 32777,
branch_dest: None,
},
),
kind: None,
@@ -483,6 +541,9 @@ expression: diff.instruction_rows
address: 160,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -501,6 +562,7 @@ expression: diff.instruction_rows
address: 164,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -521,6 +583,7 @@ expression: diff.instruction_rows
address: 168,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -534,6 +597,7 @@ expression: diff.instruction_rows
address: 172,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -547,6 +611,9 @@ expression: diff.instruction_rows
address: 176,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -565,6 +632,7 @@ expression: diff.instruction_rows
address: 180,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -585,6 +653,7 @@ expression: diff.instruction_rows
address: 184,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -598,6 +667,9 @@ expression: diff.instruction_rows
address: 188,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -616,6 +688,7 @@ expression: diff.instruction_rows
address: 192,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -636,6 +709,7 @@ expression: diff.instruction_rows
address: 196,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -649,6 +723,9 @@ expression: diff.instruction_rows
address: 200,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -667,6 +744,7 @@ expression: diff.instruction_rows
address: 204,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -688,6 +766,7 @@ expression: diff.instruction_rows
address: 208,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -701,6 +780,7 @@ expression: diff.instruction_rows
address: 212,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -714,6 +794,7 @@ expression: diff.instruction_rows
address: 216,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -727,6 +808,7 @@ expression: diff.instruction_rows
address: 220,
size: 4,
opcode: 32899,
branch_dest: None,
},
),
kind: None,
@@ -740,6 +822,7 @@ expression: diff.instruction_rows
address: 224,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -753,6 +836,9 @@ expression: diff.instruction_rows
address: 228,
size: 4,
opcode: 32773,
branch_dest: Some(
240,
),
},
),
kind: None,
@@ -771,6 +857,7 @@ expression: diff.instruction_rows
address: 232,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -791,6 +878,7 @@ expression: diff.instruction_rows
address: 236,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -804,6 +892,7 @@ expression: diff.instruction_rows
address: 240,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -833,6 +922,7 @@ expression: diff.instruction_rows
address: 244,
size: 4,
opcode: 32829,
branch_dest: None,
},
),
kind: None,
@@ -846,6 +936,7 @@ expression: diff.instruction_rows
address: 248,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -859,6 +950,9 @@ expression: diff.instruction_rows
address: 252,
size: 4,
opcode: 32773,
branch_dest: Some(
276,
),
},
),
kind: None,
@@ -877,6 +971,7 @@ expression: diff.instruction_rows
address: 256,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -890,6 +985,7 @@ expression: diff.instruction_rows
address: 260,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -903,6 +999,7 @@ expression: diff.instruction_rows
address: 264,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -916,6 +1013,7 @@ expression: diff.instruction_rows
address: 268,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -929,6 +1027,7 @@ expression: diff.instruction_rows
address: 272,
size: 4,
opcode: 32778,
branch_dest: None,
},
),
kind: None,
@@ -942,6 +1041,7 @@ expression: diff.instruction_rows
address: 276,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -962,6 +1062,7 @@ expression: diff.instruction_rows
address: 280,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -975,6 +1076,9 @@ expression: diff.instruction_rows
address: 284,
size: 4,
opcode: 32773,
branch_dest: Some(
328,
),
},
),
kind: None,
@@ -993,6 +1097,9 @@ expression: diff.instruction_rows
address: 288,
size: 4,
opcode: 32773,
branch_dest: Some(
336,
),
},
),
kind: None,
@@ -1011,6 +1118,7 @@ expression: diff.instruction_rows
address: 292,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1024,6 +1132,9 @@ expression: diff.instruction_rows
address: 296,
size: 4,
opcode: 32773,
branch_dest: Some(
348,
),
},
),
kind: None,
@@ -1042,6 +1153,7 @@ expression: diff.instruction_rows
address: 300,
size: 4,
opcode: 32829,
branch_dest: None,
},
),
kind: None,
@@ -1055,6 +1167,7 @@ expression: diff.instruction_rows
address: 304,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1068,6 +1181,9 @@ expression: diff.instruction_rows
address: 308,
size: 4,
opcode: 32773,
branch_dest: Some(
348,
),
},
),
kind: None,
@@ -1086,6 +1202,7 @@ expression: diff.instruction_rows
address: 312,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1099,6 +1216,7 @@ expression: diff.instruction_rows
address: 316,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1112,6 +1230,9 @@ expression: diff.instruction_rows
address: 320,
size: 4,
opcode: 32773,
branch_dest: Some(
380,
),
},
),
kind: None,
@@ -1130,6 +1251,9 @@ expression: diff.instruction_rows
address: 324,
size: 4,
opcode: 32773,
branch_dest: Some(
348,
),
},
),
kind: None,
@@ -1148,6 +1272,7 @@ expression: diff.instruction_rows
address: 328,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1168,6 +1293,9 @@ expression: diff.instruction_rows
address: 332,
size: 4,
opcode: 32773,
branch_dest: Some(
348,
),
},
),
kind: None,
@@ -1186,6 +1314,7 @@ expression: diff.instruction_rows
address: 336,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -1206,6 +1335,7 @@ expression: diff.instruction_rows
address: 340,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -1219,6 +1349,9 @@ expression: diff.instruction_rows
address: 344,
size: 4,
opcode: 32773,
branch_dest: Some(
380,
),
},
),
kind: None,
@@ -1237,6 +1370,7 @@ expression: diff.instruction_rows
address: 348,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -1260,6 +1394,7 @@ expression: diff.instruction_rows
address: 352,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -1273,6 +1408,7 @@ expression: diff.instruction_rows
address: 356,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1286,6 +1422,7 @@ expression: diff.instruction_rows
address: 360,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1299,6 +1436,9 @@ expression: diff.instruction_rows
address: 364,
size: 4,
opcode: 32773,
branch_dest: Some(
380,
),
},
),
kind: None,
@@ -1317,6 +1457,7 @@ expression: diff.instruction_rows
address: 368,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -1330,6 +1471,7 @@ expression: diff.instruction_rows
address: 372,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -1343,6 +1485,7 @@ expression: diff.instruction_rows
address: 376,
size: 4,
opcode: 32899,
branch_dest: None,
},
),
kind: None,
@@ -1356,6 +1499,7 @@ expression: diff.instruction_rows
address: 380,
size: 4,
opcode: 32829,
branch_dest: None,
},
),
kind: None,
@@ -1378,6 +1522,7 @@ expression: diff.instruction_rows
address: 384,
size: 4,
opcode: 32770,
branch_dest: None,
},
),
kind: None,
@@ -1391,6 +1536,7 @@ expression: diff.instruction_rows
address: 388,
size: 4,
opcode: 32770,
branch_dest: None,
},
),
kind: None,
@@ -1404,6 +1550,7 @@ expression: diff.instruction_rows
address: 392,
size: 4,
opcode: 32898,
branch_dest: None,
},
),
kind: None,
@@ -1417,6 +1564,7 @@ expression: diff.instruction_rows
address: 396,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1430,6 +1578,9 @@ expression: diff.instruction_rows
address: 400,
size: 4,
opcode: 32773,
branch_dest: Some(
424,
),
},
),
kind: None,
@@ -1448,6 +1599,7 @@ expression: diff.instruction_rows
address: 404,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -1468,6 +1620,7 @@ expression: diff.instruction_rows
address: 408,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -1481,6 +1634,7 @@ expression: diff.instruction_rows
address: 412,
size: 4,
opcode: 32770,
branch_dest: None,
},
),
kind: None,
@@ -1494,6 +1648,7 @@ expression: diff.instruction_rows
address: 416,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1507,6 +1662,9 @@ expression: diff.instruction_rows
address: 420,
size: 4,
opcode: 32773,
branch_dest: Some(
404,
),
},
),
kind: None,
@@ -1525,6 +1683,7 @@ expression: diff.instruction_rows
address: 424,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -1545,6 +1704,7 @@ expression: diff.instruction_rows
address: 428,
size: 4,
opcode: 32799,
branch_dest: None,
},
),
kind: None,
@@ -1558,6 +1718,7 @@ expression: diff.instruction_rows
address: 432,
size: 4,
opcode: 32800,
branch_dest: None,
},
),
kind: None,
@@ -1571,6 +1732,7 @@ expression: diff.instruction_rows
address: 436,
size: 4,
opcode: 32786,
branch_dest: None,
},
),
kind: None,
@@ -1584,6 +1746,9 @@ expression: diff.instruction_rows
address: 440,
size: 4,
opcode: 32773,
branch_dest: Some(
448,
),
},
),
kind: None,
@@ -1602,6 +1767,7 @@ expression: diff.instruction_rows
address: 444,
size: 4,
opcode: 32774,
branch_dest: None,
},
),
kind: None,
@@ -1615,6 +1781,7 @@ expression: diff.instruction_rows
address: 448,
size: 4,
opcode: 32818,
branch_dest: None,
},
),
kind: None,
@@ -1635,6 +1802,7 @@ expression: diff.instruction_rows
address: 452,
size: 4,
opcode: 32899,
branch_dest: None,
},
),
kind: None,
@@ -1648,6 +1816,7 @@ expression: diff.instruction_rows
address: 456,
size: 4,
opcode: 32793,
branch_dest: None,
},
),
kind: None,
@@ -1661,6 +1830,7 @@ expression: diff.instruction_rows
address: 460,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1674,6 +1844,7 @@ expression: diff.instruction_rows
address: 464,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1694,6 +1865,7 @@ expression: diff.instruction_rows
address: 468,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,

3
objdiff-core/tests/snapshots/arch_arm__read_arm-3.snap
View File

@@ -1,6 +1,5 @@
---
source: objdiff-core/tests/arch_arm.rs
assertion_line: 16
expression: output
---
[(Address(0), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stmdb", 32895), Normal, 10), (Argument(Opaque("sp")), Normal, 0), (Argument(Opaque("!")), Normal, 0), (Basic(", "), Normal, 0), (Basic("{"), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r6")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("lr")), Normal, 0), (Basic("}"), Normal, 0), (Eol, Normal, 0)]
@@ -28,7 +27,7 @@ expression: output
[(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ldrb", 32800), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(224)), Normal, 0), (Basic("]"), Normal, 0), (Eol, Normal, 0)]
[(Address(92), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmp", 32786), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Unsigned(0)), Normal, 0), (Eol, Normal, 0)]
[(Address(96), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 32773), Normal, 10), (BranchDest(108), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)]
[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (Symbol(Symbol { name: "_ZN13LinkStateItem15GetEquipBombchuEv", demangled_name: Some("LinkStateItem::GetEquipBombchu()"), address: 472, size: 16, kind: Function, section: Some(0), flags: FlagSet(Global), align: None, virtual_address: None }), Bright, 0), (Addend(-8), Bright, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)]
[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (BranchDest(424), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)]
[(Address(104), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bl", 32774), Normal, 10), (Symbol(Symbol { name: "_ZN12EquipBombchu19func_ov014_0213ec64Ev", demangled_name: Some("EquipBombchu::func_ov014_0213ec64()"), address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global | Weak), align: None, virtual_address: None }), Bright, 0), (Addend(-8), Bright, 0), (Eol, Normal, 0)]
[(Address(108), Normal, 5), (Basic(" ~> "), Rotating(7), 0), (Opcode("ldr", 32799), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("pc")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(308)), Normal, 0), (Basic("]"), Normal, 0), (Basic(" (->"), Normal, 0), (BranchDest(424), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(112), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ldr", 32799), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Basic("#"), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("]"), Normal, 0), (Eol, Normal, 0)]

128
objdiff-core/tests/snapshots/arch_arm__read_thumb-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 2,
opcode: 56,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 2,
size: 2,
opcode: 74,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 4,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,7 @@ expression: diff.instruction_rows
address: 6,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -61,6 +65,7 @@ expression: diff.instruction_rows
address: 8,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -74,6 +79,7 @@ expression: diff.instruction_rows
address: 10,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -87,6 +93,7 @@ expression: diff.instruction_rows
address: 12,
size: 2,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -100,6 +107,7 @@ expression: diff.instruction_rows
address: 14,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -113,6 +121,7 @@ expression: diff.instruction_rows
address: 18,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -126,6 +135,9 @@ expression: diff.instruction_rows
address: 20,
size: 2,
opcode: 15,
branch_dest: Some(
212,
),
},
),
kind: None,
@@ -144,6 +156,7 @@ expression: diff.instruction_rows
address: 22,
size: 2,
opcode: 38,
branch_dest: None,
},
),
kind: None,
@@ -157,6 +170,7 @@ expression: diff.instruction_rows
address: 24,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -170,6 +184,9 @@ expression: diff.instruction_rows
address: 26,
size: 2,
opcode: 15,
branch_dest: Some(
48,
),
},
),
kind: None,
@@ -188,6 +205,7 @@ expression: diff.instruction_rows
address: 28,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -201,6 +219,7 @@ expression: diff.instruction_rows
address: 30,
size: 2,
opcode: 26,
branch_dest: None,
},
),
kind: None,
@@ -214,6 +233,9 @@ expression: diff.instruction_rows
address: 32,
size: 2,
opcode: 15,
branch_dest: Some(
94,
),
},
),
kind: None,
@@ -232,6 +254,7 @@ expression: diff.instruction_rows
address: 34,
size: 2,
opcode: 35,
branch_dest: None,
},
),
kind: None,
@@ -245,6 +268,7 @@ expression: diff.instruction_rows
address: 36,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -258,6 +282,7 @@ expression: diff.instruction_rows
address: 38,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -271,6 +296,7 @@ expression: diff.instruction_rows
address: 40,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -284,6 +310,7 @@ expression: diff.instruction_rows
address: 44,
size: 2,
opcode: 7,
branch_dest: None,
},
),
kind: None,
@@ -297,6 +324,7 @@ expression: diff.instruction_rows
address: 46,
size: 2,
opcode: 55,
branch_dest: None,
},
),
kind: None,
@@ -310,6 +338,7 @@ expression: diff.instruction_rows
address: 48,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -330,6 +359,7 @@ expression: diff.instruction_rows
address: 50,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -343,6 +373,7 @@ expression: diff.instruction_rows
address: 52,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -356,6 +387,7 @@ expression: diff.instruction_rows
address: 56,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -369,6 +401,9 @@ expression: diff.instruction_rows
address: 58,
size: 2,
opcode: 15,
branch_dest: Some(
212,
),
},
),
kind: None,
@@ -387,6 +422,7 @@ expression: diff.instruction_rows
address: 60,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -400,6 +436,7 @@ expression: diff.instruction_rows
address: 62,
size: 2,
opcode: 33,
branch_dest: None,
},
),
kind: None,
@@ -413,6 +450,7 @@ expression: diff.instruction_rows
address: 64,
size: 2,
opcode: 36,
branch_dest: None,
},
),
kind: None,
@@ -426,6 +464,7 @@ expression: diff.instruction_rows
address: 66,
size: 2,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -439,6 +478,7 @@ expression: diff.instruction_rows
address: 68,
size: 2,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -452,6 +492,9 @@ expression: diff.instruction_rows
address: 70,
size: 2,
opcode: 15,
branch_dest: Some(
212,
),
},
),
kind: None,
@@ -470,6 +513,7 @@ expression: diff.instruction_rows
address: 72,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -483,6 +527,7 @@ expression: diff.instruction_rows
address: 74,
size: 2,
opcode: 17,
branch_dest: None,
},
),
kind: None,
@@ -496,6 +541,7 @@ expression: diff.instruction_rows
address: 76,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -509,6 +555,7 @@ expression: diff.instruction_rows
address: 78,
size: 2,
opcode: 54,
branch_dest: None,
},
),
kind: None,
@@ -522,6 +569,7 @@ expression: diff.instruction_rows
address: 80,
size: 2,
opcode: 67,
branch_dest: None,
},
),
kind: None,
@@ -535,6 +583,7 @@ expression: diff.instruction_rows
address: 82,
size: 2,
opcode: 36,
branch_dest: None,
},
),
kind: None,
@@ -548,6 +597,7 @@ expression: diff.instruction_rows
address: 84,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -561,6 +611,7 @@ expression: diff.instruction_rows
address: 86,
size: 2,
opcode: 7,
branch_dest: None,
},
),
kind: None,
@@ -574,6 +625,7 @@ expression: diff.instruction_rows
address: 88,
size: 2,
opcode: 54,
branch_dest: None,
},
),
kind: None,
@@ -587,6 +639,7 @@ expression: diff.instruction_rows
address: 90,
size: 2,
opcode: 67,
branch_dest: None,
},
),
kind: None,
@@ -600,6 +653,7 @@ expression: diff.instruction_rows
address: 92,
size: 2,
opcode: 55,
branch_dest: None,
},
),
kind: None,
@@ -613,6 +667,7 @@ expression: diff.instruction_rows
address: 94,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -633,6 +688,7 @@ expression: diff.instruction_rows
address: 96,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -646,6 +702,7 @@ expression: diff.instruction_rows
address: 98,
size: 2,
opcode: 4,
branch_dest: None,
},
),
kind: None,
@@ -659,6 +716,7 @@ expression: diff.instruction_rows
address: 100,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -672,6 +730,7 @@ expression: diff.instruction_rows
address: 104,
size: 2,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -685,6 +744,7 @@ expression: diff.instruction_rows
address: 106,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -698,6 +758,7 @@ expression: diff.instruction_rows
address: 108,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -711,6 +772,7 @@ expression: diff.instruction_rows
address: 112,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -724,6 +786,7 @@ expression: diff.instruction_rows
address: 114,
size: 2,
opcode: 6,
branch_dest: None,
},
),
kind: None,
@@ -737,6 +800,7 @@ expression: diff.instruction_rows
address: 116,
size: 2,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -750,6 +814,7 @@ expression: diff.instruction_rows
address: 118,
size: 2,
opcode: 35,
branch_dest: None,
},
),
kind: None,
@@ -763,6 +828,7 @@ expression: diff.instruction_rows
address: 120,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -776,6 +842,7 @@ expression: diff.instruction_rows
address: 122,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -789,6 +856,7 @@ expression: diff.instruction_rows
address: 124,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -802,6 +870,7 @@ expression: diff.instruction_rows
address: 126,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -815,6 +884,7 @@ expression: diff.instruction_rows
address: 130,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -828,6 +898,9 @@ expression: diff.instruction_rows
address: 132,
size: 2,
opcode: 15,
branch_dest: Some(
168,
),
},
),
kind: None,
@@ -846,6 +919,7 @@ expression: diff.instruction_rows
address: 134,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -859,6 +933,7 @@ expression: diff.instruction_rows
address: 136,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -872,6 +947,7 @@ expression: diff.instruction_rows
address: 140,
size: 2,
opcode: 47,
branch_dest: None,
},
),
kind: None,
@@ -885,6 +961,7 @@ expression: diff.instruction_rows
address: 142,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -898,6 +975,9 @@ expression: diff.instruction_rows
address: 144,
size: 2,
opcode: 15,
branch_dest: Some(
168,
),
},
),
kind: None,
@@ -916,6 +996,7 @@ expression: diff.instruction_rows
address: 146,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -929,6 +1010,7 @@ expression: diff.instruction_rows
address: 148,
size: 2,
opcode: 33,
branch_dest: None,
},
),
kind: None,
@@ -942,6 +1024,7 @@ expression: diff.instruction_rows
address: 150,
size: 2,
opcode: 36,
branch_dest: None,
},
),
kind: None,
@@ -955,6 +1038,7 @@ expression: diff.instruction_rows
address: 152,
size: 2,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -968,6 +1052,7 @@ expression: diff.instruction_rows
address: 154,
size: 2,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -981,6 +1066,9 @@ expression: diff.instruction_rows
address: 156,
size: 2,
opcode: 15,
branch_dest: Some(
168,
),
},
),
kind: None,
@@ -999,6 +1087,7 @@ expression: diff.instruction_rows
address: 158,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -1012,6 +1101,7 @@ expression: diff.instruction_rows
address: 160,
size: 2,
opcode: 17,
branch_dest: None,
},
),
kind: None,
@@ -1025,6 +1115,7 @@ expression: diff.instruction_rows
address: 162,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -1038,6 +1129,7 @@ expression: diff.instruction_rows
address: 164,
size: 2,
opcode: 54,
branch_dest: None,
},
),
kind: None,
@@ -1051,6 +1143,7 @@ expression: diff.instruction_rows
address: 166,
size: 2,
opcode: 67,
branch_dest: None,
},
),
kind: None,
@@ -1064,6 +1157,7 @@ expression: diff.instruction_rows
address: 168,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -1086,6 +1180,9 @@ expression: diff.instruction_rows
address: 170,
size: 2,
opcode: 15,
branch_dest: Some(
200,
),
},
),
kind: None,
@@ -1104,6 +1201,7 @@ expression: diff.instruction_rows
address: 172,
size: 2,
opcode: 35,
branch_dest: None,
},
),
kind: None,
@@ -1117,6 +1215,7 @@ expression: diff.instruction_rows
address: 174,
size: 2,
opcode: 25,
branch_dest: None,
},
),
kind: None,
@@ -1130,6 +1229,9 @@ expression: diff.instruction_rows
address: 176,
size: 2,
opcode: 15,
branch_dest: Some(
200,
),
},
),
kind: None,
@@ -1148,6 +1250,7 @@ expression: diff.instruction_rows
address: 178,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -1161,6 +1264,7 @@ expression: diff.instruction_rows
address: 180,
size: 2,
opcode: 37,
branch_dest: None,
},
),
kind: None,
@@ -1174,6 +1278,7 @@ expression: diff.instruction_rows
address: 182,
size: 2,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -1187,6 +1292,7 @@ expression: diff.instruction_rows
address: 184,
size: 2,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -1200,6 +1306,9 @@ expression: diff.instruction_rows
address: 186,
size: 2,
opcode: 15,
branch_dest: Some(
200,
),
},
),
kind: None,
@@ -1218,6 +1327,7 @@ expression: diff.instruction_rows
address: 188,
size: 2,
opcode: 32,
branch_dest: None,
},
),
kind: None,
@@ -1231,6 +1341,7 @@ expression: diff.instruction_rows
address: 190,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -1244,6 +1355,7 @@ expression: diff.instruction_rows
address: 192,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -1257,6 +1369,7 @@ expression: diff.instruction_rows
address: 194,
size: 2,
opcode: 46,
branch_dest: None,
},
),
kind: None,
@@ -1270,6 +1383,7 @@ expression: diff.instruction_rows
address: 196,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -1283,6 +1397,7 @@ expression: diff.instruction_rows
address: 200,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -1305,6 +1420,7 @@ expression: diff.instruction_rows
address: 202,
size: 2,
opcode: 35,
branch_dest: None,
},
),
kind: None,
@@ -1318,6 +1434,7 @@ expression: diff.instruction_rows
address: 204,
size: 2,
opcode: 34,
branch_dest: None,
},
),
kind: None,
@@ -1331,6 +1448,7 @@ expression: diff.instruction_rows
address: 206,
size: 2,
opcode: 4,
branch_dest: None,
},
),
kind: None,
@@ -1344,6 +1462,7 @@ expression: diff.instruction_rows
address: 208,
size: 4,
opcode: 19,
branch_dest: None,
},
),
kind: None,
@@ -1357,6 +1476,7 @@ expression: diff.instruction_rows
address: 212,
size: 2,
opcode: 7,
branch_dest: None,
},
),
kind: None,
@@ -1379,6 +1499,7 @@ expression: diff.instruction_rows
address: 214,
size: 2,
opcode: 55,
branch_dest: None,
},
),
kind: None,
@@ -1392,6 +1513,7 @@ expression: diff.instruction_rows
address: 216,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1405,6 +1527,7 @@ expression: diff.instruction_rows
address: 220,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1418,6 +1541,7 @@ expression: diff.instruction_rows
address: 224,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1431,6 +1555,7 @@ expression: diff.instruction_rows
address: 228,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1444,6 +1569,7 @@ expression: diff.instruction_rows
address: 232,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1457,6 +1583,7 @@ expression: diff.instruction_rows
address: 236,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,
@@ -1470,6 +1597,7 @@ expression: diff.instruction_rows
address: 240,
size: 4,
opcode: 65535,
branch_dest: None,
},
),
kind: None,

54
objdiff-core/tests/snapshots/arch_mips__read_mips-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 4,
size: 4,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 8,
size: 4,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,7 @@ expression: diff.instruction_rows
address: 12,
size: 4,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -61,6 +65,7 @@ expression: diff.instruction_rows
address: 16,
size: 4,
opcode: 44,
branch_dest: None,
},
),
kind: None,
@@ -74,6 +79,7 @@ expression: diff.instruction_rows
address: 20,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -87,6 +93,7 @@ expression: diff.instruction_rows
address: 24,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,
@@ -100,6 +107,7 @@ expression: diff.instruction_rows
address: 28,
size: 4,
opcode: 26,
branch_dest: None,
},
),
kind: None,
@@ -113,6 +121,7 @@ expression: diff.instruction_rows
address: 32,
size: 4,
opcode: 20,
branch_dest: None,
},
),
kind: None,
@@ -126,6 +135,7 @@ expression: diff.instruction_rows
address: 36,
size: 4,
opcode: 97,
branch_dest: None,
},
),
kind: None,
@@ -139,6 +149,7 @@ expression: diff.instruction_rows
address: 40,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -152,6 +163,7 @@ expression: diff.instruction_rows
address: 44,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -165,6 +177,7 @@ expression: diff.instruction_rows
address: 48,
size: 4,
opcode: 20,
branch_dest: None,
},
),
kind: None,
@@ -178,6 +191,7 @@ expression: diff.instruction_rows
address: 52,
size: 4,
opcode: 26,
branch_dest: None,
},
),
kind: None,
@@ -191,6 +205,7 @@ expression: diff.instruction_rows
address: 56,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -204,6 +219,7 @@ expression: diff.instruction_rows
address: 60,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -217,6 +233,7 @@ expression: diff.instruction_rows
address: 64,
size: 4,
opcode: 26,
branch_dest: None,
},
),
kind: None,
@@ -230,6 +247,7 @@ expression: diff.instruction_rows
address: 68,
size: 4,
opcode: 97,
branch_dest: None,
},
),
kind: None,
@@ -243,6 +261,7 @@ expression: diff.instruction_rows
address: 72,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -256,6 +275,7 @@ expression: diff.instruction_rows
address: 76,
size: 4,
opcode: 97,
branch_dest: None,
},
),
kind: None,
@@ -269,6 +289,7 @@ expression: diff.instruction_rows
address: 80,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -289,6 +310,7 @@ expression: diff.instruction_rows
address: 84,
size: 4,
opcode: 97,
branch_dest: None,
},
),
kind: None,
@@ -302,6 +324,9 @@ expression: diff.instruction_rows
address: 88,
size: 4,
opcode: 56,
branch_dest: Some(
80,
),
},
),
kind: None,
@@ -320,6 +345,7 @@ expression: diff.instruction_rows
address: 92,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,
@@ -333,6 +359,7 @@ expression: diff.instruction_rows
address: 96,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -346,6 +373,7 @@ expression: diff.instruction_rows
address: 100,
size: 4,
opcode: 20,
branch_dest: None,
},
),
kind: None,
@@ -359,6 +387,7 @@ expression: diff.instruction_rows
address: 104,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -372,6 +401,7 @@ expression: diff.instruction_rows
address: 108,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -385,6 +415,7 @@ expression: diff.instruction_rows
address: 112,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -398,6 +429,7 @@ expression: diff.instruction_rows
address: 116,
size: 4,
opcode: 16,
branch_dest: None,
},
),
kind: None,
@@ -411,6 +443,7 @@ expression: diff.instruction_rows
address: 120,
size: 4,
opcode: 20,
branch_dest: None,
},
),
kind: None,
@@ -424,6 +457,7 @@ expression: diff.instruction_rows
address: 124,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -437,6 +471,7 @@ expression: diff.instruction_rows
address: 128,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -459,6 +494,7 @@ expression: diff.instruction_rows
address: 132,
size: 4,
opcode: 12,
branch_dest: None,
},
),
kind: None,
@@ -472,6 +508,7 @@ expression: diff.instruction_rows
address: 136,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -485,6 +522,7 @@ expression: diff.instruction_rows
address: 140,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,
@@ -498,6 +536,9 @@ expression: diff.instruction_rows
address: 144,
size: 4,
opcode: 55,
branch_dest: Some(
128,
),
},
),
kind: None,
@@ -516,6 +557,7 @@ expression: diff.instruction_rows
address: 148,
size: 4,
opcode: 90,
branch_dest: None,
},
),
kind: None,
@@ -529,6 +571,9 @@ expression: diff.instruction_rows
address: 152,
size: 4,
opcode: 3,
branch_dest: Some(
128,
),
},
),
kind: None,
@@ -547,6 +592,7 @@ expression: diff.instruction_rows
address: 156,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,
@@ -560,6 +606,7 @@ expression: diff.instruction_rows
address: 160,
size: 4,
opcode: 2,
branch_dest: None,
},
),
kind: None,
@@ -573,6 +620,7 @@ expression: diff.instruction_rows
address: 164,
size: 4,
opcode: 60,
branch_dest: None,
},
),
kind: None,
@@ -586,6 +634,7 @@ expression: diff.instruction_rows
address: 168,
size: 4,
opcode: 77,
branch_dest: None,
},
),
kind: None,
@@ -599,6 +648,7 @@ expression: diff.instruction_rows
address: 172,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,
@@ -612,6 +662,9 @@ expression: diff.instruction_rows
address: 176,
size: 4,
opcode: 54,
branch_dest: Some(
128,
),
},
),
kind: None,
@@ -630,6 +683,7 @@ expression: diff.instruction_rows
address: 180,
size: 4,
opcode: 113,
branch_dest: None,
},
),
kind: None,

422
objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap
View File

File diff suppressed because it is too large Load Diff

90
objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 4,
opcode: 60,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 4,
size: 4,
opcode: 38,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,9 @@ expression: diff.instruction_rows
address: 8,
size: 4,
opcode: 43,
branch_dest: Some(
20,
),
},
),
kind: None,
@@ -53,6 +58,7 @@ expression: diff.instruction_rows
address: 12,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -66,6 +72,9 @@ expression: diff.instruction_rows
address: 16,
size: 4,
opcode: 45,
branch_dest: Some(
32,
),
},
),
kind: None,
@@ -84,6 +93,7 @@ expression: diff.instruction_rows
address: 20,
size: 4,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -104,6 +114,7 @@ expression: diff.instruction_rows
address: 24,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -117,6 +128,7 @@ expression: diff.instruction_rows
address: 28,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -130,6 +142,7 @@ expression: diff.instruction_rows
address: 32,
size: 4,
opcode: 60,
branch_dest: None,
},
),
kind: None,
@@ -150,6 +163,7 @@ expression: diff.instruction_rows
address: 36,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -163,6 +177,7 @@ expression: diff.instruction_rows
address: 40,
size: 4,
opcode: 38,
branch_dest: None,
},
),
kind: None,
@@ -176,6 +191,9 @@ expression: diff.instruction_rows
address: 44,
size: 4,
opcode: 43,
branch_dest: Some(
56,
),
},
),
kind: None,
@@ -194,6 +212,7 @@ expression: diff.instruction_rows
address: 48,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -207,6 +226,9 @@ expression: diff.instruction_rows
address: 52,
size: 4,
opcode: 45,
branch_dest: Some(
68,
),
},
),
kind: None,
@@ -225,6 +247,7 @@ expression: diff.instruction_rows
address: 56,
size: 4,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -245,6 +268,7 @@ expression: diff.instruction_rows
address: 60,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -258,6 +282,7 @@ expression: diff.instruction_rows
address: 64,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -271,6 +296,7 @@ expression: diff.instruction_rows
address: 68,
size: 4,
opcode: 60,
branch_dest: None,
},
),
kind: None,
@@ -291,6 +317,7 @@ expression: diff.instruction_rows
address: 72,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -304,6 +331,7 @@ expression: diff.instruction_rows
address: 76,
size: 4,
opcode: 38,
branch_dest: None,
},
),
kind: None,
@@ -317,6 +345,7 @@ expression: diff.instruction_rows
address: 80,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -330,6 +359,9 @@ expression: diff.instruction_rows
address: 84,
size: 4,
opcode: 43,
branch_dest: Some(
96,
),
},
),
kind: None,
@@ -348,6 +380,7 @@ expression: diff.instruction_rows
address: 88,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -361,6 +394,9 @@ expression: diff.instruction_rows
address: 92,
size: 4,
opcode: 45,
branch_dest: Some(
108,
),
},
),
kind: None,
@@ -379,6 +415,7 @@ expression: diff.instruction_rows
address: 96,
size: 4,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -399,6 +436,7 @@ expression: diff.instruction_rows
address: 100,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -412,6 +450,7 @@ expression: diff.instruction_rows
address: 104,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -425,6 +464,7 @@ expression: diff.instruction_rows
address: 108,
size: 4,
opcode: 60,
branch_dest: None,
},
),
kind: None,
@@ -445,6 +485,7 @@ expression: diff.instruction_rows
address: 112,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -458,6 +499,7 @@ expression: diff.instruction_rows
address: 116,
size: 4,
opcode: 38,
branch_dest: None,
},
),
kind: None,
@@ -471,6 +513,7 @@ expression: diff.instruction_rows
address: 120,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -484,6 +527,9 @@ expression: diff.instruction_rows
address: 124,
size: 4,
opcode: 43,
branch_dest: Some(
136,
),
},
),
kind: None,
@@ -502,6 +548,7 @@ expression: diff.instruction_rows
address: 128,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -515,6 +562,9 @@ expression: diff.instruction_rows
address: 132,
size: 4,
opcode: 45,
branch_dest: Some(
148,
),
},
),
kind: None,
@@ -533,6 +583,7 @@ expression: diff.instruction_rows
address: 136,
size: 4,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -553,6 +604,7 @@ expression: diff.instruction_rows
address: 140,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -566,6 +618,7 @@ expression: diff.instruction_rows
address: 144,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -579,6 +632,7 @@ expression: diff.instruction_rows
address: 148,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -599,6 +653,7 @@ expression: diff.instruction_rows
address: 152,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -612,6 +667,7 @@ expression: diff.instruction_rows
address: 156,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -625,6 +681,7 @@ expression: diff.instruction_rows
address: 160,
size: 4,
opcode: 42,
branch_dest: None,
},
),
kind: None,
@@ -638,6 +695,7 @@ expression: diff.instruction_rows
address: 164,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -651,6 +709,7 @@ expression: diff.instruction_rows
address: 168,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -664,6 +723,7 @@ expression: diff.instruction_rows
address: 172,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -677,6 +737,7 @@ expression: diff.instruction_rows
address: 176,
size: 4,
opcode: 162,
branch_dest: None,
},
),
kind: None,
@@ -690,6 +751,7 @@ expression: diff.instruction_rows
address: 180,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -703,6 +765,7 @@ expression: diff.instruction_rows
address: 184,
size: 4,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -716,6 +779,9 @@ expression: diff.instruction_rows
address: 188,
size: 4,
opcode: 43,
branch_dest: Some(
196,
),
},
),
kind: None,
@@ -734,6 +800,7 @@ expression: diff.instruction_rows
address: 192,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -747,6 +814,7 @@ expression: diff.instruction_rows
address: 196,
size: 4,
opcode: 163,
branch_dest: None,
},
),
kind: None,
@@ -767,6 +835,7 @@ expression: diff.instruction_rows
address: 200,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -780,6 +849,7 @@ expression: diff.instruction_rows
address: 204,
size: 4,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -793,6 +863,9 @@ expression: diff.instruction_rows
address: 208,
size: 4,
opcode: 43,
branch_dest: Some(
216,
),
},
),
kind: None,
@@ -811,6 +884,7 @@ expression: diff.instruction_rows
address: 212,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -824,6 +898,7 @@ expression: diff.instruction_rows
address: 216,
size: 4,
opcode: 163,
branch_dest: None,
},
),
kind: None,
@@ -844,6 +919,7 @@ expression: diff.instruction_rows
address: 220,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -857,6 +933,7 @@ expression: diff.instruction_rows
address: 224,
size: 4,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -870,6 +947,9 @@ expression: diff.instruction_rows
address: 228,
size: 4,
opcode: 43,
branch_dest: Some(
236,
),
},
),
kind: None,
@@ -888,6 +968,7 @@ expression: diff.instruction_rows
address: 232,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -901,6 +982,7 @@ expression: diff.instruction_rows
address: 236,
size: 4,
opcode: 163,
branch_dest: None,
},
),
kind: None,
@@ -921,6 +1003,7 @@ expression: diff.instruction_rows
address: 240,
size: 4,
opcode: 94,
branch_dest: None,
},
),
kind: None,
@@ -934,6 +1017,7 @@ expression: diff.instruction_rows
address: 244,
size: 4,
opcode: 66,
branch_dest: None,
},
),
kind: None,
@@ -947,6 +1031,9 @@ expression: diff.instruction_rows
address: 248,
size: 4,
opcode: 43,
branch_dest: Some(
256,
),
},
),
kind: None,
@@ -965,6 +1052,7 @@ expression: diff.instruction_rows
address: 252,
size: 4,
opcode: 166,
branch_dest: None,
},
),
kind: None,
@@ -978,6 +1066,7 @@ expression: diff.instruction_rows
address: 256,
size: 4,
opcode: 41,
branch_dest: None,
},
),
kind: None,
@@ -998,6 +1087,7 @@ expression: diff.instruction_rows
address: 260,
size: 4,
opcode: 47,
branch_dest: None,
},
),
kind: None,

7
objdiff-core/tests/snapshots/arch_x86__read_x86-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 1,
opcode: 640,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 1,
size: 2,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 3,
size: 5,
opcode: 640,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,7 @@ expression: diff.instruction_rows
address: 8,
size: 5,
opcode: 59,
branch_dest: None,
},
),
kind: None,
@@ -61,6 +65,7 @@ expression: diff.instruction_rows
address: 13,
size: 3,
opcode: 7,
branch_dest: None,
},
),
kind: None,
@@ -74,6 +79,7 @@ expression: diff.instruction_rows
address: 16,
size: 1,
opcode: 590,
branch_dest: None,
},
),
kind: None,
@@ -87,6 +93,7 @@ expression: diff.instruction_rows
address: 17,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,

21
objdiff-core/tests/snapshots/arch_x86__read_x86_64-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 5,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 10,
size: 1,
opcode: 640,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,7 @@ expression: diff.instruction_rows
address: 11,
size: 4,
opcode: 740,
branch_dest: None,
},
),
kind: None,
@@ -61,6 +65,7 @@ expression: diff.instruction_rows
address: 15,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -74,6 +79,7 @@ expression: diff.instruction_rows
address: 20,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -87,6 +93,7 @@ expression: diff.instruction_rows
address: 25,
size: 4,
opcode: 448,
branch_dest: None,
},
),
kind: None,
@@ -100,6 +107,7 @@ expression: diff.instruction_rows
address: 29,
size: 4,
opcode: 460,
branch_dest: None,
},
),
kind: None,
@@ -113,6 +121,7 @@ expression: diff.instruction_rows
address: 33,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -126,6 +135,7 @@ expression: diff.instruction_rows
address: 38,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -139,6 +149,7 @@ expression: diff.instruction_rows
address: 43,
size: 5,
opcode: 448,
branch_dest: None,
},
),
kind: None,
@@ -152,6 +163,7 @@ expression: diff.instruction_rows
address: 48,
size: 5,
opcode: 460,
branch_dest: None,
},
),
kind: None,
@@ -165,6 +177,7 @@ expression: diff.instruction_rows
address: 53,
size: 4,
opcode: 11,
branch_dest: None,
},
),
kind: None,
@@ -178,6 +191,7 @@ expression: diff.instruction_rows
address: 57,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -191,6 +205,7 @@ expression: diff.instruction_rows
address: 62,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -204,6 +219,7 @@ expression: diff.instruction_rows
address: 67,
size: 5,
opcode: 448,
branch_dest: None,
},
),
kind: None,
@@ -217,6 +233,7 @@ expression: diff.instruction_rows
address: 72,
size: 5,
opcode: 460,
branch_dest: None,
},
),
kind: None,
@@ -230,6 +247,7 @@ expression: diff.instruction_rows
address: 77,
size: 4,
opcode: 11,
branch_dest: None,
},
),
kind: None,
@@ -243,6 +261,7 @@ expression: diff.instruction_rows
address: 81,
size: 4,
opcode: 7,
branch_dest: None,
},
),
kind: None,
@@ -256,6 +275,7 @@ expression: diff.instruction_rows
address: 85,
size: 1,
opcode: 590,
branch_dest: None,
},
),
kind: None,
@@ -269,6 +289,7 @@ expression: diff.instruction_rows
address: 86,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,

53
objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-2.snap
View File

@@ -9,6 +9,7 @@ expression: diff.instruction_rows
address: 0,
size: 4,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -22,6 +23,7 @@ expression: diff.instruction_rows
address: 4,
size: 1,
opcode: 137,
branch_dest: None,
},
),
kind: None,
@@ -35,6 +37,7 @@ expression: diff.instruction_rows
address: 5,
size: 3,
opcode: 93,
branch_dest: None,
},
),
kind: None,
@@ -48,6 +51,9 @@ expression: diff.instruction_rows
address: 8,
size: 2,
opcode: 297,
branch_dest: Some(
58,
),
},
),
kind: None,
@@ -66,6 +72,9 @@ expression: diff.instruction_rows
address: 10,
size: 7,
opcode: 308,
branch_dest: Some(
60,
),
},
),
kind: None,
@@ -84,6 +93,7 @@ expression: diff.instruction_rows
address: 17,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -104,6 +114,7 @@ expression: diff.instruction_rows
address: 22,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -117,6 +128,7 @@ expression: diff.instruction_rows
address: 23,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -137,6 +149,7 @@ expression: diff.instruction_rows
address: 28,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -150,6 +163,7 @@ expression: diff.instruction_rows
address: 29,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -170,6 +184,7 @@ expression: diff.instruction_rows
address: 34,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -183,6 +198,7 @@ expression: diff.instruction_rows
address: 35,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -203,6 +219,7 @@ expression: diff.instruction_rows
address: 40,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -216,6 +233,7 @@ expression: diff.instruction_rows
address: 41,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -236,6 +254,7 @@ expression: diff.instruction_rows
address: 46,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -249,6 +268,7 @@ expression: diff.instruction_rows
address: 47,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -269,6 +289,7 @@ expression: diff.instruction_rows
address: 52,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -282,6 +303,7 @@ expression: diff.instruction_rows
address: 53,
size: 5,
opcode: 414,
branch_dest: None,
},
),
kind: None,
@@ -302,6 +324,7 @@ expression: diff.instruction_rows
address: 58,
size: 1,
opcode: 662,
branch_dest: None,
},
),
kind: None,
@@ -322,6 +345,7 @@ expression: diff.instruction_rows
address: 59,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -335,6 +359,9 @@ expression: diff.instruction_rows
address: 60,
size: 4,
opcode: 65534,
branch_dest: Some(
17,
),
},
),
kind: None,
@@ -360,6 +387,9 @@ expression: diff.instruction_rows
address: 64,
size: 4,
opcode: 65534,
branch_dest: Some(
23,
),
},
),
kind: None,
@@ -378,6 +408,9 @@ expression: diff.instruction_rows
address: 68,
size: 4,
opcode: 65534,
branch_dest: Some(
29,
),
},
),
kind: None,
@@ -396,6 +429,9 @@ expression: diff.instruction_rows
address: 72,
size: 4,
opcode: 65534,
branch_dest: Some(
35,
),
},
),
kind: None,
@@ -414,6 +450,9 @@ expression: diff.instruction_rows
address: 76,
size: 4,
opcode: 65534,
branch_dest: Some(
41,
),
},
),
kind: None,
@@ -432,6 +471,9 @@ expression: diff.instruction_rows
address: 80,
size: 4,
opcode: 65534,
branch_dest: Some(
47,
),
},
),
kind: None,
@@ -450,6 +492,9 @@ expression: diff.instruction_rows
address: 84,
size: 4,
opcode: 65534,
branch_dest: Some(
53,
),
},
),
kind: None,
@@ -468,6 +513,7 @@ expression: diff.instruction_rows
address: 88,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -481,6 +527,7 @@ expression: diff.instruction_rows
address: 89,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -494,6 +541,7 @@ expression: diff.instruction_rows
address: 90,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -507,6 +555,7 @@ expression: diff.instruction_rows
address: 91,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -520,6 +569,7 @@ expression: diff.instruction_rows
address: 92,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -533,6 +583,7 @@ expression: diff.instruction_rows
address: 93,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -546,6 +597,7 @@ expression: diff.instruction_rows
address: 94,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,
@@ -559,6 +611,7 @@ expression: diff.instruction_rows
address: 95,
size: 1,
opcode: 465,
branch_dest: None,
},
),
kind: None,

16
objdiff-core/tests/snapshots/arch_x86__read_x86_jumptable-3.snap
View File

@@ -6,7 +6,7 @@ expression: output
[(Address(4), Normal, 5), (Spacing(4), Normal, 0), (Opcode("dec", 137), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Eol, Normal, 0)]
[(Address(5), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmp", 93), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(6)), Normal, 0), (Eol, Normal, 0)]
[(Address(8), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ja", 297), Normal, 10), (Argument(Opaque("short")), Normal, 0), (Spacing(1), Normal, 0), (BranchDest(58), Normal, 0), (Basic(" ~>"), Rotating(0), 0), (Eol, Normal, 0)]
[(Address(10), Normal, 5), (Spacing(4), Normal, 0), (Opcode("jmp", 308), Normal, 10), (Argument(Opaque("dword")), Normal, 0), (Spacing(1), Normal, 0), (Argument(Opaque("ptr")), Normal, 0), (Spacing(1), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("eax")), Normal, 0), (Argument(Opaque("*")), Normal, 0), (Argument(Signed(4)), Normal, 0), (Argument(Opaque("+")), Normal, 0), (Symbol(Symbol { name: "$L282", demangled_name: None, address: 60, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic("]"), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)]
[(Address(10), Normal, 5), (Spacing(4), Normal, 0), (Opcode("jmp", 308), Normal, 10), (Argument(Opaque("dword")), Normal, 0), (Spacing(1), Normal, 0), (Argument(Opaque("ptr")), Normal, 0), (Spacing(1), Normal, 0), (Basic("["), Normal, 0), (Argument(Opaque("eax")), Normal, 0), (Argument(Opaque("*")), Normal, 0), (Argument(Signed(4)), Normal, 0), (Argument(Opaque("+")), Normal, 0), (BranchDest(60), Normal, 0), (Basic("]"), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)]
[(Address(17), Normal, 5), (Basic(" ~> "), Rotating(2), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(8)), Normal, 0), (Eol, Normal, 0)]
[(Address(22), Normal, 5), (Spacing(4), Normal, 0), (Opcode("ret", 662), Normal, 10), (Eol, Normal, 0)]
[(Address(23), Normal, 5), (Basic(" ~> "), Rotating(3), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(7)), Normal, 0), (Eol, Normal, 0)]
@@ -22,13 +22,13 @@ expression: output
[(Address(53), Normal, 5), (Basic(" ~> "), Rotating(8), 0), (Opcode("mov", 414), Normal, 10), (Argument(Opaque("eax")), Normal, 0), (Basic(","), Normal, 0), (Spacing(1), Normal, 0), (Argument(Unsigned(2)), Normal, 0), (Eol, Normal, 0)]
[(Address(58), Normal, 5), (Basic(" ~> "), Rotating(0), 0), (Opcode("ret", 662), Normal, 10), (Eol, Normal, 0)]
[(Address(59), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)]
[(Address(60), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L272", demangled_name: None, address: 17, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)]
[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L273", demangled_name: None, address: 23, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)]
[(Address(68), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L274", demangled_name: None, address: 29, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)]
[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L275", demangled_name: None, address: 35, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)]
[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L276", demangled_name: None, address: 41, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)]
[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L277", demangled_name: None, address: 47, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)]
[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (Symbol(Symbol { name: "$L278", demangled_name: None, address: 53, size: 0, kind: Unknown, section: Some(1), flags: FlagSet(Local), align: None, virtual_address: None }), Bright, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)]
[(Address(60), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(17), Normal, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)]
[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(23), Normal, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)]
[(Address(68), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(29), Normal, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)]
[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(35), Normal, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)]
[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(41), Normal, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)]
[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(47), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)]
[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode(".dword", 65534), Normal, 10), (BranchDest(53), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)]
[(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)]
[(Address(89), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)]
[(Address(90), Normal, 5), (Spacing(4), Normal, 0), (Opcode("nop", 465), Normal, 10), (Eol, Normal, 0)]