From 60b227f45e7623e5fb645f5cd3ef456c1f04c71d Mon Sep 17 00:00:00 2001 From: Luke Street Date: Thu, 17 Jul 2025 13:32:50 -0600 Subject: [PATCH] Support PowerPC COFF (Xenon, Xbox 360) ppc750cl is superseded by the powerpc crate, which supports PPC64, AltiVec and VMX128 extensions. --- Cargo.lock | 16 +- README.md | 2 +- objdiff-core/Cargo.toml | 6 +- objdiff-core/README.md | 2 +- objdiff-core/src/arch/mod.rs | 20 +- objdiff-core/src/arch/ppc/flow_analysis.rs | 87 +-- objdiff-core/src/arch/ppc/mod.rs | 211 ++++--- objdiff-core/src/obj/mod.rs | 12 +- .../tests/snapshots/arch_ppc__diff_ppc-2.snap | 556 +++++++++--------- .../tests/snapshots/arch_ppc__read_extab.snap | 3 + .../tests/snapshots/arch_ppc__read_ppc-2.snap | 132 ++--- .../tests/snapshots/arch_ppc__read_ppc-3.snap | 133 +++-- .../tests/snapshots/arch_ppc__read_ppc.snap | 3 + 13 files changed, 636 insertions(+), 547 deletions(-) diff --git a/Cargo.lock b/Cargo.lock index 381bc60..19d8fb1 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -466,7 +466,7 @@ dependencies = [ "cfg-if", "libc", "miniz_oxide", - "object 0.36.7 (registry+https://github.com/rust-lang/crates.io-index)", + "object 0.36.7", "rustc-demangle", "windows-targets 0.52.6", ] @@ -3419,10 +3419,10 @@ dependencies = [ "notify-debouncer-full", "num-traits", "objdiff-core", - "object 0.36.7 (git+https://github.com/gimli-rs/object?rev=a74579249e21ab8fcd3a86be588de336f18297cb)", + "object 0.37.1", "pbjson", "pbjson-build", - "ppc750cl", + "powerpc", "prettyplease", "proc-macro2", "prost", @@ -3508,8 +3508,8 @@ dependencies = [ [[package]] name = "object" -version = "0.36.7" -source = "git+https://github.com/gimli-rs/object?rev=a74579249e21ab8fcd3a86be588de336f18297cb#a74579249e21ab8fcd3a86be588de336f18297cb" +version = "0.37.1" +source = "git+https://github.com/gimli-rs/object?rev=16ff70aa6fbd97d6bb7b92375929f4d72414c32b#16ff70aa6fbd97d6bb7b92375929f4d72414c32b" dependencies = [ "memchr", ] @@ -3862,10 +3862,10 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391" [[package]] -name = "ppc750cl" -version = "0.3.2" +name = "powerpc" +version = "0.4.1" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "be8e5b9d48ab30323e8ece6d655d20fc16a570e4f1af0de6890d3e9ebd284ba0" +checksum = "f9cac36a8d92f3c9d38ebfa606e3bbbbec229a8d757f03de0999898522856e33" [[package]] name = "ppv-lite86" diff --git a/README.md b/README.md index c846552..3cee7ed 100644 --- a/README.md +++ b/README.md @@ -19,7 +19,7 @@ Supports: - ARM (GBA, DS, 3DS) - ARM64 (Switch) - MIPS (N64, PS1, PS2, PSP) -- PowerPC (GameCube, Wii) +- PowerPC (GameCube, Wii, Xbox 360) - SuperH (Saturn, Dreamcast) - x86, x86_64 (PC) diff --git a/objdiff-core/Cargo.toml b/objdiff-core/Cargo.toml index 6a12d5d..2aa62ce 100644 --- a/objdiff-core/Cargo.toml +++ b/objdiff-core/Cargo.toml @@ -92,7 +92,7 @@ ppc = [ "any-arch", "dep:cwdemangle", "dep:cwextab", - "dep:ppc750cl", + "dep:powerpc", "dep:rlwinmdec", ] x86 = [ @@ -128,7 +128,7 @@ itertools = { version = "0.14", default-features = false, features = ["use_alloc log = { version = "0.4", default-features = false, optional = true } memmap2 = { version = "0.9", optional = true } num-traits = { version = "0.2", default-features = false, optional = true } -object = { git = "https://github.com/gimli-rs/object", rev = "a74579249e21ab8fcd3a86be588de336f18297cb", default-features = false, features = ["read_core", "elf", "pe"] } +object = { git = "https://github.com/gimli-rs/object", rev = "16ff70aa6fbd97d6bb7b92375929f4d72414c32b", default-features = false, features = ["read_core", "elf", "pe"] } pbjson = { version = "0.7", default-features = false, optional = true } prost = { version = "0.13", default-features = false, features = ["prost-derive"], optional = true } regex = { version = "1.11", default-features = false, features = [], optional = true } @@ -147,7 +147,7 @@ gimli = { version = "0.31", default-features = false, features = ["read"], optio # ppc cwdemangle = { version = "1.0", optional = true } cwextab = { version = "1.0", optional = true } -ppc750cl = { version = "0.3", optional = true } +powerpc = { version = "0.4", optional = true } rlwinmdec = { version = "1.1", optional = true } # mips diff --git a/objdiff-core/README.md b/objdiff-core/README.md index ddd6bd1..618759a 100644 --- a/objdiff-core/README.md +++ b/objdiff-core/README.md @@ -11,6 +11,6 @@ objdiff-core contains the core functionality of [objdiff](https://github.com/enc - **`arm64`**: Enables the ARM64 backend powered by [yaxpeax-arm](https://github.com/iximeow/yaxpeax-arm). - **`arm`**: Enables the ARM backend powered by [unarm](https://github.com/AetiasHax/unarm). - **`mips`**: Enables the MIPS backend powered by [rabbitizer](https://github.com/Decompollaborate/rabbitizer). -- **`ppc`**: Enables the PowerPC backend powered by [ppc750cl](https://github.com/encounter/ppc750cl). +- **`ppc`**: Enables the PowerPC backend powered by [powerpc](https://github.com/encounter/powerpc-rs). - **`superh`**: Enables the SuperH backend powered by an included disassembler. - **`x86`**: Enables the x86 backend powered by [iced-x86](https://crates.io/crates/iced-x86). diff --git a/objdiff-core/src/arch/mod.rs b/objdiff-core/src/arch/mod.rs index 413a4da..6b5408a 100644 --- a/objdiff-core/src/arch/mod.rs +++ b/objdiff-core/src/arch/mod.rs @@ -55,16 +55,16 @@ pub enum DataType { impl fmt::Display for DataType { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { - match self { - DataType::Int8 => f.write_str("Int8"), - DataType::Int16 => f.write_str("Int16"), - DataType::Int32 => f.write_str("Int32"), - DataType::Int64 => f.write_str("Int64"), - DataType::Float => f.write_str("Float"), - DataType::Double => f.write_str("Double"), - DataType::Bytes => f.write_str("Bytes"), - DataType::String => f.write_str("String"), - } + f.write_str(match self { + DataType::Int8 => "Int8", + DataType::Int16 => "Int16", + DataType::Int32 => "Int32", + DataType::Int64 => "Int64", + DataType::Float => "Float", + DataType::Double => "Double", + DataType::Bytes => "Bytes", + DataType::String => "String", + }) } } diff --git a/objdiff-core/src/arch/ppc/flow_analysis.rs b/objdiff-core/src/arch/ppc/flow_analysis.rs index dd84f74..a66de01 100644 --- a/objdiff-core/src/arch/ppc/flow_analysis.rs +++ b/objdiff-core/src/arch/ppc/flow_analysis.rs @@ -11,7 +11,7 @@ use core::{ }; use itertools::Itertools; -use ppc750cl::Simm; +use powerpc::{Extensions, Simm}; use crate::{ arch::DataType, @@ -19,8 +19,8 @@ use crate::{ util::{RawDouble, RawFloat}, }; -fn is_store_instruction(op: ppc750cl::Opcode) -> bool { - use ppc750cl::Opcode; +fn is_store_instruction(op: powerpc::Opcode) -> bool { + use powerpc::Opcode; matches!( op, Opcode::Stbux @@ -52,8 +52,8 @@ fn is_store_instruction(op: ppc750cl::Opcode) -> bool { ) } -pub fn guess_data_type_from_load_store_inst_op(inst_op: ppc750cl::Opcode) -> Option { - use ppc750cl::Opcode; +pub fn guess_data_type_from_load_store_inst_op(inst_op: powerpc::Opcode) -> Option { + use powerpc::Opcode; match inst_op { Opcode::Lbz | Opcode::Lbzu | Opcode::Lbzux | Opcode::Lbzx => Some(DataType::Int8), Opcode::Lhz | Opcode::Lhzu | Opcode::Lhzux | Opcode::Lhzx => Some(DataType::Int16), @@ -118,12 +118,12 @@ impl RegisterState { // During a function call, these registers must be assumed trashed. fn clear_volatile(&mut self) { - self[ppc750cl::GPR(0)] = RegisterContent::Unknown; + self[powerpc::GPR(0)] = RegisterContent::Unknown; for i in 0..=13 { - self[ppc750cl::GPR(i)] = RegisterContent::Unknown; + self[powerpc::GPR(i)] = RegisterContent::Unknown; } for i in 0..=13 { - self[ppc750cl::FPR(i)] = RegisterContent::Unknown; + self[powerpc::FPR(i)] = RegisterContent::Unknown; } } @@ -132,10 +132,10 @@ impl RegisterState { // they get overwritten with another value before getting read. fn set_potential_inputs(&mut self) { for g_reg in 3..=13 { - self[ppc750cl::GPR(g_reg)] = RegisterContent::InputRegister(g_reg); + self[powerpc::GPR(g_reg)] = RegisterContent::InputRegister(g_reg); } for f_reg in 1..=13 { - self[ppc750cl::FPR(f_reg)] = RegisterContent::InputRegister(f_reg); + self[powerpc::FPR(f_reg)] = RegisterContent::InputRegister(f_reg); } } @@ -172,34 +172,34 @@ impl RegisterState { } } -impl Index for RegisterState { +impl Index for RegisterState { type Output = RegisterContent; - fn index(&self, gpr: ppc750cl::GPR) -> &Self::Output { &self.gpr[gpr.0 as usize] } + fn index(&self, gpr: powerpc::GPR) -> &Self::Output { &self.gpr[gpr.0 as usize] } } -impl IndexMut for RegisterState { - fn index_mut(&mut self, gpr: ppc750cl::GPR) -> &mut Self::Output { +impl IndexMut for RegisterState { + fn index_mut(&mut self, gpr: powerpc::GPR) -> &mut Self::Output { &mut self.gpr[gpr.0 as usize] } } -impl Index for RegisterState { +impl Index for RegisterState { type Output = RegisterContent; - fn index(&self, fpr: ppc750cl::FPR) -> &Self::Output { &self.fpr[fpr.0 as usize] } + fn index(&self, fpr: powerpc::FPR) -> &Self::Output { &self.fpr[fpr.0 as usize] } } -impl IndexMut for RegisterState { - fn index_mut(&mut self, fpr: ppc750cl::FPR) -> &mut Self::Output { +impl IndexMut for RegisterState { + fn index_mut(&mut self, fpr: powerpc::FPR) -> &mut Self::Output { &mut self.fpr[fpr.0 as usize] } } fn execute_instruction( registers: &mut RegisterState, - op: &ppc750cl::Opcode, - args: &ppc750cl::Arguments, + op: &powerpc::Opcode, + args: &powerpc::Arguments, ) { - use ppc750cl::{Argument, GPR, Opcode}; + use powerpc::{Argument, GPR, Opcode}; match (op, args[0], args[1], args[2]) { (Opcode::Or, Argument::GPR(a), Argument::GPR(b), Argument::GPR(c)) => { // Move is implemented as or with self for ints @@ -270,11 +270,11 @@ fn execute_instruction( } } -fn get_branch_offset(args: &ppc750cl::Arguments) -> i32 { +fn get_branch_offset(args: &powerpc::Arguments) -> i32 { for arg in args.iter() { match arg { - ppc750cl::Argument::BranchDest(dest) => return dest.0 / 4, - ppc750cl::Argument::None => break, + powerpc::Argument::BranchDest(dest) => return dest.0 / 4, + powerpc::Argument::None => break, _ => {} } } @@ -316,7 +316,7 @@ fn clamp_text_length(s: String, max: usize) -> String { fn get_register_content_from_reloc( reloc: &Relocation, obj: &Object, - op: ppc750cl::Opcode, + op: powerpc::Opcode, ) -> RegisterContent { if let Some(bytes) = obj.symbol_data(reloc.target_symbol) { match guess_data_type_from_load_store_inst_op(op) { @@ -354,18 +354,18 @@ fn fill_registers_from_relocation( reloc: &Relocation, current_state: &mut RegisterState, obj: &Object, - op: ppc750cl::Opcode, - args: &ppc750cl::Arguments, + op: powerpc::Opcode, + args: &powerpc::Arguments, ) { // Only update the register state for loads. We may store to a reloc // address but that doesn't update register contents. if !is_store_instruction(op) { match (op, args[0]) { // Everything else is a load of some sort - (_, ppc750cl::Argument::GPR(gpr)) => { + (_, powerpc::Argument::GPR(gpr)) => { current_state[gpr] = get_register_content_from_reloc(reloc, obj, op); } - (_, ppc750cl::Argument::FPR(fpr)) => { + (_, powerpc::Argument::FPR(fpr)) => { current_state[fpr] = get_register_content_from_reloc(reloc, obj, op); } _ => {} @@ -384,11 +384,12 @@ pub fn ppc_data_flow_analysis( func_symbol: &Symbol, code: &[u8], relocations: &[Relocation], + extensions: Extensions, ) -> Box { use alloc::collections::VecDeque; - use ppc750cl::InsIter; - let instructions = InsIter::new(code, func_symbol.address as u32) + use powerpc::InsIter; + let instructions = InsIter::new(code, func_symbol.address as u32, extensions) .map(|(_addr, ins)| (ins.op, ins.basic().args)) .collect_vec(); @@ -449,7 +450,7 @@ pub fn ppc_data_flow_analysis( // Only take a given (address, register state) combination once. If // the known register state is different we have to take the branch // again to stabilize the known values for backwards branches. - if op == &ppc750cl::Opcode::Bc { + if op == &powerpc::Opcode::Bc { let branch_state = (index, current_state.clone()); if !taken_branches.contains(&branch_state) { let offset = get_branch_offset(args); @@ -468,7 +469,7 @@ pub fn ppc_data_flow_analysis( } // Update index - if op == &ppc750cl::Opcode::B { + if op == &powerpc::Opcode::B { // Unconditional branch let offset = get_branch_offset(args); if offset > 0 { @@ -502,7 +503,14 @@ pub fn ppc_data_flow_analysis( } // Store the relevant data flow values for simplified instructions - generate_flow_analysis_result(obj, func_address, code, register_state_at, relocations) + generate_flow_analysis_result( + obj, + func_address, + code, + register_state_at, + relocations, + extensions, + ) } fn get_string_data(obj: &Object, symbol_index: usize, offset: Simm) -> Option<&str> { @@ -530,14 +538,15 @@ fn generate_flow_analysis_result( code: &[u8], register_state_at: Vec, relocations: &[Relocation], + extensions: Extensions, ) -> Box { - use ppc750cl::{Argument, InsIter}; + use powerpc::{Argument, InsIter}; let mut analysis_result = PPCFlowAnalysisResult::new(); let default_register_state = RegisterState::new(); - for (addr, ins) in InsIter::new(code, 0) { + for (addr, ins) in InsIter::new(code, 0, extensions) { let ins_address = base_address + (addr as u64); let index = addr / 4; - let ppc750cl::ParsedIns { mnemonic: _, args } = ins.simplified(); + let powerpc::ParsedIns { mnemonic: _, args } = ins.simplified(); // If we're already showing relocations on a line don't also show data flow let reloc = relocations.iter().find(|r| (r.address & !3) == ins_address); @@ -546,7 +555,7 @@ fn generate_flow_analysis_result( // they are being loaded. // We need to do this before we break out on showing relocations in the // subsequent if statement. - if let (ppc750cl::Opcode::Lfs | ppc750cl::Opcode::Lfd, Some(reloc)) = (ins.op, reloc) { + if let (powerpc::Opcode::Lfs | powerpc::Opcode::Lfd, Some(reloc)) = (ins.op, reloc) { let content = get_register_content_from_reloc(reloc, obj, ins.op); if matches!( content, @@ -566,7 +575,7 @@ fn generate_flow_analysis_result( // Special case to show string constants on the line where they are // being indexed to. This will typically be "addi t, stringbase, offset" let registers = register_state_at.get(index as usize).unwrap_or(&default_register_state); - if let (ppc750cl::Opcode::Addi, Argument::GPR(rel), Argument::Simm(offset)) = + if let (powerpc::Opcode::Addi, Argument::GPR(rel), Argument::Simm(offset)) = (ins.op, args[1], args[2]) { if let RegisterContent::Symbol(sym_index) = registers[rel] { diff --git a/objdiff-core/src/arch/ppc/mod.rs b/objdiff-core/src/arch/ppc/mod.rs index a472b08..48a71e7 100644 --- a/objdiff-core/src/arch/ppc/mod.rs +++ b/objdiff-core/src/arch/ppc/mod.rs @@ -9,7 +9,7 @@ use alloc::{ use anyhow::{Result, bail, ensure}; use cwextab::{ExceptionTableData, decode_extab}; use flagset::Flags; -use object::{Object as _, ObjectSection as _, ObjectSymbol as _, elf}; +use object::{Endian as _, Object as _, ObjectSection as _, ObjectSymbol as _, elf, pe}; use crate::{ arch::{Arch, DataType}, @@ -27,58 +27,79 @@ use crate::{ mod flow_analysis; // Relative relocation, can be Simm, Offset or BranchDest -fn is_relative_arg(arg: &ppc750cl::Argument) -> bool { +fn is_relative_arg(arg: &powerpc::Argument) -> bool { matches!( arg, - ppc750cl::Argument::Simm(_) - | ppc750cl::Argument::Offset(_) - | ppc750cl::Argument::BranchDest(_) + powerpc::Argument::Simm(_) + | powerpc::Argument::Offset(_) + | powerpc::Argument::BranchDest(_) ) } // Relative or absolute relocation, can be Uimm, Simm or Offset -fn is_rel_abs_arg(arg: &ppc750cl::Argument) -> bool { +fn is_rel_abs_arg(arg: &powerpc::Argument) -> bool { matches!( arg, - ppc750cl::Argument::Uimm(_) | ppc750cl::Argument::Simm(_) | ppc750cl::Argument::Offset(_) + powerpc::Argument::Uimm(_) | powerpc::Argument::Simm(_) | powerpc::Argument::Offset(_) ) } -fn is_offset_arg(arg: &ppc750cl::Argument) -> bool { matches!(arg, ppc750cl::Argument::Offset(_)) } +fn is_offset_arg(arg: &powerpc::Argument) -> bool { matches!(arg, powerpc::Argument::Offset(_)) } #[derive(Debug)] pub struct ArchPpc { + pub extensions: powerpc::Extensions, /// Exception info pub extab: Option>, } impl ArchPpc { pub fn new(file: &object::File) -> Result { - Ok(Self { extab: decode_exception_info(file)? }) + let extensions = match file.flags() { + object::FileFlags::Coff { .. } => powerpc::Extensions::xenon(), + object::FileFlags::Elf { e_flags, .. } + if (e_flags & elf::EF_PPC_EMB) == elf::EF_PPC_EMB => + { + powerpc::Extensions::gekko_broadway() + } + _ => { + if file.is_64() { + powerpc::Extension::Ppc64 | powerpc::Extension::AltiVec + } else { + powerpc::Extension::AltiVec.into() + } + } + }; + let extab = decode_exception_info(file)?; + Ok(Self { extensions, extab }) } - fn parse_ins_ref(&self, resolved: ResolvedInstructionRef) -> Result { + fn parse_ins_ref(&self, resolved: ResolvedInstructionRef) -> Result { let mut code = u32::from_be_bytes(resolved.code.try_into()?); if let Some(reloc) = resolved.relocation { code = zero_reloc(code, reloc.relocation); } - let op = ppc750cl::Opcode::from(resolved.ins_ref.opcode as u8); - Ok(ppc750cl::Ins { code, op }) + let op = powerpc::Opcode::from(resolved.ins_ref.opcode); + Ok(powerpc::Ins { code, op }) } fn find_reloc_arg( &self, - ins: &ppc750cl::ParsedIns, + ins: &powerpc::ParsedIns, resolved: Option, ) -> Option { match resolved?.relocation.flags { RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => Some(1), - RelocationFlags::Elf(elf::R_PPC_REL24 | elf::R_PPC_REL14) => { + RelocationFlags::Elf(elf::R_PPC_REL24 | elf::R_PPC_REL14) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24 | pe::IMAGE_REL_PPC_REL14) => { ins.args.iter().rposition(is_relative_arg) } RelocationFlags::Elf( elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO, - ) => ins.args.iter().rposition(is_rel_abs_arg), + ) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI | pe::IMAGE_REL_PPC_REFLO) => { + ins.args.iter().rposition(is_rel_abs_arg) + } _ => None, } } @@ -96,11 +117,11 @@ impl Arch for ArchPpc { ensure!(code.len() & 3 == 0, "Code length must be a multiple of 4"); let ins_count = code.len() / 4; let mut insts = Vec::::with_capacity(ins_count); - for (cur_addr, ins) in ppc750cl::InsIter::new(code, address as u32) { + for (cur_addr, ins) in powerpc::InsIter::new(code, address as u32, self.extensions) { insts.push(InstructionRef { address: cur_addr as u64, size: 4, - opcode: u8::from(ins.op) as u16, + opcode: u16::from(ins.op), branch_dest: ins.branch_dest(cur_addr).map(u64::from), }); } @@ -131,16 +152,16 @@ impl Arch for ArchPpc { // For @sda21, we can omit the register argument if matches!(reloc.relocation.flags, RelocationFlags::Elf(elf::R_PPC_EMB_SDA21)) // Sanity check: the next argument should be r0 - && matches!(ins.args.get(idx + 1), Some(ppc750cl::Argument::GPR(ppc750cl::GPR(0)))) + && matches!(ins.args.get(idx + 1), Some(powerpc::Argument::GPR(powerpc::GPR(0)))) { break; } } else { match arg { - ppc750cl::Argument::Simm(simm) => cb(InstructionPart::signed(simm.0)), - ppc750cl::Argument::Uimm(uimm) => cb(InstructionPart::unsigned(uimm.0)), - ppc750cl::Argument::Offset(offset) => cb(InstructionPart::signed(offset.0)), - ppc750cl::Argument::BranchDest(dest) => cb(InstructionPart::branch_dest( + powerpc::Argument::Simm(simm) => cb(InstructionPart::signed(simm.0)), + powerpc::Argument::Uimm(uimm) => cb(InstructionPart::unsigned(uimm.0)), + powerpc::Argument::Offset(offset) => cb(InstructionPart::signed(offset.0)), + powerpc::Argument::BranchDest(dest) => cb(InstructionPart::branch_dest( (resolved.ins_ref.address as u32).wrapping_add_signed(dest.0), )), _ => cb(InstructionPart::opaque(arg.to_string())), @@ -168,7 +189,13 @@ impl Arch for ArchPpc { relocations: &[Relocation], symbols: &[Symbol], ) -> Vec { - generate_fake_pool_relocations_for_function(address, code, relocations, symbols) + generate_fake_pool_relocations_for_function( + address, + code, + relocations, + symbols, + self.extensions, + ) } fn data_flow_analysis( @@ -178,22 +205,48 @@ impl Arch for ArchPpc { code: &[u8], relocations: &[Relocation], ) -> Option> { - Some(flow_analysis::ppc_data_flow_analysis(obj, symbol, code, relocations)) + Some(flow_analysis::ppc_data_flow_analysis(obj, symbol, code, relocations, self.extensions)) } fn implcit_addend( &self, - _file: &object::File<'_>, - _section: &object::Section, + file: &object::File<'_>, + section: &object::Section, address: u64, _relocation: &object::Relocation, flags: RelocationFlags, ) -> Result { - bail!("Unsupported PPC implicit relocation {:#x}:{:?}", address, flags) + let section_data = section.data()?; + let address = address as usize; + let data = section_data + .get(address..address + 4) + .ok_or_else(|| anyhow::anyhow!("Invalid address {address} for section data"))? + .try_into()?; + let code = file.endianness().read_u32_bytes(data); + Ok(match flags { + RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFLO) => (code & 0xffff) as i16 as i32, + RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24) => { + // let addend = (((code & 0x3fffffc) << 6) as i32) >> 6; + // println!("PPC_REL24 addend: {data:?} => {addend}"); + // addend + 0 + } + RelocationFlags::Coff(pe::IMAGE_REL_PPC_ADDR32) => code as i32, + RelocationFlags::Coff(pe::IMAGE_REL_PPC_PAIR) => 0, + flags => bail!("Unsupported PPC implicit relocation {flags:?}"), + } as i64) } fn demangle(&self, name: &str) -> Option { - cwdemangle::demangle(name, &cwdemangle::DemangleOptions::default()) + if name.starts_with('?') { + msvc_demangler::demangle(name, msvc_demangler::DemangleFlags::llvm()).ok() + } else { + cpp_demangle::Symbol::new(name) + .ok() + .and_then(|s| s.demangle(&cpp_demangle::DemangleOptions::default()).ok()) + .or_else(|| cwdemangle::demangle(name, &cwdemangle::DemangleOptions::default())) + } } fn reloc_name(&self, flags: RelocationFlags) -> Option<&'static str> { @@ -238,7 +291,7 @@ impl Arch for ArchPpc { // Pooled string. return Some(DataType::String); } - let opcode = ppc750cl::Opcode::from(resolved.ins_ref.opcode as u8); + let opcode = powerpc::Opcode::from(resolved.ins_ref.opcode); if let Some(ty) = flow_analysis::guess_data_type_from_load_store_inst_op(opcode) { // Numeric type. return Some(ty); @@ -336,11 +389,18 @@ impl ArchPpc { fn zero_reloc(code: u32, reloc: &Relocation) -> u32 { match reloc.flags { RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => code & !0x1FFFFF, - RelocationFlags::Elf(elf::R_PPC_REL24) => code & !0x3FFFFFC, - RelocationFlags::Elf(elf::R_PPC_REL14) => code & !0xFFFC, + RelocationFlags::Elf(elf::R_PPC_REL24) | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24) => { + code & !0x3FFFFFC + } + RelocationFlags::Elf(elf::R_PPC_REL14) | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL14) => { + code & !0xFFFC + } RelocationFlags::Elf( elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO, - ) => code & !0xFFFF, + ) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI | pe::IMAGE_REL_PPC_REFLO) => { + code & !0xFFFF + } _ => code, } } @@ -350,34 +410,38 @@ fn display_reloc( cb: &mut dyn FnMut(InstructionPart) -> Result<()>, ) -> Result<()> { match resolved.relocation.flags { - RelocationFlags::Elf(r_type) => match r_type { - elf::R_PPC_ADDR16_LO => { - cb(InstructionPart::reloc())?; - cb(InstructionPart::basic("@l"))?; - } - elf::R_PPC_ADDR16_HI => { - cb(InstructionPart::reloc())?; - cb(InstructionPart::basic("@h"))?; - } - elf::R_PPC_ADDR16_HA => { - cb(InstructionPart::reloc())?; - cb(InstructionPart::basic("@ha"))?; - } - elf::R_PPC_EMB_SDA21 => { - cb(InstructionPart::reloc())?; - cb(InstructionPart::basic("@sda21"))?; - } - elf::R_PPC_ADDR32 | elf::R_PPC_UADDR32 | elf::R_PPC_REL24 | elf::R_PPC_REL14 => { - cb(InstructionPart::reloc())?; - } - elf::R_PPC_NONE => { - // Fake pool relocation. - cb(InstructionPart::basic("<"))?; - cb(InstructionPart::reloc())?; - cb(InstructionPart::basic(">"))?; - } - _ => cb(InstructionPart::reloc())?, - }, + RelocationFlags::Elf(elf::R_PPC_ADDR16_LO) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFLO) => { + cb(InstructionPart::reloc())?; + cb(InstructionPart::basic("@l"))?; + } + RelocationFlags::Elf(elf::R_PPC_ADDR16_HI) + | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI) => { + cb(InstructionPart::reloc())?; + cb(InstructionPart::basic("@h"))?; + } + RelocationFlags::Elf(elf::R_PPC_ADDR16_HA) => { + cb(InstructionPart::reloc())?; + cb(InstructionPart::basic("@ha"))?; + } + RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => { + cb(InstructionPart::reloc())?; + cb(InstructionPart::basic("@sda21"))?; + } + RelocationFlags::Elf( + elf::R_PPC_ADDR32 | elf::R_PPC_UADDR32 | elf::R_PPC_REL24 | elf::R_PPC_REL14, + ) + | RelocationFlags::Coff( + pe::IMAGE_REL_PPC_ADDR32 | pe::IMAGE_REL_PPC_REL24 | pe::IMAGE_REL_PPC_REL14, + ) => { + cb(InstructionPart::reloc())?; + } + RelocationFlags::Elf(elf::R_PPC_NONE) => { + // Fake pool relocation. + cb(InstructionPart::basic("<"))?; + cb(InstructionPart::reloc())?; + cb(InstructionPart::basic(">"))?; + } _ => cb(InstructionPart::reloc())?, }; Ok(()) @@ -515,19 +579,19 @@ fn make_symbol_ref(symbol: &object::Symbol) -> Result { #[derive(Debug)] struct PoolReference { - addr_src_gpr: ppc750cl::GPR, + addr_src_gpr: powerpc::GPR, addr_offset: i16, - addr_dst_gpr: Option, + addr_dst_gpr: Option, } // Given an instruction, check if it could be accessing pooled data at the address in a register. // If so, return information pertaining to where the instruction is getting that address from and // what it's doing with the address (e.g. copying it into another register, adding an offset, etc). fn get_pool_reference_for_inst( - opcode: ppc750cl::Opcode, - simplified: &ppc750cl::ParsedIns, + opcode: powerpc::Opcode, + simplified: &powerpc::ParsedIns, ) -> Option { - use ppc750cl::{Argument, Opcode}; + use powerpc::{Argument, Opcode}; let args = &simplified.args; if flow_analysis::guess_data_type_from_load_store_inst_op(opcode).is_some() { match (args[1], args[2]) { @@ -592,15 +656,15 @@ fn get_pool_reference_for_inst( // Remove the relocation we're keeping track of in a particular register when an instruction reuses // that register to hold some other value, unrelated to pool relocation addresses. -fn clear_overwritten_gprs(ins: ppc750cl::Ins, gpr_pool_relocs: &mut BTreeMap) { - use ppc750cl::{Argument, Arguments, Opcode}; +fn clear_overwritten_gprs(ins: powerpc::Ins, gpr_pool_relocs: &mut BTreeMap) { + use powerpc::{Argument, Arguments, Opcode}; let mut def_args = Arguments::default(); ins.parse_defs(&mut def_args); for arg in def_args { if let Argument::GPR(gpr) = arg { if ins.op == Opcode::Lmw { // `lmw` overwrites all registers from rd to r31. - // ppc750cl only returns rd itself, so we manually clear the rest of them. + // powerpc only returns rd itself, so we manually clear the rest of them. for reg in gpr.0..31 { gpr_pool_relocs.remove(®); } @@ -682,12 +746,13 @@ fn generate_fake_pool_relocations_for_function( code: &[u8], relocations: &[Relocation], symbols: &[Symbol], + extensions: powerpc::Extensions, ) -> Vec { - use ppc750cl::{Argument, InsIter, Opcode}; + use powerpc::{Argument, InsIter, Opcode}; let mut visited_ins_addrs = BTreeSet::new(); let mut pool_reloc_for_addr = BTreeMap::new(); let mut ins_iters_with_gpr_state = - vec![(InsIter::new(code, func_address as u32), BTreeMap::new())]; + vec![(InsIter::new(code, func_address as u32, extensions), BTreeMap::new())]; let mut gpr_state_at_bctr = BTreeMap::new(); while let Some((ins_iter, mut gpr_pool_relocs)) = ins_iters_with_gpr_state.pop() { for (cur_addr, ins) in ins_iter { @@ -719,7 +784,7 @@ fn generate_fake_pool_relocations_for_function( // Conditional branch. // Add the branch destination to the queue to do later. ins_iters_with_gpr_state.push(( - InsIter::new(dest_code_slice, branch_dest), + InsIter::new(dest_code_slice, branch_dest, extensions), gpr_pool_relocs.clone(), )); // Then continue on with the current iterator. @@ -729,7 +794,7 @@ fn generate_fake_pool_relocations_for_function( // Unconditional branch. // Add the branch destination to the queue. ins_iters_with_gpr_state.push(( - InsIter::new(dest_code_slice, branch_dest), + InsIter::new(dest_code_slice, branch_dest, extensions), gpr_pool_relocs.clone(), )); // Break out of the current iterator so we can do the newly added one. @@ -837,7 +902,7 @@ fn generate_fake_pool_relocations_for_function( let dest_offset_into_func = unseen_addr - func_address as u32; let dest_code_slice = &code[dest_offset_into_func as usize..]; ins_iters_with_gpr_state.push(( - InsIter::new(dest_code_slice, unseen_addr), + InsIter::new(dest_code_slice, unseen_addr, extensions), gpr_pool_relocs.clone(), )); break; diff --git a/objdiff-core/src/obj/mod.rs b/objdiff-core/src/obj/mod.rs index e270171..b754c4c 100644 --- a/objdiff-core/src/obj/mod.rs +++ b/objdiff-core/src/obj/mod.rs @@ -114,7 +114,17 @@ impl Section { ins_ref: InstructionRef, ) -> Option> { match self.relocations.binary_search_by_key(&ins_ref.address, |r| r.address) { - Ok(i) => self.relocations.get(i), + Ok(mut i) => { + // Find the first relocation at the address + while i + .checked_sub(1) + .and_then(|n| self.relocations.get(n)) + .is_some_and(|r| r.address == ins_ref.address) + { + i -= 1; + } + self.relocations.get(i) + } Err(i) => self .relocations .get(i) diff --git a/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap b/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap index 36e1a06..4a464d4 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap @@ -22,7 +22,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 632, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -36,7 +36,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 636, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -50,7 +50,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 640, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 652, ), @@ -71,7 +71,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 644, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -85,7 +85,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 648, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 660, ), @@ -106,7 +106,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 652, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -127,7 +127,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 656, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -141,7 +141,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 660, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -162,7 +162,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 664, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -176,7 +176,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 668, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 680, ), @@ -197,7 +197,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 672, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -211,7 +211,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 676, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -225,7 +225,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 680, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -246,7 +246,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 684, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -260,7 +260,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 688, size: 4, - opcode: 109, + opcode: 338, branch_dest: None, }, ), @@ -274,7 +274,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 692, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 780, ), @@ -295,7 +295,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 696, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -309,7 +309,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 700, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -323,7 +323,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 704, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -337,7 +337,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 708, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -351,7 +351,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 712, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -365,7 +365,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 716, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -379,7 +379,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 720, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -393,7 +393,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 724, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -407,7 +407,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 728, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 736, ), @@ -428,7 +428,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 732, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -442,7 +442,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 736, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -463,7 +463,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 740, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 756, ), @@ -484,7 +484,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 744, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -498,7 +498,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 748, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 756, ), @@ -519,7 +519,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 752, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -533,7 +533,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 756, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -555,7 +555,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 760, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -576,7 +576,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 764, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -590,7 +590,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 768, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -611,7 +611,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 772, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -625,7 +625,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 776, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 812, ), @@ -646,7 +646,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 780, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -667,7 +667,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 784, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -681,7 +681,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 788, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -695,7 +695,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 792, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -709,7 +709,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 796, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -723,7 +723,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 800, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -737,7 +737,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 804, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -758,7 +758,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 808, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -772,7 +772,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 812, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -796,7 +796,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 816, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 956, ), @@ -817,7 +817,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 820, size: 4, - opcode: 68, + opcode: 297, branch_dest: None, }, ), @@ -831,7 +831,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 824, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -845,7 +845,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 828, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -859,7 +859,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 832, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 920, ), @@ -880,7 +880,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 836, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -894,7 +894,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 840, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -908,7 +908,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 844, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -922,7 +922,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 848, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -936,7 +936,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 852, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -950,7 +950,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 856, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -964,7 +964,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 860, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -978,7 +978,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 864, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -992,7 +992,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 868, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 876, ), @@ -1013,7 +1013,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 872, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1027,7 +1027,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 876, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1048,7 +1048,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 880, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 896, ), @@ -1069,7 +1069,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 884, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1083,7 +1083,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 888, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 896, ), @@ -1104,7 +1104,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 892, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1118,7 +1118,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 896, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1140,7 +1140,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 900, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -1161,7 +1161,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 904, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1175,7 +1175,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 908, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -1196,7 +1196,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 912, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1210,7 +1210,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 916, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 960, ), @@ -1231,7 +1231,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 920, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -1252,7 +1252,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 924, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1266,7 +1266,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 928, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -1280,7 +1280,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 932, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1294,7 +1294,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 936, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -1308,7 +1308,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 940, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1322,7 +1322,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 944, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -1343,7 +1343,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 948, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1357,7 +1357,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 952, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 960, ), @@ -1378,7 +1378,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 956, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1399,7 +1399,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 960, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1424,7 +1424,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 964, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1104, ), @@ -1445,7 +1445,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 968, size: 4, - opcode: 68, + opcode: 297, branch_dest: None, }, ), @@ -1459,7 +1459,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 972, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1473,7 +1473,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 976, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -1499,7 +1499,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 980, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1068, ), @@ -1520,7 +1520,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 984, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1543,7 +1543,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 988, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -1569,7 +1569,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 992, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -1599,7 +1599,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 996, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1613,7 +1613,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1000, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -1638,7 +1638,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1004, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -1664,7 +1664,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1008, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -1689,7 +1689,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1012, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1703,7 +1703,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1016, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1024, ), @@ -1724,7 +1724,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1020, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1747,7 +1747,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1024, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1780,7 +1780,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1028, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1044, ), @@ -1801,7 +1801,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1032, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1824,7 +1824,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1036, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1044, ), @@ -1845,7 +1845,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1040, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1868,7 +1868,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1044, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -1902,7 +1902,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1048, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -1923,7 +1923,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1052, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -1946,7 +1946,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1056, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -1967,7 +1967,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1060, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1990,7 +1990,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1064, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 1108, ), @@ -2011,7 +2011,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1068, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -2044,7 +2044,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1072, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2067,7 +2067,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1076, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -2097,7 +2097,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1080, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2111,7 +2111,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1084, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -2137,7 +2137,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1088, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2151,7 +2151,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1092, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -2172,7 +2172,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1096, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2195,7 +2195,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1100, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 1108, ), @@ -2216,7 +2216,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1104, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2246,7 +2246,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1108, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2271,7 +2271,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1112, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2285,7 +2285,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1116, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1140, ), @@ -2306,7 +2306,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1120, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -2332,7 +2332,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1124, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2361,7 +2361,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1128, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1140, ), @@ -2382,7 +2382,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1132, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2411,7 +2411,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1136, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1180, ), @@ -2432,7 +2432,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1140, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2454,7 +2454,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1144, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1160, ), @@ -2475,7 +2475,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1148, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -2489,7 +2489,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1152, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2503,7 +2503,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1156, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1180, ), @@ -2524,7 +2524,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1160, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2557,7 +2557,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1164, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -2571,7 +2571,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1168, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -2585,7 +2585,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1172, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2599,7 +2599,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1176, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -2613,7 +2613,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1180, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2635,7 +2635,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1184, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -2665,7 +2665,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 632, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -2679,7 +2679,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 636, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -2693,7 +2693,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 640, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 652, ), @@ -2714,7 +2714,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 644, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -2728,7 +2728,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 648, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 660, ), @@ -2749,7 +2749,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 652, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2770,7 +2770,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 656, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -2784,7 +2784,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 660, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -2805,7 +2805,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 664, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2819,7 +2819,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 668, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 680, ), @@ -2840,7 +2840,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 672, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2854,7 +2854,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 676, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -2868,7 +2868,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 680, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2889,7 +2889,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 684, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -2903,7 +2903,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 688, size: 4, - opcode: 109, + opcode: 338, branch_dest: None, }, ), @@ -2917,7 +2917,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 692, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 780, ), @@ -2938,7 +2938,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 696, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -2952,7 +2952,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 700, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -2966,7 +2966,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 704, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -2980,7 +2980,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 708, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -2994,7 +2994,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 712, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -3008,7 +3008,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 716, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -3022,7 +3022,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 720, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -3036,7 +3036,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 724, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3050,7 +3050,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 728, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 736, ), @@ -3071,7 +3071,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 732, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3085,7 +3085,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 736, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3106,7 +3106,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 740, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 756, ), @@ -3127,7 +3127,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 744, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3141,7 +3141,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 748, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 756, ), @@ -3162,7 +3162,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 752, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3176,7 +3176,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 756, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3198,7 +3198,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 760, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -3219,7 +3219,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 764, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3233,7 +3233,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 768, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -3254,7 +3254,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 772, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3268,7 +3268,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 776, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 812, ), @@ -3289,7 +3289,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 780, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -3310,7 +3310,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 784, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3324,7 +3324,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 788, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -3338,7 +3338,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 792, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3352,7 +3352,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 796, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -3366,7 +3366,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 800, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3380,7 +3380,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 804, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 812, ), @@ -3401,7 +3401,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 808, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3415,7 +3415,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 812, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3439,7 +3439,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 816, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 956, ), @@ -3460,7 +3460,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 820, size: 4, - opcode: 68, + opcode: 297, branch_dest: None, }, ), @@ -3474,7 +3474,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 824, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3488,7 +3488,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 828, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -3502,7 +3502,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 832, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 920, ), @@ -3523,7 +3523,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 836, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3537,7 +3537,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 840, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -3551,7 +3551,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 844, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -3565,7 +3565,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 848, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3579,7 +3579,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 852, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -3593,7 +3593,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 856, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -3607,7 +3607,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 860, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -3621,7 +3621,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 864, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3635,7 +3635,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 868, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 876, ), @@ -3656,7 +3656,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 872, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3670,7 +3670,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 876, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3691,7 +3691,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 880, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 896, ), @@ -3712,7 +3712,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 884, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3726,7 +3726,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 888, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 896, ), @@ -3747,7 +3747,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 892, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3761,7 +3761,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 896, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3783,7 +3783,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 900, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -3804,7 +3804,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 904, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -3818,7 +3818,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 908, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -3839,7 +3839,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 912, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3853,7 +3853,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 916, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 960, ), @@ -3874,7 +3874,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 920, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -3895,7 +3895,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 924, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -3909,7 +3909,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 928, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -3923,7 +3923,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 932, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3937,7 +3937,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 936, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -3951,7 +3951,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 940, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -3965,7 +3965,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 944, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 960, ), @@ -3986,7 +3986,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 948, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4000,7 +4000,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 952, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 960, ), @@ -4021,7 +4021,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 956, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4042,7 +4042,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 960, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -4067,7 +4067,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 964, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1104, ), @@ -4088,7 +4088,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 968, size: 4, - opcode: 68, + opcode: 297, branch_dest: None, }, ), @@ -4102,7 +4102,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 972, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -4116,7 +4116,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 976, size: 4, - opcode: 160, + opcode: 439, branch_dest: None, }, ), @@ -4142,7 +4142,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 980, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1068, ), @@ -4163,7 +4163,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 984, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4186,7 +4186,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 988, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -4212,7 +4212,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 992, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -4242,7 +4242,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 996, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4256,7 +4256,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1000, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -4281,7 +4281,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1004, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -4307,7 +4307,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1008, size: 4, - opcode: 128, + opcode: 357, branch_dest: None, }, ), @@ -4332,7 +4332,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1012, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4346,7 +4346,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1016, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1024, ), @@ -4367,7 +4367,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1020, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4390,7 +4390,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1024, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4423,7 +4423,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1028, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1044, ), @@ -4444,7 +4444,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1032, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -4467,7 +4467,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1036, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1044, ), @@ -4488,7 +4488,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1040, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4511,7 +4511,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1044, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4545,7 +4545,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1048, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -4566,7 +4566,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1052, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -4589,7 +4589,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1056, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -4610,7 +4610,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1060, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4633,7 +4633,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1064, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 1108, ), @@ -4654,7 +4654,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1068, size: 4, - opcode: 36, + opcode: 258, branch_dest: None, }, ), @@ -4687,7 +4687,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1072, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4710,7 +4710,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1076, size: 4, - opcode: 129, + opcode: 358, branch_dest: None, }, ), @@ -4740,7 +4740,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1080, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4754,7 +4754,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1084, size: 4, - opcode: 150, + opcode: 379, branch_dest: None, }, ), @@ -4780,7 +4780,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1088, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4794,7 +4794,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1092, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1108, ), @@ -4815,7 +4815,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1096, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4838,7 +4838,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1100, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 1108, ), @@ -4859,7 +4859,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1104, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4889,7 +4889,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1108, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -4914,7 +4914,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1112, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -4928,7 +4928,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1116, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1140, ), @@ -4949,7 +4949,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1120, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -4975,7 +4975,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1124, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5004,7 +5004,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1128, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1140, ), @@ -5025,7 +5025,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1132, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5054,7 +5054,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1136, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1180, ), @@ -5075,7 +5075,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1140, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5097,7 +5097,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1144, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1160, ), @@ -5118,7 +5118,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1148, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -5132,7 +5132,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1152, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5146,7 +5146,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1156, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 1180, ), @@ -5167,7 +5167,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1160, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5200,7 +5200,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1164, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -5214,7 +5214,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1168, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -5228,7 +5228,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1172, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -5242,7 +5242,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1176, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), @@ -5256,7 +5256,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1180, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -5278,7 +5278,7 @@ expression: "(target_symbol_diff, base_symbol_diff)" InstructionRef { address: 1184, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), diff --git a/objdiff-core/tests/snapshots/arch_ppc__read_extab.snap b/objdiff-core/tests/snapshots/arch_ppc__read_extab.snap index 909b2a3..cc1ac64 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__read_extab.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__read_extab.snap @@ -4,6 +4,9 @@ expression: obj --- Object { arch: ArchPpc { + extensions: Extensions( + 2, + ), extab: Some( { 10: ExceptionInfo { diff --git a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap index 9d5be1d..bb02cb0 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap @@ -8,7 +8,7 @@ expression: diff.instruction_rows InstructionRef { address: 0, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -22,7 +22,7 @@ expression: diff.instruction_rows InstructionRef { address: 4, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -36,7 +36,7 @@ expression: diff.instruction_rows InstructionRef { address: 8, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 20, ), @@ -57,7 +57,7 @@ expression: diff.instruction_rows InstructionRef { address: 12, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -71,7 +71,7 @@ expression: diff.instruction_rows InstructionRef { address: 16, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 32, ), @@ -92,7 +92,7 @@ expression: diff.instruction_rows InstructionRef { address: 20, size: 4, - opcode: 42, + opcode: 264, branch_dest: None, }, ), @@ -113,7 +113,7 @@ expression: diff.instruction_rows InstructionRef { address: 24, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -127,7 +127,7 @@ expression: diff.instruction_rows InstructionRef { address: 28, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -141,7 +141,7 @@ expression: diff.instruction_rows InstructionRef { address: 32, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -162,7 +162,7 @@ expression: diff.instruction_rows InstructionRef { address: 36, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -176,7 +176,7 @@ expression: diff.instruction_rows InstructionRef { address: 40, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -190,7 +190,7 @@ expression: diff.instruction_rows InstructionRef { address: 44, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 56, ), @@ -211,7 +211,7 @@ expression: diff.instruction_rows InstructionRef { address: 48, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -225,7 +225,7 @@ expression: diff.instruction_rows InstructionRef { address: 52, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 68, ), @@ -246,7 +246,7 @@ expression: diff.instruction_rows InstructionRef { address: 56, size: 4, - opcode: 42, + opcode: 264, branch_dest: None, }, ), @@ -267,7 +267,7 @@ expression: diff.instruction_rows InstructionRef { address: 60, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -281,7 +281,7 @@ expression: diff.instruction_rows InstructionRef { address: 64, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -295,7 +295,7 @@ expression: diff.instruction_rows InstructionRef { address: 68, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -316,7 +316,7 @@ expression: diff.instruction_rows InstructionRef { address: 72, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -330,7 +330,7 @@ expression: diff.instruction_rows InstructionRef { address: 76, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -344,7 +344,7 @@ expression: diff.instruction_rows InstructionRef { address: 80, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -358,7 +358,7 @@ expression: diff.instruction_rows InstructionRef { address: 84, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 96, ), @@ -379,7 +379,7 @@ expression: diff.instruction_rows InstructionRef { address: 88, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -393,7 +393,7 @@ expression: diff.instruction_rows InstructionRef { address: 92, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 108, ), @@ -414,7 +414,7 @@ expression: diff.instruction_rows InstructionRef { address: 96, size: 4, - opcode: 42, + opcode: 264, branch_dest: None, }, ), @@ -435,7 +435,7 @@ expression: diff.instruction_rows InstructionRef { address: 100, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -449,7 +449,7 @@ expression: diff.instruction_rows InstructionRef { address: 104, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -463,7 +463,7 @@ expression: diff.instruction_rows InstructionRef { address: 108, size: 4, - opcode: 60, + opcode: 283, branch_dest: None, }, ), @@ -484,7 +484,7 @@ expression: diff.instruction_rows InstructionRef { address: 112, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -498,7 +498,7 @@ expression: diff.instruction_rows InstructionRef { address: 116, size: 4, - opcode: 38, + opcode: 260, branch_dest: None, }, ), @@ -512,7 +512,7 @@ expression: diff.instruction_rows InstructionRef { address: 120, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -526,7 +526,7 @@ expression: diff.instruction_rows InstructionRef { address: 124, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 136, ), @@ -547,7 +547,7 @@ expression: diff.instruction_rows InstructionRef { address: 128, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -561,7 +561,7 @@ expression: diff.instruction_rows InstructionRef { address: 132, size: 4, - opcode: 45, + opcode: 267, branch_dest: Some( 148, ), @@ -582,7 +582,7 @@ expression: diff.instruction_rows InstructionRef { address: 136, size: 4, - opcode: 42, + opcode: 264, branch_dest: None, }, ), @@ -603,7 +603,7 @@ expression: diff.instruction_rows InstructionRef { address: 140, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -617,7 +617,7 @@ expression: diff.instruction_rows InstructionRef { address: 144, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -631,7 +631,7 @@ expression: diff.instruction_rows InstructionRef { address: 148, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -652,7 +652,7 @@ expression: diff.instruction_rows InstructionRef { address: 152, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -666,7 +666,7 @@ expression: diff.instruction_rows InstructionRef { address: 156, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -680,7 +680,7 @@ expression: diff.instruction_rows InstructionRef { address: 160, size: 4, - opcode: 42, + opcode: 264, branch_dest: None, }, ), @@ -694,7 +694,7 @@ expression: diff.instruction_rows InstructionRef { address: 164, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -708,7 +708,7 @@ expression: diff.instruction_rows InstructionRef { address: 168, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -722,7 +722,7 @@ expression: diff.instruction_rows InstructionRef { address: 172, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -736,7 +736,7 @@ expression: diff.instruction_rows InstructionRef { address: 176, size: 4, - opcode: 162, + opcode: 441, branch_dest: None, }, ), @@ -750,7 +750,7 @@ expression: diff.instruction_rows InstructionRef { address: 180, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -764,7 +764,7 @@ expression: diff.instruction_rows InstructionRef { address: 184, size: 4, - opcode: 66, + opcode: 289, branch_dest: None, }, ), @@ -778,7 +778,7 @@ expression: diff.instruction_rows InstructionRef { address: 188, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 196, ), @@ -799,7 +799,7 @@ expression: diff.instruction_rows InstructionRef { address: 192, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -813,7 +813,7 @@ expression: diff.instruction_rows InstructionRef { address: 196, size: 4, - opcode: 163, + opcode: 442, branch_dest: None, }, ), @@ -834,7 +834,7 @@ expression: diff.instruction_rows InstructionRef { address: 200, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -848,7 +848,7 @@ expression: diff.instruction_rows InstructionRef { address: 204, size: 4, - opcode: 66, + opcode: 289, branch_dest: None, }, ), @@ -862,7 +862,7 @@ expression: diff.instruction_rows InstructionRef { address: 208, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 216, ), @@ -883,7 +883,7 @@ expression: diff.instruction_rows InstructionRef { address: 212, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -897,7 +897,7 @@ expression: diff.instruction_rows InstructionRef { address: 216, size: 4, - opcode: 163, + opcode: 442, branch_dest: None, }, ), @@ -918,7 +918,7 @@ expression: diff.instruction_rows InstructionRef { address: 220, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -932,7 +932,7 @@ expression: diff.instruction_rows InstructionRef { address: 224, size: 4, - opcode: 66, + opcode: 289, branch_dest: None, }, ), @@ -946,7 +946,7 @@ expression: diff.instruction_rows InstructionRef { address: 228, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 236, ), @@ -967,7 +967,7 @@ expression: diff.instruction_rows InstructionRef { address: 232, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -981,7 +981,7 @@ expression: diff.instruction_rows InstructionRef { address: 236, size: 4, - opcode: 163, + opcode: 442, branch_dest: None, }, ), @@ -1002,7 +1002,7 @@ expression: diff.instruction_rows InstructionRef { address: 240, size: 4, - opcode: 94, + opcode: 323, branch_dest: None, }, ), @@ -1016,7 +1016,7 @@ expression: diff.instruction_rows InstructionRef { address: 244, size: 4, - opcode: 66, + opcode: 289, branch_dest: None, }, ), @@ -1030,7 +1030,7 @@ expression: diff.instruction_rows InstructionRef { address: 248, size: 4, - opcode: 43, + opcode: 265, branch_dest: Some( 256, ), @@ -1051,7 +1051,7 @@ expression: diff.instruction_rows InstructionRef { address: 252, size: 4, - opcode: 166, + opcode: 445, branch_dest: None, }, ), @@ -1065,7 +1065,7 @@ expression: diff.instruction_rows InstructionRef { address: 256, size: 4, - opcode: 41, + opcode: 263, branch_dest: None, }, ), @@ -1086,7 +1086,7 @@ expression: diff.instruction_rows InstructionRef { address: 260, size: 4, - opcode: 47, + opcode: 269, branch_dest: None, }, ), diff --git a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-3.snap b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-3.snap index bebb0ba..9ec97fc 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__read_ppc-3.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__read_ppc-3.snap @@ -1,71 +1,70 @@ --- source: objdiff-core/tests/arch_ppc.rs -assertion_line: 20 expression: output --- -[(Address(0), Normal, 5), (Spacing(4), Normal, 0), (Opcode("srwi", 60), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)] -[(Address(4), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(8), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(20), Normal, 0), (Basic(" ~>"), Rotating(0), 0), (Eol, Normal, 0)] -[(Address(12), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(16), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(32), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)] -[(Address(20), Normal, 5), (Basic(" ~> "), Rotating(0), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] -[(Address(24), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] -[(Address(28), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(32), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode("extrwi", 60), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Eol, Normal, 0)] -[(Address(36), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] -[(Address(40), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(44), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(56), Normal, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)] -[(Address(48), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(52), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(68), Normal, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)] -[(Address(56), Normal, 5), (Basic(" ~> "), Rotating(2), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] -[(Address(60), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] -[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(68), Normal, 5), (Basic(" ~> "), Rotating(3), 0), (Opcode("extrwi", 60), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("16")), Normal, 0), (Eol, Normal, 0)] -[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] -[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(96), Normal, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)] -[(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(92), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(108), Normal, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)] -[(Address(96), Normal, 5), (Basic(" ~> "), Rotating(4), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] -[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] -[(Address(104), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(108), Normal, 5), (Basic(" ~> "), Rotating(5), 0), (Opcode("clrlwi", 60), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)] -[(Address(112), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] -[(Address(116), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(120), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(2)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(124), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(136), Normal, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)] -[(Address(128), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] -[(Address(132), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(148), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)] -[(Address(136), Normal, 5), (Basic(" ~> "), Rotating(6), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] -[(Address(140), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] -[(Address(144), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(148), Normal, 5), (Basic(" ~> "), Rotating(7), 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] -[(Address(152), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Eol, Normal, 0)] -[(Address(156), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(3)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(160), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] -[(Address(164), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] -[(Address(168), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(4)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(172), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(45)), Normal, 0), (Eol, Normal, 0)] -[(Address(176), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbz", 162), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] -[(Address(180), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(184), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] -[(Address(188), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(196), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] -[(Address(192), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(196), Normal, 5), (Basic(" ~> "), Rotating(8), 0), (Opcode("lbzu", 163), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(200), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] -[(Address(204), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] -[(Address(208), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(216), Normal, 0), (Basic(" ~>"), Rotating(9), 0), (Eol, Normal, 0)] -[(Address(212), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(216), Normal, 5), (Basic(" ~> "), Rotating(9), 0), (Opcode("lbzu", 163), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] -[(Address(220), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), 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section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] +[(Address(204), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] +[(Address(208), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(216), Normal, 0), (Basic(" ~>"), Rotating(9), 0), (Eol, Normal, 0)] +[(Address(212), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] +[(Address(216), Normal, 5), (Basic(" ~> "), Rotating(9), 0), (Opcode("lbzu", 442), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] +[(Address(220), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] +[(Address(224), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] +[(Address(228), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(236), Normal, 0), (Basic(" ~>"), Rotating(10), 0), (Eol, Normal, 0)] +[(Address(232), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] +[(Address(236), Normal, 5), (Basic(" ~> "), Rotating(10), 0), (Opcode("lbzu", 442), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] +[(Address(240), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] +[(Address(244), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] +[(Address(248), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(256), Normal, 0), (Basic(" ~>"), Rotating(11), 0), (Eol, Normal, 0)] +[(Address(252), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] +[(Address(256), Normal, 5), (Basic(" ~> "), Rotating(11), 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] +[(Address(260), Normal, 5), (Spacing(4), Normal, 0), (Opcode("blr", 269), Normal, 10), (Eol, Normal, 0)] diff --git a/objdiff-core/tests/snapshots/arch_ppc__read_ppc.snap b/objdiff-core/tests/snapshots/arch_ppc__read_ppc.snap index 32c49c1..2152e56 100644 --- a/objdiff-core/tests/snapshots/arch_ppc__read_ppc.snap +++ b/objdiff-core/tests/snapshots/arch_ppc__read_ppc.snap @@ -4,6 +4,9 @@ expression: obj --- Object { arch: ArchPpc { + extensions: Extensions( + 2, + ), extab: None, }, endianness: Big,