diff --git a/disasm/src/generated.rs b/disasm/src/generated.rs index 395afa6..4006744 100644 --- a/disasm/src/generated.rs +++ b/disasm/src/generated.rs @@ -5708,17 +5708,6 @@ impl Ins { ins: self, }; } - if (((((self.code >> 11u8) & 0x3ff) & 0b11111_00000u32) >> 5u32) - | ((((self.code >> 11u8) & 0x3ff) & 0b00000_11111u32) << 5u32)) - as u32 - == 571 - { - return SimplifiedIns { - mnemonic: "mftdu", - args: vec![Argument::GPR(GPR(((self.code >> 21u8) & 0x1f) as _))], - ins: self, - }; - } } Opcode::Mtspr => { if (((((self.code >> 11u8) & 0x3ff) & 0b11111_00000u32) >> 5u32) @@ -5776,17 +5765,6 @@ impl Ins { ins: self, }; } - if (((((self.code >> 11u8) & 0x3ff) & 0b11111_00000u32) >> 5u32) - | ((((self.code >> 11u8) & 0x3ff) & 0b00000_11111u32) << 5u32)) - as u32 - == 571 - { - return SimplifiedIns { - mnemonic: "mttdu", - args: vec![Argument::GPR(GPR(((self.code >> 21u8) & 0x1f) as _))], - ins: self, - }; - } } Opcode::Or => { if ((self.code >> 21u8) & 0x1f) == ((self.code >> 11u8) & 0x1f) { diff --git a/isa.yaml b/isa.yaml index c70de96..00a459c 100644 --- a/isa.yaml +++ b/isa.yaml @@ -2103,10 +2103,6 @@ mnemonics: opcode: mtspr args: [ rS ] condition: spr == 397 - - name: mttdu - opcode: mtspr - args: [ rS ] - condition: spr == 571 # Move from special-purpose register - name: mfxer @@ -2129,10 +2125,6 @@ mnemonics: opcode: mfspr args: [ rD ] condition: spr == 397 - - name: mftdu - opcode: mfspr - args: [ rD ] - condition: spr == 571 # Branch Conditional # bc branch always