diff --git a/Cargo.lock b/Cargo.lock index 3410bae..6d7e6ad 100644 --- a/Cargo.lock +++ b/Cargo.lock @@ -123,9 +123,9 @@ checksum = "5443807d6dff69373d433ab9ef5378ad8df50ca6298caf15de6e52e24aaf54d5" [[package]] name = "hashbrown" -version = "0.14.5" +version = "0.15.4" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "e5274423e17b7c9fc20b6e7e208532f9b19825d82dfd615708b70edd83df41f1" +checksum = "5971ac85611da7067dbfcabef3c70ebb5606018acd9e2a3903a0da507521e0d5" [[package]] name = "hermit-abi" @@ -135,12 +135,13 @@ checksum = "d231dfb89cfffdbc30e7fc41579ed6066ad03abda9e567ccafae602b97ec5024" [[package]] name = "indexmap" -version = "2.5.0" +version = "2.10.0" source = "registry+https://github.com/rust-lang/crates.io-index" -checksum = "68b900aa2f7301e21c36462b170ee99994de34dff39a4a6a528e80e7376d07e5" +checksum = "fe4cd85333e22411419a0bcae1297d25e58c9443848b11dc6a86fefe8c78a661" dependencies = [ "equivalent", "hashbrown", + "serde", ] [[package]] @@ -252,33 +253,33 @@ source = "registry+https://github.com/rust-lang/crates.io-index" checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391" [[package]] -name = "ppc750cl" -version = "0.3.3" +name = "powerpc" +version = "0.4.0" [[package]] -name = "ppc750cl-asm" -version = "0.3.3" +name = "powerpc-asm" +version = "0.4.0" dependencies = [ "phf", ] [[package]] -name = "ppc750cl-fuzz" -version = "0.3.3" +name = "powerpc-fuzz" +version = "0.4.0" dependencies = [ "clap", "num_cpus", - "ppc750cl", + "powerpc", ] [[package]] -name = "ppc750cl-genisa" -version = "0.3.3" +name = "powerpc-genisa" +version = "0.4.0" dependencies = [ "anyhow", + "indexmap", "log", "num-traits", - "phf", "phf_codegen", "prettyplease", "proc-macro2", diff --git a/Cargo.toml b/Cargo.toml index 0da9cdc..190c047 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -2,18 +2,11 @@ members = ["asm", "disasm", "fuzz", "genisa"] resolver = "2" -[profile.release] -panic = "abort" - -[profile.release-lto] -inherits = "release" -lto = true - [workspace.package] -version = "0.3.3" +version = "0.4.0" edition = "2021" authors = ["Luke Street "] license = "MIT OR Apache-2.0" -keywords = ["powerpc", "wii", "gamecube", "xbox"] -repository = "https://github.com/rjkiv/ppc750cl.git" +keywords = ["powerpc", "disassembler", "assembler", "ppc"] +repository = "https://github.com/encounter/powerpc-rs.git" rust-version = "1.74" diff --git a/README.md b/README.md index 13076e6..7485ebf 100644 --- a/README.md +++ b/README.md @@ -1,47 +1,96 @@ -# ppc750cl [![Build Status]][actions] [![Latest Version]][crates.io] [![Api Rustdoc]][rustdoc] ![Rust Version] +# powerpc [![Build Status]][actions] [![Latest Version]][crates.io] [![Api Rustdoc]][rustdoc] ![Rust Version] -[Build Status]: https://github.com/encounter/ppc750cl/actions/workflows/test.yml/badge.svg -[actions]: https://github.com/encounter/ppc750cl/actions -[Latest Version]: https://img.shields.io/crates/v/ppc750cl.svg -[crates.io]: https://crates.io/crates/ppc750cl +[Build Status]: https://github.com/encounter/powerpc-rs/actions/workflows/test.yml/badge.svg +[actions]: https://github.com/encounter/powerpc-rs/actions +[Latest Version]: https://img.shields.io/crates/v/powerpc.svg +[crates.io]: https://crates.io/crates/powerpc [Api Rustdoc]: https://img.shields.io/badge/api-rustdoc-blue.svg -[rustdoc]: https://docs.rs/ppc750cl +[rustdoc]: https://docs.rs/powerpc [Rust Version]: https://img.shields.io/badge/rust-1.74+-blue.svg?maxAge=3600 -Rust tools for working with the PowerPC 750CL / 750CXe family of processors. +(Previously `ppc750cl`) -### Building +Rust disassembler and assembler for the PowerPC ISA. -```shell -cargo run --package ppc750cl-genisa -cargo build --release +### Supported Extensions + +- PowerPC 64-bit +- Paired Singles + - PowerPC 750CXe "Gekko" (Nintendo GameCube) + - PowerPC 750CL "Broadway" (Nintendo Wii) +- AltiVec +- VMX128 + - PowerPC "Xenon" (Xbox 360) + +If you need support for other extensions, please open an issue. + +## Usage + +In Cargo.toml: + +```toml +[dependencies] +powerpc = "0.4" # disassembler +powerpc-asm = "0.4" # assembler ``` -### Instruction Set +Disassembling and printing instructions: -For those unfamiliar with PowerPC, here are some basics. -- PowerPC 7xx is a family of RISC CPUs produced from 1997 to 2012. - - They operate with 32-bit words and every instruction is 32-bits wide. -- This project focuses (only) on compatibility with the PowerPC 750CL and 750CXe. - - PowerPC 750CL ("Broadway") is used in the Nintendo Wii. - - PowerPC 750CXe ("Gekko") is used in the Nintendo GameCube. - - They add a "paired-singles" SIMD unit and a bunch of other instructions. +```rust +use powerpc::{Argument, Extensions, Ins, Opcode, Simm, GPR}; -### isa.yaml +let ins = Ins::new(0x38A00000, Extensions::none()); +assert_eq!(ins.op, Opcode::Addi); -The file [isa.yaml](./isa.yaml) contains a full definition of the PowerPC 750CL / 750CXe instruction set. +// Basic form +let parsed = ins.basic(); +assert_eq!(parsed.args[0], Argument::GPR(GPR(5))); +assert_eq!(parsed.args[1], Argument::GPR(GPR(0))); +assert_eq!(parsed.args[2], Argument::Simm(Simm(0))); +assert_eq!(parsed.to_string(), "addi r5, r0, 0x0"); -It powers the disassembler and assembler. +// Simplified form +let parsed = ins.simplified(); +assert_eq!(parsed.to_string(), "li r5, 0x0"); +``` -Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file implementing an instruction decoder. +Assembling instructions: -### Safety & Correctness +```rust +use powerpc_asm::{assemble, Argument, Arguments}; -- The disassembler has been fuzzed over all ~4.29 billion possible instructions (via `ppc750cl-fuzz`). +let args: Arguments = [ + Argument::Unsigned(5), + Argument::Unsigned(0), + Argument::Signed(0), + Argument::None, + Argument::None, +]; +let code = assemble("addi", &args).expect("Invalid arguments"); +assert_eq!(code, 0x38A00000); // addi r5, r0, 0x0 +``` + +## Building + +``` +cargo run --package powerpc-genisa +cargo test +``` + +## isa.yaml + +The file [isa.yaml](./isa.yaml) contains a definition of the PowerPC instruction set. + +Similarly to LLVM TableGen, the program `powerpc-genisa` generates Rust files implementing core functionality +for the disassembler and assembler. + +## Safety & Correctness + +- The disassembler has been fuzzed over all ~4.29 billion possible instructions (via `powerpc-fuzz`). - It is safe to run the disassembler over untrusted byte arrays. - However, no guarantees on correctness are made (yet). Expect bugs. -### Performance +## Performance With a single thread on Ryzen 9 3900X: diff --git a/asm/Cargo.toml b/asm/Cargo.toml index 3fee044..3e6e714 100644 --- a/asm/Cargo.toml +++ b/asm/Cargo.toml @@ -1,14 +1,14 @@ [package] -name = "ppc750cl-asm" +name = "powerpc-asm" version.workspace = true edition.workspace = true authors.workspace = true license.workspace = true -description = "Assembler for PowerPC 750CL" +description = "PowerPC assembler" readme = "../README.md" keywords.workspace = true repository.workspace = true -documentation = "https://docs.rs/ppc750cl-asm" +documentation = "https://docs.rs/powerpc-asm" rust-version.workspace = true [features] diff --git a/asm/src/generated.rs b/asm/src/generated.rs index aef5e92..4ec0edf 100644 --- a/asm/src/generated.rs +++ b/asm/src/generated.rs @@ -1,6 +1,6 @@ #![allow(unused)] #![cfg_attr(rustfmt, rustfmt_skip)] -// Code generated by ppc750-genisa. DO NOT EDIT. +// Code generated by powerpc-genisa. DO NOT EDIT. use crate::types::*; pub type Arguments = [Argument; 5]; fn gen_add(args: &Arguments, modifiers: u32) -> Result { @@ -1975,6 +1975,21 @@ fn gen_dcbz_l(args: &Arguments, modifiers: u32) -> Result { } Ok(code) } +fn gen_dcbzl(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x7c2007ec | modifiers; + // rA + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // rB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} fn gen_divd(args: &Arguments, modifiers: u32) -> Result { check_arg_count(args, 3)?; let mut code = 0x7c0003d2 | modifiers; @@ -5111,6 +5126,841 @@ fn gen_oris(args: &Arguments, modifiers: u32) -> Result { } Ok(code) } +fn gen_ps_abs(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000210 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_add(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x1000002a | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_cmpo0(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000040 | modifiers; + // crfD + { + let arg = parse_unsigned(args, 0, 0x0, 0x7)?; + code |= (arg & 0x7) << 23; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_cmpo1(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x100000c0 | modifiers; + // crfD + { + let arg = parse_unsigned(args, 0, 0x0, 0x7)?; + code |= (arg & 0x7) << 23; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_cmpu0(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000000 | modifiers; + // crfD + { + let arg = parse_unsigned(args, 0, 0x0, 0x7)?; + code |= (arg & 0x7) << 23; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_cmpu1(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000080 | modifiers; + // crfD + { + let arg = parse_unsigned(args, 0, 0x0, 0x7)?; + code |= (arg & 0x7) << 23; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_div(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000024 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_madd(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000003a | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_madds0(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000001c | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_madds1(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000001e | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_merge00(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000420 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_merge01(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000460 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_merge10(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x100004a0 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_merge11(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x100004e0 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_mr(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000090 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_msub(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x10000038 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_mul(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000032 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + Ok(code) +} +fn gen_ps_muls0(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000018 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + Ok(code) +} +fn gen_ps_muls1(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x1000001a | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + Ok(code) +} +fn gen_ps_nabs(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000110 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_neg(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000050 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_nmadd(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000003e | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_nmsub(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000003c | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_res(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000030 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_rsqrte(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 2)?; + let mut code = 0x10000034 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frB + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_sel(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x1000002e | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_sub(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 3)?; + let mut code = 0x10000028 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_sum0(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x10000014 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_ps_sum1(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 4)?; + let mut code = 0x10000016 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // frA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // frC + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 6; + } + // frB + { + let arg = parse_unsigned(args, 3, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + Ok(code) +} +fn gen_psq_l(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0xe0000000 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // ps_offset + { + let arg = parse_signed(args, 1, -0x800, 0x800)? as u32; + code |= arg & 0xfff; + } + // rA + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // ps_W + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 15; + } + // ps_I + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 12; + } + Ok(code) +} +fn gen_psq_lu(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0xe4000000 | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // ps_offset + { + let arg = parse_signed(args, 1, -0x800, 0x800)? as u32; + code |= arg & 0xfff; + } + // rA + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // ps_W + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 15; + } + // ps_I + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 12; + } + Ok(code) +} +fn gen_psq_lux(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0x1000004c | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // rA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // rB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + // ps_WX + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 10; + } + // ps_IX + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 7; + } + Ok(code) +} +fn gen_psq_lx(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0x1000000c | modifiers; + // frD + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // rA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // rB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + // ps_WX + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 10; + } + // ps_IX + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 7; + } + Ok(code) +} +fn gen_psq_st(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0xf0000000 | modifiers; + // frS + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // ps_offset + { + let arg = parse_signed(args, 1, -0x800, 0x800)? as u32; + code |= arg & 0xfff; + } + // rA + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // ps_W + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 15; + } + // ps_I + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 12; + } + Ok(code) +} +fn gen_psq_stu(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0xf4000000 | modifiers; + // frS + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // ps_offset + { + let arg = parse_signed(args, 1, -0x800, 0x800)? as u32; + code |= arg & 0xfff; + } + // rA + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // ps_W + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 15; + } + // ps_I + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 12; + } + Ok(code) +} +fn gen_psq_stux(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0x1000004e | modifiers; + // frS + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // rA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // rB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + // ps_WX + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 10; + } + // ps_IX + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 7; + } + Ok(code) +} +fn gen_psq_stx(args: &Arguments, modifiers: u32) -> Result { + check_arg_count(args, 5)?; + let mut code = 0x1000000e | modifiers; + // frS + { + let arg = parse_unsigned(args, 0, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 21; + } + // rA + { + let arg = parse_unsigned(args, 1, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 16; + } + // rB + { + let arg = parse_unsigned(args, 2, 0x0, 0x1f)?; + code |= (arg & 0x1f) << 11; + } + // ps_WX + { + let arg = parse_unsigned(args, 3, 0x0, 0x1)?; + code |= (arg & 0x1) << 10; + } + // ps_IX + { + let arg = parse_unsigned(args, 4, 0x0, 0x7)?; + code |= (arg & 0x7) << 7; + } + Ok(code) +} fn gen_ptesync(args: &Arguments, modifiers: u32) -> Result { check_arg_count(args, 0)?; let mut code = 0x7c4004ac | modifiers; @@ -11417,1184 +12267,1260 @@ type MnemonicFn = fn(&Arguments, u32) -> Result; static MNEMONIC_MAP: phf::Map<&'static str, (MnemonicFn, u32)> = ::phf::Map { key: 12913932095322966823, disps: &[ - (0, 691), + (0, 6), + (0, 1), + (0, 15), + (0, 109), + (0, 7), + (0, 218), + (0, 1), + (0, 9), + (0, 190), + (0, 3), + (0, 57), + (0, 321), + (0, 4), + (0, 107), + (0, 40), + (0, 370), + (0, 114), (0, 0), - (0, 15), - (0, 15), - (0, 14), - (0, 5), - (0, 117), + (0, 180), + (0, 537), + (0, 11), + (0, 522), + (1, 468), + (0, 137), + (0, 12), + (0, 22), + (0, 111), + (0, 1), + (0, 240), + (0, 34), + (0, 17), (0, 5), + (0, 0), (0, 33), (0, 0), (0, 62), - (0, 8), - (0, 160), - (0, 15), - (1, 612), - (0, 1), - (0, 32), - (0, 37), - (0, 264), - (1, 2), - (0, 435), - (0, 845), - (0, 0), - (0, 137), - (0, 78), - (0, 98), - (0, 29), - (0, 277), - (0, 326), - (0, 25), - (0, 818), - (0, 5), - (0, 15), - (0, 44), - (0, 27), - (0, 132), - (0, 0), - (0, 24), - (2, 521), - (1, 689), - (0, 5), - (0, 301), - (0, 6), - (0, 0), - (0, 43), - (0, 0), - (0, 50), - (0, 33), - (0, 237), - (0, 171), - (0, 31), - (0, 60), - (0, 2), - (0, 3), - (0, 46), - (0, 2), - (0, 111), - (0, 503), - (0, 5), - (0, 4), - (0, 36), - (0, 156), - (0, 90), - (0, 0), - (0, 129), - (0, 406), - (0, 2), - (0, 367), - (0, 81), - (0, 14), - (0, 0), - (0, 242), - (0, 134), - (0, 51), - (0, 854), - (0, 743), - (0, 432), - (0, 61), - (0, 443), - (0, 273), - (0, 11), - (0, 0), - (0, 378), - (3, 890), - (0, 388), - (0, 1), - (0, 7), - (1, 350), - (0, 160), - (0, 545), - (0, 3), - (0, 4), - (0, 11), - (0, 331), - (0, 39), - (0, 313), - (0, 853), - (1, 595), - (0, 0), - (1, 249), - (0, 4), - (1, 57), - (0, 82), - (0, 16), - (0, 355), - (0, 884), - (0, 50), - (0, 252), - (0, 14), - (0, 1), - (1, 137), - (0, 2), - (0, 15), - (0, 522), - (0, 964), - (0, 46), - (0, 710), - (1, 290), - (0, 27), - (1, 40), - (0, 454), - (0, 6), - (0, 13), - (1, 229), - (3, 151), - (0, 56), - (0, 163), - (0, 249), - (0, 37), - (2, 836), - (5, 198), - (1, 836), - (8, 714), - (0, 5), - (0, 32), - (0, 447), - (0, 3), - (0, 1), - (1, 486), - (0, 828), - (0, 725), - (0, 827), - (0, 893), - (0, 0), - (0, 7), (0, 12), - (0, 426), - (0, 38), - (0, 7), - (0, 101), - (0, 8), - (0, 91), - (0, 164), - (1, 467), - (0, 151), - (3, 571), - (0, 91), - (8, 697), - (1, 107), + (0, 31), (0, 2), - (0, 688), - (0, 149), - (3, 584), - (0, 572), - (1, 38), - (0, 493), - (0, 13), - (0, 16), - (0, 15), - (0, 628), - (0, 199), - (0, 35), - (10, 71), - (7, 866), - (8, 320), - (0, 498), + (0, 46), + (0, 22), + (0, 184), (0, 8), - (0, 6), + (0, 862), + (1, 0), + (1, 60), + (0, 23), + (0, 1), + (0, 69), + (0, 14), + (1, 561), (0, 88), - (0, 73), - (14, 502), - (1, 474), - (16, 757), - (0, 578), - (0, 47), - (6, 310), - (4, 156), - (0, 606), - (7, 578), - (0, 806), - (4, 483), - (0, 345), - (0, 37), - (3, 263), + (0, 620), + (0, 86), + (0, 3), + (0, 178), + (1, 4), + (0, 571), (0, 0), - (0, 381), + (1, 516), + (0, 447), + (0, 99), + (0, 175), + (0, 0), + (0, 7), + (0, 298), + (5, 39), + (0, 0), + (0, 524), + (1, 320), + (0, 268), + (1, 1008), + (0, 53), + (0, 949), + (0, 52), + (0, 973), + (0, 3), + (0, 638), + (0, 54), + (0, 764), + (0, 489), + (1, 312), + (0, 0), + (0, 0), + (0, 121), + (0, 26), + (0, 12), + (0, 4), + (0, 0), + (1, 4), + (0, 1), + (1, 636), + (0, 562), + (0, 476), + (1, 29), + (0, 464), + (0, 7), + (5, 438), + (0, 1), + (0, 58), + (0, 20), + (2, 952), + (0, 65), + (0, 175), + (0, 11), + (0, 177), + (0, 394), + (1, 619), + (2, 817), + (0, 102), + (0, 396), + (0, 1), + (0, 510), + (0, 7), + (0, 0), + (0, 325), + (0, 13), + (0, 3), + (0, 436), + (0, 153), + (0, 509), + (0, 462), + (0, 138), + (0, 3), + (0, 315), + (0, 25), + (0, 233), + (0, 20), + (0, 773), + (0, 162), + (1, 143), + (5, 0), + (0, 105), + (1, 977), + (2, 167), + (0, 6), + (0, 2), + (0, 4), + (0, 49), + (6, 84), + (0, 728), + (0, 19), + (0, 117), + (0, 16), + (0, 3), + (3, 741), + (2, 487), + (2, 911), + (0, 9), + (0, 14), + (0, 12), + (1, 997), + (0, 30), + (0, 8), + (0, 80), + (0, 0), + (0, 32), + (0, 208), + (0, 756), + (1, 518), + (1, 509), + (1, 278), + (0, 21), + (0, 15), + (0, 213), + (2, 140), + (14, 931), + (0, 482), + (0, 59), + (3, 489), + (0, 3), + (0, 402), + (1, 481), + (0, 1), + (0, 11), + (109, 201), + (0, 11), + (2, 985), + (0, 14), + (0, 951), + (0, 10), + (5, 638), + (0, 733), + (0, 302), + (3, 231), + (0, 604), + (0, 70), + (0, 19), + (1, 887), + (0, 48), + (0, 1), + (1, 173), + (4, 492), + (12, 280), + (1, 60), + (0, 0), + (0, 45), + (4, 176), + (0, 114), + (2, 989), + (16, 258), + (0, 252), + (0, 445), + (3, 206), + (5, 373), + (3, 216), + (3, 1022), + (12, 308), + (0, 17), ], entries: &[ - ("vmaddfp128", (gen_vmaddfp128, 0x0)), - ("bnelrl+", (gen_bnelr, 0x200001)), - ("fcfid.", (gen_fcfid, 0x1)), - ("mftb", (gen_mftb, 0x0)), - ("divduo", (gen_divdu, 0x400)), - ("bgea+", (gen_bge, 0x200002)), - ("vadduhs", (gen_vadduhs, 0x0)), - ("vsl", (gen_vsl, 0x0)), - ("vsraw", (gen_vsraw, 0x0)), - ("mtxer", (gen_mtxer, 0x0)), - ("bnsctr+", (gen_bnsctr, 0x200000)), - ("bdnzla", (gen_bdnz, 0x3)), - ("vcmpgtfp.", (gen_vcmpgtfp, 0x400)), - ("fnmadd.", (gen_fnmadd, 0x1)), - ("bltctrl+", (gen_bltctr, 0x200001)), - ("subfmeo.", (gen_subfme, 0x401)), - ("cntlzw", (gen_cntlzw, 0x0)), - ("vminsh", (gen_vminsh, 0x0)), - ("bgel+", (gen_bge, 0x200001)), - ("rotlwi", (gen_rotlwi, 0x0)), - ("vpkshss128", (gen_vpkshss128, 0x0)), - ("fctiwz.", (gen_fctiwz, 0x1)), - ("bnelr", (gen_bnelr, 0x0)), - ("bdnztl-", (gen_bdnzt, 0x200001)), - ("subi", (gen_subi, 0x0)), - ("fmuls.", (gen_fmuls, 0x1)), - ("addze", (gen_addze, 0x0)), - ("stw", (gen_stw, 0x0)), - ("bgelrl", (gen_bgelr, 0x1)), - ("stvebx", (gen_stvebx, 0x0)), - ("bgta+", (gen_bgt, 0x200002)), - ("bsol", (gen_bso, 0x1)), - ("vpkpx", (gen_vpkpx, 0x0)), - ("slbia", (gen_slbia, 0x0)), - ("addi", (gen_addi, 0x0)), - ("vspltw", (gen_vspltw, 0x0)), - ("subfco.", (gen_subfc, 0x401)), - ("fmul.", (gen_fmul, 0x1)), - ("bdnzfl-", (gen_bdnzf, 0x200001)), - ("clrlslwi", (gen_clrlslwi, 0x0)), - ("bne+", (gen_bne, 0x200000)), - ("orc.", (gen_orc, 0x1)), - ("vandc", (gen_vandc, 0x0)), - ("divdo", (gen_divd, 0x400)), - ("blectr+", (gen_blectr, 0x200000)), - ("stfsu", (gen_stfsu, 0x0)), - ("bsoctr+", (gen_bsoctr, 0x200000)), - ("fnmsub", (gen_fnmsub, 0x0)), - ("vmaxfp", (gen_vmaxfp, 0x0)), - ("bns", (gen_bns, 0x0)), - ("bdz-", (gen_bdz, 0x200000)), - ("bdnzl", (gen_bdnz, 0x1)), - ("vmrghw128", (gen_vmrghw128, 0x0)), - ("bltla-", (gen_blt, 0x200003)), - ("bdza+", (gen_bdz, 0x200002)), - ("rlwimi.", (gen_rlwimi, 0x1)), - ("fdivs.", (gen_fdivs, 0x1)), - ("vminsb", (gen_vminsb, 0x0)), - ("cntlzw.", (gen_cntlzw, 0x1)), - ("bltl", (gen_blt, 0x1)), - ("blta", (gen_blt, 0x2)), - ("vrsqrtefp128", (gen_vrsqrtefp128, 0x0)), - ("stvrxl128", (gen_stvrxl128, 0x0)), - ("mtvscr", (gen_mtvscr, 0x0)), - ("bdnzla-", (gen_bdnz, 0x200003)), - ("bnsla+", (gen_bns, 0x200003)), - ("icbi.", (gen_icbi, 0x1)), - ("bgelr", (gen_bgelr, 0x0)), - ("vor", (gen_vor, 0x0)), - ("rldcl", (gen_rldcl, 0x0)), - ("bdnzlrl+", (gen_bdnzlr, 0x200001)), - ("bnel-", (gen_bne, 0x200001)), - ("rldicl.", (gen_rldicl, 0x1)), - ("bnslrl", (gen_bnslr, 0x1)), - ("blelrl+", (gen_blelr, 0x200001)), - ("mtfsb0.", (gen_mtfsb0, 0x1)), - ("mttbu", (gen_mttbu, 0x0)), - ("andc.", (gen_andc, 0x1)), - ("bc", (gen_bc, 0x0)), - ("add.", (gen_add, 0x1)), - ("bcctr", (gen_bcctr, 0x0)), - ("addis", (gen_addis, 0x0)), - ("crnot", (gen_crnot, 0x0)), - ("vsldoi", (gen_vsldoi, 0x0)), - ("extsb", (gen_extsb, 0x0)), - ("subic", (gen_subic, 0x0)), - ("sthu", (gen_sthu, 0x0)), - ("bgtla+", (gen_bgt, 0x200003)), - ("vctsxs128", (gen_vctsxs128, 0x0)), - ("rldcr", (gen_rldcr, 0x0)), - ("and", (gen_and, 0x0)), - ("cmpl", (gen_cmpl, 0x0)), - ("cmplw", (gen_cmplw, 0x0)), - ("blel-", (gen_ble, 0x200001)), - ("bdzlrl", (gen_bdzlr, 0x1)), - ("bdnztlrl+", (gen_bdnztlr, 0x200001)), - ("clrlwi.", (gen_clrlwi, 0x1)), - ("vrfiz", (gen_vrfiz, 0x0)), - ("bcl+", (gen_bc, 0x200001)), - ("vavguw", (gen_vavguw, 0x0)), - ("bge", (gen_bge, 0x0)), - ("fctiw", (gen_fctiw, 0x0)), - ("sld.", (gen_sld, 0x1)), - ("bdzflrl+", (gen_bdzflr, 0x200001)), - ("lfdx", (gen_lfdx, 0x0)), - ("rotld", (gen_rotld, 0x0)), - ("beql+", (gen_beq, 0x200001)), - ("stfdx", (gen_stfdx, 0x0)), - ("vavgsb", (gen_vavgsb, 0x0)), - ("bdzla", (gen_bdz, 0x3)), - ("crorc", (gen_crorc, 0x0)), - ("vpkshus", (gen_vpkshus, 0x0)), - ("subfzeo.", (gen_subfze, 0x401)), - ("bcla-", (gen_bc, 0x200003)), - ("mtsprg", (gen_mtsprg, 0x0)), - ("subf.", (gen_subf, 0x1)), - ("bdnza+", (gen_bdnz, 0x200002)), - ("vspltisb", (gen_vspltisb, 0x0)), - ("bgtl", (gen_bgt, 0x1)), - ("bgectr+", (gen_bgectr, 0x200000)), - ("stvlx128", (gen_stvlx128, 0x0)), - ("blea", (gen_ble, 0x2)), - ("blr", (gen_blr, 0x0)), - ("lvebx", (gen_lvebx, 0x0)), - ("lfs", (gen_lfs, 0x0)), - ("vcmpgtuw.", (gen_vcmpgtuw, 0x400)), - ("bdnzl+", (gen_bdnz, 0x200001)), - ("subfic", (gen_subfic, 0x0)), - ("stvrx", (gen_stvrx, 0x0)), - ("bcl-", (gen_bc, 0x200001)), - ("bclrl", (gen_bclr, 0x1)), - ("vcmpgtsh", (gen_vcmpgtsh, 0x0)), - ("bltla+", (gen_blt, 0x200003)), - ("vavgsw", (gen_vavgsw, 0x0)), - ("bdnzfl+", (gen_bdnzf, 0x200001)), - ("subfeo.", (gen_subfe, 0x401)), - ("lswx", (gen_lswx, 0x0)), - ("rldcl.", (gen_rldcl, 0x1)), - ("mfdbatu", (gen_mfdbatu, 0x0)), - ("mr", (gen_mr, 0x0)), - ("vaddubs", (gen_vaddubs, 0x0)), - ("vlogefp", (gen_vlogefp, 0x0)), - ("stbu", (gen_stbu, 0x0)), - ("divwo", (gen_divw, 0x400)), - ("blelr+", (gen_blelr, 0x200000)), - ("fmsub.", (gen_fmsub, 0x1)), - ("bns-", (gen_bns, 0x200000)), - ("dcbi", (gen_dcbi, 0x0)), - ("rlwinm.", (gen_rlwinm, 0x1)), - ("bgt+", (gen_bgt, 0x200000)), - ("vupklsh", (gen_vupklsh, 0x0)), - ("bgtlr", (gen_bgtlr, 0x0)), - ("vcmpbfp128.", (gen_vcmpbfp128, 0x40)), - ("vrefp", (gen_vrefp, 0x0)), - ("bnea-", (gen_bne, 0x200002)), - ("mtmsr", (gen_mtmsr, 0x0)), - ("addco.", (gen_addc, 0x401)), - ("mfsdr1", (gen_mfsdr1, 0x0)), - ("mcrxr", (gen_mcrxr, 0x0)), - ("bnsl+", (gen_bns, 0x200001)), - ("bsoctr", (gen_bsoctr, 0x0)), - ("vnor128", (gen_vnor128, 0x0)), - ("bdzt-", (gen_bdzt, 0x200000)), - ("sthx", (gen_sthx, 0x0)), - ("bnsa+", (gen_bns, 0x200002)), - ("beqlr", (gen_beqlr, 0x0)), - ("bnsl", (gen_bns, 0x1)), - ("vcmpgtub.", (gen_vcmpgtub, 0x400)), - ("vaddfp", (gen_vaddfp, 0x0)), - ("creqv", (gen_creqv, 0x0)), - ("bnela", (gen_bne, 0x3)), - ("srad.", (gen_srad, 0x1)), - ("xori", (gen_xori, 0x0)), - ("bsola-", (gen_bso, 0x200003)), - ("beqctrl", (gen_beqctr, 0x1)), - ("vsumsws", (gen_vsumsws, 0x0)), - ("crand", (gen_crand, 0x0)), - ("lvlxl128", (gen_lvlxl128, 0x0)), - ("beqla-", (gen_beq, 0x200003)), - ("vcmpeqfp.", (gen_vcmpeqfp, 0x400)), - ("mulhd.", (gen_mulhd, 0x1)), - ("vmaxsb", (gen_vmaxsb, 0x0)), - ("bdzfla", (gen_bdzf, 0x3)), - ("rfid", (gen_rfid, 0x0)), - ("stwbrx", (gen_stwbrx, 0x0)), - ("vpkuwum", (gen_vpkuwum, 0x0)), - ("srw", (gen_srw, 0x0)), - ("ecowx", (gen_ecowx, 0x0)), - ("vsum4sbs", (gen_vsum4sbs, 0x0)), - ("mffs", (gen_mffs, 0x0)), - ("bdnzlr+", (gen_bdnzlr, 0x200000)), - ("mflr", (gen_mflr, 0x0)), - ("vrsqrtefp", (gen_vrsqrtefp, 0x0)), - ("bdnzlrl", (gen_bdnzlr, 0x1)), - ("lis", (gen_lis, 0x0)), - ("fneg", (gen_fneg, 0x0)), - ("vadduwm", (gen_vadduwm, 0x0)), - ("bgelr+", (gen_bgelr, 0x200000)), - ("rldcr.", (gen_rldcr, 0x1)), - ("bsolrl+", (gen_bsolr, 0x200001)), - ("bnel", (gen_bne, 0x1)), - ("sthbrx", (gen_sthbrx, 0x0)), - ("vmaxub", (gen_vmaxub, 0x0)), - ("ble", (gen_ble, 0x0)), - ("nor", (gen_nor, 0x0)), - ("td", (gen_td, 0x0)), - ("vmsumuhs", (gen_vmsumuhs, 0x0)), - ("mfspr", (gen_mfspr, 0x0)), - ("vmaxuh", (gen_vmaxuh, 0x0)), - ("bgtlrl", (gen_bgtlr, 0x1)), - ("vrfip", (gen_vrfip, 0x0)), - ("mtsdr1", (gen_mtsdr1, 0x0)), - ("bl", (gen_b, 0x1)), - ("bdnzfla-", (gen_bdnzf, 0x200003)), - ("ori", (gen_ori, 0x0)), - ("stwx", (gen_stwx, 0x0)), - ("rotlwi.", (gen_rotlwi, 0x1)), - ("frsp", (gen_frsp, 0x0)), - ("lbzx", (gen_lbzx, 0x0)), - ("lvrx", (gen_lvrx, 0x0)), - ("bdzflr+", (gen_bdzflr, 0x200000)), - ("bdzla-", (gen_bdz, 0x200003)), - ("bnectr", (gen_bnectr, 0x0)), - ("vsubcuw", (gen_vsubcuw, 0x0)), - ("subfc", (gen_subfc, 0x0)), - ("bdnzla+", (gen_bdnz, 0x200003)), - ("extsh.", (gen_extsh, 0x1)), - ("bdzfl", (gen_bdzf, 0x1)), - ("subfmeo", (gen_subfme, 0x400)), - ("bdztlrl", (gen_bdztlr, 0x1)), - ("ba", (gen_b, 0x2)), - ("bdnz", (gen_bdnz, 0x0)), - ("bctr", (gen_bctr, 0x0)), - ("beqla+", (gen_beq, 0x200003)), - ("blectrl", (gen_blectr, 0x1)), - ("bgt-", (gen_bgt, 0x200000)), - ("mulli", (gen_mulli, 0x0)), - ("lvx", (gen_lvx, 0x0)), - ("vaddsbs", (gen_vaddsbs, 0x0)), - ("mulhwu", (gen_mulhwu, 0x0)), - ("slbie", (gen_slbie, 0x0)), - ("lfd", (gen_lfd, 0x0)), - ("vrlw128", (gen_vrlw128, 0x0)), - ("stfiwx", (gen_stfiwx, 0x0)), - ("divdo.", (gen_divd, 0x401)), - ("bltlr", (gen_bltlr, 0x0)), - ("bgta-", (gen_bgt, 0x200002)), - ("vsubuwm", (gen_vsubuwm, 0x0)), - ("bdnza-", (gen_bdnz, 0x200002)), - ("bdzl+", (gen_bdz, 0x200001)), - ("bca", (gen_bc, 0x2)), - ("bgea-", (gen_bge, 0x200002)), - ("blea+", (gen_ble, 0x200002)), - ("vrfim128", (gen_vrfim128, 0x0)), - ("bgel", (gen_bge, 0x1)), - ("vslb", (gen_vslb, 0x0)), - ("fmsubs", (gen_fmsubs, 0x0)), - ("adde", (gen_adde, 0x0)), - ("lwax", (gen_lwax, 0x0)), - ("blela-", (gen_ble, 0x200003)), - ("b", (gen_b, 0x0)), - ("vnmsubfp128", (gen_vnmsubfp128, 0x0)), - ("xor.", (gen_xor, 0x1)), - ("tdlti", (gen_tdlti, 0x0)), - ("and.", (gen_and, 0x1)), - ("bdz", (gen_bdz, 0x0)), - ("nand", (gen_nand, 0x0)), - ("vupklsh128", (gen_vupklsh128, 0x0)), - ("vminub", (gen_vminub, 0x0)), - ("lbzu", (gen_lbzu, 0x0)), - ("bdza", (gen_bdz, 0x2)), - ("stdx", (gen_stdx, 0x0)), - ("vandc128", (gen_vandc128, 0x0)), - ("vcmpgtfp128.", (gen_vcmpgtfp128, 0x40)), - ("vavguh", (gen_vavguh, 0x0)), - ("vmulosh", (gen_vmulosh, 0x0)), - ("neg", (gen_neg, 0x0)), - ("bcctr+", (gen_bcctr, 0x200000)), - ("bcl", (gen_bc, 0x1)), - ("divwu.", (gen_divwu, 0x1)), - ("bgtl-", (gen_bgt, 0x200001)), - ("or", (gen_or, 0x0)), - ("beq+", (gen_beq, 0x200000)), - ("vmrghh", (gen_vmrghh, 0x0)), - ("rldicr.", (gen_rldicr, 0x1)), - ("bdzfl-", (gen_bdzf, 0x200001)), - ("fres.", (gen_fres, 0x1)), - ("fsel.", (gen_fsel, 0x1)), - ("bltl-", (gen_blt, 0x200001)), - ("clrlslwi.", (gen_clrlslwi, 0x1)), - ("stvlxl", (gen_stvlxl, 0x0)), - ("fadds.", (gen_fadds, 0x1)), - ("lwzx", (gen_lwzx, 0x0)), - ("sradi.", (gen_sradi, 0x1)), - ("cntlzd.", (gen_cntlzd, 0x1)), - ("vsplth", (gen_vsplth, 0x0)), - ("tdnei", (gen_tdnei, 0x0)), - ("mulldo", (gen_mulld, 0x400)), - ("lvrx128", (gen_lvrx128, 0x0)), - ("mfdsisr", (gen_mfdsisr, 0x0)), - ("bdnzta", (gen_bdnzt, 0x2)), - ("bdnzfa", (gen_bdnzf, 0x2)), - ("bdnz+", (gen_bdnz, 0x200000)), - ("vmr", (gen_vmr, 0x0)), - ("srd", (gen_srd, 0x0)), - ("tdge", (gen_tdge, 0x0)), - ("or.", (gen_or, 0x1)), - ("xoris", (gen_xoris, 0x0)), - ("divdu.", (gen_divdu, 0x1)), - ("sth", (gen_sth, 0x0)), - ("vmrghw", (gen_vmrghw, 0x0)), - ("mtsrin", (gen_mtsrin, 0x0)), - ("vaddfp128", (gen_vaddfp128, 0x0)), - ("vpermwi128", (gen_vpermwi128, 0x0)), - ("lvxl", (gen_lvxl, 0x0)), - ("vcmpequb.", (gen_vcmpequb, 0x400)), - ("dststt", (gen_dstst, 0x2000000)), - ("vrfim", (gen_vrfim, 0x0)), - ("vpkd3d128", (gen_vpkd3d128, 0x0)), - ("divw", (gen_divw, 0x0)), - ("lhbrx", (gen_lhbrx, 0x0)), - ("bdza-", (gen_bdz, 0x200002)), - ("andis.", (gen_andis_, 0x0)), - ("addeo", (gen_adde, 0x400)), - ("tweq", (gen_tweq, 0x0)), - ("vupkd3d128", (gen_vupkd3d128, 0x0)), - ("bgtctr+", (gen_bgtctr, 0x200000)), - ("nego", (gen_neg, 0x400)), - ("vavgsh", (gen_vavgsh, 0x0)), - ("twlge", (gen_twlge, 0x0)), - ("blea-", (gen_ble, 0x200002)), - ("vminfp128", (gen_vminfp128, 0x0)), - ("bsoctrl+", (gen_bsoctr, 0x200001)), - ("lfsx", (gen_lfsx, 0x0)), - ("bdnzflrl+", (gen_bdnzflr, 0x200001)), - ("mulhw", (gen_mulhw, 0x0)), - ("cmp", (gen_cmp, 0x0)), - ("andc", (gen_andc, 0x0)), - ("sc", (gen_sc, 0x0)), - ("lvsl", (gen_lvsl, 0x0)), - ("fmadds", (gen_fmadds, 0x0)), - ("mullw", (gen_mullw, 0x0)), - ("neg.", (gen_neg, 0x1)), - ("cmpldi", (gen_cmpldi, 0x0)), - ("addc.", (gen_addc, 0x1)), - ("bdzflrl", (gen_bdzflr, 0x1)), - ("clrlwi", (gen_clrlwi, 0x0)), - ("beq-", (gen_beq, 0x200000)), - ("extsw", (gen_extsw, 0x0)), - ("divdu", (gen_divdu, 0x0)), - ("lvsr128", (gen_lvsr128, 0x0)), - ("subfo", (gen_subf, 0x400)), - ("stfd", (gen_stfd, 0x0)), - ("mtdsisr", (gen_mtdsisr, 0x0)), - ("vand", (gen_vand, 0x0)), - ("addco", (gen_addc, 0x400)), - ("vcmpeqfp", (gen_vcmpeqfp, 0x0)), - ("vmulouh", (gen_vmulouh, 0x0)), - ("bdzfa", (gen_bdzf, 0x2)), - ("divwu", (gen_divwu, 0x0)), - ("vmuleub", (gen_vmuleub, 0x0)), - ("vmaxfp128", (gen_vmaxfp128, 0x0)), - ("divwuo.", (gen_divwu, 0x401)), - ("ld", (gen_ld, 0x0)), - ("stvehx", (gen_stvehx, 0x0)), - ("slwi", (gen_slwi, 0x0)), - ("fmr.", (gen_fmr, 0x1)), - ("vsrb", (gen_vsrb, 0x0)), - ("cmpwi", (gen_cmpwi, 0x0)), - ("stvrxl", (gen_stvrxl, 0x0)), - ("bgtl+", (gen_bgt, 0x200001)), - ("bgectrl+", (gen_bgectr, 0x200001)), - ("mfsrr0", (gen_mfsrr0, 0x0)), - ("bdnzlr", (gen_bdnzlr, 0x0)), - ("bdztlr", (gen_bdztlr, 0x0)), - ("bdztla", (gen_bdzt, 0x3)), - ("subic.", (gen_subic_, 0x0)), - ("lmw", (gen_lmw, 0x0)), - ("lwbrx", (gen_lwbrx, 0x0)), - ("mulldo.", (gen_mulld, 0x401)), - ("bdzlr+", (gen_bdzlr, 0x200000)), - ("mfibatu", (gen_mfibatu, 0x0)), - ("bltctr", (gen_bltctr, 0x0)), - ("bdnzfa-", (gen_bdnzf, 0x200002)), - ("fctidz", (gen_fctidz, 0x0)), - ("vcfsx", (gen_vcfsx, 0x0)), - ("vsr", (gen_vsr, 0x0)), - ("clrrwi", (gen_clrrwi, 0x0)), - ("vmaxsh", (gen_vmaxsh, 0x0)), - ("mfxer", (gen_mfxer, 0x0)), - ("vmhaddshs", (gen_vmhaddshs, 0x0)), - ("vmsumshm", (gen_vmsumshm, 0x0)), - ("fres", (gen_fres, 0x0)), - ("vpkswss", (gen_vpkswss, 0x0)), - ("srw.", (gen_srw, 0x1)), - ("vperm128", (gen_vperm128, 0x0)), - ("bcla+", (gen_bc, 0x200003)), - ("fsub", (gen_fsub, 0x0)), - ("vadduws", (gen_vadduws, 0x0)), - ("bca+", (gen_bc, 0x200002)), - ("frsqrte", (gen_frsqrte, 0x0)), - ("bltctrl", (gen_bltctr, 0x1)), - ("vmulesh", (gen_vmulesh, 0x0)), - ("bnsa", (gen_bns, 0x2)), - ("bge+", (gen_bge, 0x200000)), - ("lhaux", (gen_lhaux, 0x0)), - ("vor128", (gen_vor128, 0x0)), - ("bdnzt", (gen_bdnzt, 0x0)), - ("bclrl+", (gen_bclr, 0x200001)), - ("mulld", (gen_mulld, 0x0)), - ("cmpdi", (gen_cmpdi, 0x0)), - ("vslo", (gen_vslo, 0x0)), - ("sync", (gen_sync, 0x0)), - ("extsb.", (gen_extsb, 0x1)), - ("bdnza", (gen_bdnz, 0x2)), - ("vcmpequh", (gen_vcmpequh, 0x0)), - ("nop", (gen_nop, 0x0)), - ("bnsctrl", (gen_bnsctr, 0x1)), - ("divwuo", (gen_divwu, 0x400)), - ("crnand", (gen_crnand, 0x0)), - ("blela+", (gen_ble, 0x200003)), - ("lvxl128", (gen_lvxl128, 0x0)), - ("bltl+", (gen_blt, 0x200001)), - ("mfsprg", (gen_mfsprg, 0x0)), - ("bgel-", (gen_bge, 0x200001)), - ("ldarx", (gen_ldarx, 0x0)), - ("vsubuws", (gen_vsubuws, 0x0)), - ("beq", (gen_beq, 0x0)), - ("bdzl", (gen_bdz, 0x1)), - ("dstt", (gen_dst, 0x2000000)), - ("fadds", (gen_fadds, 0x0)), - ("dcbt", (gen_dcbt, 0x0)), - ("nand.", (gen_nand, 0x1)), - ("ldu", (gen_ldu, 0x0)), - ("mtfsb1", (gen_mtfsb1, 0x0)), - ("fmr", (gen_fmr, 0x0)), - ("vrlimi128", (gen_vrlimi128, 0x0)), - ("addze.", (gen_addze, 0x1)), - ("fmuls", (gen_fmuls, 0x0)), - ("extsh", (gen_extsh, 0x0)), - ("bnela+", (gen_bne, 0x200003)), - ("vrfin128", (gen_vrfin128, 0x0)), - ("divd", (gen_divd, 0x0)), - ("srawi", (gen_srawi, 0x0)), - ("vrlw", (gen_vrlw, 0x0)), - ("stvewx", (gen_stvewx, 0x0)), - ("vmaddcfp128", (gen_vmaddcfp128, 0x0)), - ("bgtlrl+", (gen_bgtlr, 0x200001)), - ("divduo.", (gen_divdu, 0x401)), - ("extlwi", (gen_extlwi, 0x0)), - ("vsrah", (gen_vsrah, 0x0)), - ("addme.", (gen_addme, 0x1)), - ("bdnz-", (gen_bdnz, 0x200000)), - ("lwz", (gen_lwz, 0x0)), - ("bdnzflrl", (gen_bdnzflr, 0x1)), - ("lha", (gen_lha, 0x0)), - ("stmw", (gen_stmw, 0x0)), - ("vcfsx128", (gen_vcfsx128, 0x0)), - ("vpkuwum128", (gen_vpkuwum128, 0x0)), - ("rotrwi.", (gen_rotrwi, 0x1)), - ("vavgub", (gen_vavgub, 0x0)), - ("bc-", (gen_bc, 0x200000)), - ("vmsum3fp128", (gen_vmsum3fp128, 0x0)), - ("vsubsws", (gen_vsubsws, 0x0)), - ("bdzlrl+", (gen_bdzlr, 0x200001)), - ("bgectrl", (gen_bgectr, 0x1)), - ("xor", (gen_xor, 0x0)), - ("vcmpgtsw.", (gen_vcmpgtsw, 0x400)), - ("vsro", (gen_vsro, 0x0)), - ("stvrx128", (gen_stvrx128, 0x0)), - ("vcfux128", (gen_vcfux128, 0x0)), - ("vctuxs", (gen_vctuxs, 0x0)), - ("bgtctrl+", (gen_bgtctr, 0x200001)), - ("bdnztlr+", (gen_bdnztlr, 0x200000)), - ("srd.", (gen_srd, 0x1)), - ("tw", (gen_tw, 0x0)), - ("cror", (gen_cror, 0x0)), - ("bdnzflr+", (gen_bdnzflr, 0x200000)), - ("dcbtst", (gen_dcbtst, 0x0)), - ("bgtctr", (gen_bgtctr, 0x0)), - ("mtfsb0", (gen_mtfsb0, 0x0)), - ("vsububm", (gen_vsububm, 0x0)), - ("bsolr+", (gen_bsolr, 0x200000)), - ("beqa-", (gen_beq, 0x200002)), - ("subfe.", (gen_subfe, 0x1)), - ("fcmpu", (gen_fcmpu, 0x0)), - ("vcmpgtsb", (gen_vcmpgtsb, 0x0)), - ("subfe", (gen_subfe, 0x0)), - ("vcmpgtfp128", (gen_vcmpgtfp128, 0x0)), - ("fadd.", (gen_fadd, 0x1)), - ("fctidz.", (gen_fctidz, 0x1)), - ("vpkuhus128", (gen_vpkuhus128, 0x0)), - ("fmadds.", (gen_fmadds, 0x1)), - ("dcbst", (gen_dcbst, 0x0)), - ("vmsummbm", (gen_vmsummbm, 0x0)), - ("mtear", (gen_mtear, 0x0)), - ("bgelrl+", (gen_bgelr, 0x200001)), - ("vspltw128", (gen_vspltw128, 0x0)), - ("mcrf", (gen_mcrf, 0x0)), - ("vrefp128", (gen_vrefp128, 0x0)), - ("mtfsfi.", (gen_mtfsfi, 0x1)), - ("lwa", (gen_lwa, 0x0)), - ("vspltisw", (gen_vspltisw, 0x0)), - ("fmsubs.", (gen_fmsubs, 0x1)), - ("mtmsrd", (gen_mtmsrd, 0x0)), - ("lswi", (gen_lswi, 0x0)), - ("extrwi", (gen_extrwi, 0x0)), - ("frsp.", (gen_frsp, 0x1)), - ("vxor128", (gen_vxor128, 0x0)), - ("bnslrl+", (gen_bnslr, 0x200001)), - ("vmsum4fp128", (gen_vmsum4fp128, 0x0)), - ("frsqrte.", (gen_frsqrte, 0x1)), - ("mtsr", (gen_mtsr, 0x0)), - ("ble-", (gen_ble, 0x200000)), - ("fdiv.", (gen_fdiv, 0x1)), - ("bdzfa-", (gen_bdzf, 0x200002)), - ("vminuw", (gen_vminuw, 0x0)), - ("mtfsf", (gen_mtfsf, 0x0)), - ("crnor", (gen_crnor, 0x0)), - ("divwo.", (gen_divw, 0x401)), - ("stvx", (gen_stvx, 0x0)), - ("blel", (gen_ble, 0x1)), - ("vpkswus", (gen_vpkswus, 0x0)), - ("lfsux", (gen_lfsux, 0x0)), - ("addzeo", (gen_addze, 0x400)), - ("extlwi.", (gen_extlwi, 0x1)), - ("fdiv", (gen_fdiv, 0x0)), - ("clrrwi.", (gen_clrrwi, 0x1)), - ("mulhw.", (gen_mulhw, 0x1)), - ("bdnzta-", (gen_bdnzt, 0x200002)), - ("vcmpgtsh.", (gen_vcmpgtsh, 0x400)), - ("bdzflr", (gen_bdzflr, 0x0)), - ("lwarx", (gen_lwarx, 0x0)), - ("ldx", (gen_ldx, 0x0)), - ("rldic", (gen_rldic, 0x0)), - ("fadd", (gen_fadd, 0x0)), - ("bnsctrl+", (gen_bnsctr, 0x200001)), - ("bnelrl", (gen_bnelr, 0x1)), - ("vpkshss", (gen_vpkshss, 0x0)), - ("bnslr", (gen_bnslr, 0x0)), - ("subfzeo", (gen_subfze, 0x400)), - ("bsoctrl", (gen_bsoctr, 0x1)), - ("vmladduhm", (gen_vmladduhm, 0x0)), - ("crset", (gen_crset, 0x0)), - ("fabs.", (gen_fabs, 0x1)), - ("vadduhm", (gen_vadduhm, 0x0)), - ("bdnztlrl", (gen_bdnztlr, 0x1)), - ("ble+", (gen_ble, 0x200000)), - ("bnectrl+", (gen_bnectr, 0x200001)), - ("lhzux", (gen_lhzux, 0x0)), - ("vrlb", (gen_vrlb, 0x0)), - ("mfear", (gen_mfear, 0x0)), - ("vsrab", (gen_vsrab, 0x0)), - ("bgela", (gen_bge, 0x3)), - ("tlbsync", (gen_tlbsync, 0x0)), - ("sradi", (gen_sradi, 0x0)), - ("bdzf-", (gen_bdzf, 0x200000)), - ("vpkswss128", (gen_vpkswss128, 0x0)), - ("rlwinm", (gen_rlwinm, 0x0)), - ("fnabs.", (gen_fnabs, 0x1)), - ("fctiwz", (gen_fctiwz, 0x0)), - ("fnmadd", (gen_fnmadd, 0x0)), - ("fsubs", (gen_fsubs, 0x0)), - ("vspltish", (gen_vspltish, 0x0)), - ("vminsw", (gen_vminsw, 0x0)), - ("lwzux", (gen_lwzux, 0x0)), - ("subfeo", (gen_subfe, 0x400)), - ("eqv", (gen_eqv, 0x0)), - ("bdnztla-", (gen_bdnzt, 0x200003)), - ("vsro128", (gen_vsro128, 0x0)), - ("vcmpgtuh.", (gen_vcmpgtuh, 0x400)), - ("stswi", (gen_stswi, 0x0)), - ("bdnztlr", (gen_bdnztlr, 0x0)), - ("andi.", (gen_andi_, 0x0)), - ("bsoa+", (gen_bso, 0x200002)), - ("bgela+", (gen_bge, 0x200003)), - ("vslo128", (gen_vslo128, 0x0)), - ("vmrglw", (gen_vmrglw, 0x0)), - ("cmpi", (gen_cmpi, 0x0)), - ("vmulfp128", (gen_vmulfp128, 0x0)), - ("bdnzfl", (gen_bdnzf, 0x1)), - ("addmeo.", (gen_addme, 0x401)), + ("stfdu", (gen_stfdu, 0x0)), ("crandc", (gen_crandc, 0x0)), - ("bnsla-", (gen_bns, 0x200003)), - ("slw.", (gen_slw, 0x1)), - ("vcmpequw128.", (gen_vcmpequw128, 0x40)), - ("bsola", (gen_bso, 0x3)), - ("fabs", (gen_fabs, 0x0)), + ("frsqrte", (gen_frsqrte, 0x0)), + ("ps_cmpu0", (gen_ps_cmpu0, 0x0)), + ("mulhdu", (gen_mulhdu, 0x0)), + ("fctiwz.", (gen_fctiwz, 0x1)), + ("mulldo.", (gen_mulld, 0x401)), + ("fmuls.", (gen_fmuls, 0x1)), + ("bgtctr", (gen_bgtctr, 0x0)), + ("bdnza", (gen_bdnz, 0x2)), + ("bnea-", (gen_bne, 0x200002)), + ("lvrxl", (gen_lvrxl, 0x0)), + ("bltctr", (gen_bltctr, 0x0)), + ("mullw.", (gen_mullw, 0x1)), + ("lfsu", (gen_lfsu, 0x0)), + ("bdnzflr+", (gen_bdnzflr, 0x200000)), + ("bcctrl+", (gen_bcctr, 0x200001)), + ("ps_madds0", (gen_ps_madds0, 0x0)), + ("stvxl128", (gen_stvxl128, 0x0)), + ("vmaxub", (gen_vmaxub, 0x0)), + ("vavgub", (gen_vavgub, 0x0)), + ("vmulesb", (gen_vmulesb, 0x0)), + ("bnsctrl", (gen_bnsctr, 0x1)), + ("sthx", (gen_sthx, 0x0)), + ("ps_sum1", (gen_ps_sum1, 0x0)), + ("subf.", (gen_subf, 0x1)), + ("andi.", (gen_andi_, 0x0)), + ("icbi", (gen_icbi, 0x0)), + ("crclr", (gen_crclr, 0x0)), + ("bso", (gen_bso, 0x0)), + ("beqla", (gen_beq, 0x3)), + ("slwi", (gen_slwi, 0x0)), + ("andc", (gen_andc, 0x0)), + ("bnea", (gen_bne, 0x2)), + ("ps_msub", (gen_ps_msub, 0x0)), + ("bdnztlrl", (gen_bdnztlr, 0x1)), + ("bsola+", (gen_bso, 0x200003)), + ("vrlw128", (gen_vrlw128, 0x0)), + ("bgtl+", (gen_bgt, 0x200001)), + ("vcfsx128", (gen_vcfsx128, 0x0)), + ("bgea", (gen_bge, 0x2)), + ("or.", (gen_or, 0x1)), + ("bdnz+", (gen_bdnz, 0x200000)), + ("bltl", (gen_blt, 0x1)), + ("vmaxsb", (gen_vmaxsb, 0x0)), + ("bctr", (gen_bctr, 0x0)), + ("bdnzt+", (gen_bdnzt, 0x200000)), + ("vcmpgtuh", (gen_vcmpgtuh, 0x0)), + ("bnectr+", (gen_bnectr, 0x200000)), + ("dcbzl", (gen_dcbzl, 0x0)), + ("ecowx", (gen_ecowx, 0x0)), + ("bdnzfl-", (gen_bdnzf, 0x200001)), + ("mtibatl", (gen_mtibatl, 0x0)), + ("subfe", (gen_subfe, 0x0)), + ("vor128", (gen_vor128, 0x0)), + ("subis", (gen_subis, 0x0)), + ("orc.", (gen_orc, 0x1)), + ("bdnzf-", (gen_bdnzf, 0x200000)), + ("bgt+", (gen_bgt, 0x200000)), + ("subfze", (gen_subfze, 0x0)), + ("vrlimi128", (gen_vrlimi128, 0x0)), + ("mtfsfi.", (gen_mtfsfi, 0x1)), + ("fsubs.", (gen_fsubs, 0x1)), + ("stfiwx", (gen_stfiwx, 0x0)), + ("bgelrl", (gen_bgelr, 0x1)), + ("vslb", (gen_vslb, 0x0)), + ("vmaxuh", (gen_vmaxuh, 0x0)), + ("ps_merge00", (gen_ps_merge00, 0x0)), + ("vmsumubm", (gen_vmsumubm, 0x0)), + ("cntlzw.", (gen_cntlzw, 0x1)), + ("fneg.", (gen_fneg, 0x1)), + ("vcmpgtfp128", (gen_vcmpgtfp128, 0x0)), + ("cmp", (gen_cmp, 0x0)), + ("extsb.", (gen_extsb, 0x1)), + ("addeo", (gen_adde, 0x400)), + ("stwbrx", (gen_stwbrx, 0x0)), + ("vadduws", (gen_vadduws, 0x0)), + ("bltlr+", (gen_bltlr, 0x200000)), + ("bdzfla-", (gen_bdzf, 0x200003)), + ("mtibatu", (gen_mtibatu, 0x0)), + ("fneg", (gen_fneg, 0x0)), + ("subfic", (gen_subfic, 0x0)), + ("bdnzt", (gen_bdnzt, 0x0)), + ("blelrl+", (gen_blelr, 0x200001)), + ("mfvscr", (gen_mfvscr, 0x0)), + ("mtdbatl", (gen_mtdbatl, 0x0)), + ("ps_nabs", (gen_ps_nabs, 0x0)), + ("vxor128", (gen_vxor128, 0x0)), + ("fcmpu", (gen_fcmpu, 0x0)), + ("mr", (gen_mr, 0x0)), + ("lha", (gen_lha, 0x0)), + ("vctuxs", (gen_vctuxs, 0x0)), + ("vavguw", (gen_vavguw, 0x0)), + ("vspltisb", (gen_vspltisb, 0x0)), + ("bdnzfa+", (gen_bdnzf, 0x200002)), + ("mtfsb0.", (gen_mtfsb0, 0x1)), + ("psq_lx", (gen_psq_lx, 0x0)), + ("fctiwz", (gen_fctiwz, 0x0)), + ("stswx", (gen_stswx, 0x0)), + ("bdza-", (gen_bdz, 0x200002)), + ("beqctr+", (gen_beqctr, 0x200000)), + ("bcctr+", (gen_bcctr, 0x200000)), + ("vmrglw", (gen_vmrglw, 0x0)), + ("ps_merge11", (gen_ps_merge11, 0x0)), + ("rlwimi.", (gen_rlwimi, 0x1)), + ("bdnzf", (gen_bdnzf, 0x0)), + ("clrlslwi", (gen_clrlslwi, 0x0)), + ("bdzfa", (gen_bdzf, 0x2)), + ("vpkuhum128", (gen_vpkuhum128, 0x0)), + ("beq-", (gen_beq, 0x200000)), + ("lfsx", (gen_lfsx, 0x0)), + ("stvrxl128", (gen_stvrxl128, 0x0)), + ("fdivs.", (gen_fdivs, 0x1)), + ("frsp.", (gen_frsp, 0x1)), + ("slw", (gen_slw, 0x0)), + ("bdztlrl+", (gen_bdztlr, 0x200001)), + ("mfdec", (gen_mfdec, 0x0)), + ("vxor", (gen_vxor, 0x0)), + ("bgela-", (gen_bge, 0x200003)), + ("rlwnm", (gen_rlwnm, 0x0)), + ("vcmpgtfp128.", (gen_vcmpgtfp128, 0x40)), + ("bsola-", (gen_bso, 0x200003)), + ("bdzt-", (gen_bdzt, 0x200000)), + ("clrlslwi.", (gen_clrlslwi, 0x1)), + ("lvlx", (gen_lvlx, 0x0)), + ("cmpdi", (gen_cmpdi, 0x0)), + ("bnectrl", (gen_bnectr, 0x1)), + ("mtdbatu", (gen_mtdbatu, 0x0)), + ("rotlw.", (gen_rotlw, 0x1)), + ("vmaxfp128", (gen_vmaxfp128, 0x0)), + ("bdzl", (gen_bdz, 0x1)), + ("vpkuwus", (gen_vpkuwus, 0x0)), + ("ps_res", (gen_ps_res, 0x0)), + ("bcla", (gen_bc, 0x3)), + ("bdz", (gen_bdz, 0x0)), + ("ps_sel", (gen_ps_sel, 0x0)), + ("bso-", (gen_bso, 0x200000)), + ("bgtlr+", (gen_bgtlr, 0x200000)), + ("bsoctrl+", (gen_bsoctr, 0x200001)), + ("divwuo", (gen_divwu, 0x400)), + ("rldicr.", (gen_rldicr, 0x1)), ("mttbl", (gen_mttbl, 0x0)), - ("fcfid", (gen_fcfid, 0x0)), - ("dstst", (gen_dstst, 0x0)), + ("lfsux", (gen_lfsux, 0x0)), + ("ps_add.", (gen_ps_add, 0x1)), + ("divwu.", (gen_divwu, 0x1)), + ("bdzt", (gen_bdzt, 0x0)), + ("bdnztla", (gen_bdnzt, 0x3)), + ("addco", (gen_addc, 0x400)), + ("lfdu", (gen_lfdu, 0x0)), + ("bdzfl", (gen_bdzf, 0x1)), + ("mtfsb1", (gen_mtfsb1, 0x0)), + ("ps_nmadd.", (gen_ps_nmadd, 0x1)), + ("vaddubm", (gen_vaddubm, 0x0)), + ("mulld.", (gen_mulld, 0x1)), + ("srwi", (gen_srwi, 0x0)), + ("mtsprg", (gen_mtsprg, 0x0)), + ("vsububs", (gen_vsububs, 0x0)), + ("mtfsfi", (gen_mtfsfi, 0x0)), + ("vupkd3d128", (gen_vupkd3d128, 0x0)), + ("srad", (gen_srad, 0x0)), + ("vaddcuw", (gen_vaddcuw, 0x0)), + ("stdu", (gen_stdu, 0x0)), + ("bne-", (gen_bne, 0x200000)), + ("beqa-", (gen_beq, 0x200002)), + ("vadduhm", (gen_vadduhm, 0x0)), + ("vpkuwum", (gen_vpkuwum, 0x0)), + ("lvlxl", (gen_lvlxl, 0x0)), + ("vupklsh", (gen_vupklsh, 0x0)), + ("bdzf-", (gen_bdzf, 0x200000)), + ("vsubcuw", (gen_vsubcuw, 0x0)), + ("vcmpgtuw.", (gen_vcmpgtuw, 0x400)), + ("bdnzf+", (gen_bdnzf, 0x200000)), + ("blt+", (gen_blt, 0x200000)), + ("vpkuhum", (gen_vpkuhum, 0x0)), + ("psq_lux", (gen_psq_lux, 0x0)), + ("vminsb", (gen_vminsb, 0x0)), + ("bgtlr", (gen_bgtlr, 0x0)), + ("fmr", (gen_fmr, 0x0)), + ("mullwo.", (gen_mullw, 0x401)), + ("vsubsbs", (gen_vsubsbs, 0x0)), + ("lvxl", (gen_lvxl, 0x0)), + ("fsub", (gen_fsub, 0x0)), + ("vnor128", (gen_vnor128, 0x0)), + ("blta+", (gen_blt, 0x200002)), + ("bdnztlr", (gen_bdnztlr, 0x0)), + ("fres.", (gen_fres, 0x1)), + ("vcmpbfp128.", (gen_vcmpbfp128, 0x40)), + ("bgtlrl", (gen_bgtlr, 0x1)), + ("vadduhs", (gen_vadduhs, 0x0)), + ("ps_muls0", (gen_ps_muls0, 0x0)), + ("bdnzflrl", (gen_bdnzflr, 0x1)), + ("lhau", (gen_lhau, 0x0)), + ("ps_nmsub.", (gen_ps_nmsub, 0x1)), + ("fctidz.", (gen_fctidz, 0x1)), + ("ps_neg.", (gen_ps_neg, 0x1)), + ("mtsr", (gen_mtsr, 0x0)), + ("bdzlr", (gen_bdzlr, 0x0)), + ("mfctr", (gen_mfctr, 0x0)), + ("vmsum3fp128", (gen_vmsum3fp128, 0x0)), + ("divdo.", (gen_divd, 0x401)), + ("bnslr", (gen_bnslr, 0x0)), + ("tdnei", (gen_tdnei, 0x0)), + ("fmadd.", (gen_fmadd, 0x1)), + ("fmsubs.", (gen_fmsubs, 0x1)), + ("vmrglh", (gen_vmrglh, 0x0)), + ("mffs", (gen_mffs, 0x0)), + ("bdzf+", (gen_bdzf, 0x200000)), + ("vrefp128", (gen_vrefp128, 0x0)), + ("vcmpbfp", (gen_vcmpbfp, 0x0)), + ("bnsa-", (gen_bns, 0x200002)), + ("rldcl.", (gen_rldcl, 0x1)), + ("bltlr", (gen_bltlr, 0x0)), + ("sync", (gen_sync, 0x0)), + ("vsldoi", (gen_vsldoi, 0x0)), + ("vmaxsh", (gen_vmaxsh, 0x0)), + ("vpkswus", (gen_vpkswus, 0x0)), + ("bdnzt-", (gen_bdnzt, 0x200000)), + ("stfs", (gen_stfs, 0x0)), + ("bdzlrl", (gen_bdzlr, 0x1)), + ("mtdsisr", (gen_mtdsisr, 0x0)), + ("bdnzfl+", (gen_bdnzf, 0x200001)), + ("cmpli", (gen_cmpli, 0x0)), + ("ps_merge10", (gen_ps_merge10, 0x0)), + ("stswi", (gen_stswi, 0x0)), + ("slbia", (gen_slbia, 0x0)), + ("mfear", (gen_mfear, 0x0)), + ("bdztl", (gen_bdzt, 0x1)), + ("lswx", (gen_lswx, 0x0)), + ("vrsqrtefp", (gen_vrsqrtefp, 0x0)), + ("rldic", (gen_rldic, 0x0)), + ("vmuleub", (gen_vmuleub, 0x0)), + ("vpkuhus128", (gen_vpkuhus128, 0x0)), + ("lwaux", (gen_lwaux, 0x0)), + ("lhzx", (gen_lhzx, 0x0)), + ("nor", (gen_nor, 0x0)), + ("vmhraddshs", (gen_vmhraddshs, 0x0)), + ("addme", (gen_addme, 0x0)), + ("bdzl+", (gen_bdz, 0x200001)), + ("andis.", (gen_andis_, 0x0)), + ("sld", (gen_sld, 0x0)), + ("vsrw", (gen_vsrw, 0x0)), + ("cmpldi", (gen_cmpldi, 0x0)), + ("subfeo", (gen_subfe, 0x400)), + ("vaddubs", (gen_vaddubs, 0x0)), + ("vsubfp", (gen_vsubfp, 0x0)), + ("vcmpgtub.", (gen_vcmpgtub, 0x400)), + ("mtmsrd", (gen_mtmsrd, 0x0)), + ("bnelr+", (gen_bnelr, 0x200000)), + ("mfspr", (gen_mfspr, 0x0)), + ("vavgsw", (gen_vavgsw, 0x0)), + ("fdiv.", (gen_fdiv, 0x1)), + ("nop", (gen_nop, 0x0)), + ("bgtl", (gen_bgt, 0x1)), + ("cmpld", (gen_cmpld, 0x0)), + ("beqla-", (gen_beq, 0x200003)), + ("rotld.", (gen_rotld, 0x1)), + ("fmadds", (gen_fmadds, 0x0)), + ("lvsr128", (gen_lvsr128, 0x0)), + ("blea-", (gen_ble, 0x200002)), + ("ps_merge01.", (gen_ps_merge01, 0x1)), + ("bgta", (gen_bgt, 0x2)), + ("eqv.", (gen_eqv, 0x1)), + ("fmuls", (gen_fmuls, 0x0)), + ("stvx128", (gen_stvx128, 0x0)), + ("beq", (gen_beq, 0x0)), + ("bdnzlrl+", (gen_bdnzlr, 0x200001)), + ("and.", (gen_and, 0x1)), + ("bdzflrl", (gen_bdzflr, 0x1)), + ("td", (gen_td, 0x0)), + ("lbz", (gen_lbz, 0x0)), + ("bdzflr", (gen_bdzflr, 0x0)), + ("vsrah", (gen_vsrah, 0x0)), + ("psq_stx", (gen_psq_stx, 0x0)), + ("neg", (gen_neg, 0x0)), + ("ptesync", (gen_ptesync, 0x0)), + ("vrefp", (gen_vrefp, 0x0)), + ("lvx", (gen_lvx, 0x0)), + ("bnsl-", (gen_bns, 0x200001)), + ("srw.", (gen_srw, 0x1)), + ("bdnzfla-", (gen_bdnzf, 0x200003)), + ("extlwi.", (gen_extlwi, 0x1)), + ("beqlr", (gen_beqlr, 0x0)), + ("vpkshus", (gen_vpkshus, 0x0)), + ("bdza", (gen_bdz, 0x2)), + ("vpkswss", (gen_vpkswss, 0x0)), + ("bsol", (gen_bso, 0x1)), + ("vcfsx", (gen_vcfsx, 0x0)), + ("stwux", (gen_stwux, 0x0)), + ("bdzfa-", (gen_bdzf, 0x200002)), + ("bnsctrl+", (gen_bnsctr, 0x200001)), + ("fmul.", (gen_fmul, 0x1)), + ("bdzta", (gen_bdzt, 0x2)), + ("lvlx128", (gen_lvlx128, 0x0)), + ("tdlti", (gen_tdlti, 0x0)), + ("tw", (gen_tw, 0x0)), + ("vcmpeqfp.", (gen_vcmpeqfp, 0x400)), + ("clrrwi", (gen_clrrwi, 0x0)), + ("vcmpbfp128", (gen_vcmpbfp128, 0x0)), + ("bltla-", (gen_blt, 0x200003)), ("subfme", (gen_subfme, 0x0)), - ("fnmadds", (gen_fnmadds, 0x0)), - ("divd.", (gen_divd, 0x1)), - ("mtfsf.", (gen_mtfsf, 0x1)), + ("twui", (gen_twui, 0x0)), + ("vor", (gen_vor, 0x0)), + ("vsrb", (gen_vsrb, 0x0)), + ("rlwnm.", (gen_rlwnm, 0x1)), + ("bdnzta-", (gen_bdnzt, 0x200002)), + ("vminfp", (gen_vminfp, 0x0)), + ("ps_div.", (gen_ps_div, 0x1)), + ("vmrghb", (gen_vmrghb, 0x0)), + ("vaddfp", (gen_vaddfp, 0x0)), + ("rldcl", (gen_rldcl, 0x0)), + ("bdzf", (gen_bdzf, 0x0)), + ("vupkhsb128", (gen_vupkhsb128, 0x0)), + ("ps_mul", (gen_ps_mul, 0x0)), + ("bdnztlrl+", (gen_bdnztlr, 0x200001)), + ("bso+", (gen_bso, 0x200000)), + ("rldimi.", (gen_rldimi, 0x1)), + ("bnela-", (gen_bne, 0x200003)), + ("bdzla-", (gen_bdz, 0x200003)), + ("ldu", (gen_ldu, 0x0)), + ("fnabs.", (gen_fnabs, 0x1)), + ("bgt", (gen_bgt, 0x0)), + ("dcbf", (gen_dcbf, 0x0)), + ("ps_nmsub", (gen_ps_nmsub, 0x0)), + ("vmsumuhm", (gen_vmsumuhm, 0x0)), + ("stfdx", (gen_stfdx, 0x0)), + ("bclrl", (gen_bclr, 0x1)), + ("vcmpgtub", (gen_vcmpgtub, 0x0)), + ("psq_st", (gen_psq_st, 0x0)), + ("vmrglb", (gen_vmrglb, 0x0)), + ("xoris", (gen_xoris, 0x0)), + ("mulhwu", (gen_mulhwu, 0x0)), + ("mfmsr", (gen_mfmsr, 0x0)), + ("stvlx", (gen_stvlx, 0x0)), + ("fres", (gen_fres, 0x0)), + ("divdo", (gen_divd, 0x400)), + ("neg.", (gen_neg, 0x1)), + ("vpkshus128", (gen_vpkshus128, 0x0)), ("bgtla", (gen_bgt, 0x3)), + ("stvewx", (gen_stvewx, 0x0)), + ("bsolr+", (gen_bsolr, 0x200000)), + ("bnel+", (gen_bne, 0x200001)), + ("bsoa+", (gen_bso, 0x200002)), + ("vmsumuhs", (gen_vmsumuhs, 0x0)), + ("lfdx", (gen_lfdx, 0x0)), + ("nego.", (gen_neg, 0x401)), + ("addo", (gen_add, 0x400)), + ("rlwinm", (gen_rlwinm, 0x0)), + ("vpkshss128", (gen_vpkshss128, 0x0)), + ("mtfsf", (gen_mtfsf, 0x0)), + ("addzeo", (gen_addze, 0x400)), + ("bdz-", (gen_bdz, 0x200000)), ("addc", (gen_addc, 0x0)), ("beqa+", (gen_beq, 0x200002)), - ("rlwnm", (gen_rlwnm, 0x0)), - ("vcmpeqfp128", (gen_vcmpeqfp128, 0x0)), - ("lvx128", (gen_lvx128, 0x0)), - ("mfcr", (gen_mfcr, 0x0)), - ("fsub.", (gen_fsub, 0x1)), - ("vsrh", (gen_vsrh, 0x0)), - ("bgta", (gen_bgt, 0x2)), - ("vmulesb", (gen_vmulesb, 0x0)), - ("mtctr", (gen_mtctr, 0x0)), - ("fneg.", (gen_fneg, 0x1)), - ("vmulosb", (gen_vmulosb, 0x0)), - ("lwsync", (gen_lwsync, 0x0)), - ("srwi.", (gen_srwi, 0x1)), - ("eieio", (gen_eieio, 0x0)), - ("lvewx", (gen_lvewx, 0x0)), - ("vminuh", (gen_vminuh, 0x0)), - ("bnsla", (gen_bns, 0x3)), - ("crmove", (gen_crmove, 0x0)), - ("divw.", (gen_divw, 0x1)), - ("bdzf", (gen_bdzf, 0x0)), - ("dst", (gen_dst, 0x0)), - ("rfi", (gen_rfi, 0x0)), - ("bdzt", (gen_bdzt, 0x0)), - ("mtdbatu", (gen_mtdbatu, 0x0)), - ("vupklpx", (gen_vupklpx, 0x0)), - ("lvlxl", (gen_lvlxl, 0x0)), - ("vcmpgtfp", (gen_vcmpgtfp, 0x0)), - ("mulhdu", (gen_mulhdu, 0x0)), - ("subfme.", (gen_subfme, 0x1)), - ("bdzta+", (gen_bdzt, 0x200002)), - ("addzeo.", (gen_addze, 0x401)), - ("bdztl", (gen_bdzt, 0x1)), - ("bdnzf-", (gen_bdnzf, 0x200000)), - ("mtfsb1.", (gen_mtfsb1, 0x1)), - ("li", (gen_li, 0x0)), - ("lhax", (gen_lhax, 0x0)), - ("beqlrl+", (gen_beqlr, 0x200001)), - ("addeo.", (gen_adde, 0x401)), - ("bsola+", (gen_bso, 0x200003)), - ("tdlnl", (gen_tdlnl, 0x0)), + ("lvsr", (gen_lvsr, 0x0)), + ("vsubuhs", (gen_vsubuhs, 0x0)), + ("rotrwi.", (gen_rotrwi, 0x1)), + ("blela", (gen_ble, 0x3)), + ("fnmadds", (gen_fnmadds, 0x0)), + ("lwz", (gen_lwz, 0x0)), + ("sraw.", (gen_sraw, 0x1)), + ("subf", (gen_subf, 0x0)), + ("vaddsws", (gen_vaddsws, 0x0)), ("lfdux", (gen_lfdux, 0x0)), - ("bnelr+", (gen_bnelr, 0x200000)), - ("dcbz_l", (gen_dcbz_l, 0x0)), - ("cmpli", (gen_cmpli, 0x0)), - ("vupklsb128", (gen_vupklsb128, 0x0)), - ("stdu", (gen_stdu, 0x0)), - ("vand128", (gen_vand128, 0x0)), + ("subfmeo", (gen_subfme, 0x400)), + ("stw", (gen_stw, 0x0)), + ("fmadd", (gen_fmadd, 0x0)), + ("vspltish", (gen_vspltish, 0x0)), + ("mtvscr", (gen_mtvscr, 0x0)), + ("ps_sum1.", (gen_ps_sum1, 0x1)), + ("lhzu", (gen_lhzu, 0x0)), + ("vsububm", (gen_vsububm, 0x0)), + ("rldic.", (gen_rldic, 0x1)), + ("bdz+", (gen_bdz, 0x200000)), + ("vmladduhm", (gen_vmladduhm, 0x0)), + ("mfsrin", (gen_mfsrin, 0x0)), + ("fnmsub.", (gen_fnmsub, 0x1)), + ("mtdar", (gen_mtdar, 0x0)), + ("vpermwi128", (gen_vpermwi128, 0x0)), + ("vlogefp128", (gen_vlogefp128, 0x0)), + ("dcbt", (gen_dcbt, 0x0)), + ("rldcr", (gen_rldcr, 0x0)), + ("fadds.", (gen_fadds, 0x1)), + ("fadd.", (gen_fadd, 0x1)), + ("rotlwi", (gen_rotlwi, 0x0)), + ("bdzfl+", (gen_bdzf, 0x200001)), + ("ble", (gen_ble, 0x0)), + ("vsplth", (gen_vsplth, 0x0)), + ("ps_sum0", (gen_ps_sum0, 0x0)), + ("ps_nmadd", (gen_ps_nmadd, 0x0)), + ("stdcx.", (gen_stdcx_, 0x0)), + ("lwarx", (gen_lwarx, 0x0)), + ("vmrglw128", (gen_vmrglw128, 0x0)), + ("fdivs", (gen_fdivs, 0x0)), + ("adde", (gen_adde, 0x0)), + ("b", (gen_b, 0x0)), + ("slw.", (gen_slw, 0x1)), + ("ps_abs.", (gen_ps_abs, 0x1)), + ("mttbu", (gen_mttbu, 0x0)), + ("mfxer", (gen_mfxer, 0x0)), + ("vpkswus128", (gen_vpkswus128, 0x0)), + ("vcmpequb", (gen_vcmpequb, 0x0)), + ("lwax", (gen_lwax, 0x0)), + ("bdzlrl+", (gen_bdzlr, 0x200001)), + ("mtxer", (gen_mtxer, 0x0)), + ("bsoctr+", (gen_bsoctr, 0x200000)), + ("mtlr", (gen_mtlr, 0x0)), + ("bnsla-", (gen_bns, 0x200003)), + ("blr", (gen_blr, 0x0)), + ("bdnzl", (gen_bdnz, 0x1)), + ("fctiw", (gen_fctiw, 0x0)), + ("vminuh", (gen_vminuh, 0x0)), + ("vrfip", (gen_vrfip, 0x0)), + ("clrlwi", (gen_clrlwi, 0x0)), + ("divw", (gen_divw, 0x0)), + ("add", (gen_add, 0x0)), + ("mtsrr1", (gen_mtsrr1, 0x0)), + ("nand", (gen_nand, 0x0)), + ("lvewx128", (gen_lvewx128, 0x0)), + ("fmadds.", (gen_fmadds, 0x1)), + ("mfsr", (gen_mfsr, 0x0)), + ("stvlx128", (gen_stvlx128, 0x0)), + ("ps_madds1.", (gen_ps_madds1, 0x1)), + ("eqv", (gen_eqv, 0x0)), + ("mfdbatu", (gen_mfdbatu, 0x0)), + ("subfe.", (gen_subfe, 0x1)), ("mtcrf", (gen_mtcrf, 0x0)), + ("fnmsubs", (gen_fnmsubs, 0x0)), + ("bnslr+", (gen_bnslr, 0x200000)), + ("rotlwi.", (gen_rotlwi, 0x1)), + ("frsp", (gen_frsp, 0x0)), + ("fcfid", (gen_fcfid, 0x0)), + ("vnmsubfp", (gen_vnmsubfp, 0x0)), + ("ps_merge00.", (gen_ps_merge00, 0x1)), + ("bne+", (gen_bne, 0x200000)), + ("bnsa", (gen_bns, 0x2)), + ("beqctr", (gen_beqctr, 0x0)), + ("bne", (gen_bne, 0x0)), + ("blel-", (gen_ble, 0x200001)), + ("vminub", (gen_vminub, 0x0)), + ("stvlxl128", (gen_stvlxl128, 0x0)), + ("bge-", (gen_bge, 0x200000)), + ("vrfin", (gen_vrfin, 0x0)), + ("lfd", (gen_lfd, 0x0)), + ("subfzeo", (gen_subfze, 0x400)), + ("cmplwi", (gen_cmplwi, 0x0)), + ("bdnzla", (gen_bdnz, 0x3)), + ("subfze.", (gen_subfze, 0x1)), + ("bdnza+", (gen_bdnz, 0x200002)), + ("vcmpgefp.", (gen_vcmpgefp, 0x400)), + ("divwu", (gen_divwu, 0x0)), + ("bdnzta", (gen_bdnzt, 0x2)), + ("rotrwi", (gen_rotrwi, 0x0)), + ("lvrx", (gen_lvrx, 0x0)), + ("nor.", (gen_nor, 0x1)), + ("vcmpgtsw", (gen_vcmpgtsw, 0x0)), + ("vctsxs128", (gen_vctsxs128, 0x0)), + ("sth", (gen_sth, 0x0)), + ("ps_madds1", (gen_ps_madds1, 0x0)), + ("dcbi", (gen_dcbi, 0x0)), + ("subfo", (gen_subf, 0x400)), + ("srwi.", (gen_srwi, 0x1)), + ("bc-", (gen_bc, 0x200000)), + ("tdi", (gen_tdi, 0x0)), + ("divwuo.", (gen_divwu, 0x401)), + ("cmpwi", (gen_cmpwi, 0x0)), + ("creqv", (gen_creqv, 0x0)), + ("bc", (gen_bc, 0x0)), + ("lvsl", (gen_lvsl, 0x0)), + ("vsrw128", (gen_vsrw128, 0x0)), + ("mullw", (gen_mullw, 0x0)), + ("slwi.", (gen_slwi, 0x1)), + ("bnela+", (gen_bne, 0x200003)), + ("stwu", (gen_stwu, 0x0)), + ("divwo.", (gen_divw, 0x401)), + ("dst", (gen_dst, 0x0)), + ("fdiv", (gen_fdiv, 0x0)), + ("bnsla", (gen_bns, 0x3)), + ("fnmadds.", (gen_fnmadds, 0x1)), + ("fmr.", (gen_fmr, 0x1)), + ("bsol-", (gen_bso, 0x200001)), + ("crnot", (gen_crnot, 0x0)), + ("beqctrl+", (gen_beqctr, 0x200001)), + ("bgtla+", (gen_bgt, 0x200003)), + ("vcmpgefp128.", (gen_vcmpgefp128, 0x40)), + ("ldx", (gen_ldx, 0x0)), + ("bgectrl", (gen_bgectr, 0x1)), + ("cror", (gen_cror, 0x0)), + ("lwzux", (gen_lwzux, 0x0)), + ("lwsync", (gen_lwsync, 0x0)), + ("vmaxuw", (gen_vmaxuw, 0x0)), + ("ble+", (gen_ble, 0x200000)), + ("subic", (gen_subic, 0x0)), + ("vrfiz128", (gen_vrfiz128, 0x0)), + ("vaddsbs", (gen_vaddsbs, 0x0)), + ("divd", (gen_divd, 0x0)), + ("bdnztla+", (gen_bdnzt, 0x200003)), + ("bsolrl+", (gen_bsolr, 0x200001)), + ("bgel+", (gen_bge, 0x200001)), + ("bgectr+", (gen_bgectr, 0x200000)), + ("vpkuhus", (gen_vpkuhus, 0x0)), + ("ps_cmpo0", (gen_ps_cmpo0, 0x0)), + ("vcmpeqfp128", (gen_vcmpeqfp128, 0x0)), + ("bdztlr+", (gen_bdztlr, 0x200000)), + ("bdnz", (gen_bdnz, 0x0)), + ("bnelrl", (gen_bnelr, 0x1)), + ("mulhd", (gen_mulhd, 0x0)), + ("blea+", (gen_ble, 0x200002)), + ("beqlrl+", (gen_beqlr, 0x200001)), + ("bgela", (gen_bge, 0x3)), + ("bgela+", (gen_bge, 0x200003)), + ("blel+", (gen_ble, 0x200001)), + ("mcrxr", (gen_mcrxr, 0x0)), + ("mtdec", (gen_mtdec, 0x0)), + ("twi", (gen_twi, 0x0)), + ("vsro", (gen_vsro, 0x0)), + ("nego", (gen_neg, 0x400)), + ("bgtctr+", (gen_bgtctr, 0x200000)), + ("ps_abs", (gen_ps_abs, 0x0)), + ("bcla-", (gen_bc, 0x200003)), + ("bdnztl-", (gen_bdnzt, 0x200001)), + ("mtsrd", (gen_mtsrd, 0x0)), + ("vmaxsw", (gen_vmaxsw, 0x0)), + ("bdnzfa", (gen_bdnzf, 0x2)), + ("mfsprg", (gen_mfsprg, 0x0)), + ("vmulfp128", (gen_vmulfp128, 0x0)), + ("bnelr", (gen_bnelr, 0x0)), + ("cntlzw", (gen_cntlzw, 0x0)), + ("lvebx", (gen_lvebx, 0x0)), + ("bnsctr", (gen_bnsctr, 0x0)), + ("vaddshs", (gen_vaddshs, 0x0)), + ("extsw", (gen_extsw, 0x0)), + ("mtfsb0", (gen_mtfsb0, 0x0)), + ("ps_nabs.", (gen_ps_nabs, 0x1)), + ("crand", (gen_crand, 0x0)), + ("lfs", (gen_lfs, 0x0)), + ("cntlzd.", (gen_cntlzd, 0x1)), + ("vnmsubfp128", (gen_vnmsubfp128, 0x0)), + ("vctuxs128", (gen_vctuxs128, 0x0)), + ("bdzla+", (gen_bdz, 0x200003)), + ("cntlzd", (gen_cntlzd, 0x0)), + ("tlbie", (gen_tlbie, 0x0)), + ("bdzflr+", (gen_bdzflr, 0x200000)), + ("stfsx", (gen_stfsx, 0x0)), + ("bnel-", (gen_bne, 0x200001)), + ("blta", (gen_blt, 0x2)), + ("vsrab", (gen_vsrab, 0x0)), + ("xor", (gen_xor, 0x0)), + ("andc.", (gen_andc, 0x1)), + ("bsolrl", (gen_bsolr, 0x1)), + ("blela-", (gen_ble, 0x200003)), + ("bltctrl", (gen_bltctr, 0x1)), + ("vcmpgtuh.", (gen_vcmpgtuh, 0x400)), + ("vcmpeqfp", (gen_vcmpeqfp, 0x0)), + ("vrsqrtefp128", (gen_vrsqrtefp128, 0x0)), + ("rfid", (gen_rfid, 0x0)), + ("tdge", (gen_tdge, 0x0)), + ("vandc128", (gen_vandc128, 0x0)), + ("bltl+", (gen_blt, 0x200001)), + ("mfdar", (gen_mfdar, 0x0)), + ("mfsdr1", (gen_mfsdr1, 0x0)), + ("fctid.", (gen_fctid, 0x1)), + ("ldarx", (gen_ldarx, 0x0)), + ("mulhwu.", (gen_mulhwu, 0x1)), + ("mcrfs", (gen_mcrfs, 0x0)), + ("subfco.", (gen_subfc, 0x401)), + ("psq_lu", (gen_psq_lu, 0x0)), + ("addmeo", (gen_addme, 0x400)), + ("ori", (gen_ori, 0x0)), + ("bdnzta+", (gen_bdnzt, 0x200002)), + ("eciwx", (gen_eciwx, 0x0)), + ("bdnztlr+", (gen_bdnztlr, 0x200000)), + ("bclr+", (gen_bclr, 0x200000)), + ("trap", (gen_trap, 0x0)), + ("vsubshs", (gen_vsubshs, 0x0)), + ("vand128", (gen_vand128, 0x0)), + ("clrlwi.", (gen_clrlwi, 0x1)), + ("stmw", (gen_stmw, 0x0)), + ("lbzux", (gen_lbzux, 0x0)), + ("bdnzlrl", (gen_bdnzlr, 0x1)), + ("mffs.", (gen_mffs, 0x1)), + ("lhbrx", (gen_lhbrx, 0x0)), + ("dstst", (gen_dstst, 0x0)), + ("bgelr", (gen_bgelr, 0x0)), + ("vsubuwm", (gen_vsubuwm, 0x0)), + ("ps_madd", (gen_ps_madd, 0x0)), + ("vadduwm", (gen_vadduwm, 0x0)), + ("sthu", (gen_sthu, 0x0)), + ("stvrx", (gen_stvrx, 0x0)), + ("vsel128", (gen_vsel128, 0x0)), + ("beqlr+", (gen_beqlr, 0x200000)), + ("addzeo.", (gen_addze, 0x401)), + ("divd.", (gen_divd, 0x1)), + ("srawi", (gen_srawi, 0x0)), + ("vmsumshs", (gen_vmsumshs, 0x0)), + ("blta-", (gen_blt, 0x200002)), + ("bcla+", (gen_bc, 0x200003)), + ("fnmadd.", (gen_fnmadd, 0x1)), + ("subfme.", (gen_subfme, 0x1)), + ("lhz", (gen_lhz, 0x0)), + ("lbzu", (gen_lbzu, 0x0)), + ("vminfp128", (gen_vminfp128, 0x0)), + ("xori", (gen_xori, 0x0)), + ("vperm128", (gen_vperm128, 0x0)), + ("and", (gen_and, 0x0)), + ("lvrxl128", (gen_lvrxl128, 0x0)), + ("lwzx", (gen_lwzx, 0x0)), + ("ps_muls1", (gen_ps_muls1, 0x0)), + ("vsraw", (gen_vsraw, 0x0)), + ("bctrl", (gen_bctr, 0x1)), + ("divwo", (gen_divw, 0x400)), + ("bdztl-", (gen_bdzt, 0x200001)), + ("blt-", (gen_blt, 0x200000)), + ("extrwi", (gen_extrwi, 0x0)), + ("crxor", (gen_crxor, 0x0)), + ("mfsrr1", (gen_mfsrr1, 0x0)), + ("crnand", (gen_crnand, 0x0)), + ("bnela", (gen_bne, 0x3)), + ("blea", (gen_ble, 0x2)), + ("tweq", (gen_tweq, 0x0)), + ("vsro128", (gen_vsro128, 0x0)), + ("subfeo.", (gen_subfe, 0x401)), + ("bdnzfla", (gen_bdnzf, 0x3)), + ("dstt", (gen_dst, 0x2000000)), + ("fadd", (gen_fadd, 0x0)), + ("twgti", (gen_twgti, 0x0)), + ("stvrxl", (gen_stvrxl, 0x0)), + ("bcl-", (gen_bc, 0x200001)), + ("vcmpgefp128", (gen_vcmpgefp128, 0x0)), + ("stfd", (gen_stfd, 0x0)), + ("ps_mr.", (gen_ps_mr, 0x1)), + ("vrlh", (gen_vrlh, 0x0)), + ("vminsw", (gen_vminsw, 0x0)), + ("vsum4sbs", (gen_vsum4sbs, 0x0)), + ("lwa", (gen_lwa, 0x0)), + ("bdzfla", (gen_bdzf, 0x3)), + ("subfc", (gen_subfc, 0x0)), + ("subfzeo.", (gen_subfze, 0x401)), + ("bdnz-", (gen_bdnz, 0x200000)), + ("vslo128", (gen_vslo128, 0x0)), + ("bgel", (gen_bge, 0x1)), + ("frsqrte.", (gen_frsqrte, 0x1)), + ("lswi", (gen_lswi, 0x0)), + ("fabs", (gen_fabs, 0x0)), + ("ps_mr", (gen_ps_mr, 0x0)), + ("mcrf", (gen_mcrf, 0x0)), + ("divdu", (gen_divdu, 0x0)), + ("ble-", (gen_ble, 0x200000)), + ("vsel", (gen_vsel, 0x0)), + ("vmaddcfp128", (gen_vmaddcfp128, 0x0)), + ("bdnztla-", (gen_bdnzt, 0x200003)), + ("bgta-", (gen_bgt, 0x200002)), + ("mfdbatl", (gen_mfdbatl, 0x0)), + ("stvehx", (gen_stvehx, 0x0)), + ("eieio", (gen_eieio, 0x0)), + ("mullwo", (gen_mullw, 0x400)), + ("stdx", (gen_stdx, 0x0)), + ("srd.", (gen_srd, 0x1)), + ("bcl", (gen_bc, 0x1)), + ("subi", (gen_subi, 0x0)), + ("fnmadd", (gen_fnmadd, 0x0)), + ("vcmpequw", (gen_vcmpequw, 0x0)), + ("vcmpequw128", (gen_vcmpequw128, 0x0)), + ("mtear", (gen_mtear, 0x0)), + ("stfsu", (gen_stfsu, 0x0)), + ("bsol+", (gen_bso, 0x200001)), + ("orc", (gen_orc, 0x0)), + ("subfmeo.", (gen_subfme, 0x401)), + ("cmpl", (gen_cmpl, 0x0)), + ("bdzta-", (gen_bdzt, 0x200002)), + ("addo.", (gen_add, 0x401)), + ("rotld", (gen_rotld, 0x0)), + ("vspltisw128", (gen_vspltisw128, 0x0)), + ("bdnzfa-", (gen_bdnzf, 0x200002)), + ("mtmsr", (gen_mtmsr, 0x0)), + ("slbie", (gen_slbie, 0x0)), + ("bdnzla+", (gen_bdnz, 0x200003)), + ("vupkhpx", (gen_vupkhpx, 0x0)), + ("sradi", (gen_sradi, 0x0)), + ("vspltw", (gen_vspltw, 0x0)), + ("bdzt+", (gen_bdzt, 0x200000)), + ("vcmpgtuw", (gen_vcmpgtuw, 0x0)), + ("stvxl", (gen_stvxl, 0x0)), + ("mtspr", (gen_mtspr, 0x0)), + ("vspltisw", (gen_vspltisw, 0x0)), + ("ps_muls0.", (gen_ps_muls0, 0x1)), + ("vsum4ubs", (gen_vsum4ubs, 0x0)), + ("ps_muls1.", (gen_ps_muls1, 0x1)), + ("psq_l", (gen_psq_l, 0x0)), + ("vspltb", (gen_vspltb, 0x0)), + ("rlwimi", (gen_rlwimi, 0x0)), + ("bgtctrl+", (gen_bgtctr, 0x200001)), + ("beql", (gen_beq, 0x1)), + ("mulhw.", (gen_mulhw, 0x1)), + ("vupkhsh", (gen_vupkhsh, 0x0)), + ("vrfim128", (gen_vrfim128, 0x0)), + ("sraw", (gen_sraw, 0x0)), + ("bgelr+", (gen_bgelr, 0x200000)), + ("rfi", (gen_rfi, 0x0)), + ("addme.", (gen_addme, 0x1)), + ("bdztlr", (gen_bdztlr, 0x0)), + ("vsubuhm", (gen_vsubuhm, 0x0)), + ("psq_stux", (gen_psq_stux, 0x0)), + ("bdnzflrl+", (gen_bdnzflr, 0x200001)), ("fmsub", (gen_fmsub, 0x0)), - ("bnsa-", (gen_bns, 0x200002)), + ("bdzfa+", (gen_bdzf, 0x200002)), + ("bc+", (gen_bc, 0x200000)), + ("fsub.", (gen_fsub, 0x1)), + ("bnelrl+", (gen_bnelr, 0x200001)), + ("vnot", (gen_vnot, 0x0)), + ("vupklsh128", (gen_vupklsh128, 0x0)), + ("bnsl", (gen_bns, 0x1)), + ("cmpw", (gen_cmpw, 0x0)), + ("stdux", (gen_stdux, 0x0)), + ("li", (gen_li, 0x0)), + ("bdza+", (gen_bdz, 0x200002)), + ("bltl-", (gen_blt, 0x200001)), + ("stfdux", (gen_stfdux, 0x0)), + ("ps_sum0.", (gen_ps_sum0, 0x1)), + ("bgta+", (gen_bgt, 0x200002)), + ("vcmpequh.", (gen_vcmpequh, 0x400)), + ("bsoa", (gen_bso, 0x2)), + ("crnor", (gen_crnor, 0x0)), + ("vand", (gen_vand, 0x0)), + ("rlwinm.", (gen_rlwinm, 0x1)), + ("bgectr", (gen_bgectr, 0x0)), + ("stwcx.", (gen_stwcx_, 0x0)), + ("vspltw128", (gen_vspltw128, 0x0)), + ("vupklsb128", (gen_vupklsb128, 0x0)), + ("stvx", (gen_stvx, 0x0)), + ("ps_msub.", (gen_ps_msub, 0x1)), + ("bltlrl", (gen_bltlr, 0x1)), + ("fctidz", (gen_fctidz, 0x0)), + ("lvxl128", (gen_lvxl128, 0x0)), + ("vmrghw128", (gen_vmrghw128, 0x0)), + ("bdzflrl+", (gen_bdzflr, 0x200001)), + ("bgea-", (gen_bge, 0x200002)), + ("fcmpo", (gen_fcmpo, 0x0)), + ("bsola", (gen_bso, 0x3)), + ("lwzu", (gen_lwzu, 0x0)), + ("vmulosb", (gen_vmulosb, 0x0)), + ("subfo.", (gen_subf, 0x401)), + ("vsrh", (gen_vsrh, 0x0)), + ("stvewx128", (gen_stvewx128, 0x0)), + ("addic.", (gen_addic_, 0x0)), + ("vaddfp128", (gen_vaddfp128, 0x0)), + ("blectrl", (gen_blectr, 0x1)), + ("vrfiz", (gen_vrfiz, 0x0)), + ("bnectr", (gen_bnectr, 0x0)), + ("beql+", (gen_beq, 0x200001)), + ("addco.", (gen_addc, 0x401)), + ("vcmpgtsb.", (gen_vcmpgtsb, 0x400)), + ("beqctrl", (gen_beqctr, 0x1)), + ("tlbsync", (gen_tlbsync, 0x0)), + ("icbi.", (gen_icbi, 0x1)), + ("vcmpequw128.", (gen_vcmpequw128, 0x40)), + ("vmsumshm", (gen_vmsumshm, 0x0)), + ("bsoctr", (gen_bsoctr, 0x0)), + ("bge", (gen_bge, 0x0)), + ("bgtl-", (gen_bgt, 0x200001)), + ("vsubuws", (gen_vsubuws, 0x0)), + ("vsraw128", (gen_vsraw128, 0x0)), + ("rldicr", (gen_rldicr, 0x0)), + ("fmsubs", (gen_fmsubs, 0x0)), + ("vcmpgefp", (gen_vcmpgefp, 0x0)), + ("cmpd", (gen_cmpd, 0x0)), + ("rldicl", (gen_rldicl, 0x0)), + ("ldux", (gen_ldux, 0x0)), + ("vcmpequw.", (gen_vcmpequw, 0x400)), + ("vmsummbm", (gen_vmsummbm, 0x0)), + ("mtsdr1", (gen_mtsdr1, 0x0)), + ("ps_madds0.", (gen_ps_madds0, 0x1)), + ("ba", (gen_b, 0x2)), + ("vminuw", (gen_vminuw, 0x0)), + ("beqlrl", (gen_beqlr, 0x1)), + ("fsel.", (gen_fsel, 0x1)), + ("sradi.", (gen_sradi, 0x1)), + ("vcfux", (gen_vcfux, 0x0)), + ("stbu", (gen_stbu, 0x0)), + ("vmsum4fp128", (gen_vmsum4fp128, 0x0)), + ("bnectrl+", (gen_bnectr, 0x200001)), + ("bsolr", (gen_bsolr, 0x0)), + ("vcmpeqfp128.", (gen_vcmpeqfp128, 0x40)), + ("twlge", (gen_twlge, 0x0)), + ("nand.", (gen_nand, 0x1)), + ("stbx", (gen_stbx, 0x0)), + ("bdzfl-", (gen_bdzf, 0x200001)), + ("extsb", (gen_extsb, 0x0)), + ("bcl+", (gen_bc, 0x200001)), + ("mtsrin", (gen_mtsrin, 0x0)), + ("mr.", (gen_mr, 0x1)), + ("lmw", (gen_lmw, 0x0)), + ("psq_stu", (gen_psq_stu, 0x0)), + ("vcmpgtsb", (gen_vcmpgtsb, 0x0)), + ("bgtctrl", (gen_bgtctr, 0x1)), + ("addmeo.", (gen_addme, 0x401)), + ("vmr", (gen_vmr, 0x0)), + ("subic.", (gen_subic_, 0x0)), + ("tdlnl", (gen_tdlnl, 0x0)), + ("vrfim", (gen_vrfim, 0x0)), + ("vpkd3d128", (gen_vpkd3d128, 0x0)), + ("vrfip128", (gen_vrfip128, 0x0)), + ("vupklpx", (gen_vupklpx, 0x0)), + ("vsr", (gen_vsr, 0x0)), + ("stbux", (gen_stbux, 0x0)), + ("fnmsubs.", (gen_fnmsubs, 0x1)), + ("extsw.", (gen_extsw, 0x1)), + ("vcmpequb.", (gen_vcmpequb, 0x400)), + ("fmsub.", (gen_fmsub, 0x1)), + ("vupkhsh128", (gen_vupkhsh128, 0x0)), + ("dststt", (gen_dstst, 0x2000000)), + ("ps_cmpo1", (gen_ps_cmpo1, 0x0)), + ("vpkpx", (gen_vpkpx, 0x0)), + ("bltctr+", (gen_bltctr, 0x200000)), + ("stwx", (gen_stwx, 0x0)), + ("vmaddfp128", (gen_vmaddfp128, 0x0)), + ("bsoctrl", (gen_bsoctr, 0x1)), + ("fctiw.", (gen_fctiw, 0x1)), + ("oris", (gen_oris, 0x0)), + ("subfc.", (gen_subfc, 0x1)), + ("lvlxl128", (gen_lvlxl128, 0x0)), + ("extsh", (gen_extsh, 0x0)), + ("blectr", (gen_blectr, 0x0)), + ("bclr", (gen_bclr, 0x0)), + ("crmove", (gen_crmove, 0x0)), + ("ps_sel.", (gen_ps_sel, 0x1)), + ("mulld", (gen_mulld, 0x0)), + ("lhaux", (gen_lhaux, 0x0)), + ("mftb", (gen_mftb, 0x0)), + ("lis", (gen_lis, 0x0)), + ("mulhd.", (gen_mulhd, 0x1)), + ("vupkhsb", (gen_vupkhsb, 0x0)), + ("mulhw", (gen_mulhw, 0x0)), + ("mfibatu", (gen_mfibatu, 0x0)), + ("beq+", (gen_beq, 0x200000)), + ("bdnzla-", (gen_bdnz, 0x200003)), + ("srawi.", (gen_srawi, 0x1)), + ("fadds", (gen_fadds, 0x0)), + ("vavgsb", (gen_vavgsb, 0x0)), + ("bdnzlr+", (gen_bdnzlr, 0x200000)), + ("vctsxs", (gen_vctsxs, 0x0)), + ("sthbrx", (gen_sthbrx, 0x0)), + ("vslo", (gen_vslo, 0x0)), + ("bcctrl", (gen_bcctr, 0x1)), + ("sthux", (gen_sthux, 0x0)), + ("vsubsws", (gen_vsubsws, 0x0)), + ("extsh.", (gen_extsh, 0x1)), + ("vsum2sws", (gen_vsum2sws, 0x0)), + ("vmaxfp", (gen_vmaxfp, 0x0)), + ("mfdsisr", (gen_mfdsisr, 0x0)), + ("srad.", (gen_srad, 0x1)), + ("vcmpgtfp.", (gen_vcmpgtfp, 0x400)), + ("stvebx", (gen_stvebx, 0x0)), + ("vcmpbfp.", (gen_vcmpbfp, 0x400)), + ("ps_rsqrte.", (gen_ps_rsqrte, 0x1)), + ("lvewx", (gen_lvewx, 0x0)), + ("dcbz_l", (gen_dcbz_l, 0x0)), + ("std", (gen_std, 0x0)), + ("bca+", (gen_bc, 0x200002)), + ("addis", (gen_addis, 0x0)), + ("addc.", (gen_addc, 0x1)), + ("mfsrr0", (gen_mfsrr0, 0x0)), + ("blelr+", (gen_blelr, 0x200000)), + ("vmuleuh", (gen_vmuleuh, 0x0)), + ("clrrwi.", (gen_clrrwi, 0x1)), + ("stfsux", (gen_stfsux, 0x0)), + ("bdzla", (gen_bdz, 0x3)), + ("vexptefp128", (gen_vexptefp128, 0x0)), + ("vmuloub", (gen_vmuloub, 0x0)), + ("addic", (gen_addic, 0x0)), + ("bgelrl+", (gen_bgelr, 0x200001)), + ("divduo.", (gen_divdu, 0x401)), + ("crorc", (gen_crorc, 0x0)), + ("ps_merge11.", (gen_ps_merge11, 0x1)), + ("mulldo", (gen_mulld, 0x400)), + ("bdnzl+", (gen_bdnz, 0x200001)), + ("bdztla+", (gen_bdzt, 0x200003)), + ("bdzlr+", (gen_bdzlr, 0x200000)), + ("bdnzfla+", (gen_bdnzf, 0x200003)), + ("extlwi", (gen_extlwi, 0x0)), + ("bltla", (gen_blt, 0x3)), + ("vslw", (gen_vslw, 0x0)), + ("bnsla+", (gen_bns, 0x200003)), + ("fsubs", (gen_fsubs, 0x0)), + ("fabs.", (gen_fabs, 0x1)), + ("bl", (gen_b, 0x1)), + ("vperm", (gen_vperm, 0x0)), + ("cmpi", (gen_cmpi, 0x0)), + ("sc", (gen_sc, 0x0)), + ("divw.", (gen_divw, 0x1)), + ("bclrl+", (gen_bclr, 0x200001)), + ("bnsa+", (gen_bns, 0x200002)), + ("lvx128", (gen_lvx128, 0x0)), + ("ps_rsqrte", (gen_ps_rsqrte, 0x0)), + ("vrfin128", (gen_vrfin128, 0x0)), + ("divdu.", (gen_divdu, 0x1)), + ("vsumsws", (gen_vsumsws, 0x0)), + ("add.", (gen_add, 0x1)), + ("stvrx128", (gen_stvrx128, 0x0)), + ("bsoa-", (gen_bso, 0x200002)), + ("mflr", (gen_mflr, 0x0)), + ("ps_sub", (gen_ps_sub, 0x0)), + ("rldimi", (gen_rldimi, 0x0)), + ("xor.", (gen_xor, 0x1)), + ("bca", (gen_bc, 0x2)), + ("ps_mul.", (gen_ps_mul, 0x1)), + ("bdnztl+", (gen_bdnzt, 0x200001)), + ("mtctr", (gen_mtctr, 0x0)), + ("beqla+", (gen_beq, 0x200003)), + ("mulhdu.", (gen_mulhdu, 0x1)), + ("mtsrdin", (gen_mtsrdin, 0x0)), + ("vcfux128", (gen_vcfux128, 0x0)), + ("vmrghw", (gen_vmrghw, 0x0)), + ("lwbrx", (gen_lwbrx, 0x0)), + ("vmulosh", (gen_vmulosh, 0x0)), + ("vslw128", (gen_vslw128, 0x0)), + ("vmulouh", (gen_vmulouh, 0x0)), + ("ps_sub.", (gen_ps_sub, 0x1)), + ("vcmpgtsh", (gen_vcmpgtsh, 0x0)), + ("mulli", (gen_mulli, 0x0)), + ("isync", (gen_isync, 0x0)), + ("vcmpgtsw.", (gen_vcmpgtsw, 0x400)), + ("blela+", (gen_ble, 0x200003)), + ("bdnztl", (gen_bdnzt, 0x1)), + ("bdnzflr", (gen_bdnzflr, 0x0)), + ("fsel", (gen_fsel, 0x0)), + ("bla", (gen_b, 0x3)), + ("vavguh", (gen_vavguh, 0x0)), + ("bdnzfl", (gen_bdnzf, 0x1)), + ("vpkswss128", (gen_vpkswss128, 0x0)), + ("ps_madd.", (gen_ps_madd, 0x1)), + ("bgea+", (gen_bge, 0x200002)), + ("vcmpgtsh.", (gen_vcmpgtsh, 0x400)), + ("rotlw", (gen_rotlw, 0x0)), + ("bgt-", (gen_bgt, 0x200000)), + ("vsubfp128", (gen_vsubfp128, 0x0)), + ("rldcr.", (gen_rldcr, 0x1)), + ("dcbz", (gen_dcbz, 0x0)), + ("vrlb", (gen_vrlb, 0x0)), + ("bdztla", (gen_bdzt, 0x3)), + ("vandc", (gen_vandc, 0x0)), + ("mfcr", (gen_mfcr, 0x0)), + ("ps_neg", (gen_ps_neg, 0x0)), + ("lvehx", (gen_lvehx, 0x0)), + ("subfco", (gen_subfc, 0x400)), + ("blectrl+", (gen_blectr, 0x200001)), + ("bgtla-", (gen_bgt, 0x200003)), + ("addze.", (gen_addze, 0x1)), + ("vcmpequh", (gen_vcmpequh, 0x0)), + ("blt", (gen_blt, 0x0)), + ("bns-", (gen_bns, 0x200000)), + ("vexptefp", (gen_vexptefp, 0x0)), + ("blelr", (gen_blelr, 0x0)), + ("bnsl+", (gen_bns, 0x200001)), + ("vpkuwum128", (gen_vpkuwum128, 0x0)), + ("vmhaddshs", (gen_vmhaddshs, 0x0)), + ("bnslrl+", (gen_bnslr, 0x200001)), + ("bns", (gen_bns, 0x0)), + ("dss", (gen_dss, 0x0)), + ("bdztla-", (gen_bdzt, 0x200003)), + ("mtfsb1.", (gen_mtfsb1, 0x1)), + ("addeo.", (gen_adde, 0x401)), + ("beql-", (gen_beq, 0x200001)), + ("rldicl.", (gen_rldicl, 0x1)), + ("dcbst", (gen_dcbst, 0x0)), + ("or", (gen_or, 0x0)), + ("ld", (gen_ld, 0x0)), + ("cmplw", (gen_cmplw, 0x0)), + ("bgectrl+", (gen_bgectr, 0x200001)), + ("blel", (gen_ble, 0x1)), + ("lvsl128", (gen_lvsl128, 0x0)), + ("bltla+", (gen_blt, 0x200003)), + ("bge+", (gen_bge, 0x200000)), + ("fctid", (gen_fctid, 0x0)), + ("sld.", (gen_sld, 0x1)), + ("beqa", (gen_beq, 0x2)), + ("bdzl-", (gen_bdz, 0x200001)), + ("mfibatl", (gen_mfibatl, 0x0)), + ("bnslrl", (gen_bnslr, 0x1)), + ("bgtlrl+", (gen_bgtlr, 0x200001)), + ("vpkuwus128", (gen_vpkuwus128, 0x0)), + ("ps_add", (gen_ps_add, 0x0)), + ("bns+", (gen_bns, 0x200000)), + ("fcfid.", (gen_fcfid, 0x1)), + ("extrwi.", (gen_extrwi, 0x1)), + ("lhax", (gen_lhax, 0x0)), + ("vsl", (gen_vsl, 0x0)), + ("dcbtst", (gen_dcbtst, 0x0)), + ("vpkshss", (gen_vpkshss, 0x0)), + ("fmul", (gen_fmul, 0x0)), + ("vnor", (gen_vnor, 0x0)), + ("bcctr", (gen_bcctr, 0x0)), + ("vmulesh", (gen_vmulesh, 0x0)), + ("bnea+", (gen_bne, 0x200002)), + ("lbzx", (gen_lbzx, 0x0)), + ("vsldoi128", (gen_vsldoi128, 0x0)), + ("bnsctr+", (gen_bnsctr, 0x200000)), + ("lvrx128", (gen_lvrx128, 0x0)), + ("bltlrl+", (gen_bltlr, 0x200001)), + ("ps_div", (gen_ps_div, 0x0)), + ("bdnzlr", (gen_bdnzlr, 0x0)), + ("vminsh", (gen_vminsh, 0x0)), + ("vmrghh", (gen_vmrghh, 0x0)), + ("blelrl", (gen_blelr, 0x1)), + ("vavgsh", (gen_vavgsh, 0x0)), + ("vmaddfp", (gen_vmaddfp, 0x0)), + ("bdzta+", (gen_bdzt, 0x200002)), ("twllei", (gen_twllei, 0x0)), ("vupklsb", (gen_vupklsb, 0x0)), - ("bdztla+", (gen_bdzt, 0x200003)), - ("twgti", (gen_twgti, 0x0)), - ("stvlxl128", (gen_stvlxl128, 0x0)), - ("blt", (gen_blt, 0x0)), - ("bdnzf+", (gen_bdnzf, 0x200000)), - ("vexptefp128", (gen_vexptefp128, 0x0)), - ("vsel128", (gen_vsel128, 0x0)), - ("blela", (gen_ble, 0x3)), - ("vrfiz128", (gen_vrfiz128, 0x0)), - ("trap", (gen_trap, 0x0)), - ("bdztla-", (gen_bdzt, 0x200003)), - ("lhzu", (gen_lhzu, 0x0)), - ("vcmpequw", (gen_vcmpequw, 0x0)), - ("ptesync", (gen_ptesync, 0x0)), - ("stbx", (gen_stbx, 0x0)), - ("bcctrl", (gen_bcctr, 0x1)), - ("vsraw128", (gen_vsraw128, 0x0)), - ("vmsumubm", (gen_vmsumubm, 0x0)), - ("vsububs", (gen_vsububs, 0x0)), - ("subfze", (gen_subfze, 0x0)), - ("mcrfs", (gen_mcrfs, 0x0)), - ("stb", (gen_stb, 0x0)), - ("nego.", (gen_neg, 0x401)), - ("vnot", (gen_vnot, 0x0)), - ("fdivs", (gen_fdivs, 0x0)), - ("vsubsbs", (gen_vsubsbs, 0x0)), - ("vcmpgtuh", (gen_vcmpgtuh, 0x0)), - ("beqctr", (gen_beqctr, 0x0)), - ("bso", (gen_bso, 0x0)), - ("adde.", (gen_adde, 0x1)), - ("mr.", (gen_mr, 0x1)), - ("stwux", (gen_stwux, 0x0)), - ("bgtctrl", (gen_bgtctr, 0x1)), - ("vexptefp", (gen_vexptefp, 0x0)), - ("bgt", (gen_bgt, 0x0)), - ("slwi.", (gen_slwi, 0x1)), - ("vsum2sws", (gen_vsum2sws, 0x0)), - ("add", (gen_add, 0x0)), - ("bge-", (gen_bge, 0x200000)), - ("mtfsfi", (gen_mtfsfi, 0x0)), - ("vspltb", (gen_vspltb, 0x0)), - ("vpkuhum128", (gen_vpkuhum128, 0x0)), - ("vcmpgefp.", (gen_vcmpgefp, 0x400)), - ("mtlr", (gen_mtlr, 0x0)), - ("stfsx", (gen_stfsx, 0x0)), - ("vcmpequb", (gen_vcmpequb, 0x0)), - ("stfs", (gen_stfs, 0x0)), - ("lwzu", (gen_lwzu, 0x0)), - ("extrwi.", (gen_extrwi, 0x1)), - ("stvewx128", (gen_stvewx128, 0x0)), - ("vsubuhs", (gen_vsubuhs, 0x0)), - ("fctid.", (gen_fctid, 0x1)), - ("bdnztla+", (gen_bdnzt, 0x200003)), - ("bdz+", (gen_bdz, 0x200000)), - ("bnectr+", (gen_bnectr, 0x200000)), - ("bne-", (gen_bne, 0x200000)), - ("stbux", (gen_stbux, 0x0)), - ("bdzfl+", (gen_bdzf, 0x200001)), - ("lhz", (gen_lhz, 0x0)), - ("fnmsubs", (gen_fnmsubs, 0x0)), - ("blectr", (gen_blectr, 0x0)), - ("tdi", (gen_tdi, 0x0)), - ("slw", (gen_slw, 0x0)), - ("bc+", (gen_bc, 0x200000)), - ("vpkshus128", (gen_vpkshus128, 0x0)), - ("std", (gen_std, 0x0)), - ("vcmpgefp", (gen_vcmpgefp, 0x0)), - ("bso+", (gen_bso, 0x200000)), - ("subis", (gen_subis, 0x0)), - ("bdnzt+", (gen_bdnzt, 0x200000)), - ("mtsrr0", (gen_mtsrr0, 0x0)), - ("cmpw", (gen_cmpw, 0x0)), - ("mulhwu.", (gen_mulhwu, 0x1)), - ("bdnzf", (gen_bdnzf, 0x0)), - ("bdnzfla", (gen_bdnzf, 0x3)), - ("vmaxsw", (gen_vmaxsw, 0x0)), - ("addic", (gen_addic, 0x0)), - ("fnmsubs.", (gen_fnmsubs, 0x1)), - ("mfsrr1", (gen_mfsrr1, 0x0)), - ("bsoa-", (gen_bso, 0x200002)), - ("vupkhsh128", (gen_vupkhsh128, 0x0)), - ("bdzfla-", (gen_bdzf, 0x200003)), - ("crxor", (gen_crxor, 0x0)), - ("stfdux", (gen_stfdux, 0x0)), - ("addo", (gen_add, 0x400)), - ("vsubuhm", (gen_vsubuhm, 0x0)), - ("lhau", (gen_lhau, 0x0)), - ("bla", (gen_b, 0x3)), - ("vmuloub", (gen_vmuloub, 0x0)), - ("lvlx128", (gen_lvlx128, 0x0)), - ("mtsrdin", (gen_mtsrdin, 0x0)), - ("beqlr+", (gen_beqlr, 0x200000)), - ("bltctr+", (gen_bltctr, 0x200000)), - ("stwcx.", (gen_stwcx_, 0x0)), - ("eciwx", (gen_eciwx, 0x0)), - ("subf", (gen_subf, 0x0)), - ("bne", (gen_bne, 0x0)), - ("sraw.", (gen_sraw, 0x1)), - ("bdzla+", (gen_bdz, 0x200003)), - ("eqv.", (gen_eqv, 0x1)), - ("vrlh", (gen_vrlh, 0x0)), - ("bdzfa+", (gen_bdzf, 0x200002)), - ("bsoa", (gen_bso, 0x2)), - ("nor.", (gen_nor, 0x1)), - ("bdzl-", (gen_bdz, 0x200001)), - ("cntlzd", (gen_cntlzd, 0x0)), - ("fctid", (gen_fctid, 0x0)), - ("bdztl+", (gen_bdzt, 0x200001)), - ("vslw", (gen_vslw, 0x0)), - ("vcmpeqfp128.", (gen_vcmpeqfp128, 0x40)), - ("vaddshs", (gen_vaddshs, 0x0)), - ("vpkuwus128", (gen_vpkuwus128, 0x0)), - ("mullw.", (gen_mullw, 0x1)), - ("vspltisw128", (gen_vspltisw128, 0x0)), - ("bdzta", (gen_bdzt, 0x2)), - ("lfdu", (gen_lfdu, 0x0)), - ("sthux", (gen_sthux, 0x0)), - ("bltla", (gen_blt, 0x3)), - ("bdztlrl+", (gen_bdztlr, 0x200001)), - ("bsol-", (gen_bso, 0x200001)), - ("vcmpbfp.", (gen_vcmpbfp, 0x400)), - ("vupkhsb128", (gen_vupkhsb128, 0x0)), - ("subfze.", (gen_subfze, 0x1)), - ("beql", (gen_beq, 0x1)), - ("vcmpbfp128", (gen_vcmpbfp128, 0x0)), - ("mfsrin", (gen_mfsrin, 0x0)), - ("vsum4shs", (gen_vsum4shs, 0x0)), - ("vmaddfp", (gen_vmaddfp, 0x0)), - ("vaddubm", (gen_vaddubm, 0x0)), - ("stvxl128", (gen_stvxl128, 0x0)), - ("beqa", (gen_beq, 0x2)), - ("bnela-", (gen_bne, 0x200003)), - ("vrfip128", (gen_vrfip128, 0x0)), - ("mtsrr1", (gen_mtsrr1, 0x0)), - ("srawi.", (gen_srawi, 0x1)), - ("bsol+", (gen_bso, 0x200001)), - ("vcfux", (gen_vcfux, 0x0)), - ("vctsxs", (gen_vctsxs, 0x0)), - ("bnslr+", (gen_bnslr, 0x200000)), - ("bgtla-", (gen_bgt, 0x200003)), - ("stfdu", (gen_stfdu, 0x0)), - ("blt-", (gen_blt, 0x200000)), - ("bns+", (gen_bns, 0x200000)), - ("bnectrl", (gen_bnectr, 0x1)), - ("twi", (gen_twi, 0x0)), - ("vxor", (gen_vxor, 0x0)), - ("fnmadds.", (gen_fnmadds, 0x1)), - ("oris", (gen_oris, 0x0)), - ("mfsr", (gen_mfsr, 0x0)), - ("vmsumuhm", (gen_vmsumuhm, 0x0)), - ("bsolr", (gen_bsolr, 0x0)), - ("tlbie", (gen_tlbie, 0x0)), - ("rotld.", (gen_rotld, 0x1)), - ("bnea", (gen_bne, 0x2)), - ("blel+", (gen_ble, 0x200001)), - ("bcla", (gen_bc, 0x3)), - ("bdzlr", (gen_bdzlr, 0x0)), - ("vslh", (gen_vslh, 0x0)), - ("subfco", (gen_subfc, 0x400)), - ("rotrwi", (gen_rotrwi, 0x0)), - ("vperm", (gen_vperm, 0x0)), - ("vcmpgefp128", (gen_vcmpgefp128, 0x0)), - ("lvlx", (gen_lvlx, 0x0)), - ("vcmpequw.", (gen_vcmpequw, 0x400)), - ("rlwnm.", (gen_rlwnm, 0x1)), - ("stdcx.", (gen_stdcx_, 0x0)), - ("mffs.", (gen_mffs, 0x1)), - ("fmadd", (gen_fmadd, 0x0)), - ("fmadd.", (gen_fmadd, 0x1)), - ("vcmpgtsb.", (gen_vcmpgtsb, 0x400)), - ("bgectr", (gen_bgectr, 0x0)), - ("rotlw", (gen_rotlw, 0x0)), - ("bdnzt-", (gen_bdnzt, 0x200000)), - ("bgela-", (gen_bge, 0x200003)), - ("bgea", (gen_bge, 0x2)), - ("bltlrl", (gen_bltlr, 0x1)), - ("twui", (gen_twui, 0x0)), - ("vaddsws", (gen_vaddsws, 0x0)), - ("vlogefp128", (gen_vlogefp128, 0x0)), - ("vsum4ubs", (gen_vsum4ubs, 0x0)), - ("blrl", (gen_blr, 0x1)), - ("vsubshs", (gen_vsubshs, 0x0)), - ("dss", (gen_dss, 0x0)), - ("lbzux", (gen_lbzux, 0x0)), - ("fsel", (gen_fsel, 0x0)), - ("rldicr", (gen_rldicr, 0x0)), - ("beqla", (gen_beq, 0x3)), - ("lvewx128", (gen_lvewx128, 0x0)), - ("srwi", (gen_srwi, 0x0)), - ("mtdar", (gen_mtdar, 0x0)), - ("mfdbatl", (gen_mfdbatl, 0x0)), - ("rotlw.", (gen_rotlw, 0x1)), - ("vcmpequw128", (gen_vcmpequw128, 0x0)), - ("bsolrl", (gen_bsolr, 0x1)), - ("lvrxl", (gen_lvrxl, 0x0)), - ("bdzta-", (gen_bdzt, 0x200002)), - ("vnmsubfp", (gen_vnmsubfp, 0x0)), - ("addo.", (gen_add, 0x401)), - ("lwaux", (gen_lwaux, 0x0)), - ("mtdec", (gen_mtdec, 0x0)), - ("bdnzfa+", (gen_bdnzf, 0x200002)), - ("vcmpgefp128.", (gen_vcmpgefp128, 0x40)), - ("stvxl", (gen_stvxl, 0x0)), - ("cmpld", (gen_cmpld, 0x0)), - ("sld", (gen_sld, 0x0)), - ("cmplwi", (gen_cmplwi, 0x0)), - ("bdzf+", (gen_bdzf, 0x200000)), - ("fnmsub.", (gen_fnmsub, 0x1)), - ("lvsl128", (gen_lvsl128, 0x0)), - ("vminfp", (gen_vminfp, 0x0)), - ("beqctr+", (gen_beqctr, 0x200000)), - ("beqlrl", (gen_beqlr, 0x1)), - ("bdnzta+", (gen_bdnzt, 0x200002)), - ("mullwo", (gen_mullw, 0x400)), - ("vcmpgtub", (gen_vcmpgtub, 0x0)), - ("bctrl", (gen_bctr, 0x1)), - ("mfctr", (gen_mfctr, 0x0)), - ("vmrglh", (gen_vmrglh, 0x0)), - ("vsrw", (gen_vsrw, 0x0)), ("bdnzl-", (gen_bdnz, 0x200001)), - ("mfdec", (gen_mfdec, 0x0)), - ("lvehx", (gen_lvehx, 0x0)), - ("bclr+", (gen_bclr, 0x200000)), - ("beqctrl+", (gen_beqctr, 0x200001)), - ("bdnztl", (gen_bdnzt, 0x1)), - ("stvlx", (gen_stvlx, 0x0)), - ("vmrglb", (gen_vmrglb, 0x0)), - ("vctuxs128", (gen_vctuxs128, 0x0)), - ("bdnztla", (gen_bdnzt, 0x3)), - ("bdnztl+", (gen_bdnzt, 0x200001)), - ("vpkuhus", (gen_vpkuhus, 0x0)), - ("mfmsr", (gen_mfmsr, 0x0)), - ("extsw.", (gen_extsw, 0x1)), - ("stswx", (gen_stswx, 0x0)), - ("addic.", (gen_addic_, 0x0)), - ("sraw", (gen_sraw, 0x0)), - ("bnsl-", (gen_bns, 0x200001)), - ("vcmpgtuw", (gen_vcmpgtuw, 0x0)), - ("dcbf", (gen_dcbf, 0x0)), - ("vnor", (gen_vnor, 0x0)), - ("rldic.", (gen_rldic, 0x1)), - ("blelr", (gen_blelr, 0x0)), - ("icbi", (gen_icbi, 0x0)), - ("bltlr+", (gen_bltlr, 0x200000)), - ("vsel", (gen_vsel, 0x0)), - ("lhzx", (gen_lhzx, 0x0)), - ("subfc.", (gen_subfc, 0x1)), - ("bnsctr", (gen_bnsctr, 0x0)), - ("dcbz", (gen_dcbz, 0x0)), - ("vmsumshs", (gen_vmsumshs, 0x0)), - ("bdztl-", (gen_bdzt, 0x200001)), - ("vsubfp128", (gen_vsubfp128, 0x0)), - ("vmuleuh", (gen_vmuleuh, 0x0)), - ("isync", (gen_isync, 0x0)), - ("stvx128", (gen_stvx128, 0x0)), - ("bdnzfla+", (gen_bdnzf, 0x200003)), - ("vmaxuw", (gen_vmaxuw, 0x0)), - ("blelrl", (gen_blelr, 0x1)), - ("mfvscr", (gen_mfvscr, 0x0)), - ("vsubfp", (gen_vsubfp, 0x0)), - ("vcmpgtsw", (gen_vcmpgtsw, 0x0)), - ("srad", (gen_srad, 0x0)), - ("vrfin", (gen_vrfin, 0x0)), - ("vpkuwus", (gen_vpkuwus, 0x0)), - ("vpkuhum", (gen_vpkuhum, 0x0)), - ("mulld.", (gen_mulld, 0x1)), - ("lvrxl128", (gen_lvrxl128, 0x0)), - ("bdnzflr", (gen_bdnzflr, 0x0)), - ("rldimi.", (gen_rldimi, 0x1)), - ("mullwo.", (gen_mullw, 0x401)), - ("mtsrd", (gen_mtsrd, 0x0)), - ("vcmpbfp", (gen_vcmpbfp, 0x0)), - ("subfo.", (gen_subf, 0x401)), - ("lfsu", (gen_lfsu, 0x0)), - ("bltlrl+", (gen_bltlr, 0x200001)), - ("fsubs.", (gen_fsubs, 0x1)), - ("mulhdu.", (gen_mulhdu, 0x1)), - ("cmpd", (gen_cmpd, 0x0)), - ("bso-", (gen_bso, 0x200000)), - ("ldux", (gen_ldux, 0x0)), + ("vlogefp", (gen_vlogefp, 0x0)), + ("addze", (gen_addze, 0x0)), + ("lhzux", (gen_lhzux, 0x0)), + ("bgel-", (gen_bge, 0x200001)), + ("dssall", (gen_dssall, 0x0)), + ("blectr+", (gen_blectr, 0x200000)), + ("ps_res.", (gen_ps_res, 0x1)), + ("vsum4shs", (gen_vsum4shs, 0x0)), + ("srd", (gen_srd, 0x0)), + ("srw", (gen_srw, 0x0)), + ("vslh", (gen_vslh, 0x0)), + ("bdztl+", (gen_bdzt, 0x200001)), + ("mtsrr0", (gen_mtsrr0, 0x0)), + ("vrlw", (gen_vrlw, 0x0)), + ("ps_merge10.", (gen_ps_merge10, 0x1)), + ("ps_cmpu1", (gen_ps_cmpu1, 0x0)), + ("ps_merge01", (gen_ps_merge01, 0x0)), + ("stb", (gen_stb, 0x0)), ("fnabs", (gen_fnabs, 0x0)), - ("mtspr", (gen_mtspr, 0x0)), - ("mulhd", (gen_mulhd, 0x0)), - ("mtdbatl", (gen_mtdbatl, 0x0)), - ("addmeo", (gen_addme, 0x400)), - ("lbz", (gen_lbz, 0x0)), - ("fctiw.", (gen_fctiw, 0x1)), - ("blta+", (gen_blt, 0x200002)), - ("vupkhsh", (gen_vupkhsh, 0x0)), - ("blectrl+", (gen_blectr, 0x200001)), - ("vsrw128", (gen_vsrw128, 0x0)), - ("rldicl", (gen_rldicl, 0x0)), - ("blt+", (gen_blt, 0x200000)), - ("beql-", (gen_beq, 0x200001)), - ("bclr", (gen_bclr, 0x0)), - ("mfibatl", (gen_mfibatl, 0x0)), - ("mfdar", (gen_mfdar, 0x0)), + ("vcmpgtfp", (gen_vcmpgtfp, 0x0)), + ("stvlxl", (gen_stvlxl, 0x0)), + ("bnel", (gen_bne, 0x1)), ("bdzfla+", (gen_bdzf, 0x200003)), ("bca-", (gen_bc, 0x200002)), - ("vupkhpx", (gen_vupkhpx, 0x0)), - ("stwu", (gen_stwu, 0x0)), - ("mtibatu", (gen_mtibatu, 0x0)), - ("fmul", (gen_fmul, 0x0)), - ("lvsr", (gen_lvsr, 0x0)), - ("vmrglw128", (gen_vmrglw128, 0x0)), - ("vmrghb", (gen_vmrghb, 0x0)), - ("bdzt+", (gen_bdzt, 0x200000)), - ("rldimi", (gen_rldimi, 0x0)), - ("mtibatl", (gen_mtibatl, 0x0)), - ("orc", (gen_orc, 0x0)), - ("rlwimi", (gen_rlwimi, 0x0)), - ("vmhraddshs", (gen_vmhraddshs, 0x0)), - ("vpkswus128", (gen_vpkswus128, 0x0)), - ("dssall", (gen_dssall, 0x0)), - ("vcmpequh.", (gen_vcmpequh, 0x400)), - ("bcctrl+", (gen_bcctr, 0x200001)), - ("crclr", (gen_crclr, 0x0)), - ("vupkhsb", (gen_vupkhsb, 0x0)), - ("vslw128", (gen_vslw128, 0x0)), - ("bnel+", (gen_bne, 0x200001)), - ("vsldoi128", (gen_vsldoi128, 0x0)), - ("stdux", (gen_stdux, 0x0)), - ("bdztlr+", (gen_bdztlr, 0x200000)), - ("addme", (gen_addme, 0x0)), - ("fcmpo", (gen_fcmpo, 0x0)), - ("stfsux", (gen_stfsux, 0x0)), - ("blta-", (gen_blt, 0x200002)), - ("vaddcuw", (gen_vaddcuw, 0x0)), - ("bnea+", (gen_bne, 0x200002)), - ("bgtlr+", (gen_bgtlr, 0x200000)), + ("crset", (gen_crset, 0x0)), + ("bdnza-", (gen_bdnz, 0x200002)), + ("bdztlrl", (gen_bdztlr, 0x1)), + ("bltctrl+", (gen_bltctr, 0x200001)), + ("mtfsf.", (gen_mtfsf, 0x1)), + ("blrl", (gen_blr, 0x1)), + ("addi", (gen_addi, 0x0)), + ("divduo", (gen_divdu, 0x400)), + ("adde.", (gen_adde, 0x1)), + ("fnmsub", (gen_fnmsub, 0x0)), ], }; pub fn assemble(mnemonic: &str, args: &Arguments) -> Result { diff --git a/asm/tests/test_asm.rs b/asm/tests/test_asm.rs index 47e6c87..9a34aa8 100644 --- a/asm/tests/test_asm.rs +++ b/asm/tests/test_asm.rs @@ -1,24 +1,24 @@ -use ppc750cl_asm::*; -use Argument::{None, Signed as S, Unsigned as U}; +use powerpc_asm::*; +use Argument::{None as N, Signed as S, Unsigned as U}; macro_rules! assert_asm { ($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $arg4:expr, $arg5: expr, $code:literal) => {{ assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, $arg4, $arg5]).unwrap(), $code) }}; ($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $arg4:expr, $code:literal) => {{ - assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, $arg4, None]).unwrap(), $code) + assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, $arg4, N]).unwrap(), $code) }}; ($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $code:literal) => {{ - assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, None, None]).unwrap(), $code) + assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, N, N]).unwrap(), $code) }}; ($mnemonic:literal, $arg1:expr, $arg2:expr, $code:literal) => {{ - assert_eq!(assemble($mnemonic, &[$arg1, $arg2, None, None, None]).unwrap(), $code) + assert_eq!(assemble($mnemonic, &[$arg1, $arg2, N, N, N]).unwrap(), $code) }}; ($mnemonic:literal, $arg1:expr, $code:literal) => {{ - assert_eq!(assemble($mnemonic, &[$arg1, None, None, None, None]).unwrap(), $code) + assert_eq!(assemble($mnemonic, &[$arg1, N, N, N, N]).unwrap(), $code) }}; ($mnemonic:literal, $code:literal) => {{ - assert_eq!(assemble($mnemonic, &[None, None, None, None, None]).unwrap(), $code) + assert_eq!(assemble($mnemonic, &[N, N, N, N, N]).unwrap(), $code) }}; } diff --git a/disasm/Cargo.toml b/disasm/Cargo.toml index 67bf234..42b1897 100644 --- a/disasm/Cargo.toml +++ b/disasm/Cargo.toml @@ -1,14 +1,14 @@ [package] -name = "ppc750cl" +name = "powerpc" version.workspace = true edition.workspace = true authors.workspace = true license.workspace = true -description = "Disassembler for PowerPC 750CL" +description = "PowerPC disassembler" readme = "../README.md" keywords.workspace = true repository.workspace = true -documentation = "https://docs.rs/ppc750cl" +documentation = "https://docs.rs/powerpc" rust-version.workspace = true [dependencies] diff --git a/disasm/src/disasm.rs b/disasm/src/disasm.rs index fded851..22abc4e 100644 --- a/disasm/src/disasm.rs +++ b/disasm/src/disasm.rs @@ -1,13 +1,13 @@ -use core::{ - fmt, - fmt::{Display, Formatter, LowerHex}, -}; - use crate::generated::{ - parse_basic, parse_defs, parse_simplified, parse_uses, Arguments, Opcode, EMPTY_ARGS, + parse_basic, parse_defs, parse_simplified, parse_uses, Arguments, Extension, Opcode, EMPTY_ARGS, +}; +use core::{ + fmt::{self, Display, Formatter, LowerHex}, + hash::{Hash, Hasher}, + ops::{BitAnd, BitAndAssign, BitOr, BitOrAssign, Not}, }; -/// A PowerPC 750CL instruction. +/// A PowerPC instruction. #[derive(Default, Copy, Clone, Debug, Eq, PartialEq)] pub struct Ins { pub code: u32, @@ -16,8 +16,9 @@ pub struct Ins { impl Ins { /// Create a new instruction from its raw code. - pub fn new(code: u32) -> Self { - Self { code, op: Opcode::detect(code) } + #[inline] + pub fn new(code: u32, extensions: Extensions) -> Self { + Self { code, op: Opcode::detect(code, extensions) } } /// Parse the instruction into a simplified mnemonic, if any match. @@ -129,6 +130,22 @@ impl Ins { } } +impl Hash for Ins { + #[inline] + fn hash(&self, state: &mut H) { + self.code.hash(state); + } +} + +impl Hash for Opcode { + /// Opcode enum discriminants are not stable. + /// Instead, hash the mnemonic string. + #[inline] + fn hash(&self, state: &mut H) { + self.mnemonic().hash(state); + } +} + macro_rules! field_arg_no_display { ($name:ident, $typ:ident) => { #[derive(Debug, Copy, Clone, Hash, Ord, PartialOrd, Eq, PartialEq)] @@ -336,7 +353,7 @@ impl Display for Argument { } } -/// A parsed PowerPC 750CL instruction. +/// A parsed PowerPC instruction. #[derive(Clone, Debug, Eq, PartialEq)] pub struct ParsedIns { pub mnemonic: &'static str, @@ -344,6 +361,7 @@ pub struct ParsedIns { } impl Default for ParsedIns { + #[inline] fn default() -> Self { Self::new() } @@ -351,6 +369,7 @@ impl Default for ParsedIns { impl ParsedIns { /// An empty parsed instruction. + #[inline] pub const fn new() -> Self { Self { mnemonic: "", args: EMPTY_ARGS } } @@ -412,21 +431,30 @@ impl LowerHex for SignedHexLiteral { pub struct InsIter<'a> { address: u32, + extensions: Extensions, data: &'a [u8], } impl<'a> InsIter<'a> { - pub fn new(data: &'a [u8], address: u32) -> Self { - Self { address, data } + #[inline] + pub fn new(data: &'a [u8], address: u32, extensions: Extensions) -> Self { + Self { address, extensions, data } } + #[inline] pub fn address(&self) -> u32 { self.address } + #[inline] pub fn data(&self) -> &'a [u8] { self.data } + + #[inline] + pub fn extensions(&self) -> Extensions { + self.extensions + } } impl Iterator for InsIter<'_> { @@ -439,10 +467,194 @@ impl Iterator for InsIter<'_> { // SAFETY: The slice is guaranteed to be at least 4 bytes long. let chunk = unsafe { *(self.data.as_ptr() as *const [u8; 4]) }; - let ins = Ins::new(u32::from_be_bytes(chunk)); + let ins = Ins::new(u32::from_be_bytes(chunk), self.extensions); let addr = self.address; self.address += 4; self.data = &self.data[4..]; Some((addr, ins)) } } + +#[derive(Copy, Clone, Debug, PartialEq, Eq, Hash)] +#[repr(transparent)] +pub struct Extensions(u32); + +impl Extensions { + /// Creates an empty set of extensions. + #[inline] + pub const fn none() -> Self { + Self(0) + } + + /// The set of extensions used by the PowerPC 750CXe (Gekko) / 750CL (Broadway) CPUs + /// used in the GameCube and Wii respectively. + #[inline] + pub const fn gekko_broadway() -> Self { + Self::from_bitmask(Extension::PairedSingles.bitmask()) + } + + /// The set of extensions used by the PowerPC Xenon CPU used in the Xbox 360. + #[inline] + pub const fn xenon() -> Self { + Self::from_bitmask( + Extension::Ppc64.bitmask() | Extension::AltiVec.bitmask() | Extension::Vmx128.bitmask(), + ) + } + + /// Checks if the given extension (and all required extensions) are enabled. + #[inline] + pub const fn contains(&self, ext: Extension) -> bool { + let bitmask = ext.bitmask(); + (self.0 & bitmask) == bitmask + } + + /// Checks if the given set of extensions are enabled. + #[inline] + pub const fn contains_all(&self, other: Extensions) -> bool { + (self.0 & other.0) == other.0 + } + + /// Enables the given extension. Implicitly enables all required extensions. + #[inline] + pub const fn insert(&mut self, ext: Extension) { + self.0 |= ext.bitmask(); + } + + /// Disables the given extension. + #[inline] + pub const fn remove(&mut self, ext: Extension) { + // Instead of using bitmask, which includes required extensions, + // we only clear the bit for the specific extension. + self.0 &= !(1 << (ext as u32)); + } + + /// Enables or disables the given extension. + #[inline] + pub const fn set(&mut self, ext: Extension, value: bool) { + if value { + self.insert(ext); + } else { + self.remove(ext); + } + } + + /// Returns whether the extensions set is empty. + #[inline] + pub const fn is_empty(&self) -> bool { + self.0 == 0 + } + + /// Returns the raw bitmask of the extensions. + #[inline] + pub const fn bitmask(&self) -> u32 { + self.0 + } + + /// Creates a set of extensions from a raw bitmask. + #[inline] + pub const fn from_bitmask(bitmask: u32) -> Self { + Self(bitmask) + } + + /// Creates a set of extensions from a single extension (and its required extensions). + #[inline] + pub const fn from_extension(ext: Extension) -> Self { + Self(ext.bitmask()) + } +} + +impl Default for Extensions { + #[inline] + fn default() -> Self { + Self::none() + } +} + +impl From for Extensions { + #[inline] + fn from(ext: Extension) -> Self { + Self::from_extension(ext) + } +} + +impl BitOr for Extensions { + type Output = Extensions; + + #[inline] + fn bitor(self, rhs: Self) -> Self::Output { + Self(self.0 | rhs.0) + } +} + +impl BitOr for Extensions { + type Output = Extensions; + + #[inline] + fn bitor(self, rhs: Extension) -> Self::Output { + Self(self.0 | rhs.bitmask()) + } +} + +impl BitOrAssign for Extensions { + #[inline] + fn bitor_assign(&mut self, rhs: Extension) { + self.0 |= rhs.bitmask(); + } +} + +impl BitAnd for Extensions { + type Output = Extensions; + + #[inline] + fn bitand(self, rhs: Self) -> Self::Output { + Self(self.0 & rhs.0) + } +} + +impl BitAnd for Extensions { + type Output = Extensions; + + #[inline] + fn bitand(self, rhs: Extension) -> Self::Output { + Self(self.0 & rhs.bitmask()) + } +} + +impl BitAndAssign for Extensions { + #[inline] + fn bitand_assign(&mut self, rhs: Extension) { + self.0 &= rhs.bitmask(); + } +} + +impl Not for Extensions { + type Output = Extensions; + + #[inline] + fn not(self) -> Self::Output { + Self(!self.0) + } +} + +impl BitOr for Extension { + type Output = Extensions; + + #[inline] + fn bitor(self, rhs: Self) -> Self::Output { + Extensions(self.bitmask() | rhs.bitmask()) + } +} + +impl Hash for Extension { + #[inline] + fn hash(&self, state: &mut H) { + self.bitmask().hash(state); + } +} + +impl Display for Extension { + #[inline] + fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result { + f.write_str(self.name()) + } +} diff --git a/disasm/src/generated.rs b/disasm/src/generated.rs index c7508f1..f04b70c 100644 --- a/disasm/src/generated.rs +++ b/disasm/src/generated.rs @@ -1,7 +1,37 @@ #![allow(unused)] #![cfg_attr(rustfmt, rustfmt_skip)] -// Code generated by ppc750-genisa. DO NOT EDIT. +// Code generated by powerpc-genisa. DO NOT EDIT. use crate::disasm::*; +#[derive(Copy, Clone, Debug, PartialEq, Eq)] +#[repr(u32)] +pub enum Extension { + /// PowerPC 64-bit + Ppc64, + /// Paired Singles + PairedSingles, + /// AltiVec + AltiVec, + /// VMX128 + Vmx128, +} +impl Extension { + #[inline] + pub const fn bitmask(self) -> u32 { + (1 << (self as u32)) + | match self { + Extension::Vmx128 => Extension::AltiVec.bitmask(), + _ => 0, + } + } + pub const fn name(self) -> &'static str { + match self { + Extension::Ppc64 => "PowerPC 64-bit", + Extension::PairedSingles => "Paired Singles", + Extension::AltiVec => "AltiVec", + Extension::Vmx128 => "VMX128", + } + } +} /// The entry table allows us to quickly find the range of possible opcodes for a /// given 6-bit prefix. 2*64 bytes should fit in a cache line (or two). static OPCODE_ENTRIES: [(u16, u16); 64] = [ @@ -9,545 +39,1146 @@ static OPCODE_ENTRIES: [(u16, u16); 64] = [ (0, 0), (0, 1), (1, 2), - (2, 164), - (164, 189), - (189, 224), - (224, 225), - (225, 226), - (0, 0), - (226, 227), - (227, 228), - (228, 229), - (229, 230), - (230, 231), - (231, 232), - (232, 233), - (233, 234), - (234, 235), - (235, 249), - (249, 250), - (250, 251), - (0, 0), - (251, 252), - (252, 253), - (253, 254), - (254, 255), - (255, 256), - (256, 257), + (2, 197), + (197, 222), + (222, 257), (257, 258), - (258, 264), - (264, 404), - (404, 405), - (405, 406), - (406, 407), - (407, 408), - (408, 409), - (409, 410), - (410, 411), - (411, 412), - (412, 413), - (413, 414), - (414, 415), - (415, 416), - (416, 417), - (417, 418), - (418, 419), - (419, 420), - (420, 421), - (421, 422), - (422, 423), - (423, 424), - (424, 425), - (425, 426), - (426, 427), - (427, 428), + (258, 259), (0, 0), + (259, 260), + (260, 261), + (261, 262), + (262, 263), + (263, 264), + (264, 265), + (265, 266), + (266, 267), + (267, 268), + (268, 282), + (282, 283), + (283, 284), (0, 0), - (428, 431), - (431, 440), - (0, 0), - (0, 0), - (440, 442), - (442, 470), + (284, 285), + (285, 286), + (286, 287), + (287, 288), + (288, 289), + (289, 290), + (290, 291), + (291, 297), + (297, 438), + (438, 439), + (439, 440), + (440, 441), + (441, 442), + (442, 443), + (443, 444), + (444, 445), + (445, 446), + (446, 447), + (447, 448), + (448, 449), + (449, 450), + (450, 451), + (451, 452), + (452, 453), + (453, 454), + (454, 455), + (455, 456), + (456, 457), + (457, 458), + (458, 459), + (459, 460), + (460, 461), + (461, 462), + (462, 463), + (463, 464), + (464, 467), + (467, 476), + (476, 477), + (477, 478), + (478, 480), + (480, 508), ]; +#[derive(Copy, Clone)] +struct OpcodePattern { + bitmask: u32, + pattern: u32, + extensions: Extensions, +} +impl OpcodePattern { + const fn base(bitmask: u32, pattern: u32) -> Self { + Self { + bitmask, + pattern, + extensions: Extensions::none(), + } + } + const fn extension(bitmask: u32, pattern: u32, extension: Extension) -> Self { + Self { + bitmask, + pattern, + extensions: Extensions::from_extension(extension), + } + } +} /// The bitmask and pattern for each opcode. -static OPCODE_PATTERNS: [(u32, u32); 470] = [ - (0xfc000000, 0x8000000), - (0xfc000000, 0xc000000), - (0xffe007ff, 0x100007ec), - (0xfc1fffff, 0x10000604), - (0xffff07ff, 0x10000644), - (0xfc0007ff, 0x10000180), - (0xfc0007ff, 0x1000000a), - (0xfc0007ff, 0x10000300), - (0xfc0007ff, 0x10000340), - (0xfc0007ff, 0x10000380), - (0xfc0007ff, 0x10000000), - (0xfc0007ff, 0x10000200), - (0xfc0007ff, 0x10000040), - (0xfc0007ff, 0x10000240), - (0xfc0007ff, 0x10000080), - (0xfc0007ff, 0x10000280), - (0xfc0007ff, 0x10000404), - (0xfc0007ff, 0x10000444), - (0xfc0007ff, 0x10000502), - (0xfc0007ff, 0x10000542), - (0xfc0007ff, 0x10000582), - (0xfc0007ff, 0x10000402), - (0xfc0007ff, 0x10000442), - (0xfc0007ff, 0x10000482), - (0xfc0007ff, 0x1000034a), - (0xfc0007ff, 0x1000030a), - (0xfc0003ff, 0x100003c6), - (0xfc0003ff, 0x100000c6), - (0xfc0003ff, 0x10000006), - (0xfc0003ff, 0x10000046), - (0xfc0003ff, 0x10000086), - (0xfc0003ff, 0x100001c6), - (0xfc0003ff, 0x100002c6), - (0xfc0003ff, 0x10000306), - (0xfc0003ff, 0x10000346), - (0xfc0003ff, 0x10000386), - (0xfc0003ff, 0x10000206), - (0xfc0003ff, 0x10000246), - (0xfc0003ff, 0x10000286), - (0xfc0007ff, 0x100003ca), - (0xfc0007ff, 0x1000038a), - (0xfc1f07ff, 0x1000018a), - (0xfc1f07ff, 0x100001ca), - (0xfc00003f, 0x1000002e), - (0xfc0007ff, 0x1000040a), - (0xfc0007ff, 0x10000102), - (0xfc0007ff, 0x10000142), - (0xfc0007ff, 0x10000182), - (0xfc0007ff, 0x10000002), - (0xfc0007ff, 0x10000042), - (0xfc0007ff, 0x10000082), - (0xfc00003f, 0x10000020), - (0xfc00003f, 0x10000021), - (0xfc0007ff, 0x1000044a), - (0xfc0007ff, 0x10000302), - (0xfc0007ff, 0x10000342), - (0xfc0007ff, 0x10000382), - (0xfc0007ff, 0x10000202), - (0xfc0007ff, 0x10000242), - (0xfc0007ff, 0x10000282), - (0xfc00003f, 0x10000022), - (0xfc0007ff, 0x1000000c), - (0xfc0007ff, 0x1000004c), - (0xfc0007ff, 0x1000008c), - (0xfc0007ff, 0x1000010c), - (0xfc0007ff, 0x1000014c), - (0xfc0007ff, 0x1000018c), - (0xfc00003f, 0x10000025), - (0xfc00003f, 0x10000028), - (0xfc00003f, 0x10000029), - (0xfc00003f, 0x10000024), - (0xfc00003f, 0x10000026), - (0xfc00003f, 0x10000027), - (0xfc0007ff, 0x10000308), - (0xfc0007ff, 0x10000348), - (0xfc0007ff, 0x10000208), - (0xfc0007ff, 0x10000248), - (0xfc0007ff, 0x10000108), - (0xfc0007ff, 0x10000148), - (0xfc0007ff, 0x10000008), - (0xfc0007ff, 0x10000048), - (0xfc00003f, 0x1000002f), - (0xfc0007ff, 0x10000504), - (0xfc0007ff, 0x10000484), - (0xfc00003f, 0x1000002b), - (0xfc0007ff, 0x1000030e), - (0xfc0007ff, 0x1000018e), - (0xfc0007ff, 0x1000010e), - (0xfc0007ff, 0x100001ce), - (0xfc0007ff, 0x1000014e), - (0xfc0007ff, 0x1000000e), - (0xfc0007ff, 0x1000008e), - (0xfc0007ff, 0x1000004e), - (0xfc0007ff, 0x100000ce), - (0xfc1f07ff, 0x1000010a), - (0xfc1f07ff, 0x100002ca), - (0xfc1f07ff, 0x1000020a), - (0xfc1f07ff, 0x1000028a), - (0xfc1f07ff, 0x1000024a), - (0xfc0007ff, 0x10000004), - (0xfc0007ff, 0x10000044), - (0xfc0007ff, 0x10000084), - (0xfc1f07ff, 0x1000014a), - (0xfc00003f, 0x1000002a), - (0xfc0007ff, 0x100001c4), - (0xfc0007ff, 0x10000104), - (0xfc00043f, 0x1000002c), - (0xfc0007ff, 0x10000144), - (0xfc0007ff, 0x1000040c), - (0xfc0007ff, 0x10000184), - (0xfc0007ff, 0x1000020c), - (0xfc0007ff, 0x1000024c), - (0xfc00ffff, 0x1000030c), - (0xfc00ffff, 0x1000034c), - (0xfc00ffff, 0x1000038c), - (0xfc0007ff, 0x1000028c), - (0xfc0007ff, 0x100002c4), - (0xfc0007ff, 0x10000304), - (0xfc0007ff, 0x10000344), - (0xfc0007ff, 0x10000384), - (0xfc0007ff, 0x10000204), - (0xfc0007ff, 0x10000244), - (0xfc0007ff, 0x1000044c), - (0xfc0007ff, 0x10000284), - (0xfc0007ff, 0x10000580), - (0xfc0007ff, 0x1000004a), - (0xfc0007ff, 0x10000700), - (0xfc0007ff, 0x10000740), - (0xfc0007ff, 0x10000780), - (0xfc0007ff, 0x10000400), - (0xfc0007ff, 0x10000600), - (0xfc0007ff, 0x10000440), - (0xfc0007ff, 0x10000640), - (0xfc0007ff, 0x10000480), - (0xfc0007ff, 0x10000680), - (0xfc0007ff, 0x10000788), - (0xfc0007ff, 0x10000688), - (0xfc0007ff, 0x10000708), - (0xfc0007ff, 0x10000648), - (0xfc0007ff, 0x10000608), - (0xfc1f07ff, 0x1000034e), - (0xfc1f07ff, 0x1000020e), - (0xfc1f07ff, 0x1000024e), - (0xfc1f07ff, 0x100003ce), - (0xfc1f07ff, 0x1000028e), - (0xfc1f07ff, 0x100002ce), - (0xfc0007ff, 0x100004c4), - (0xfc0007f3, 0x10000083), - (0xfc0007f3, 0x10000403), - (0xfc0007f3, 0x10000603), - (0xfc0007f3, 0x10000443), - (0xfc0007f3, 0x10000643), - (0xfc0007f3, 0x10000003), - (0xfc0007f3, 0x10000043), - (0xfc0007f3, 0x100000c3), - (0xfc0007f3, 0x100002c3), - (0xfc0007f3, 0x10000183), - (0xfc0007f3, 0x10000503), - (0xfc0007f3, 0x10000703), - (0xfc0007f3, 0x10000543), - (0xfc0007f3, 0x10000743), - (0xfc0007f3, 0x100001c3), - (0xfc0007f3, 0x100003c3), - (0xfc000010, 0x10000010), - (0xfc0003d0, 0x14000010), - (0xfc0003d0, 0x14000210), - (0xfc0003d0, 0x14000250), - (0xfc0003d0, 0x14000110), - (0xfc0003d0, 0x140000d0), - (0xfc0003d0, 0x14000190), - (0xfc0003d0, 0x140001d0), - (0xfc0003d0, 0x14000090), - (0xfc0003d0, 0x14000150), - (0xfc0003d0, 0x14000290), - (0xfc0003d0, 0x140002d0), - (0xfc000210, 0x14000000), - (0xfc0003d0, 0x14000200), - (0xfc0003d0, 0x14000240), - (0xfc0003d0, 0x14000280), - (0xfc0003d0, 0x140002c0), - (0xfc0003d0, 0x14000300), - (0xfc0003d0, 0x14000340), - (0xfc0003d0, 0x14000380), - (0xfc0003d0, 0x140003c0), - (0xfc0003d0, 0x14000350), - (0xfc0003d0, 0x14000390), - (0xfc0003d0, 0x140003d0), - (0xfc0003d0, 0x14000050), - (0xfc0003d0, 0x14000310), - (0xfc0007f0, 0x18000230), - (0xfc0007f0, 0x18000270), - (0xfc000390, 0x18000180), - (0xfc000390, 0x18000000), - (0xfc000390, 0x18000200), - (0xfc000390, 0x18000080), - (0xfc000390, 0x18000100), - (0xfc0007f0, 0x180002b0), - (0xfc0007f0, 0x180002f0), - (0xfc1f07f0, 0x180006b0), - (0xfc1f07f0, 0x180006f0), - (0xfc0003d0, 0x18000280), - (0xfc0003d0, 0x180002c0), - (0xfc0003d0, 0x18000300), - (0xfc0003d0, 0x18000340), - (0xfc000630, 0x18000210), - (0xfc000730, 0x18000610), - (0xfc1f07f0, 0x18000630), - (0xfc1f07f0, 0x18000330), - (0xfc1f07f0, 0x18000370), - (0xfc1f07f0, 0x180003b0), - (0xfc1f07f0, 0x180003f0), - (0xfc000730, 0x18000710), - (0xfc0003d0, 0x18000050), - (0xfc1f07f0, 0x18000670), - (0xfc0003d0, 0x180000d0), - (0xfc0007f0, 0x18000770), - (0xfc0007f0, 0x18000730), - (0xfc0003d0, 0x18000150), - (0xfc0003d0, 0x180001d0), - (0xfc0007f0, 0x180007f0), - (0xfc1f07f0, 0x18000380), - (0xfc1f07f0, 0x180007a0), - (0xfc1f07f0, 0x180003c0), - (0xfc1f07f0, 0x180007e0), - (0xfc000000, 0x1c000000), - (0xfc000000, 0x20000000), - (0xfc400000, 0x28000000), - (0xfc400000, 0x2c000000), - (0xfc000000, 0x30000000), - (0xfc000000, 0x34000000), - (0xfc000000, 0x38000000), - (0xfc000000, 0x3c000000), - (0xfc000000, 0x40000000), - (0xffffffff, 0x44000002), - (0xfc000000, 0x48000000), - (0xfc00fffe, 0x4c000420), - (0xfc00fffe, 0x4c000020), - (0xfc0007ff, 0x4c000202), - (0xfc0007ff, 0x4c000102), - (0xfc0007ff, 0x4c000242), - (0xfc0007ff, 0x4c0001c2), - (0xfc0007ff, 0x4c000042), - (0xfc0007ff, 0x4c000382), - (0xfc0007ff, 0x4c000342), - (0xfc0007ff, 0x4c000182), - (0xffffffff, 0x4c00012c), - (0xfc63ffff, 0x4c000000), - (0xffffffff, 0x4c000064), - (0xffffffff, 0x4c000024), - (0xfc000000, 0x50000000), - (0xfc000000, 0x54000000), - (0xfc000000, 0x5c000000), - (0xfc000000, 0x60000000), - (0xfc000000, 0x64000000), - (0xfc000000, 0x68000000), - (0xfc000000, 0x6c000000), - (0xfc000000, 0x70000000), - (0xfc000000, 0x74000000), - (0xfc00001e, 0x78000010), - (0xfc00001e, 0x78000012), - (0xfc00001c, 0x78000008), - (0xfc00001c, 0x78000000), - (0xfc00001c, 0x78000004), - (0xfc00001c, 0x7800000c), - (0xfc0003fe, 0x7c000214), - (0xfc0003fe, 0x7c000014), - (0xfc0003fe, 0x7c000114), - (0xfc00fbfe, 0x7c0001d4), - (0xfc00fbfe, 0x7c000194), - (0xfc0007fe, 0x7c000038), - (0xfc0007fe, 0x7c000078), - (0xfc4007ff, 0x7c000000), - (0xfc4007ff, 0x7c000040), - (0xfc00fffe, 0x7c000074), - (0xfc00fffe, 0x7c000034), - (0xffe007ff, 0x7c0000ac), - (0xffe007ff, 0x7c0003ac), - (0xffe007ff, 0x7c00006c), - (0xffe007ff, 0x7c00022c), - (0xffe007ff, 0x7c0001ec), - (0xffe007ff, 0x7c0007ec), - (0xfc0003fe, 0x7c0003d2), - (0xfc0003fe, 0x7c000392), - (0xfc0003fe, 0x7c0003d6), - (0xfc0003fe, 0x7c000396), - (0xfc0007ff, 0x7c00026c), - (0xfc0007ff, 0x7c00036c), - (0xffffffff, 0x7c0006ac), - (0xfc0007fe, 0x7c000238), - (0xfc00fffe, 0x7c000774), - (0xfc00fffe, 0x7c000734), - (0xfc00fffe, 0x7c0007b4), - (0xffe007fe, 0x7c0007ac), - (0xfc0007ff, 0x7c0000ee), - (0xfc0007ff, 0x7c0000ae), - (0xfc0007ff, 0x7c0000a8), - (0xfc0007ff, 0x7c00006a), - (0xfc0007ff, 0x7c00002a), - (0xfc0007ff, 0x7c0004ee), - (0xfc0007ff, 0x7c0004ae), - (0xfc0007ff, 0x7c00046e), - (0xfc0007ff, 0x7c00042e), - (0xfc0007ff, 0x7c0002ee), - (0xfc0007ff, 0x7c0002ae), - (0xfc0007ff, 0x7c00062c), - (0xfc0007ff, 0x7c00026e), - (0xfc0007ff, 0x7c00022e), - (0xfc0007ff, 0x7c0004aa), - (0xfc0007ff, 0x7c00042a), - (0xfc0007ff, 0x7c000028), - (0xfc0007ff, 0x7c0002ea), - (0xfc0007ff, 0x7c0002aa), - (0xfc0007ff, 0x7c00042c), - (0xfc0007ff, 0x7c00006e), - (0xfc0007ff, 0x7c00002e), - (0xfc7fffff, 0x7c000400), - (0xfc1fffff, 0x7c000026), - (0xfc1fffff, 0x7c0000a6), - (0xfc0007ff, 0x7c0002a6), - (0xfc10ffff, 0x7c0004a6), - (0xfc1f07ff, 0x7c000526), - (0xfc0007ff, 0x7c0002e6), - (0xfc100fff, 0x7c000120), - (0xfc1fffff, 0x7c000124), - (0xfc1effff, 0x7c000164), - (0xfc0007ff, 0x7c0003a6), - (0xfc10ffff, 0x7c0001a4), - (0xfc10ffff, 0x7c0000a4), - (0xfc1f07ff, 0x7c0000e4), - (0xfc1f07ff, 0x7c0001e4), - (0xfc0007fe, 0x7c000092), - (0xfc0007fe, 0x7c000012), - (0xfc0007fe, 0x7c000096), - (0xfc0007fe, 0x7c000016), - (0xfc0003fe, 0x7c0001d2), - (0xfc0003fe, 0x7c0001d6), - (0xfc0007fe, 0x7c0003b8), - (0xfc00fbfe, 0x7c0000d0), - (0xfc0007fe, 0x7c0000f8), - (0xfc0007fe, 0x7c000378), - (0xfc0007fe, 0x7c000338), - (0xffffffff, 0x7c0003e4), - (0xffff07ff, 0x7c000364), - (0xfc0007fe, 0x7c000036), - (0xfc0007fe, 0x7c000030), - (0xfc0007fe, 0x7c000634), - (0xfc0007fc, 0x7c000674), - (0xfc0007fe, 0x7c000630), - (0xfc0007fe, 0x7c000670), - (0xfc0007fe, 0x7c000436), - (0xfc0007fe, 0x7c000430), - (0xfc0007ff, 0x7c0001ee), - (0xfc0007ff, 0x7c0001ae), - (0xfc0007ff, 0x7c0001ad), - (0xfc0007ff, 0x7c00016a), - (0xfc0007ff, 0x7c00012a), - (0xfc0007ff, 0x7c0005ee), - (0xfc0007ff, 0x7c0005ae), - (0xfc0007ff, 0x7c0007ae), - (0xfc0007ff, 0x7c00056e), - (0xfc0007ff, 0x7c00052e), - (0xfc0007ff, 0x7c00072c), - (0xfc0007ff, 0x7c00036e), - (0xfc0007ff, 0x7c00032e), - (0xfc0007ff, 0x7c0005aa), - (0xfc0007ff, 0x7c00052a), - (0xfc0007ff, 0x7c00052c), - (0xfc0007ff, 0x7c00012d), - (0xfc0007ff, 0x7c00016e), - (0xfc0007ff, 0x7c00012e), - (0xfc0003fe, 0x7c000050), - (0xfc0003fe, 0x7c000010), - (0xfc0003fe, 0x7c000110), - (0xfc00fbfe, 0x7c0001d0), - (0xfc00fbfe, 0x7c000190), - (0xff9fffff, 0x7c0004ac), - (0xfc0007ff, 0x7c000088), - (0xffff07ff, 0x7c000264), - (0xffffffff, 0x7c00046c), - (0xfc0007ff, 0x7c000008), - (0xfc0007fe, 0x7c000278), - (0xfd9fffff, 0x7c00066c), - (0xfd8007ff, 0x7c0002ac), - (0xfd8007ff, 0x7c0002ec), - (0xfc0007ff, 0x7c00000e), - (0xfc0007ff, 0x7c00004e), - (0xfc0007ff, 0x7c00008e), - (0xfc0007ff, 0x7c00040e), - (0xfc0007ff, 0x7c00060e), - (0xfc0007ff, 0x7c00044e), - (0xfc0007ff, 0x7c00064e), - (0xfc0007ff, 0x7c00000c), - (0xfc0007ff, 0x7c00004c), - (0xfc0007ff, 0x7c0000ce), - (0xfc0007ff, 0x7c0002ce), - (0xfc0007ff, 0x7c00010e), - (0xfc0007ff, 0x7c00014e), - (0xfc0007ff, 0x7c00018e), - (0xfc0007ff, 0x7c00050e), - (0xfc0007ff, 0x7c00070e), - (0xfc0007ff, 0x7c00054e), - (0xfc0007ff, 0x7c00074e), - (0xfc0007ff, 0x7c0001ce), - (0xfc0007ff, 0x7c0003ce), - (0xfc000000, 0x80000000), - (0xfc000000, 0x84000000), - (0xfc000000, 0x88000000), - (0xfc000000, 0x8c000000), - (0xfc000000, 0x90000000), - (0xfc000000, 0x94000000), - (0xfc000000, 0x98000000), - (0xfc000000, 0x9c000000), - (0xfc000000, 0xa0000000), - (0xfc000000, 0xa4000000), - (0xfc000000, 0xa8000000), - (0xfc000000, 0xac000000), - (0xfc000000, 0xb0000000), - (0xfc000000, 0xb4000000), - (0xfc000000, 0xb8000000), - (0xfc000000, 0xbc000000), - (0xfc000000, 0xc0000000), - (0xfc000000, 0xc4000000), - (0xfc000000, 0xc8000000), - (0xfc000000, 0xcc000000), - (0xfc000000, 0xd0000000), - (0xfc000000, 0xd4000000), - (0xfc000000, 0xd8000000), - (0xfc000000, 0xdc000000), - (0xfc000003, 0xe8000000), - (0xfc000003, 0xe8000001), - (0xfc000003, 0xe8000002), - (0xfc0007fe, 0xec00002a), - (0xfc0007fe, 0xec000024), - (0xfc00003e, 0xec00003a), - (0xfc00003e, 0xec000038), - (0xfc00f83e, 0xec000032), - (0xfc00003e, 0xec00003e), - (0xfc00003e, 0xec00003c), - (0xfc1f07fe, 0xec000030), - (0xfc0007fe, 0xec000028), - (0xfc000003, 0xf8000000), - (0xfc000003, 0xf8000001), - (0xfc1f07fe, 0xfc000210), - (0xfc0007fe, 0xfc00002a), - (0xfc1f07fe, 0xfc00069c), - (0xfc6007ff, 0xfc000040), - (0xfc6007ff, 0xfc000000), - (0xfc1f07fe, 0xfc00065c), - (0xfc1f07fe, 0xfc00065e), - (0xfc1f07fe, 0xfc00001c), - (0xfc1f07fe, 0xfc00001e), - (0xfc0007fe, 0xfc000024), - (0xfc00003e, 0xfc00003a), - (0xfc1f07fe, 0xfc000090), - (0xfc00003e, 0xfc000038), - (0xfc00f83e, 0xfc000032), - (0xfc1f07fe, 0xfc000110), - (0xfc1f07fe, 0xfc000050), - (0xfc00003e, 0xfc00003e), - (0xfc00003e, 0xfc00003c), - (0xfc1f07fe, 0xfc000018), - (0xfc1f07fe, 0xfc000034), - (0xfc00003e, 0xfc00002e), - (0xfc0007fe, 0xfc000028), - (0xfc63ffff, 0xfc000080), - (0xfc1ffffe, 0xfc00048e), - (0xfc1ffffe, 0xfc00008c), - (0xfc1ffffe, 0xfc00004c), - (0xfe0107fe, 0xfc00058e), - (0xfc7f0ffe, 0xfc00010c), +static OPCODE_PATTERNS: [OpcodePattern; 508] = [ + // tdi + OpcodePattern::extension(0xfc000000, 0x8000000, Extension::Ppc64), + // twi + OpcodePattern::base(0xfc000000, 0xc000000), + // dcbz_l + OpcodePattern::extension(0xffe007ff, 0x100007ec, Extension::PairedSingles), + // psq_lux + OpcodePattern::extension(0xfc00007f, 0x1000004c, Extension::PairedSingles), + // psq_lx + OpcodePattern::extension(0xfc00007f, 0x1000000c, Extension::PairedSingles), + // psq_stux + OpcodePattern::extension(0xfc00007f, 0x1000004e, Extension::PairedSingles), + // psq_stx + OpcodePattern::extension(0xfc00007f, 0x1000000e, Extension::PairedSingles), + // ps_abs + OpcodePattern::extension(0xfc1f07fe, 0x10000210, Extension::PairedSingles), + // ps_add + OpcodePattern::extension(0xfc0007fe, 0x1000002a, Extension::PairedSingles), + // ps_cmpo0 + OpcodePattern::extension(0xfc6007ff, 0x10000040, Extension::PairedSingles), + // ps_cmpo1 + OpcodePattern::extension(0xfc6007ff, 0x100000c0, Extension::PairedSingles), + // ps_cmpu0 + OpcodePattern::extension(0xfc6007ff, 0x10000000, Extension::PairedSingles), + // ps_cmpu1 + OpcodePattern::extension(0xfc6007ff, 0x10000080, Extension::PairedSingles), + // ps_div + OpcodePattern::extension(0xfc0007fe, 0x10000024, Extension::PairedSingles), + // ps_madd + OpcodePattern::extension(0xfc00003e, 0x1000003a, Extension::PairedSingles), + // ps_madds0 + OpcodePattern::extension(0xfc00003e, 0x1000001c, Extension::PairedSingles), + // ps_madds1 + OpcodePattern::extension(0xfc00003e, 0x1000001e, Extension::PairedSingles), + // ps_merge00 + OpcodePattern::extension(0xfc0007fe, 0x10000420, Extension::PairedSingles), + // ps_merge01 + OpcodePattern::extension(0xfc0007fe, 0x10000460, Extension::PairedSingles), + // ps_merge10 + OpcodePattern::extension(0xfc0007fe, 0x100004a0, Extension::PairedSingles), + // ps_merge11 + OpcodePattern::extension(0xfc0007fe, 0x100004e0, Extension::PairedSingles), + // ps_mr + OpcodePattern::extension(0xfc1f07fe, 0x10000090, Extension::PairedSingles), + // ps_msub + OpcodePattern::extension(0xfc00003e, 0x10000038, Extension::PairedSingles), + // ps_mul + OpcodePattern::extension(0xfc00f83e, 0x10000032, Extension::PairedSingles), + // ps_muls0 + OpcodePattern::extension(0xfc00f83e, 0x10000018, Extension::PairedSingles), + // ps_muls1 + OpcodePattern::extension(0xfc00f83e, 0x1000001a, Extension::PairedSingles), + // ps_nabs + OpcodePattern::extension(0xfc1f07fe, 0x10000110, Extension::PairedSingles), + // ps_neg + OpcodePattern::extension(0xfc1f07fe, 0x10000050, Extension::PairedSingles), + // ps_nmadd + OpcodePattern::extension(0xfc00003e, 0x1000003e, Extension::PairedSingles), + // ps_nmsub + OpcodePattern::extension(0xfc00003e, 0x1000003c, Extension::PairedSingles), + // ps_res + OpcodePattern::extension(0xfc1f07fe, 0x10000030, Extension::PairedSingles), + // ps_rsqrte + OpcodePattern::extension(0xfc1f07fe, 0x10000034, Extension::PairedSingles), + // ps_sel + OpcodePattern::extension(0xfc00003e, 0x1000002e, Extension::PairedSingles), + // ps_sub + OpcodePattern::extension(0xfc0007fe, 0x10000028, Extension::PairedSingles), + // ps_sum0 + OpcodePattern::extension(0xfc00003e, 0x10000014, Extension::PairedSingles), + // ps_sum1 + OpcodePattern::extension(0xfc00003e, 0x10000016, Extension::PairedSingles), + // mfvscr + OpcodePattern::extension(0xfc1fffff, 0x10000604, Extension::AltiVec), + // mtvscr + OpcodePattern::extension(0xffff07ff, 0x10000644, Extension::AltiVec), + // vaddcuw + OpcodePattern::extension(0xfc0007ff, 0x10000180, Extension::AltiVec), + // vaddfp + OpcodePattern::extension(0xfc0007ff, 0x1000000a, Extension::AltiVec), + // vaddsbs + OpcodePattern::extension(0xfc0007ff, 0x10000300, Extension::AltiVec), + // vaddshs + OpcodePattern::extension(0xfc0007ff, 0x10000340, Extension::AltiVec), + // vaddsws + OpcodePattern::extension(0xfc0007ff, 0x10000380, Extension::AltiVec), + // vaddubm + OpcodePattern::extension(0xfc0007ff, 0x10000000, Extension::AltiVec), + // vaddubs + OpcodePattern::extension(0xfc0007ff, 0x10000200, Extension::AltiVec), + // vadduhm + OpcodePattern::extension(0xfc0007ff, 0x10000040, Extension::AltiVec), + // vadduhs + OpcodePattern::extension(0xfc0007ff, 0x10000240, Extension::AltiVec), + // vadduwm + OpcodePattern::extension(0xfc0007ff, 0x10000080, Extension::AltiVec), + // vadduws + OpcodePattern::extension(0xfc0007ff, 0x10000280, Extension::AltiVec), + // vand + OpcodePattern::extension(0xfc0007ff, 0x10000404, Extension::AltiVec), + // vandc + OpcodePattern::extension(0xfc0007ff, 0x10000444, Extension::AltiVec), + // vavgsb + OpcodePattern::extension(0xfc0007ff, 0x10000502, Extension::AltiVec), + // vavgsh + OpcodePattern::extension(0xfc0007ff, 0x10000542, Extension::AltiVec), + // vavgsw + OpcodePattern::extension(0xfc0007ff, 0x10000582, Extension::AltiVec), + // vavgub + OpcodePattern::extension(0xfc0007ff, 0x10000402, Extension::AltiVec), + // vavguh + OpcodePattern::extension(0xfc0007ff, 0x10000442, Extension::AltiVec), + // vavguw + OpcodePattern::extension(0xfc0007ff, 0x10000482, Extension::AltiVec), + // vcfsx + OpcodePattern::extension(0xfc0007ff, 0x1000034a, Extension::AltiVec), + // vcfux + OpcodePattern::extension(0xfc0007ff, 0x1000030a, Extension::AltiVec), + // vcmpbfp + OpcodePattern::extension(0xfc0003ff, 0x100003c6, Extension::AltiVec), + // vcmpeqfp + OpcodePattern::extension(0xfc0003ff, 0x100000c6, Extension::AltiVec), + // vcmpequb + OpcodePattern::extension(0xfc0003ff, 0x10000006, Extension::AltiVec), + // vcmpequh + OpcodePattern::extension(0xfc0003ff, 0x10000046, Extension::AltiVec), + // vcmpequw + OpcodePattern::extension(0xfc0003ff, 0x10000086, Extension::AltiVec), + // vcmpgefp + OpcodePattern::extension(0xfc0003ff, 0x100001c6, Extension::AltiVec), + // vcmpgtfp + OpcodePattern::extension(0xfc0003ff, 0x100002c6, Extension::AltiVec), + // vcmpgtsb + OpcodePattern::extension(0xfc0003ff, 0x10000306, Extension::AltiVec), + // vcmpgtsh + OpcodePattern::extension(0xfc0003ff, 0x10000346, Extension::AltiVec), + // vcmpgtsw + OpcodePattern::extension(0xfc0003ff, 0x10000386, Extension::AltiVec), + // vcmpgtub + OpcodePattern::extension(0xfc0003ff, 0x10000206, Extension::AltiVec), + // vcmpgtuh + OpcodePattern::extension(0xfc0003ff, 0x10000246, Extension::AltiVec), + // vcmpgtuw + OpcodePattern::extension(0xfc0003ff, 0x10000286, Extension::AltiVec), + // vctsxs + OpcodePattern::extension(0xfc0007ff, 0x100003ca, Extension::AltiVec), + // vctuxs + OpcodePattern::extension(0xfc0007ff, 0x1000038a, Extension::AltiVec), + // vexptefp + OpcodePattern::extension(0xfc1f07ff, 0x1000018a, Extension::AltiVec), + // vlogefp + OpcodePattern::extension(0xfc1f07ff, 0x100001ca, Extension::AltiVec), + // vmaddfp + OpcodePattern::extension(0xfc00003f, 0x1000002e, Extension::AltiVec), + // vmaxfp + OpcodePattern::extension(0xfc0007ff, 0x1000040a, Extension::AltiVec), + // vmaxsb + OpcodePattern::extension(0xfc0007ff, 0x10000102, Extension::AltiVec), + // vmaxsh + OpcodePattern::extension(0xfc0007ff, 0x10000142, Extension::AltiVec), + // vmaxsw + OpcodePattern::extension(0xfc0007ff, 0x10000182, Extension::AltiVec), + // vmaxub + OpcodePattern::extension(0xfc0007ff, 0x10000002, Extension::AltiVec), + // vmaxuh + OpcodePattern::extension(0xfc0007ff, 0x10000042, Extension::AltiVec), + // vmaxuw + OpcodePattern::extension(0xfc0007ff, 0x10000082, Extension::AltiVec), + // vmhaddshs + OpcodePattern::extension(0xfc00003f, 0x10000020, Extension::AltiVec), + // vmhraddshs + OpcodePattern::extension(0xfc00003f, 0x10000021, Extension::AltiVec), + // vminfp + OpcodePattern::extension(0xfc0007ff, 0x1000044a, Extension::AltiVec), + // vminsb + OpcodePattern::extension(0xfc0007ff, 0x10000302, Extension::AltiVec), + // vminsh + OpcodePattern::extension(0xfc0007ff, 0x10000342, Extension::AltiVec), + // vminsw + OpcodePattern::extension(0xfc0007ff, 0x10000382, Extension::AltiVec), + // vminub + OpcodePattern::extension(0xfc0007ff, 0x10000202, Extension::AltiVec), + // vminuh + OpcodePattern::extension(0xfc0007ff, 0x10000242, Extension::AltiVec), + // vminuw + OpcodePattern::extension(0xfc0007ff, 0x10000282, Extension::AltiVec), + // vmladduhm + OpcodePattern::extension(0xfc00003f, 0x10000022, Extension::AltiVec), + // vmrghb + OpcodePattern::extension(0xfc0007ff, 0x1000000c, Extension::AltiVec), + // vmrghh + OpcodePattern::extension(0xfc0007ff, 0x1000004c, Extension::AltiVec), + // vmrghw + OpcodePattern::extension(0xfc0007ff, 0x1000008c, Extension::AltiVec), + // vmrglb + OpcodePattern::extension(0xfc0007ff, 0x1000010c, Extension::AltiVec), + // vmrglh + OpcodePattern::extension(0xfc0007ff, 0x1000014c, Extension::AltiVec), + // vmrglw + OpcodePattern::extension(0xfc0007ff, 0x1000018c, Extension::AltiVec), + // vmsummbm + OpcodePattern::extension(0xfc00003f, 0x10000025, Extension::AltiVec), + // vmsumshm + OpcodePattern::extension(0xfc00003f, 0x10000028, Extension::AltiVec), + // vmsumshs + OpcodePattern::extension(0xfc00003f, 0x10000029, Extension::AltiVec), + // vmsumubm + OpcodePattern::extension(0xfc00003f, 0x10000024, Extension::AltiVec), + // vmsumuhm + OpcodePattern::extension(0xfc00003f, 0x10000026, Extension::AltiVec), + // vmsumuhs + OpcodePattern::extension(0xfc00003f, 0x10000027, Extension::AltiVec), + // vmulesb + OpcodePattern::extension(0xfc0007ff, 0x10000308, Extension::AltiVec), + // vmulesh + OpcodePattern::extension(0xfc0007ff, 0x10000348, Extension::AltiVec), + // vmuleub + OpcodePattern::extension(0xfc0007ff, 0x10000208, Extension::AltiVec), + // vmuleuh + OpcodePattern::extension(0xfc0007ff, 0x10000248, Extension::AltiVec), + // vmulosb + OpcodePattern::extension(0xfc0007ff, 0x10000108, Extension::AltiVec), + // vmulosh + OpcodePattern::extension(0xfc0007ff, 0x10000148, Extension::AltiVec), + // vmuloub + OpcodePattern::extension(0xfc0007ff, 0x10000008, Extension::AltiVec), + // vmulouh + OpcodePattern::extension(0xfc0007ff, 0x10000048, Extension::AltiVec), + // vnmsubfp + OpcodePattern::extension(0xfc00003f, 0x1000002f, Extension::AltiVec), + // vnor + OpcodePattern::extension(0xfc0007ff, 0x10000504, Extension::AltiVec), + // vor + OpcodePattern::extension(0xfc0007ff, 0x10000484, Extension::AltiVec), + // vperm + OpcodePattern::extension(0xfc00003f, 0x1000002b, Extension::AltiVec), + // vpkpx + OpcodePattern::extension(0xfc0007ff, 0x1000030e, Extension::AltiVec), + // vpkshss + OpcodePattern::extension(0xfc0007ff, 0x1000018e, Extension::AltiVec), + // vpkshus + OpcodePattern::extension(0xfc0007ff, 0x1000010e, Extension::AltiVec), + // vpkswss + OpcodePattern::extension(0xfc0007ff, 0x100001ce, Extension::AltiVec), + // vpkswus + OpcodePattern::extension(0xfc0007ff, 0x1000014e, Extension::AltiVec), + // vpkuhum + OpcodePattern::extension(0xfc0007ff, 0x1000000e, Extension::AltiVec), + // vpkuhus + OpcodePattern::extension(0xfc0007ff, 0x1000008e, Extension::AltiVec), + // vpkuwum + OpcodePattern::extension(0xfc0007ff, 0x1000004e, Extension::AltiVec), + // vpkuwus + OpcodePattern::extension(0xfc0007ff, 0x100000ce, Extension::AltiVec), + // vrefp + OpcodePattern::extension(0xfc1f07ff, 0x1000010a, Extension::AltiVec), + // vrfim + OpcodePattern::extension(0xfc1f07ff, 0x100002ca, Extension::AltiVec), + // vrfin + OpcodePattern::extension(0xfc1f07ff, 0x1000020a, Extension::AltiVec), + // vrfip + OpcodePattern::extension(0xfc1f07ff, 0x1000028a, Extension::AltiVec), + // vrfiz + OpcodePattern::extension(0xfc1f07ff, 0x1000024a, Extension::AltiVec), + // vrlb + OpcodePattern::extension(0xfc0007ff, 0x10000004, Extension::AltiVec), + // vrlh + OpcodePattern::extension(0xfc0007ff, 0x10000044, Extension::AltiVec), + // vrlw + OpcodePattern::extension(0xfc0007ff, 0x10000084, Extension::AltiVec), + // vrsqrtefp + OpcodePattern::extension(0xfc1f07ff, 0x1000014a, Extension::AltiVec), + // vsel + OpcodePattern::extension(0xfc00003f, 0x1000002a, Extension::AltiVec), + // vsl + OpcodePattern::extension(0xfc0007ff, 0x100001c4, Extension::AltiVec), + // vslb + OpcodePattern::extension(0xfc0007ff, 0x10000104, Extension::AltiVec), + // vsldoi + OpcodePattern::extension(0xfc00043f, 0x1000002c, Extension::AltiVec), + // vslh + OpcodePattern::extension(0xfc0007ff, 0x10000144, Extension::AltiVec), + // vslo + OpcodePattern::extension(0xfc0007ff, 0x1000040c, Extension::AltiVec), + // vslw + OpcodePattern::extension(0xfc0007ff, 0x10000184, Extension::AltiVec), + // vspltb + OpcodePattern::extension(0xfc0007ff, 0x1000020c, Extension::AltiVec), + // vsplth + OpcodePattern::extension(0xfc0007ff, 0x1000024c, Extension::AltiVec), + // vspltisb + OpcodePattern::extension(0xfc00ffff, 0x1000030c, Extension::AltiVec), + // vspltish + OpcodePattern::extension(0xfc00ffff, 0x1000034c, Extension::AltiVec), + // vspltisw + OpcodePattern::extension(0xfc00ffff, 0x1000038c, Extension::AltiVec), + // vspltw + OpcodePattern::extension(0xfc0007ff, 0x1000028c, Extension::AltiVec), + // vsr + OpcodePattern::extension(0xfc0007ff, 0x100002c4, Extension::AltiVec), + // vsrab + OpcodePattern::extension(0xfc0007ff, 0x10000304, Extension::AltiVec), + // vsrah + OpcodePattern::extension(0xfc0007ff, 0x10000344, Extension::AltiVec), + // vsraw + OpcodePattern::extension(0xfc0007ff, 0x10000384, Extension::AltiVec), + // vsrb + OpcodePattern::extension(0xfc0007ff, 0x10000204, Extension::AltiVec), + // vsrh + OpcodePattern::extension(0xfc0007ff, 0x10000244, Extension::AltiVec), + // vsro + OpcodePattern::extension(0xfc0007ff, 0x1000044c, Extension::AltiVec), + // vsrw + OpcodePattern::extension(0xfc0007ff, 0x10000284, Extension::AltiVec), + // vsubcuw + OpcodePattern::extension(0xfc0007ff, 0x10000580, Extension::AltiVec), + // vsubfp + OpcodePattern::extension(0xfc0007ff, 0x1000004a, Extension::AltiVec), + // vsubsbs + OpcodePattern::extension(0xfc0007ff, 0x10000700, Extension::AltiVec), + // vsubshs + OpcodePattern::extension(0xfc0007ff, 0x10000740, Extension::AltiVec), + // vsubsws + OpcodePattern::extension(0xfc0007ff, 0x10000780, Extension::AltiVec), + // vsububm + OpcodePattern::extension(0xfc0007ff, 0x10000400, Extension::AltiVec), + // vsububs + OpcodePattern::extension(0xfc0007ff, 0x10000600, Extension::AltiVec), + // vsubuhm + OpcodePattern::extension(0xfc0007ff, 0x10000440, Extension::AltiVec), + // vsubuhs + OpcodePattern::extension(0xfc0007ff, 0x10000640, Extension::AltiVec), + // vsubuwm + OpcodePattern::extension(0xfc0007ff, 0x10000480, Extension::AltiVec), + // vsubuws + OpcodePattern::extension(0xfc0007ff, 0x10000680, Extension::AltiVec), + // vsumsws + OpcodePattern::extension(0xfc0007ff, 0x10000788, Extension::AltiVec), + // vsum2sws + OpcodePattern::extension(0xfc0007ff, 0x10000688, Extension::AltiVec), + // vsum4sbs + OpcodePattern::extension(0xfc0007ff, 0x10000708, Extension::AltiVec), + // vsum4shs + OpcodePattern::extension(0xfc0007ff, 0x10000648, Extension::AltiVec), + // vsum4ubs + OpcodePattern::extension(0xfc0007ff, 0x10000608, Extension::AltiVec), + // vupkhpx + OpcodePattern::extension(0xfc1f07ff, 0x1000034e, Extension::AltiVec), + // vupkhsb + OpcodePattern::extension(0xfc1f07ff, 0x1000020e, Extension::AltiVec), + // vupkhsh + OpcodePattern::extension(0xfc1f07ff, 0x1000024e, Extension::AltiVec), + // vupklpx + OpcodePattern::extension(0xfc1f07ff, 0x100003ce, Extension::AltiVec), + // vupklsb + OpcodePattern::extension(0xfc1f07ff, 0x1000028e, Extension::AltiVec), + // vupklsh + OpcodePattern::extension(0xfc1f07ff, 0x100002ce, Extension::AltiVec), + // vxor + OpcodePattern::extension(0xfc0007ff, 0x100004c4, Extension::AltiVec), + // lvewx128 + OpcodePattern::extension(0xfc0007f3, 0x10000083, Extension::Vmx128), + // lvlx128 + OpcodePattern::extension(0xfc0007f3, 0x10000403, Extension::Vmx128), + // lvlxl128 + OpcodePattern::extension(0xfc0007f3, 0x10000603, Extension::Vmx128), + // lvrx128 + OpcodePattern::extension(0xfc0007f3, 0x10000443, Extension::Vmx128), + // lvrxl128 + OpcodePattern::extension(0xfc0007f3, 0x10000643, Extension::Vmx128), + // lvsl128 + OpcodePattern::extension(0xfc0007f3, 0x10000003, Extension::Vmx128), + // lvsr128 + OpcodePattern::extension(0xfc0007f3, 0x10000043, Extension::Vmx128), + // lvx128 + OpcodePattern::extension(0xfc0007f3, 0x100000c3, Extension::Vmx128), + // lvxl128 + OpcodePattern::extension(0xfc0007f3, 0x100002c3, Extension::Vmx128), + // stvewx128 + OpcodePattern::extension(0xfc0007f3, 0x10000183, Extension::Vmx128), + // stvlx128 + OpcodePattern::extension(0xfc0007f3, 0x10000503, Extension::Vmx128), + // stvlxl128 + OpcodePattern::extension(0xfc0007f3, 0x10000703, Extension::Vmx128), + // stvrx128 + OpcodePattern::extension(0xfc0007f3, 0x10000543, Extension::Vmx128), + // stvrxl128 + OpcodePattern::extension(0xfc0007f3, 0x10000743, Extension::Vmx128), + // stvx128 + OpcodePattern::extension(0xfc0007f3, 0x100001c3, Extension::Vmx128), + // stvxl128 + OpcodePattern::extension(0xfc0007f3, 0x100003c3, Extension::Vmx128), + // vsldoi128 + OpcodePattern::extension(0xfc000010, 0x10000010, Extension::Vmx128), + // vaddfp128 + OpcodePattern::extension(0xfc0003d0, 0x14000010, Extension::Vmx128), + // vand128 + OpcodePattern::extension(0xfc0003d0, 0x14000210, Extension::Vmx128), + // vandc128 + OpcodePattern::extension(0xfc0003d0, 0x14000250, Extension::Vmx128), + // vmaddcfp128 + OpcodePattern::extension(0xfc0003d0, 0x14000110, Extension::Vmx128), + // vmaddfp128 + OpcodePattern::extension(0xfc0003d0, 0x140000d0, Extension::Vmx128), + // vmsum3fp128 + OpcodePattern::extension(0xfc0003d0, 0x14000190, Extension::Vmx128), + // vmsum4fp128 + OpcodePattern::extension(0xfc0003d0, 0x140001d0, Extension::Vmx128), + // vmulfp128 + OpcodePattern::extension(0xfc0003d0, 0x14000090, Extension::Vmx128), + // vnmsubfp128 + OpcodePattern::extension(0xfc0003d0, 0x14000150, Extension::Vmx128), + // vnor128 + OpcodePattern::extension(0xfc0003d0, 0x14000290, Extension::Vmx128), + // vor128 + OpcodePattern::extension(0xfc0003d0, 0x140002d0, Extension::Vmx128), + // vperm128 + OpcodePattern::extension(0xfc000210, 0x14000000, Extension::Vmx128), + // vpkshss128 + OpcodePattern::extension(0xfc0003d0, 0x14000200, Extension::Vmx128), + // vpkshus128 + OpcodePattern::extension(0xfc0003d0, 0x14000240, Extension::Vmx128), + // vpkswss128 + OpcodePattern::extension(0xfc0003d0, 0x14000280, Extension::Vmx128), + // vpkswus128 + OpcodePattern::extension(0xfc0003d0, 0x140002c0, Extension::Vmx128), + // vpkuhum128 + OpcodePattern::extension(0xfc0003d0, 0x14000300, Extension::Vmx128), + // vpkuhus128 + OpcodePattern::extension(0xfc0003d0, 0x14000340, Extension::Vmx128), + // vpkuwum128 + OpcodePattern::extension(0xfc0003d0, 0x14000380, Extension::Vmx128), + // vpkuwus128 + OpcodePattern::extension(0xfc0003d0, 0x140003c0, Extension::Vmx128), + // vsel128 + OpcodePattern::extension(0xfc0003d0, 0x14000350, Extension::Vmx128), + // vslo128 + OpcodePattern::extension(0xfc0003d0, 0x14000390, Extension::Vmx128), + // vsro128 + OpcodePattern::extension(0xfc0003d0, 0x140003d0, Extension::Vmx128), + // vsubfp128 + OpcodePattern::extension(0xfc0003d0, 0x14000050, Extension::Vmx128), + // vxor128 + OpcodePattern::extension(0xfc0003d0, 0x14000310, Extension::Vmx128), + // vctsxs128 + OpcodePattern::extension(0xfc0007f0, 0x18000230, Extension::Vmx128), + // vctuxs128 + OpcodePattern::extension(0xfc0007f0, 0x18000270, Extension::Vmx128), + // vcmpbfp128 + OpcodePattern::extension(0xfc000390, 0x18000180, Extension::Vmx128), + // vcmpeqfp128 + OpcodePattern::extension(0xfc000390, 0x18000000, Extension::Vmx128), + // vcmpequw128 + OpcodePattern::extension(0xfc000390, 0x18000200, Extension::Vmx128), + // vcmpgefp128 + OpcodePattern::extension(0xfc000390, 0x18000080, Extension::Vmx128), + // vcmpgtfp128 + OpcodePattern::extension(0xfc000390, 0x18000100, Extension::Vmx128), + // vcfsx128 + OpcodePattern::extension(0xfc0007f0, 0x180002b0, Extension::Vmx128), + // vcfux128 + OpcodePattern::extension(0xfc0007f0, 0x180002f0, Extension::Vmx128), + // vexptefp128 + OpcodePattern::extension(0xfc1f07f0, 0x180006b0, Extension::Vmx128), + // vlogefp128 + OpcodePattern::extension(0xfc1f07f0, 0x180006f0, Extension::Vmx128), + // vmaxfp128 + OpcodePattern::extension(0xfc0003d0, 0x18000280, Extension::Vmx128), + // vminfp128 + OpcodePattern::extension(0xfc0003d0, 0x180002c0, Extension::Vmx128), + // vmrghw128 + OpcodePattern::extension(0xfc0003d0, 0x18000300, Extension::Vmx128), + // vmrglw128 + OpcodePattern::extension(0xfc0003d0, 0x18000340, Extension::Vmx128), + // vpermwi128 + OpcodePattern::extension(0xfc000630, 0x18000210, Extension::Vmx128), + // vpkd3d128 + OpcodePattern::extension(0xfc000730, 0x18000610, Extension::Vmx128), + // vrefp128 + OpcodePattern::extension(0xfc1f07f0, 0x18000630, Extension::Vmx128), + // vrfim128 + OpcodePattern::extension(0xfc1f07f0, 0x18000330, Extension::Vmx128), + // vrfin128 + OpcodePattern::extension(0xfc1f07f0, 0x18000370, Extension::Vmx128), + // vrfip128 + OpcodePattern::extension(0xfc1f07f0, 0x180003b0, Extension::Vmx128), + // vrfiz128 + OpcodePattern::extension(0xfc1f07f0, 0x180003f0, Extension::Vmx128), + // vrlimi128 + OpcodePattern::extension(0xfc000730, 0x18000710, Extension::Vmx128), + // vrlw128 + OpcodePattern::extension(0xfc0003d0, 0x18000050, Extension::Vmx128), + // vrsqrtefp128 + OpcodePattern::extension(0xfc1f07f0, 0x18000670, Extension::Vmx128), + // vslw128 + OpcodePattern::extension(0xfc0003d0, 0x180000d0, Extension::Vmx128), + // vspltisw128 + OpcodePattern::extension(0xfc0007f0, 0x18000770, Extension::Vmx128), + // vspltw128 + OpcodePattern::extension(0xfc0007f0, 0x18000730, Extension::Vmx128), + // vsraw128 + OpcodePattern::extension(0xfc0003d0, 0x18000150, Extension::Vmx128), + // vsrw128 + OpcodePattern::extension(0xfc0003d0, 0x180001d0, Extension::Vmx128), + // vupkd3d128 + OpcodePattern::extension(0xfc0007f0, 0x180007f0, Extension::Vmx128), + // vupkhsb128 + OpcodePattern::extension(0xfc1f07f0, 0x18000380, Extension::Vmx128), + // vupkhsh128 + OpcodePattern::extension(0xfc1f07f0, 0x180007a0, Extension::Vmx128), + // vupklsb128 + OpcodePattern::extension(0xfc1f07f0, 0x180003c0, Extension::Vmx128), + // vupklsh128 + OpcodePattern::extension(0xfc1f07f0, 0x180007e0, Extension::Vmx128), + // mulli + OpcodePattern::base(0xfc000000, 0x1c000000), + // subfic + OpcodePattern::base(0xfc000000, 0x20000000), + // cmpli + OpcodePattern::base(0xfc400000, 0x28000000), + // cmpi + OpcodePattern::base(0xfc400000, 0x2c000000), + // addic + OpcodePattern::base(0xfc000000, 0x30000000), + // addic. + OpcodePattern::base(0xfc000000, 0x34000000), + // addi + OpcodePattern::base(0xfc000000, 0x38000000), + // addis + OpcodePattern::base(0xfc000000, 0x3c000000), + // bc + OpcodePattern::base(0xfc000000, 0x40000000), + // sc + OpcodePattern::base(0xffffffff, 0x44000002), + // b + OpcodePattern::base(0xfc000000, 0x48000000), + // bcctr + OpcodePattern::base(0xfc00fffe, 0x4c000420), + // bclr + OpcodePattern::base(0xfc00fffe, 0x4c000020), + // crand + OpcodePattern::base(0xfc0007ff, 0x4c000202), + // crandc + OpcodePattern::base(0xfc0007ff, 0x4c000102), + // creqv + OpcodePattern::base(0xfc0007ff, 0x4c000242), + // crnand + OpcodePattern::base(0xfc0007ff, 0x4c0001c2), + // crnor + OpcodePattern::base(0xfc0007ff, 0x4c000042), + // cror + OpcodePattern::base(0xfc0007ff, 0x4c000382), + // crorc + OpcodePattern::base(0xfc0007ff, 0x4c000342), + // crxor + OpcodePattern::base(0xfc0007ff, 0x4c000182), + // isync + OpcodePattern::base(0xffffffff, 0x4c00012c), + // mcrf + OpcodePattern::base(0xfc63ffff, 0x4c000000), + // rfi + OpcodePattern::base(0xffffffff, 0x4c000064), + // rfid + OpcodePattern::extension(0xffffffff, 0x4c000024, Extension::Ppc64), + // rlwimi + OpcodePattern::base(0xfc000000, 0x50000000), + // rlwinm + OpcodePattern::base(0xfc000000, 0x54000000), + // rlwnm + OpcodePattern::base(0xfc000000, 0x5c000000), + // ori + OpcodePattern::base(0xfc000000, 0x60000000), + // oris + OpcodePattern::base(0xfc000000, 0x64000000), + // xori + OpcodePattern::base(0xfc000000, 0x68000000), + // xoris + OpcodePattern::base(0xfc000000, 0x6c000000), + // andi. + OpcodePattern::base(0xfc000000, 0x70000000), + // andis. + OpcodePattern::base(0xfc000000, 0x74000000), + // rldcl + OpcodePattern::extension(0xfc00001e, 0x78000010, Extension::Ppc64), + // rldcr + OpcodePattern::extension(0xfc00001e, 0x78000012, Extension::Ppc64), + // rldic + OpcodePattern::extension(0xfc00001c, 0x78000008, Extension::Ppc64), + // rldicl + OpcodePattern::extension(0xfc00001c, 0x78000000, Extension::Ppc64), + // rldicr + OpcodePattern::extension(0xfc00001c, 0x78000004, Extension::Ppc64), + // rldimi + OpcodePattern::extension(0xfc00001c, 0x7800000c, Extension::Ppc64), + // add + OpcodePattern::base(0xfc0003fe, 0x7c000214), + // addc + OpcodePattern::base(0xfc0003fe, 0x7c000014), + // adde + OpcodePattern::base(0xfc0003fe, 0x7c000114), + // addme + OpcodePattern::base(0xfc00fbfe, 0x7c0001d4), + // addze + OpcodePattern::base(0xfc00fbfe, 0x7c000194), + // and + OpcodePattern::base(0xfc0007fe, 0x7c000038), + // andc + OpcodePattern::base(0xfc0007fe, 0x7c000078), + // cmp + OpcodePattern::base(0xfc4007ff, 0x7c000000), + // cmpl + OpcodePattern::base(0xfc4007ff, 0x7c000040), + // cntlzw + OpcodePattern::base(0xfc00fffe, 0x7c000034), + // dcbf + OpcodePattern::base(0xffe007ff, 0x7c0000ac), + // dcbi + OpcodePattern::base(0xffe007ff, 0x7c0003ac), + // dcbst + OpcodePattern::base(0xffe007ff, 0x7c00006c), + // dcbt + OpcodePattern::base(0xffe007ff, 0x7c00022c), + // dcbtst + OpcodePattern::base(0xffe007ff, 0x7c0001ec), + // dcbz + OpcodePattern::base(0xffe007ff, 0x7c0007ec), + // divw + OpcodePattern::base(0xfc0003fe, 0x7c0003d6), + // divwu + OpcodePattern::base(0xfc0003fe, 0x7c000396), + // eciwx + OpcodePattern::base(0xfc0007ff, 0x7c00026c), + // ecowx + OpcodePattern::base(0xfc0007ff, 0x7c00036c), + // eieio + OpcodePattern::base(0xffffffff, 0x7c0006ac), + // eqv + OpcodePattern::base(0xfc0007fe, 0x7c000238), + // extsb + OpcodePattern::base(0xfc00fffe, 0x7c000774), + // extsh + OpcodePattern::base(0xfc00fffe, 0x7c000734), + // icbi + OpcodePattern::base(0xffe007fe, 0x7c0007ac), + // lbzux + OpcodePattern::base(0xfc0007ff, 0x7c0000ee), + // lbzx + OpcodePattern::base(0xfc0007ff, 0x7c0000ae), + // lfdux + OpcodePattern::base(0xfc0007ff, 0x7c0004ee), + // lfdx + OpcodePattern::base(0xfc0007ff, 0x7c0004ae), + // lfsux + OpcodePattern::base(0xfc0007ff, 0x7c00046e), + // lfsx + OpcodePattern::base(0xfc0007ff, 0x7c00042e), + // lhaux + OpcodePattern::base(0xfc0007ff, 0x7c0002ee), + // lhax + OpcodePattern::base(0xfc0007ff, 0x7c0002ae), + // lhbrx + OpcodePattern::base(0xfc0007ff, 0x7c00062c), + // lhzux + OpcodePattern::base(0xfc0007ff, 0x7c00026e), + // lhzx + OpcodePattern::base(0xfc0007ff, 0x7c00022e), + // lswi + OpcodePattern::base(0xfc0007ff, 0x7c0004aa), + // lswx + OpcodePattern::base(0xfc0007ff, 0x7c00042a), + // lwarx + OpcodePattern::base(0xfc0007ff, 0x7c000028), + // lwbrx + OpcodePattern::base(0xfc0007ff, 0x7c00042c), + // lwzux + OpcodePattern::base(0xfc0007ff, 0x7c00006e), + // lwzx + OpcodePattern::base(0xfc0007ff, 0x7c00002e), + // mcrxr + OpcodePattern::base(0xfc7fffff, 0x7c000400), + // mfcr + OpcodePattern::base(0xfc1fffff, 0x7c000026), + // mfmsr + OpcodePattern::base(0xfc1fffff, 0x7c0000a6), + // mfspr + OpcodePattern::base(0xfc0007ff, 0x7c0002a6), + // mfsr + OpcodePattern::base(0xfc10ffff, 0x7c0004a6), + // mfsrin + OpcodePattern::base(0xfc1f07ff, 0x7c000526), + // mftb + OpcodePattern::base(0xfc0007ff, 0x7c0002e6), + // mtcrf + OpcodePattern::base(0xfc100fff, 0x7c000120), + // mtmsr + OpcodePattern::base(0xfc1fffff, 0x7c000124), + // mtspr + OpcodePattern::base(0xfc0007ff, 0x7c0003a6), + // mtsr + OpcodePattern::base(0xfc10ffff, 0x7c0001a4), + // mtsrin + OpcodePattern::base(0xfc1f07ff, 0x7c0001e4), + // mulhw + OpcodePattern::base(0xfc0007fe, 0x7c000096), + // mulhwu + OpcodePattern::base(0xfc0007fe, 0x7c000016), + // mullw + OpcodePattern::base(0xfc0003fe, 0x7c0001d6), + // nand + OpcodePattern::base(0xfc0007fe, 0x7c0003b8), + // neg + OpcodePattern::base(0xfc00fbfe, 0x7c0000d0), + // nor + OpcodePattern::base(0xfc0007fe, 0x7c0000f8), + // or + OpcodePattern::base(0xfc0007fe, 0x7c000378), + // orc + OpcodePattern::base(0xfc0007fe, 0x7c000338), + // slw + OpcodePattern::base(0xfc0007fe, 0x7c000030), + // sraw + OpcodePattern::base(0xfc0007fe, 0x7c000630), + // srawi + OpcodePattern::base(0xfc0007fe, 0x7c000670), + // srw + OpcodePattern::base(0xfc0007fe, 0x7c000430), + // stbux + OpcodePattern::base(0xfc0007ff, 0x7c0001ee), + // stbx + OpcodePattern::base(0xfc0007ff, 0x7c0001ae), + // stfdux + OpcodePattern::base(0xfc0007ff, 0x7c0005ee), + // stfdx + OpcodePattern::base(0xfc0007ff, 0x7c0005ae), + // stfiwx + OpcodePattern::base(0xfc0007ff, 0x7c0007ae), + // stfsux + OpcodePattern::base(0xfc0007ff, 0x7c00056e), + // stfsx + OpcodePattern::base(0xfc0007ff, 0x7c00052e), + // sthbrx + OpcodePattern::base(0xfc0007ff, 0x7c00072c), + // sthux + OpcodePattern::base(0xfc0007ff, 0x7c00036e), + // sthx + OpcodePattern::base(0xfc0007ff, 0x7c00032e), + // stswi + OpcodePattern::base(0xfc0007ff, 0x7c0005aa), + // stswx + OpcodePattern::base(0xfc0007ff, 0x7c00052a), + // stwbrx + OpcodePattern::base(0xfc0007ff, 0x7c00052c), + // stwcx. + OpcodePattern::base(0xfc0007ff, 0x7c00012d), + // stwux + OpcodePattern::base(0xfc0007ff, 0x7c00016e), + // stwx + OpcodePattern::base(0xfc0007ff, 0x7c00012e), + // subf + OpcodePattern::base(0xfc0003fe, 0x7c000050), + // subfc + OpcodePattern::base(0xfc0003fe, 0x7c000010), + // subfe + OpcodePattern::base(0xfc0003fe, 0x7c000110), + // subfme + OpcodePattern::base(0xfc00fbfe, 0x7c0001d0), + // subfze + OpcodePattern::base(0xfc00fbfe, 0x7c000190), + // sync + OpcodePattern::base(0xff9fffff, 0x7c0004ac), + // tlbie + OpcodePattern::base(0xffff07ff, 0x7c000264), + // tlbsync + OpcodePattern::base(0xffffffff, 0x7c00046c), + // tw + OpcodePattern::base(0xfc0007ff, 0x7c000008), + // xor + OpcodePattern::base(0xfc0007fe, 0x7c000278), + // cntlzd + OpcodePattern::extension(0xfc00fffe, 0x7c000074, Extension::Ppc64), + // dcbzl + OpcodePattern::extension(0xffe007ff, 0x7c2007ec, Extension::Ppc64), + // divd + OpcodePattern::extension(0xfc0003fe, 0x7c0003d2, Extension::Ppc64), + // divdu + OpcodePattern::extension(0xfc0003fe, 0x7c000392, Extension::Ppc64), + // extsw + OpcodePattern::extension(0xfc00fffe, 0x7c0007b4, Extension::Ppc64), + // ldarx + OpcodePattern::extension(0xfc0007ff, 0x7c0000a8, Extension::Ppc64), + // ldux + OpcodePattern::extension(0xfc0007ff, 0x7c00006a, Extension::Ppc64), + // ldx + OpcodePattern::extension(0xfc0007ff, 0x7c00002a, Extension::Ppc64), + // lwaux + OpcodePattern::extension(0xfc0007ff, 0x7c0002ea, Extension::Ppc64), + // lwax + OpcodePattern::extension(0xfc0007ff, 0x7c0002aa, Extension::Ppc64), + // mtmsrd + OpcodePattern::extension(0xfc1effff, 0x7c000164, Extension::Ppc64), + // mtsrd + OpcodePattern::extension(0xfc10ffff, 0x7c0000a4, Extension::Ppc64), + // mtsrdin + OpcodePattern::extension(0xfc1f07ff, 0x7c0000e4, Extension::Ppc64), + // mulhd + OpcodePattern::extension(0xfc0007fe, 0x7c000092, Extension::Ppc64), + // mulhdu + OpcodePattern::extension(0xfc0007fe, 0x7c000012, Extension::Ppc64), + // mulld + OpcodePattern::extension(0xfc0003fe, 0x7c0001d2, Extension::Ppc64), + // slbia + OpcodePattern::extension(0xffffffff, 0x7c0003e4, Extension::Ppc64), + // slbie + OpcodePattern::extension(0xffff07ff, 0x7c000364, Extension::Ppc64), + // sld + OpcodePattern::extension(0xfc0007fe, 0x7c000036, Extension::Ppc64), + // srad + OpcodePattern::extension(0xfc0007fe, 0x7c000634, Extension::Ppc64), + // sradi + OpcodePattern::extension(0xfc0007fc, 0x7c000674, Extension::Ppc64), + // srd + OpcodePattern::extension(0xfc0007fe, 0x7c000436, Extension::Ppc64), + // stdcx. + OpcodePattern::extension(0xfc0007ff, 0x7c0001ad, Extension::Ppc64), + // stdux + OpcodePattern::extension(0xfc0007ff, 0x7c00016a, Extension::Ppc64), + // stdx + OpcodePattern::extension(0xfc0007ff, 0x7c00012a, Extension::Ppc64), + // td + OpcodePattern::extension(0xfc0007ff, 0x7c000088, Extension::Ppc64), + // dss + OpcodePattern::extension(0xfd9fffff, 0x7c00066c, Extension::AltiVec), + // dst + OpcodePattern::extension(0xfd8007ff, 0x7c0002ac, Extension::AltiVec), + // dstst + OpcodePattern::extension(0xfd8007ff, 0x7c0002ec, Extension::AltiVec), + // lvebx + OpcodePattern::extension(0xfc0007ff, 0x7c00000e, Extension::AltiVec), + // lvehx + OpcodePattern::extension(0xfc0007ff, 0x7c00004e, Extension::AltiVec), + // lvewx + OpcodePattern::extension(0xfc0007ff, 0x7c00008e, Extension::AltiVec), + // lvlx + OpcodePattern::extension(0xfc0007ff, 0x7c00040e, Extension::AltiVec), + // lvlxl + OpcodePattern::extension(0xfc0007ff, 0x7c00060e, Extension::AltiVec), + // lvrx + OpcodePattern::extension(0xfc0007ff, 0x7c00044e, Extension::AltiVec), + // lvrxl + OpcodePattern::extension(0xfc0007ff, 0x7c00064e, Extension::AltiVec), + // lvsl + OpcodePattern::extension(0xfc0007ff, 0x7c00000c, Extension::AltiVec), + // lvsr + OpcodePattern::extension(0xfc0007ff, 0x7c00004c, Extension::AltiVec), + // lvx + OpcodePattern::extension(0xfc0007ff, 0x7c0000ce, Extension::AltiVec), + // lvxl + OpcodePattern::extension(0xfc0007ff, 0x7c0002ce, Extension::AltiVec), + // stvebx + OpcodePattern::extension(0xfc0007ff, 0x7c00010e, Extension::AltiVec), + // stvehx + OpcodePattern::extension(0xfc0007ff, 0x7c00014e, Extension::AltiVec), + // stvewx + OpcodePattern::extension(0xfc0007ff, 0x7c00018e, Extension::AltiVec), + // stvlx + OpcodePattern::extension(0xfc0007ff, 0x7c00050e, Extension::AltiVec), + // stvlxl + OpcodePattern::extension(0xfc0007ff, 0x7c00070e, Extension::AltiVec), + // stvrx + OpcodePattern::extension(0xfc0007ff, 0x7c00054e, Extension::AltiVec), + // stvrxl + OpcodePattern::extension(0xfc0007ff, 0x7c00074e, Extension::AltiVec), + // stvx + OpcodePattern::extension(0xfc0007ff, 0x7c0001ce, Extension::AltiVec), + // stvxl + OpcodePattern::extension(0xfc0007ff, 0x7c0003ce, Extension::AltiVec), + // lwz + OpcodePattern::base(0xfc000000, 0x80000000), + // lwzu + OpcodePattern::base(0xfc000000, 0x84000000), + // lbz + OpcodePattern::base(0xfc000000, 0x88000000), + // lbzu + OpcodePattern::base(0xfc000000, 0x8c000000), + // stw + OpcodePattern::base(0xfc000000, 0x90000000), + // stwu + OpcodePattern::base(0xfc000000, 0x94000000), + // stb + OpcodePattern::base(0xfc000000, 0x98000000), + // stbu + OpcodePattern::base(0xfc000000, 0x9c000000), + // lhz + OpcodePattern::base(0xfc000000, 0xa0000000), + // lhzu + OpcodePattern::base(0xfc000000, 0xa4000000), + // lha + OpcodePattern::base(0xfc000000, 0xa8000000), + // lhau + OpcodePattern::base(0xfc000000, 0xac000000), + // sth + OpcodePattern::base(0xfc000000, 0xb0000000), + // sthu + OpcodePattern::base(0xfc000000, 0xb4000000), + // lmw + OpcodePattern::base(0xfc000000, 0xb8000000), + // stmw + OpcodePattern::base(0xfc000000, 0xbc000000), + // lfs + OpcodePattern::base(0xfc000000, 0xc0000000), + // lfsu + OpcodePattern::base(0xfc000000, 0xc4000000), + // lfd + OpcodePattern::base(0xfc000000, 0xc8000000), + // lfdu + OpcodePattern::base(0xfc000000, 0xcc000000), + // stfs + OpcodePattern::base(0xfc000000, 0xd0000000), + // stfsu + OpcodePattern::base(0xfc000000, 0xd4000000), + // stfd + OpcodePattern::base(0xfc000000, 0xd8000000), + // stfdu + OpcodePattern::base(0xfc000000, 0xdc000000), + // psq_l + OpcodePattern::extension(0xfc000000, 0xe0000000, Extension::PairedSingles), + // psq_lu + OpcodePattern::extension(0xfc000000, 0xe4000000, Extension::PairedSingles), + // ld + OpcodePattern::extension(0xfc000003, 0xe8000000, Extension::Ppc64), + // ldu + OpcodePattern::extension(0xfc000003, 0xe8000001, Extension::Ppc64), + // lwa + OpcodePattern::extension(0xfc000003, 0xe8000002, Extension::Ppc64), + // fadds + OpcodePattern::base(0xfc0007fe, 0xec00002a), + // fdivs + OpcodePattern::base(0xfc0007fe, 0xec000024), + // fmadds + OpcodePattern::base(0xfc00003e, 0xec00003a), + // fmsubs + OpcodePattern::base(0xfc00003e, 0xec000038), + // fmuls + OpcodePattern::base(0xfc00f83e, 0xec000032), + // fnmadds + OpcodePattern::base(0xfc00003e, 0xec00003e), + // fnmsubs + OpcodePattern::base(0xfc00003e, 0xec00003c), + // fres + OpcodePattern::base(0xfc1f07fe, 0xec000030), + // fsubs + OpcodePattern::base(0xfc0007fe, 0xec000028), + // psq_st + OpcodePattern::extension(0xfc000000, 0xf0000000, Extension::PairedSingles), + // psq_stu + OpcodePattern::extension(0xfc000000, 0xf4000000, Extension::PairedSingles), + // std + OpcodePattern::extension(0xfc000003, 0xf8000000, Extension::Ppc64), + // stdu + OpcodePattern::extension(0xfc000003, 0xf8000001, Extension::Ppc64), + // fabs + OpcodePattern::base(0xfc1f07fe, 0xfc000210), + // fadd + OpcodePattern::base(0xfc0007fe, 0xfc00002a), + // fcmpo + OpcodePattern::base(0xfc6007ff, 0xfc000040), + // fcmpu + OpcodePattern::base(0xfc6007ff, 0xfc000000), + // fctiw + OpcodePattern::base(0xfc1f07fe, 0xfc00001c), + // fctiwz + OpcodePattern::base(0xfc1f07fe, 0xfc00001e), + // fdiv + OpcodePattern::base(0xfc0007fe, 0xfc000024), + // fmadd + OpcodePattern::base(0xfc00003e, 0xfc00003a), + // fmr + OpcodePattern::base(0xfc1f07fe, 0xfc000090), + // fmsub + OpcodePattern::base(0xfc00003e, 0xfc000038), + // fmul + OpcodePattern::base(0xfc00f83e, 0xfc000032), + // fnabs + OpcodePattern::base(0xfc1f07fe, 0xfc000110), + // fneg + OpcodePattern::base(0xfc1f07fe, 0xfc000050), + // fnmadd + OpcodePattern::base(0xfc00003e, 0xfc00003e), + // fnmsub + OpcodePattern::base(0xfc00003e, 0xfc00003c), + // frsp + OpcodePattern::base(0xfc1f07fe, 0xfc000018), + // frsqrte + OpcodePattern::base(0xfc1f07fe, 0xfc000034), + // fsel + OpcodePattern::base(0xfc00003e, 0xfc00002e), + // fsub + OpcodePattern::base(0xfc0007fe, 0xfc000028), + // mcrfs + OpcodePattern::base(0xfc63ffff, 0xfc000080), + // mffs + OpcodePattern::base(0xfc1ffffe, 0xfc00048e), + // mtfsb0 + OpcodePattern::base(0xfc1ffffe, 0xfc00008c), + // mtfsb1 + OpcodePattern::base(0xfc1ffffe, 0xfc00004c), + // mtfsf + OpcodePattern::base(0xfe0107fe, 0xfc00058e), + // mtfsfi + OpcodePattern::base(0xfc7f0ffe, 0xfc00010c), + // fcfid + OpcodePattern::extension(0xfc1f07fe, 0xfc00069c, Extension::Ppc64), + // fctid + OpcodePattern::extension(0xfc1f07fe, 0xfc00065c, Extension::Ppc64), + // fctidz + OpcodePattern::extension(0xfc1f07fe, 0xfc00065e, Extension::Ppc64), ]; /// The name of each opcode. -static OPCODE_NAMES: [&str; 470] = [ +static OPCODE_NAMES: [&str; 508] = [ "tdi", "twi", "dcbz_l", + "psq_lux", + "psq_lx", + "psq_stux", + "psq_stx", + "ps_abs", + "ps_add", + "ps_cmpo0", + "ps_cmpo1", + "ps_cmpu0", + "ps_cmpu1", + "ps_div", + "ps_madd", + "ps_madds0", + "ps_madds1", + "ps_merge00", + "ps_merge01", + "ps_merge10", + "ps_merge11", + "ps_mr", + "ps_msub", + "ps_mul", + "ps_muls0", + "ps_muls1", + "ps_nabs", + "ps_neg", + "ps_nmadd", + "ps_nmsub", + "ps_res", + "ps_rsqrte", + "ps_sel", + "ps_sub", + "ps_sum0", + "ps_sum1", "mfvscr", "mtvscr", "vaddcuw", @@ -818,7 +1449,6 @@ static OPCODE_NAMES: [&str; 470] = [ "andc", "cmp", "cmpl", - "cntlzd", "cntlzw", "dcbf", "dcbi", @@ -826,8 +1456,6 @@ static OPCODE_NAMES: [&str; 470] = [ "dcbt", "dcbtst", "dcbz", - "divd", - "divdu", "divw", "divwu", "eciwx", @@ -836,13 +1464,9 @@ static OPCODE_NAMES: [&str; 470] = [ "eqv", "extsb", "extsh", - "extsw", "icbi", "lbzux", "lbzx", - "ldarx", - "ldux", - "ldx", "lfdux", "lfdx", "lfsux", @@ -855,8 +1479,6 @@ static OPCODE_NAMES: [&str; 470] = [ "lswi", "lswx", "lwarx", - "lwaux", - "lwax", "lwbrx", "lwzux", "lwzx", @@ -869,38 +1491,23 @@ static OPCODE_NAMES: [&str; 470] = [ "mftb", "mtcrf", "mtmsr", - "mtmsrd", "mtspr", "mtsr", - "mtsrd", - "mtsrdin", "mtsrin", - "mulhd", - "mulhdu", "mulhw", "mulhwu", - "mulld", "mullw", "nand", "neg", "nor", "or", "orc", - "slbia", - "slbie", - "sld", "slw", - "srad", - "sradi", "sraw", "srawi", - "srd", "srw", "stbux", "stbx", - "stdcx.", - "stdux", - "stdx", "stfdux", "stfdx", "stfiwx", @@ -921,11 +1528,36 @@ static OPCODE_NAMES: [&str; 470] = [ "subfme", "subfze", "sync", - "td", "tlbie", "tlbsync", "tw", "xor", + "cntlzd", + "dcbzl", + "divd", + "divdu", + "extsw", + "ldarx", + "ldux", + "ldx", + "lwaux", + "lwax", + "mtmsrd", + "mtsrd", + "mtsrdin", + "mulhd", + "mulhdu", + "mulld", + "slbia", + "slbie", + "sld", + "srad", + "sradi", + "srd", + "stdcx.", + "stdux", + "stdx", + "td", "dss", "dst", "dstst", @@ -973,6 +1605,8 @@ static OPCODE_NAMES: [&str; 470] = [ "stfsu", "stfd", "stfdu", + "psq_l", + "psq_lu", "ld", "ldu", "lwa", @@ -985,15 +1619,14 @@ static OPCODE_NAMES: [&str; 470] = [ "fnmsubs", "fres", "fsubs", + "psq_st", + "psq_stu", "std", "stdu", "fabs", "fadd", - "fcfid", "fcmpo", "fcmpu", - "fctid", - "fctidz", "fctiw", "fctiwz", "fdiv", @@ -1015,6 +1648,9 @@ static OPCODE_NAMES: [&str; 470] = [ "mtfsb1", "mtfsf", "mtfsfi", + "fcfid", + "fctid", + "fctidz", ]; #[derive(Copy, Clone, Debug, Default, PartialEq, Eq)] #[repr(u16)] @@ -1029,952 +1665,1028 @@ pub enum Opcode { Twi = 1, /// dcbz_l: Data Cache Block Set to Zero Locked DcbzL = 2, + /// psq_lux: Paired Single Quantized Load with Update Indexed + PsqLux = 3, + /// psq_lx: Paired Single Quantized Load Indexed + PsqLx = 4, + /// psq_stux: Paired Single Quantized Store with Update Indexed + PsqStux = 5, + /// psq_stx: Paired Single Quantized Store Indexed + PsqStx = 6, + /// ps_abs: Paired Single Absolute Value + PsAbs = 7, + /// ps_add: Paired Single Add + PsAdd = 8, + /// ps_cmpo0: Paired Singles Compare Ordered High + PsCmpo0 = 9, + /// ps_cmpo1: Paired Singles Compare Ordered Low + PsCmpo1 = 10, + /// ps_cmpu0: Paired Singles Compare Unordered High + PsCmpu0 = 11, + /// ps_cmpu1: Paired Singles Compare Unordered Low + PsCmpu1 = 12, + /// ps_div: Paired Single Divide + PsDiv = 13, + /// ps_madd: Paired Single Multiply-Add + PsMadd = 14, + /// ps_madds0: Paired Single Multiply-Add Scalar high + PsMadds0 = 15, + /// ps_madds1: Paired Single Multiply-Add Scalar low + PsMadds1 = 16, + /// ps_merge00: Paired Single MERGE high + PsMerge00 = 17, + /// ps_merge01: Paired Single MERGE direct + PsMerge01 = 18, + /// ps_merge10: Paired Single MERGE swapped + PsMerge10 = 19, + /// ps_merge11: Paired Single MERGE low + PsMerge11 = 20, + /// ps_mr: Paired Single Move Register + PsMr = 21, + /// ps_msub: Paired Single Multiply-Subtract + PsMsub = 22, + /// ps_mul: Paired Single Multiply + PsMul = 23, + /// ps_muls0: Paired Single Multiply Scalar high + PsMuls0 = 24, + /// ps_muls1: Paired Single Multiply Scalar low + PsMuls1 = 25, + /// ps_nabs: Paired Single Negative Absolute Value + PsNabs = 26, + /// ps_neg: Paired Single Negate + PsNeg = 27, + /// ps_nmadd: Paired Single Negative Multiply-Add + PsNmadd = 28, + /// ps_nmsub: Paired Single Negative Multiply-Subtract + PsNmsub = 29, + /// ps_res: Paired Single Reciprocal Estimate + PsRes = 30, + /// ps_rsqrte: Paired Single Reciprocal Square Root Estimate + PsRsqrte = 31, + /// ps_sel: Paired Single Select + PsSel = 32, + /// ps_sub: Paired Single Subtract + PsSub = 33, + /// ps_sum0: Paired Single vector SUM high + PsSum0 = 34, + /// ps_sum1: Paired Single vector SUM low + PsSum1 = 35, /// mfvscr: Move from Vector Status and Control Register - Mfvscr = 3, + Mfvscr = 36, /// mtvscr: Move to Vector Status and Control Register - Mtvscr = 4, + Mtvscr = 37, /// vaddcuw: Vector Add Carryout Unsigned Word - Vaddcuw = 5, + Vaddcuw = 38, /// vaddfp: Vector Add Floating Point - Vaddfp = 6, + Vaddfp = 39, /// vaddsbs: Vector Add Signed Byte Saturate - Vaddsbs = 7, + Vaddsbs = 40, /// vaddshs: Vector Add Signed Half Word Saturate - Vaddshs = 8, + Vaddshs = 41, /// vaddsws: Vector Add Signed Word Saturate - Vaddsws = 9, + Vaddsws = 42, /// vaddubm: Vector Add Unsigned Byte Modulo - Vaddubm = 10, + Vaddubm = 43, /// vaddubs: Vector Add Unsigned Byte Saturate - Vaddubs = 11, + Vaddubs = 44, /// vadduhm: Vector Add Unsigned Half Word Modulo - Vadduhm = 12, + Vadduhm = 45, /// vadduhs: Vector Add Unsigned Half Word Saturate - Vadduhs = 13, + Vadduhs = 46, /// vadduwm: Vector Add Unsigned Word Modulo - Vadduwm = 14, + Vadduwm = 47, /// vadduws: Vector Add Unsigned Word Saturate - Vadduws = 15, + Vadduws = 48, /// vand: Vector Logical AND - Vand = 16, + Vand = 49, /// vandc: Vector Logical AND with Complement - Vandc = 17, + Vandc = 50, /// vavgsb: Vector Average Signed Byte - Vavgsb = 18, + Vavgsb = 51, /// vavgsh: Vector Average Signed Half Word - Vavgsh = 19, + Vavgsh = 52, /// vavgsw: Vector Average Signed Word - Vavgsw = 20, + Vavgsw = 53, /// vavgub: Vector Average Unsigned Byte - Vavgub = 21, + Vavgub = 54, /// vavguh: Vector Average Unsigned Half Word - Vavguh = 22, + Vavguh = 55, /// vavguw: Vector Average Unsigned Word - Vavguw = 23, + Vavguw = 56, /// vcfsx: Vector Convert from Signed Fixed-Point Word - Vcfsx = 24, + Vcfsx = 57, /// vcfux: Vector Convert from Unsigned Fixed-Point Word - Vcfux = 25, + Vcfux = 58, /// vcmpbfp: Vector Compare Bounds Floating Point - Vcmpbfp = 26, + Vcmpbfp = 59, /// vcmpeqfp: Vector Compare Equal-to-Floating Point - Vcmpeqfp = 27, + Vcmpeqfp = 60, /// vcmpequb: Vector Compare Equal-to Unsigned Byte - Vcmpequb = 28, + Vcmpequb = 61, /// vcmpequh: Vector Compare Equal-to Unsigned Half Word - Vcmpequh = 29, + Vcmpequh = 62, /// vcmpequw: Vector Compare Equal-to Unsigned Word - Vcmpequw = 30, + Vcmpequw = 63, /// vcmpgefp: Vector Compare Greater-Than-or-Equal-to Floating Point - Vcmpgefp = 31, + Vcmpgefp = 64, /// vcmpgtfp: Vector Compare Greater-Than Floating Point - Vcmpgtfp = 32, + Vcmpgtfp = 65, /// vcmpgtsb: Vector Compare Greater-Than Signed Byte - Vcmpgtsb = 33, + Vcmpgtsb = 66, /// vcmpgtsh: Vector Compare Greater-Than Condition Register Signed Half Word - Vcmpgtsh = 34, + Vcmpgtsh = 67, /// vcmpgtsw: Vector Compare Greater-Than Signed Word - Vcmpgtsw = 35, + Vcmpgtsw = 68, /// vcmpgtub: Vector Compare Greater-Than Unsigned Byte - Vcmpgtub = 36, + Vcmpgtub = 69, /// vcmpgtuh: Vector Compare Greater-Than Unsigned Half Word - Vcmpgtuh = 37, + Vcmpgtuh = 70, /// vcmpgtuw: Vector Compare Greater-Than Unsigned Word - Vcmpgtuw = 38, + Vcmpgtuw = 71, /// vctsxs: Vector Convert to Signed Fixed-Point Word Saturate - Vctsxs = 39, + Vctsxs = 72, /// vctuxs: Vector Convert to Unsigned Fixed-Point Word Saturate - Vctuxs = 40, + Vctuxs = 73, /// vexptefp: Vector 2 Raised to the Exponent Estimate Floating Point - Vexptefp = 41, + Vexptefp = 74, /// vlogefp: Vector Log2 Estimate Floating Point - Vlogefp = 42, + Vlogefp = 75, /// vmaddfp: Vector Multiply Add Floating Point - Vmaddfp = 43, + Vmaddfp = 76, /// vmaxfp: Vector Maximum Floating Point - Vmaxfp = 44, + Vmaxfp = 77, /// vmaxsb: Vector Maximum Signed Byte - Vmaxsb = 45, + Vmaxsb = 78, /// vmaxsh: Vector Maximum Signed Half Word - Vmaxsh = 46, + Vmaxsh = 79, /// vmaxsw: Vector Maximum Signed Word - Vmaxsw = 47, + Vmaxsw = 80, /// vmaxub: Vector Maximum Unsigned Byte - Vmaxub = 48, + Vmaxub = 81, /// vmaxuh: Vector Maximum Unsigned Half Word - Vmaxuh = 49, + Vmaxuh = 82, /// vmaxuw: Vector Maximum Unsigned Word - Vmaxuw = 50, + Vmaxuw = 83, /// vmhaddshs: Vector Multiply High and Add Signed Half Word Saturate - Vmhaddshs = 51, + Vmhaddshs = 84, /// vmhraddshs: Vector Multiply High Round and Add Signed Half Word Saturate - Vmhraddshs = 52, + Vmhraddshs = 85, /// vminfp: Vector Minimum Floating Point - Vminfp = 53, + Vminfp = 86, /// vminsb: Vector Minimum Signed Byte - Vminsb = 54, + Vminsb = 87, /// vminsh: Vector Minimum Signed Half Word - Vminsh = 55, + Vminsh = 88, /// vminsw: Vector Minimum Signed Word - Vminsw = 56, + Vminsw = 89, /// vminub: Vector Minimum Unsigned Byte - Vminub = 57, + Vminub = 90, /// vminuh: Vector Minimum Unsigned Half Word - Vminuh = 58, + Vminuh = 91, /// vminuw: Vector Minimum Unsigned Word - Vminuw = 59, + Vminuw = 92, /// vmladduhm: Vector Multiply Low and Add Unsigned Half Word Modulo - Vmladduhm = 60, + Vmladduhm = 93, /// vmrghb: Vector Merge High Byte - Vmrghb = 61, + Vmrghb = 94, /// vmrghh: Vector Merge High Half Word - Vmrghh = 62, + Vmrghh = 95, /// vmrghw: Vector Merge High Word - Vmrghw = 63, + Vmrghw = 96, /// vmrglb: Vector Merge Low Byte - Vmrglb = 64, + Vmrglb = 97, /// vmrglh: Vector Merge Low Half Word - Vmrglh = 65, + Vmrglh = 98, /// vmrglw: Vector Merge Low Word - Vmrglw = 66, + Vmrglw = 99, /// vmsummbm: Vector Multiply Sum Mixed-Sign Byte Modulo - Vmsummbm = 67, + Vmsummbm = 100, /// vmsumshm: Vector Multiply Sum Signed Half Word Modulo - Vmsumshm = 68, + Vmsumshm = 101, /// vmsumshs: Vector Multiply Sum Signed Half Word Saturate - Vmsumshs = 69, + Vmsumshs = 102, /// vmsumubm: Vector Multiply Sum Unsigned Byte Modulo - Vmsumubm = 70, + Vmsumubm = 103, /// vmsumuhm: Vector Multiply Sum Unsigned Half Word Modulo - Vmsumuhm = 71, + Vmsumuhm = 104, /// vmsumuhs: Vector Multiply Sum Unsigned Half Word Saturate - Vmsumuhs = 72, + Vmsumuhs = 105, /// vmulesb: Vector Multiply Even Signed Byte - Vmulesb = 73, + Vmulesb = 106, /// vmulesh: Vector Multiply Even Signed Half Word - Vmulesh = 74, + Vmulesh = 107, /// vmuleub: Vector Multiply Even Unsigned Byte - Vmuleub = 75, + Vmuleub = 108, /// vmuleuh: Vector Multiply Even Unsigned Half Word - Vmuleuh = 76, + Vmuleuh = 109, /// vmulosb: Vector Multiply Odd Signed Byte - Vmulosb = 77, + Vmulosb = 110, /// vmulosh: Vector Multiply Odd Signed Half Word - Vmulosh = 78, + Vmulosh = 111, /// vmuloub: Vector Multiply Odd Unsigned Byte - Vmuloub = 79, + Vmuloub = 112, /// vmulouh: Vector Multiply Odd Unsigned Half Word - Vmulouh = 80, + Vmulouh = 113, /// vnmsubfp: Vector Negative Multiply-Subtract Floating Point - Vnmsubfp = 81, + Vnmsubfp = 114, /// vnor: Vector Logical NOR - Vnor = 82, + Vnor = 115, /// vor: Vector Logical OR - Vor = 83, + Vor = 116, /// vperm: Vector Permute - Vperm = 84, + Vperm = 117, /// vpkpx: Vector Pack Pixel32 - Vpkpx = 85, + Vpkpx = 118, /// vpkshss: Vector Pack Signed Half Word Signed Saturate - Vpkshss = 86, + Vpkshss = 119, /// vpkshus: Vector Pack Signed Half Word Unsigned Saturate - Vpkshus = 87, + Vpkshus = 120, /// vpkswss: Vector Pack Signed Word Signed Saturate - Vpkswss = 88, + Vpkswss = 121, /// vpkswus: Vector Pack Signed Word Unsigned Saturate - Vpkswus = 89, + Vpkswus = 122, /// vpkuhum: Vector Pack Unsigned Half Word Unsigned Modulo - Vpkuhum = 90, + Vpkuhum = 123, /// vpkuhus: Vector Pack Unsigned Half Word Unsigned Saturate - Vpkuhus = 91, + Vpkuhus = 124, /// vpkuwum: Vector Pack Unsigned Word Unsigned Modulo - Vpkuwum = 92, + Vpkuwum = 125, /// vpkuwus: Vector Pack Unsigned Word Unsigned Saturate - Vpkuwus = 93, + Vpkuwus = 126, /// vrefp: Vector Reciprocal Estimate Floating Point - Vrefp = 94, + Vrefp = 127, /// vrfim: Vector Round to Floating-Point Integer toward Minus Infinity - Vrfim = 95, + Vrfim = 128, /// vrfin: Vector Round to Floating-Point Integer Nearest - Vrfin = 96, + Vrfin = 129, /// vrfip: Vector Round to Floating-Point Integer toward Plus Infinity - Vrfip = 97, + Vrfip = 130, /// vrfiz: Vector Round to Floating-Point Integer toward Zero - Vrfiz = 98, + Vrfiz = 131, /// vrlb: Vector Rotate Left Integer Byte - Vrlb = 99, + Vrlb = 132, /// vrlh: Vector Rotate Left Integer Half Word - Vrlh = 100, + Vrlh = 133, /// vrlw: Vector Rotate Left Integer Word - Vrlw = 101, + Vrlw = 134, /// vrsqrtefp: Vector Reciprocal Square Root Estimate Floating Point - Vrsqrtefp = 102, + Vrsqrtefp = 135, /// vsel: Vector Conditional Select - Vsel = 103, + Vsel = 136, /// vsl: Vector Shift Left - Vsl = 104, + Vsl = 137, /// vslb: Vector Shift Left Integer Byte - Vslb = 105, + Vslb = 138, /// vsldoi: Vector Shift Left Double by Octet Immediate - Vsldoi = 106, + Vsldoi = 139, /// vslh: Vector Shift Left Integer Half Word - Vslh = 107, + Vslh = 140, /// vslo: Vector Shift Left by Octet - Vslo = 108, + Vslo = 141, /// vslw: Vector Shift Left Integer Word - Vslw = 109, + Vslw = 142, /// vspltb: Vector Splat Byte - Vspltb = 110, + Vspltb = 143, /// vsplth: Vector Splat Half Word - Vsplth = 111, + Vsplth = 144, /// vspltisb: Vector Splat Immediate Signed Byte - Vspltisb = 112, + Vspltisb = 145, /// vspltish: Vector Splat Immediate Signed Half Word - Vspltish = 113, + Vspltish = 146, /// vspltisw: Vector Splat Immediate Signed Word - Vspltisw = 114, + Vspltisw = 147, /// vspltw: Vector Splat Word - Vspltw = 115, + Vspltw = 148, /// vsr: Vector Shift Right - Vsr = 116, + Vsr = 149, /// vsrab: Vector Shift Right Algebraic Byte - Vsrab = 117, + Vsrab = 150, /// vsrah: Vector Shift Right Algebraic Half Word - Vsrah = 118, + Vsrah = 151, /// vsraw: Vector Shift Right Algebraic Word - Vsraw = 119, + Vsraw = 152, /// vsrb: Vector Shift Right Byte - Vsrb = 120, + Vsrb = 153, /// vsrh: Vector Shift Right Half Word - Vsrh = 121, + Vsrh = 154, /// vsro: Vector Shift Right by Octet - Vsro = 122, + Vsro = 155, /// vsrw: Vector Shift Right Word - Vsrw = 123, + Vsrw = 156, /// vsubcuw: Vector Subtract Carryout Unsigned Word - Vsubcuw = 124, + Vsubcuw = 157, /// vsubfp: Vector Subtract Floating Point - Vsubfp = 125, + Vsubfp = 158, /// vsubsbs: Vector Subtract Signed Byte Saturate - Vsubsbs = 126, + Vsubsbs = 159, /// vsubshs: Vector Subtract Signed Half Word Saturate - Vsubshs = 127, + Vsubshs = 160, /// vsubsws: Vector Subtract Signed Word Saturate - Vsubsws = 128, + Vsubsws = 161, /// vsububm: Vector Subtract Unsigned Byte Modulo - Vsububm = 129, + Vsububm = 162, /// vsububs: Vector Subtract Unsigned Byte Saturate - Vsububs = 130, + Vsububs = 163, /// vsubuhm: Vector Subtract Unsigned Half Word Modulo - Vsubuhm = 131, + Vsubuhm = 164, /// vsubuhs: Vector Subtract Unsigned Half Word Saturate - Vsubuhs = 132, + Vsubuhs = 165, /// vsubuwm: Vector Subtract Unsigned Word Modulo - Vsubuwm = 133, + Vsubuwm = 166, /// vsubuws: Vector Subtract Unsigned Word Saturate - Vsubuws = 134, + Vsubuws = 167, /// vsumsws: Vector Sum Across Signed Word Saturate - Vsumsws = 135, + Vsumsws = 168, /// vsum2sws: Vector Sum Across Partial (1/2) Signed Word Saturate - Vsum2sws = 136, + Vsum2sws = 169, /// vsum4sbs: Vector Sum Across Partial (1/4) Signed Byte Saturate - Vsum4sbs = 137, + Vsum4sbs = 170, /// vsum4shs: Vector Sum Across Partial (1/4) Signed Half Word Saturate - Vsum4shs = 138, + Vsum4shs = 171, /// vsum4ubs: Vector Sum Across Partial (1/4) Unsigned Byte Saturate - Vsum4ubs = 139, + Vsum4ubs = 172, /// vupkhpx: Vector Unpack High Pixel16 - Vupkhpx = 140, + Vupkhpx = 173, /// vupkhsb: Vector Unpack High Signed Byte - Vupkhsb = 141, + Vupkhsb = 174, /// vupkhsh: Vector Unpack High Signed Half Word - Vupkhsh = 142, + Vupkhsh = 175, /// vupklpx: Vector Unpack Low Pixel16 - Vupklpx = 143, + Vupklpx = 176, /// vupklsb: Vector Unpack Low Signed Byte - Vupklsb = 144, + Vupklsb = 177, /// vupklsh: Vector Unpack Low Signed Half Word - Vupklsh = 145, + Vupklsh = 178, /// vxor: Vector Logical XOR - Vxor = 146, + Vxor = 179, /// lvewx128: Load Vector128 Element Word Indexed - Lvewx128 = 147, + Lvewx128 = 180, /// lvlx128: Load Vector128 Left Indexed - Lvlx128 = 148, + Lvlx128 = 181, /// lvlxl128: Load Vector128 Left Indexed LRU - Lvlxl128 = 149, + Lvlxl128 = 182, /// lvrx128: Load Vector128 Right Indexed - Lvrx128 = 150, + Lvrx128 = 183, /// lvrxl128: Load Vector128 Right Indexed LRU - Lvrxl128 = 151, + Lvrxl128 = 184, /// lvsl128: Load Vector128 for Shift Left - Lvsl128 = 152, + Lvsl128 = 185, /// lvsr128: Load Vector128 for Shift Right - Lvsr128 = 153, + Lvsr128 = 186, /// lvx128: Load Vector128 Indexed - Lvx128 = 154, + Lvx128 = 187, /// lvxl128: Load Vector128 Indexed LRU - Lvxl128 = 155, + Lvxl128 = 188, /// stvewx128: Store Vector128 Element Word Indexed - Stvewx128 = 156, + Stvewx128 = 189, /// stvlx128: Store Vector128 Left Indexed - Stvlx128 = 157, + Stvlx128 = 190, /// stvlxl128: Store Vector128 Left Indexed LRU - Stvlxl128 = 158, + Stvlxl128 = 191, /// stvrx128: Store Vector128 Right Indexed - Stvrx128 = 159, + Stvrx128 = 192, /// stvrxl128: Store Vector128 Right Indexed LRU - Stvrxl128 = 160, + Stvrxl128 = 193, /// stvx128: Store Vector128 Indexed - Stvx128 = 161, + Stvx128 = 194, /// stvxl128: Store Vector128 Indexed LRU - Stvxl128 = 162, + Stvxl128 = 195, /// vsldoi128: Vector128 Shift Left Double by Octet Immediate - Vsldoi128 = 163, + Vsldoi128 = 196, /// vaddfp128: Vector128 Add Floating Point - Vaddfp128 = 164, + Vaddfp128 = 197, /// vand128: Vector128 Logical AND - Vand128 = 165, + Vand128 = 198, /// vandc128: Vector128 Logical AND with Complement - Vandc128 = 166, + Vandc128 = 199, /// vmaddcfp128: Vector128 Multiply Add Carryout Floating Point - Vmaddcfp128 = 167, + Vmaddcfp128 = 200, /// vmaddfp128: Vector128 Multiply Add Floating Point - Vmaddfp128 = 168, + Vmaddfp128 = 201, /// vmsum3fp128: Vector128 Multiply Sum 3-way Floating Point - Vmsum3fp128 = 169, + Vmsum3fp128 = 202, /// vmsum4fp128: Vector128 Multiply Sum 4-way Floating Point - Vmsum4fp128 = 170, + Vmsum4fp128 = 203, /// vmulfp128: Vector128 Multiply Floating-Point - Vmulfp128 = 171, + Vmulfp128 = 204, /// vnmsubfp128: Vector128 Negative Multiply-Subtract Floating Point - Vnmsubfp128 = 172, + Vnmsubfp128 = 205, /// vnor128: Vector128 Logical NOR - Vnor128 = 173, + Vnor128 = 206, /// vor128: Vector128 Logical OR - Vor128 = 174, + Vor128 = 207, /// vperm128: Vector128 Permutation - Vperm128 = 175, + Vperm128 = 208, /// vpkshss128: Vector128 Pack Signed Half Word Signed Saturate - Vpkshss128 = 176, + Vpkshss128 = 209, /// vpkshus128: Vector128 Pack Signed Half Word Unsigned Saturate - Vpkshus128 = 177, + Vpkshus128 = 210, /// vpkswss128: Vector128 Pack Signed Word Signed Saturate - Vpkswss128 = 178, + Vpkswss128 = 211, /// vpkswus128: Vector128 Pack Signed Word Unsigned Saturate - Vpkswus128 = 179, + Vpkswus128 = 212, /// vpkuhum128: Vector128 Pack Unsigned Half Word Unsigned Modulo - Vpkuhum128 = 180, + Vpkuhum128 = 213, /// vpkuhus128: Vector128 Pack Unsigned Half Word Unsigned Saturate - Vpkuhus128 = 181, + Vpkuhus128 = 214, /// vpkuwum128: Vector128 Pack Unsigned Word Unsigned Modulo - Vpkuwum128 = 182, + Vpkuwum128 = 215, /// vpkuwus128: Vector128 Pack Unsigned Word Unsigned Saturate - Vpkuwus128 = 183, + Vpkuwus128 = 216, /// vsel128: Vector128 Select - Vsel128 = 184, + Vsel128 = 217, /// vslo128: Vector128 Shift Left Octet - Vslo128 = 185, + Vslo128 = 218, /// vsro128: Vector128 Shift Right Octet - Vsro128 = 186, + Vsro128 = 219, /// vsubfp128: Vector128 Subtract Floating Point - Vsubfp128 = 187, + Vsubfp128 = 220, /// vxor128: Vector128 Logical XOR - Vxor128 = 188, + Vxor128 = 221, /// vctsxs128: Vector128 Convert to Signed Fixed-Point Word Saturate - Vctsxs128 = 189, + Vctsxs128 = 222, /// vctuxs128: Vector128 Convert to Unsigned Fixed-Point Word Saturate - Vctuxs128 = 190, + Vctuxs128 = 223, /// vcmpbfp128: Vector128 Compare Bounds Floating Point - Vcmpbfp128 = 191, + Vcmpbfp128 = 224, /// vcmpeqfp128: Vector128 Compare Equal-to Floating Point - Vcmpeqfp128 = 192, + Vcmpeqfp128 = 225, /// vcmpequw128: Vector128 Compare Equal-to Unsigned Word - Vcmpequw128 = 193, + Vcmpequw128 = 226, /// vcmpgefp128: Vector128 Compare Greater-Than-or-Equal-to Floating Point - Vcmpgefp128 = 194, + Vcmpgefp128 = 227, /// vcmpgtfp128: Vector128 Compare Greater-Than Floating-Point - Vcmpgtfp128 = 195, + Vcmpgtfp128 = 228, /// vcfsx128: Vector128 Convert From Signed Fixed-Point Word - Vcfsx128 = 196, + Vcfsx128 = 229, /// vcfux128: Vector128 Convert From Unsigned Fixed-Point Word - Vcfux128 = 197, + Vcfux128 = 230, /// vexptefp128: Vector128 2 Raised to the Exponent Estimate Floating Point - Vexptefp128 = 198, + Vexptefp128 = 231, /// vlogefp128: Vector128 Log2 Estimate Floating Point - Vlogefp128 = 199, + Vlogefp128 = 232, /// vmaxfp128: Vector128 Maximum Floating Point - Vmaxfp128 = 200, + Vmaxfp128 = 233, /// vminfp128: Vector128 Minimum Floating Point - Vminfp128 = 201, + Vminfp128 = 234, /// vmrghw128: Vector128 Merge High Word - Vmrghw128 = 202, + Vmrghw128 = 235, /// vmrglw128: Vector128 Merge Low Word - Vmrglw128 = 203, + Vmrglw128 = 236, /// vpermwi128: Vector128 Permutate Word Immediate - Vpermwi128 = 204, + Vpermwi128 = 237, /// vpkd3d128: Vector128 Pack D3Dtype, Rotate Left Immediate and Mask Insert - Vpkd3d128 = 205, + Vpkd3d128 = 238, /// vrefp128: Vector128 Reciprocal Estimate Floating Point - Vrefp128 = 206, + Vrefp128 = 239, /// vrfim128: Vector128 Round to Floating-Point Integer toward Minus Infinity - Vrfim128 = 207, + Vrfim128 = 240, /// vrfin128: Vector128 Round to Floating-Point Integer toward Nearest - Vrfin128 = 208, + Vrfin128 = 241, /// vrfip128: Vector128 Round to Floating-Point Integer toward Plus Infinity - Vrfip128 = 209, + Vrfip128 = 242, /// vrfiz128: Vector128 Round to Floating-Point Integer toward Zero - Vrfiz128 = 210, + Vrfiz128 = 243, /// vrlimi128: Vector128 Rotate Left Immediate and Mask Insert - Vrlimi128 = 211, + Vrlimi128 = 244, /// vrlw128: Vector128 Rotate Left Word - Vrlw128 = 212, + Vrlw128 = 245, /// vrsqrtefp128: Vector128 Reciprocal Square Root Estimate Floating Point - Vrsqrtefp128 = 213, + Vrsqrtefp128 = 246, /// vslw128: Vector128 Shift Left Word - Vslw128 = 214, + Vslw128 = 247, /// vspltisw128: Vector128 Splat Immediate Signed Word - Vspltisw128 = 215, + Vspltisw128 = 248, /// vspltw128: Vector128 Splat Word - Vspltw128 = 216, + Vspltw128 = 249, /// vsraw128: Vector128 Shift Right Arithmetic Word - Vsraw128 = 217, + Vsraw128 = 250, /// vsrw128: Vector128 Shift Right Word - Vsrw128 = 218, + Vsrw128 = 251, /// vupkd3d128: Vector128 Unpack D3Dtype - Vupkd3d128 = 219, + Vupkd3d128 = 252, /// vupkhsb128: Vector128 Unpack High Signed Byte - Vupkhsb128 = 220, + Vupkhsb128 = 253, /// vupkhsh128: Vector128 Unpack High Signed Half Word - Vupkhsh128 = 221, + Vupkhsh128 = 254, /// vupklsb128: Vector128 Unpack Low Signed Byte - Vupklsb128 = 222, + Vupklsb128 = 255, /// vupklsh128: Vector128 Unpack Low Signed Half Word - Vupklsh128 = 223, + Vupklsh128 = 256, /// mulli: Multiply Low Immediate - Mulli = 224, + Mulli = 257, /// subfic: Subtract from Immediate Carrying - Subfic = 225, + Subfic = 258, /// cmpli: Compare Logical Immediate - Cmpli = 226, + Cmpli = 259, /// cmpi: Compare Immediate - Cmpi = 227, + Cmpi = 260, /// addic: Add Immediate Carrying - Addic = 228, + Addic = 261, /// addic.: Add Immediate Carrying and Record - Addic_ = 229, + Addic_ = 262, /// addi: Add Immediate - Addi = 230, + Addi = 263, /// addis: Add Immediate Shifted - Addis = 231, + Addis = 264, /// bc: Branch Conditional - Bc = 232, + Bc = 265, /// sc: System Call - Sc = 233, + Sc = 266, /// b: Branch - B = 234, + B = 267, /// bcctr: Branch Conditional to Count Register - Bcctr = 235, + Bcctr = 268, /// bclr: Branch Conditional to Link Register - Bclr = 236, + Bclr = 269, /// crand: Condition Register AND - Crand = 237, + Crand = 270, /// crandc: Condition Register AND with Complement - Crandc = 238, + Crandc = 271, /// creqv: Condition Register Equivalent - Creqv = 239, + Creqv = 272, /// crnand: Condition Register NAND - Crnand = 240, + Crnand = 273, /// crnor: Condition Register NOR - Crnor = 241, + Crnor = 274, /// cror: Condition Register OR - Cror = 242, + Cror = 275, /// crorc: Condition Register OR with Complement - Crorc = 243, + Crorc = 276, /// crxor: Condition Register XOR - Crxor = 244, + Crxor = 277, /// isync: Instruction Synchronize - Isync = 245, + Isync = 278, /// mcrf: Move Condition Register Field - Mcrf = 246, + Mcrf = 279, /// rfi: Return from Interrupt - Rfi = 247, + Rfi = 280, /// rfid: Return from Interrupt Double Word - Rfid = 248, + Rfid = 281, /// rlwimi: Rotate Left Word Immediate then Mask Insert - Rlwimi = 249, + Rlwimi = 282, /// rlwinm: Rotate Left Word Immediate then AND with Mask - Rlwinm = 250, + Rlwinm = 283, /// rlwnm: Rotate Left Word then AND with Mask - Rlwnm = 251, + Rlwnm = 284, /// ori: OR Immediate - Ori = 252, + Ori = 285, /// oris: OR Immediate Shifted - Oris = 253, + Oris = 286, /// xori: XOR Immediate - Xori = 254, + Xori = 287, /// xoris: XOR Immediate Shifted - Xoris = 255, + Xoris = 288, /// andi.: AND Immediate - Andi_ = 256, + Andi_ = 289, /// andis.: AND Immediate Shifted - Andis_ = 257, + Andis_ = 290, /// rldcl: Rotate Left Double Word then Clear Left - Rldcl = 258, + Rldcl = 291, /// rldcr: Rotate Left Double Word then Clear Right - Rldcr = 259, + Rldcr = 292, /// rldic: Rotate Left Double Word Immediate then Clear - Rldic = 260, + Rldic = 293, /// rldicl: Rotate Left Double Word Immediate then Clear Left - Rldicl = 261, + Rldicl = 294, /// rldicr: Rotate Left Double Word Immediate then Clear Right - Rldicr = 262, + Rldicr = 295, /// rldimi: Rotate Left Double Word Immediate then Mask Insert - Rldimi = 263, + Rldimi = 296, /// add: Add - Add = 264, + Add = 297, /// addc: Add Carrying - Addc = 265, + Addc = 298, /// adde: Add Extended - Adde = 266, + Adde = 299, /// addme: Add to Minus One Extended - Addme = 267, + Addme = 300, /// addze: Add to Zero Extended - Addze = 268, + Addze = 301, /// and: AND - And = 269, + And = 302, /// andc: AND with Complement - Andc = 270, + Andc = 303, /// cmp: Compare - Cmp = 271, + Cmp = 304, /// cmpl: Compare Logical - Cmpl = 272, - /// cntlzd: Count Leading Zeros Double Word - Cntlzd = 273, + Cmpl = 305, /// cntlzw: Count Leading Zeros Word - Cntlzw = 274, + Cntlzw = 306, /// dcbf: Data Cache Block Flush - Dcbf = 275, + Dcbf = 307, /// dcbi: Data Cache Block Invalidate - Dcbi = 276, + Dcbi = 308, /// dcbst: Data Cache Block Store - Dcbst = 277, + Dcbst = 309, /// dcbt: Data Cache Block Touch - Dcbt = 278, + Dcbt = 310, /// dcbtst: Data Cache Block Touch for Store - Dcbtst = 279, + Dcbtst = 311, /// dcbz: Data Cache Block Clear to Zero - Dcbz = 280, - /// divd: Divide Double Word - Divd = 281, - /// divdu: Divide Double Word Unsigned - Divdu = 282, + Dcbz = 312, /// divw: Divide Word - Divw = 283, + Divw = 313, /// divwu: Divide Word Unsigned - Divwu = 284, + Divwu = 314, /// eciwx: External Control In Word Indexed - Eciwx = 285, + Eciwx = 315, /// ecowx: External Control Out Word Indexed - Ecowx = 286, + Ecowx = 316, /// eieio: Enforce In-Order Execution of I/O - Eieio = 287, + Eieio = 317, /// eqv: Equivalent - Eqv = 288, + Eqv = 318, /// extsb: Extend Sign Byte - Extsb = 289, + Extsb = 319, /// extsh: Extend Sign Half Word - Extsh = 290, - /// extsw: Extend Sign Word - Extsw = 291, + Extsh = 320, /// icbi: Instruction Cache Block Invalidate - Icbi = 292, + Icbi = 321, /// lbzux: Load Byte and Zero with Update Indexed - Lbzux = 293, + Lbzux = 322, /// lbzx: Load Byte and Zero Indexed - Lbzx = 294, - /// ldarx: Load Double Word and Reserve Indexed - Ldarx = 295, - /// ldux: Load Double Word with Update Indexed - Ldux = 296, - /// ldx: Load Double Word Indexed - Ldx = 297, + Lbzx = 323, /// lfdux: Load Floating-Point Double with Update Indexed - Lfdux = 298, + Lfdux = 324, /// lfdx: Load Floating-Point Double Indexed - Lfdx = 299, + Lfdx = 325, /// lfsux: Load Floating-Point Single with Update Indexed - Lfsux = 300, + Lfsux = 326, /// lfsx: Load Floating-Point Single Indexed - Lfsx = 301, + Lfsx = 327, /// lhaux: Load Half Word Algebraic with Update Indexed - Lhaux = 302, + Lhaux = 328, /// lhax: Load Half Word Algebraic Indexed - Lhax = 303, + Lhax = 329, /// lhbrx: Load Half Word Byte-Reverse Indexed - Lhbrx = 304, + Lhbrx = 330, /// lhzux: Load Half Word and Zero with Update Indexed - Lhzux = 305, + Lhzux = 331, /// lhzx: Load Half Word and Zero Indexed - Lhzx = 306, + Lhzx = 332, /// lswi: Load String Word Immediate - Lswi = 307, + Lswi = 333, /// lswx: Load String Word Indexed - Lswx = 308, + Lswx = 334, /// lwarx: Load String Word and Reverse Indexed - Lwarx = 309, - /// lwaux: Load Word Algebraic with Update Indexed - Lwaux = 310, - /// lwax: Load Word Algebraic Indexed - Lwax = 311, + Lwarx = 335, /// lwbrx: Load String Word and Byte-Reverse Indexed - Lwbrx = 312, + Lwbrx = 336, /// lwzux: Load Word and Zero with Update Indexed - Lwzux = 313, + Lwzux = 337, /// lwzx: Load Word and Zero Indexed - Lwzx = 314, + Lwzx = 338, /// mcrxr: Move to Condition Register from XER - Mcrxr = 315, + Mcrxr = 339, /// mfcr: Move from Condition Register - Mfcr = 316, + Mfcr = 340, /// mfmsr: Move from Machine State Register - Mfmsr = 317, + Mfmsr = 341, /// mfspr: Move from Special-Purpose Register - Mfspr = 318, + Mfspr = 342, /// mfsr: Move from Segment Register - Mfsr = 319, + Mfsr = 343, /// mfsrin: Move from Segment Register Indirect - Mfsrin = 320, + Mfsrin = 344, /// mftb: Move from Time Base - Mftb = 321, + Mftb = 345, /// mtcrf: Move to Condition Register Fields - Mtcrf = 322, + Mtcrf = 346, /// mtmsr: Move to Machine State Register - Mtmsr = 323, - /// mtmsrd: Move to Machine State Register Double Word - Mtmsrd = 324, + Mtmsr = 347, /// mtspr: Move to Special-Purpose Register - Mtspr = 325, + Mtspr = 348, /// mtsr: Move to Segment Register - Mtsr = 326, - /// mtsrd: Move to Segment Register Double Word - Mtsrd = 327, - /// mtsrdin: Move to Segment Register Double Word Indirect - Mtsrdin = 328, + Mtsr = 349, /// mtsrin: Move to Segment Register Indirect - Mtsrin = 329, - /// mulhd: Multiply High Double Word - Mulhd = 330, - /// mulhdu: Multiply High Double Word Unsigned - Mulhdu = 331, + Mtsrin = 350, /// mulhw: Multiply High Word - Mulhw = 332, + Mulhw = 351, /// mulhwu: Multiply High Word Unsigned - Mulhwu = 333, - /// mulld: Multiply Low Double Word - Mulld = 334, + Mulhwu = 352, /// mullw: Multiply Low Word - Mullw = 335, + Mullw = 353, /// nand: NAND - Nand = 336, + Nand = 354, /// neg: Negate - Neg = 337, + Neg = 355, /// nor: NOR - Nor = 338, + Nor = 356, /// or: OR - Or = 339, + Or = 357, /// orc: OR with Complement - Orc = 340, - /// slbia: SLB Invalidate All - Slbia = 341, - /// slbie: SLB Invalidate Entry - Slbie = 342, - /// sld: Shift Left Double Word - Sld = 343, + Orc = 358, /// slw: Shift Left Word - Slw = 344, - /// srad: Shift Right Algebraic Double Word - Srad = 345, - /// sradi: Shift Right Algebraic Double Word Immediate - Sradi = 346, + Slw = 359, /// sraw: Shift Right Algebraic Word - Sraw = 347, + Sraw = 360, /// srawi: Shift Right Algebraic Word Immediate - Srawi = 348, - /// srd: Shift Right Double Word - Srd = 349, + Srawi = 361, /// srw: Shift Right Word - Srw = 350, + Srw = 362, /// stbux: Store Byte with Update Indexed - Stbux = 351, + Stbux = 363, /// stbx: Store Byte Indexed - Stbx = 352, - /// stdcx.: Store Double Word Conditional Indexed - Stdcx_ = 353, - /// stdux: Store Double Word with Update Indexed - Stdux = 354, - /// stdx: Store Double Word Indexed - Stdx = 355, + Stbx = 364, /// stfdux: Store Floating-Point Double with Update Indexed - Stfdux = 356, + Stfdux = 365, /// stfdx: Store Floating-Point Double Indexed - Stfdx = 357, + Stfdx = 366, /// stfiwx: Store Floating-Point as Integer Word Indexed - Stfiwx = 358, + Stfiwx = 367, /// stfsux: Store Floating-Point Single with Update Indexed - Stfsux = 359, + Stfsux = 368, /// stfsx: Store Floating-Point Single Indexed - Stfsx = 360, + Stfsx = 369, /// sthbrx: Store Half Word Byte-Reverse Indexed - Sthbrx = 361, + Sthbrx = 370, /// sthux: Store Half Word with Update Indexed - Sthux = 362, + Sthux = 371, /// sthx: Store Half Word Indexed - Sthx = 363, + Sthx = 372, /// stswi: Store String Word Immediate - Stswi = 364, + Stswi = 373, /// stswx: Store String Word Indexed - Stswx = 365, + Stswx = 374, /// stwbrx: Store Word Byte-Reverse Indexed - Stwbrx = 366, + Stwbrx = 375, /// stwcx.: Store Word Conditional Indexed - Stwcx_ = 367, + Stwcx_ = 376, /// stwux: Store Word Indexed - Stwux = 368, + Stwux = 377, /// stwx: Store Word Indexed - Stwx = 369, + Stwx = 378, /// subf: Subtract From Carrying - Subf = 370, + Subf = 379, /// subfc: Subtract from Carrying - Subfc = 371, + Subfc = 380, /// subfe: Subtract from Extended - Subfe = 372, + Subfe = 381, /// subfme: Subtract from Minus One Extended - Subfme = 373, + Subfme = 382, /// subfze: Subtract from Zero Extended - Subfze = 374, + Subfze = 383, /// sync: Synchronize - Sync = 375, - /// td: Trap Double Word - Td = 376, + Sync = 384, /// tlbie: Translation Lookaside Buffer Invalidate Entry - Tlbie = 377, + Tlbie = 385, /// tlbsync: TLB Synchronize - Tlbsync = 378, + Tlbsync = 386, /// tw: Trap Word - Tw = 379, + Tw = 387, /// xor: XOR - Xor = 380, + Xor = 388, + /// cntlzd: Count Leading Zeros Double Word + Cntlzd = 389, + /// dcbzl: Data Cache Block Clear to Zero (128 bytes) + Dcbzl = 390, + /// divd: Divide Double Word + Divd = 391, + /// divdu: Divide Double Word Unsigned + Divdu = 392, + /// extsw: Extend Sign Word + Extsw = 393, + /// ldarx: Load Double Word and Reserve Indexed + Ldarx = 394, + /// ldux: Load Double Word with Update Indexed + Ldux = 395, + /// ldx: Load Double Word Indexed + Ldx = 396, + /// lwaux: Load Word Algebraic with Update Indexed + Lwaux = 397, + /// lwax: Load Word Algebraic Indexed + Lwax = 398, + /// mtmsrd: Move to Machine State Register Double Word + Mtmsrd = 399, + /// mtsrd: Move to Segment Register Double Word + Mtsrd = 400, + /// mtsrdin: Move to Segment Register Double Word Indirect + Mtsrdin = 401, + /// mulhd: Multiply High Double Word + Mulhd = 402, + /// mulhdu: Multiply High Double Word Unsigned + Mulhdu = 403, + /// mulld: Multiply Low Double Word + Mulld = 404, + /// slbia: SLB Invalidate All + Slbia = 405, + /// slbie: SLB Invalidate Entry + Slbie = 406, + /// sld: Shift Left Double Word + Sld = 407, + /// srad: Shift Right Algebraic Double Word + Srad = 408, + /// sradi: Shift Right Algebraic Double Word Immediate + Sradi = 409, + /// srd: Shift Right Double Word + Srd = 410, + /// stdcx.: Store Double Word Conditional Indexed + Stdcx_ = 411, + /// stdux: Store Double Word with Update Indexed + Stdux = 412, + /// stdx: Store Double Word Indexed + Stdx = 413, + /// td: Trap Double Word + Td = 414, /// dss: Data Stream Stop - Dss = 381, + Dss = 415, /// dst: Data Stream Touch - Dst = 382, + Dst = 416, /// dstst: Data Stream Touch for Store - Dstst = 383, + Dstst = 417, /// lvebx: Load Vector Element Byte Indexed - Lvebx = 384, + Lvebx = 418, /// lvehx: Load Vector Element Half Word Indexed - Lvehx = 385, + Lvehx = 419, /// lvewx: Load Vector Element Word Indexed - Lvewx = 386, + Lvewx = 420, /// lvlx: Load Vector Left Indexed - Lvlx = 387, + Lvlx = 421, /// lvlxl: Load Vector Left Indexed Last - Lvlxl = 388, + Lvlxl = 422, /// lvrx: Load Vector Right Indexed - Lvrx = 389, + Lvrx = 423, /// lvrxl: Load Vector Right Indexed Last - Lvrxl = 390, + Lvrxl = 424, /// lvsl: Load Vector for Shift Left - Lvsl = 391, + Lvsl = 425, /// lvsr: Load Vector for Shift Right - Lvsr = 392, + Lvsr = 426, /// lvx: Load Vector Indexed - Lvx = 393, + Lvx = 427, /// lvxl: Load Vector Indexed LRU - Lvxl = 394, + Lvxl = 428, /// stvebx: Store Vector Element Byte Indexed - Stvebx = 395, + Stvebx = 429, /// stvehx: Store Vector Element Half Word Indexed - Stvehx = 396, + Stvehx = 430, /// stvewx: Store Vector Element Word Indexed - Stvewx = 397, + Stvewx = 431, /// stvlx: Store Vector Left Indexed - Stvlx = 398, + Stvlx = 432, /// stvlxl: Store Vector Left Indexed Last - Stvlxl = 399, + Stvlxl = 433, /// stvrx: Store Vector Right Indexed - Stvrx = 400, + Stvrx = 434, /// stvrxl: Store Vector Right Indexed Last - Stvrxl = 401, + Stvrxl = 435, /// stvx: Store Vector Indexed - Stvx = 402, + Stvx = 436, /// stvxl: Store Vector Indexed LRU - Stvxl = 403, + Stvxl = 437, /// lwz: Load Word and Zero - Lwz = 404, + Lwz = 438, /// lwzu: Load Word and Zero with Update - Lwzu = 405, + Lwzu = 439, /// lbz: Load Byte and Zero - Lbz = 406, + Lbz = 440, /// lbzu: Load Byte and Zero with Update - Lbzu = 407, + Lbzu = 441, /// stw: Store Word - Stw = 408, + Stw = 442, /// stwu: Store Word with Update - Stwu = 409, + Stwu = 443, /// stb: Store Byte - Stb = 410, + Stb = 444, /// stbu: Store Byte with Update - Stbu = 411, + Stbu = 445, /// lhz: Load Half Word and Zero - Lhz = 412, + Lhz = 446, /// lhzu: Load Half Word and Zero with Update - Lhzu = 413, + Lhzu = 447, /// lha: Load Half Word Algebraic - Lha = 414, + Lha = 448, /// lhau: Load Half Word Algebraic with Update - Lhau = 415, + Lhau = 449, /// sth: Store Half Word - Sth = 416, + Sth = 450, /// sthu: Store Half Word with Update - Sthu = 417, + Sthu = 451, /// lmw: Load Multiple Word - Lmw = 418, + Lmw = 452, /// stmw: Store Multiple Word - Stmw = 419, + Stmw = 453, /// lfs: Load Floating-Point Single - Lfs = 420, + Lfs = 454, /// lfsu: Load Floating-Point Single with Update - Lfsu = 421, + Lfsu = 455, /// lfd: Load Floating-Point Double - Lfd = 422, + Lfd = 456, /// lfdu: Load Floating-Point Double with Update - Lfdu = 423, + Lfdu = 457, /// stfs: Store Floating-Point Single - Stfs = 424, + Stfs = 458, /// stfsu: Store Floating-Point Single with Update - Stfsu = 425, + Stfsu = 459, /// stfd: Store Floating-Point Double - Stfd = 426, + Stfd = 460, /// stfdu: Store Floating-Point Double with Update - Stfdu = 427, + Stfdu = 461, + /// psq_l: Paired Single Quantized Load + PsqL = 462, + /// psq_lu: Paired Single Quantized Load with Update + PsqLu = 463, /// ld: Load Double Word - Ld = 428, + Ld = 464, /// ldu: Load Double Word with Update - Ldu = 429, + Ldu = 465, /// lwa: Load Word Algebraic - Lwa = 430, + Lwa = 466, /// fadds: Floating Add (Single-Precision) - Fadds = 431, + Fadds = 467, /// fdivs: Floating Divide (Single-Precision) - Fdivs = 432, + Fdivs = 468, /// fmadds: Floating Multiply-Add (Single-Precision) - Fmadds = 433, + Fmadds = 469, /// fmsubs: Floating Multiply-Subtract (Single-Precision) - Fmsubs = 434, + Fmsubs = 470, /// fmuls: Floating Multiply (Single-Precision) - Fmuls = 435, + Fmuls = 471, /// fnmadds: Floating Negative Multiply-Add (Single-Precision) - Fnmadds = 436, + Fnmadds = 472, /// fnmsubs: Floating Negative Multiply-Subtract (Single-Precision) - Fnmsubs = 437, + Fnmsubs = 473, /// fres: Floating Reciprocal Estimate Single - Fres = 438, + Fres = 474, /// fsubs: Floating Subtract (Single-Precision) - Fsubs = 439, + Fsubs = 475, + /// psq_st: Paired Single Quantized Store + PsqSt = 476, + /// psq_stu: Paired Single Quantized Store with Update + PsqStu = 477, /// std: Store Double Word - Std = 440, + Std = 478, /// stdu: Store Double Word with Update - Stdu = 441, + Stdu = 479, /// fabs: Floating Absolute Value - Fabs = 442, + Fabs = 480, /// fadd: Floating Add (Double-Precision) - Fadd = 443, - /// fcfid: Floating Convert from Integer Double Word - Fcfid = 444, + Fadd = 481, /// fcmpo: Floating Compare Ordered - Fcmpo = 445, + Fcmpo = 482, /// fcmpu: Floating Compare Unordered - Fcmpu = 446, - /// fctid: Floating Convert to Integer Double Word - Fctid = 447, - /// fctidz: Floating Convert to Integer Double Word with Round toward Zero - Fctidz = 448, + Fcmpu = 483, /// fctiw: Floating Convert to Integer Word - Fctiw = 449, + Fctiw = 484, /// fctiwz: Floating Convert to Integer Word with Round toward Zero - Fctiwz = 450, + Fctiwz = 485, /// fdiv: Floating Divide (Double-Precision) - Fdiv = 451, + Fdiv = 486, /// fmadd: Floating Multiply-Add (Double-Precision) - Fmadd = 452, + Fmadd = 487, /// fmr: Floating Move Register (Double-Precision) - Fmr = 453, + Fmr = 488, /// fmsub: Floating Multiply-Subtract (Double-Precision) - Fmsub = 454, + Fmsub = 489, /// fmul: Floating Multiply (Double-Precision) - Fmul = 455, + Fmul = 490, /// fnabs: Floating Negative Absolute Value - Fnabs = 456, + Fnabs = 491, /// fneg: Floating Negate - Fneg = 457, + Fneg = 492, /// fnmadd: Floating Negative Multiply-Add (Double-Precision) - Fnmadd = 458, + Fnmadd = 493, /// fnmsub: Floating Negative Multiply-Subtract (Double-Precision) - Fnmsub = 459, + Fnmsub = 494, /// frsp: Floating Round to Single - Frsp = 460, + Frsp = 495, /// frsqrte: Floating Reciprocal Square Root Estimate - Frsqrte = 461, + Frsqrte = 496, /// fsel: Floating Select - Fsel = 462, + Fsel = 497, /// fsub: Floating Subtract (Double-Precision) - Fsub = 463, + Fsub = 498, /// mcrfs: Move to Condition Register from FPSCR - Mcrfs = 464, + Mcrfs = 499, /// mffs: Move from FPSCR - Mffs = 465, + Mffs = 500, /// mtfsb0: Move to FPSCR Bit 0 - Mtfsb0 = 466, + Mtfsb0 = 501, /// mtfsb1: Move to FPSCR Bit 1 - Mtfsb1 = 467, + Mtfsb1 = 502, /// mtfsf: Move to FPSCR Fields - Mtfsf = 468, + Mtfsf = 503, /// mtfsfi: Move to FPSCR Field Immediate - Mtfsfi = 469, + Mtfsfi = 504, + /// fcfid: Floating Convert from Integer Double Word + Fcfid = 505, + /// fctid: Floating Convert to Integer Double Word + Fctid = 506, + /// fctidz: Floating Convert to Integer Double Word with Round toward Zero + Fctidz = 507, } impl Opcode { - #[inline] pub fn mnemonic(self) -> &'static str { OPCODE_NAMES.get(self as usize).copied().unwrap_or("") } - #[inline] - pub fn detect(code: u32) -> Self { + pub fn detect(code: u32, extensions: Extensions) -> Self { let entry = OPCODE_ENTRIES[(code >> 26) as usize]; for i in entry.0..entry.1 { - let pattern = OPCODE_PATTERNS[i as usize]; - if (code & pattern.0) == pattern.1 { + let op = OPCODE_PATTERNS[i as usize]; + if extensions.contains_all(op.extensions) + && (code & op.bitmask) == op.pattern + { // Safety: The enum is repr(u16) and the value is within the enum's range return unsafe { core::mem::transmute::(i) }; } @@ -1985,7 +2697,7 @@ impl Opcode { impl From for Opcode { #[inline] fn from(value: u16) -> Self { - if value > 469 { + if value > 507 { Self::Illegal } else { // Safety: The enum is repr(u16) and the value is within the enum's range @@ -2010,26 +2722,11 @@ impl Ins { pub const fn field_uimm(&self) -> u16 { (self.code & 0xffff) as u16 } - /// vsimm: Vector Signed Immediate - #[inline(always)] - pub const fn field_vsimm(&self) -> i8 { - ((((self.code >> 16) & 0x1f) << 3) as i8) >> 3 - } - /// vuimm: Vector Unsigned Immediate - #[inline(always)] - pub const fn field_vuimm(&self) -> u8 { - ((self.code >> 16) & 0x1f) as u8 - } /// offset: Branch Offset #[inline(always)] pub const fn field_offset(&self) -> i16 { (self.code & 0xffff) as i16 } - /// ds: Load/Store Double Word Offset (for 64-bit instructions) - #[inline(always)] - pub const fn field_ds(&self) -> i16 { - (self.code & 0xfffc) as i16 - } /// BO: Branch Options #[inline(always)] pub const fn field_bo(&self) -> u8 { @@ -2055,31 +2752,16 @@ impl Ins { pub const fn field_sh(&self) -> u8 { ((self.code >> 11) & 0x1f) as u8 } - /// SH64: Shift Amount (for 64-bit instructions) - #[inline(always)] - pub const fn field_sh64(&self) -> u8 { - (((self.code >> 11) & 0x1f) | ((self.code & 0x2) << 4)) as u8 - } /// MB: Mask Begin #[inline(always)] pub const fn field_mb(&self) -> u8 { ((self.code >> 6) & 0x1f) as u8 } - /// MB64: Mask Begin (for 64-bit instructions) - #[inline(always)] - pub const fn field_mb64(&self) -> u8 { - (((self.code >> 6) & 0x1f) | (self.code & 0x20)) as u8 - } /// ME: Mask End #[inline(always)] pub const fn field_me(&self) -> u8 { ((self.code >> 1) & 0x1f) as u8 } - /// ME64: Mask End (for 64-bit instructions) - #[inline(always)] - pub const fn field_me64(&self) -> u8 { - (((self.code >> 6) & 0x1f) | (self.code & 0x20)) as u8 - } /// rS: Source Register #[inline(always)] pub const fn field_rs(&self) -> u8 { @@ -2135,31 +2817,6 @@ impl Ins { pub const fn field_frc(&self) -> u8 { ((self.code >> 6) & 0x1f) as u8 } - /// vS: Vector Source Register - #[inline(always)] - pub const fn field_vs(&self) -> u8 { - ((self.code >> 21) & 0x1f) as u8 - } - /// vD: Vector Destination Register - #[inline(always)] - pub const fn field_vd(&self) -> u8 { - ((self.code >> 21) & 0x1f) as u8 - } - /// vA: Vector Register A - #[inline(always)] - pub const fn field_va(&self) -> u8 { - ((self.code >> 16) & 0x1f) as u8 - } - /// vB: Vector Register B - #[inline(always)] - pub const fn field_vb(&self) -> u8 { - ((self.code >> 11) & 0x1f) as u8 - } - /// vC: Vector Register C - #[inline(always)] - pub const fn field_vc(&self) -> u8 { - ((self.code >> 6) & 0x1f) as u8 - } /// crbD: Condition Register Bit Destination #[inline(always)] pub const fn field_crbd(&self) -> u8 { @@ -2230,15 +2887,95 @@ impl Ins { pub const fn field_l(&self) -> u8 { ((self.code >> 21) & 0x1) as u8 } + /// sync_L: L field for sync + #[inline(always)] + pub const fn field_sync_l(&self) -> u8 { + ((self.code >> 21) & 0x3) as u8 + } + /// ds: Load/Store Double Word Offset (for 64-bit instructions) + #[inline(always)] + pub const fn field_ds(&self) -> i16 { + (self.code & 0xfffc) as i16 + } + /// SH64: Shift Amount (for 64-bit instructions) + #[inline(always)] + pub const fn field_sh64(&self) -> u8 { + (((self.code >> 11) & 0x1f) | ((self.code & 0x2) << 4)) as u8 + } + /// MB64: Mask Begin (for 64-bit instructions) + #[inline(always)] + pub const fn field_mb64(&self) -> u8 { + (((self.code >> 6) & 0x1f) | (self.code & 0x20)) as u8 + } + /// ME64: Mask End (for 64-bit instructions) + #[inline(always)] + pub const fn field_me64(&self) -> u8 { + (((self.code >> 6) & 0x1f) | (self.code & 0x20)) as u8 + } /// mtmsrd_L: L field for mtmsrd #[inline(always)] pub const fn field_mtmsrd_l(&self) -> u8 { ((self.code >> 16) & 0x1) as u8 } - /// sync_L: L field for sync + /// ps_offset: Paired Single Offset #[inline(always)] - pub const fn field_sync_l(&self) -> u8 { - ((self.code >> 21) & 0x3) as u8 + pub const fn field_ps_offset(&self) -> i16 { + (((self.code & 0xfff) << 4) as i16) >> 4 + } + /// ps_I + #[inline(always)] + pub const fn field_ps_i(&self) -> u8 { + ((self.code >> 12) & 0x7) as u8 + } + /// ps_IX + #[inline(always)] + pub const fn field_ps_ix(&self) -> u8 { + ((self.code >> 7) & 0x7) as u8 + } + /// ps_W + #[inline(always)] + pub const fn field_ps_w(&self) -> u8 { + ((self.code >> 15) & 0x1) as u8 + } + /// ps_WX + #[inline(always)] + pub const fn field_ps_wx(&self) -> u8 { + ((self.code >> 10) & 0x1) as u8 + } + /// vsimm: Vector Signed Immediate + #[inline(always)] + pub const fn field_vsimm(&self) -> i8 { + ((((self.code >> 16) & 0x1f) << 3) as i8) >> 3 + } + /// vuimm: Vector Unsigned Immediate + #[inline(always)] + pub const fn field_vuimm(&self) -> u8 { + ((self.code >> 16) & 0x1f) as u8 + } + /// vS: Vector Source Register + #[inline(always)] + pub const fn field_vs(&self) -> u8 { + ((self.code >> 21) & 0x1f) as u8 + } + /// vD: Vector Destination Register + #[inline(always)] + pub const fn field_vd(&self) -> u8 { + ((self.code >> 21) & 0x1f) as u8 + } + /// vA: Vector Register A + #[inline(always)] + pub const fn field_va(&self) -> u8 { + ((self.code >> 16) & 0x1f) as u8 + } + /// vB: Vector Register B + #[inline(always)] + pub const fn field_vb(&self) -> u8 { + ((self.code >> 11) & 0x1f) as u8 + } + /// vC: Vector Register C + #[inline(always)] + pub const fn field_vc(&self) -> u8 { + ((self.code >> 6) & 0x1f) as u8 } /// ds_A: All field for ds instructions #[inline(always)] @@ -2463,6 +3200,477 @@ fn basic_dcbz_l(out: &mut ParsedIns, ins: Ins) { ], }; } +fn basic_psq_lux(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_lux", + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_wx() as _)), + Argument::GQR(GQR(ins.field_ps_ix() as _)), + ], + }; +} +fn basic_psq_lx(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_lx", + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_wx() as _)), + Argument::GQR(GQR(ins.field_ps_ix() as _)), + ], + }; +} +fn basic_psq_stux(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_stux", + args: [ + Argument::FPR(FPR(ins.field_frs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_wx() as _)), + Argument::GQR(GQR(ins.field_ps_ix() as _)), + ], + }; +} +fn basic_psq_stx(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_stx", + args: [ + Argument::FPR(FPR(ins.field_frs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_wx() as _)), + Argument::GQR(GQR(ins.field_ps_ix() as _)), + ], + }; +} +fn basic_ps_abs(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_abs", "ps_abs."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_add(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_add", "ps_add."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_cmpo0(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ps_cmpo0", + args: [ + Argument::CRField(CRField(ins.field_crfd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ps_cmpo1(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ps_cmpo1", + args: [ + Argument::CRField(CRField(ins.field_crfd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ps_cmpu0(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ps_cmpu0", + args: [ + Argument::CRField(CRField(ins.field_crfd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ps_cmpu1(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ps_cmpu1", + args: [ + Argument::CRField(CRField(ins.field_crfd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ps_div(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_div", "ps_div."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_madd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_madd", "ps_madd."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_madds0(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_madds0", "ps_madds0."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_madds1(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_madds1", "ps_madds1."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_merge00(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_merge00", "ps_merge00."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_merge01(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_merge01", "ps_merge01."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_merge10(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_merge10", "ps_merge10."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_merge11(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_merge11", "ps_merge11."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_mr(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_mr", "ps_mr."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_msub(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_msub", "ps_msub."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_mul(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_mul", "ps_mul."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_muls0(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_muls0", "ps_muls0."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_muls1(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_muls1", "ps_muls1."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_nabs(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_nabs", "ps_nabs."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_neg(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_neg", "ps_neg."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_nmadd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_nmadd", "ps_nmadd."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_nmsub(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_nmsub", "ps_nmsub."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_res(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_res", "ps_res."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_rsqrte(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_rsqrte", "ps_rsqrte."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_sel(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_sel", "ps_sel."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_sub(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_sub", "ps_sub."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ps_sum0(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_sum0", "ps_sum0."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} +fn basic_ps_sum1(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["ps_sum1", "ps_sum1."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + ], + } + }; +} fn basic_mfvscr(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "mfvscr", @@ -7769,21 +8977,6 @@ fn simplified_cmpl(out: &mut ParsedIns, ins: Ins) { } basic_cmpl(out, ins) } -fn basic_cntlzd(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["cntlzd", "cntlzd."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - } - }; -} fn basic_cntlzw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["cntlzw", "cntlzw."]; @@ -7871,38 +9064,6 @@ fn basic_dcbz(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_divd(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 4] = ["divd", "divdo", "divd.", "divdo."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_oe() as usize - | (ins.field_rc() as usize) << 1], - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} -fn basic_divdu(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 4] = ["divdu", "divduo", "divdu.", "divduo."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_oe() as usize - | (ins.field_rc() as usize) << 1], - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_divw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 4] = ["divw", "divwo", "divw.", "divwo."]; @@ -8010,21 +9171,6 @@ fn basic_extsh(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_extsw(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["extsw", "extsw."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - } - }; -} fn basic_icbi(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["icbi", "icbi."]; @@ -8064,42 +9210,6 @@ fn basic_lbzx(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_ldarx(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "ldarx", - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn basic_ldux(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "ldux", - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn basic_ldx(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "ldx", - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} fn basic_lfdux(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "lfdux", @@ -8244,30 +9354,6 @@ fn basic_lwarx(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_lwaux(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "lwaux", - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn basic_lwax(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "lwax", - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} fn basic_lwbrx(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "lwbrx", @@ -8610,18 +9696,6 @@ fn basic_mtmsr(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_mtmsrd(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "mtmsrd", - args: [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::OpaqueU(OpaqueU(ins.field_mtmsrd_l() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - }; -} fn basic_mtspr(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "mtspr", @@ -8870,30 +9944,6 @@ fn basic_mtsr(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_mtsrd(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "mtsrd", - args: [ - Argument::SR(SR(ins.field_sr() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - }; -} -fn basic_mtsrdin(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "mtsrdin", - args: [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - }; -} fn basic_mtsrin(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "mtsrin", @@ -8906,36 +9956,6 @@ fn basic_mtsrin(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_mulhd(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["mulhd", "mulhd."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} -fn basic_mulhdu(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["mulhdu", "mulhdu."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_mulhw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["mulhw", "mulhw."]; @@ -8966,22 +9986,6 @@ fn basic_mulhwu(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_mulld(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 4] = ["mulld", "mulldo", "mulld.", "mulldo."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_oe() as usize - | (ins.field_rc() as usize) << 1], - args: [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_mullw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 4] = ["mullw", "mullwo", "mullw.", "mullwo."]; @@ -9093,39 +10097,6 @@ fn basic_orc(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_slbia(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "slbia", - args: EMPTY_ARGS, - }; -} -fn basic_slbie(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "slbie", - args: [ - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ], - }; -} -fn basic_sld(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["sld", "sld."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_slw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["slw", "slw."]; @@ -9141,36 +10112,6 @@ fn basic_slw(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_srad(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["srad", "srad."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} -fn basic_sradi(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["sradi", "sradi."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::OpaqueU(OpaqueU(ins.field_sh64() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_sraw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["sraw", "sraw."]; @@ -9201,21 +10142,6 @@ fn basic_srawi(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_srd(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["srd", "srd."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - } - }; -} fn basic_srw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["srw", "srw."]; @@ -9255,42 +10181,6 @@ fn basic_stbx(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_stdcx_(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "stdcx.", - args: [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn basic_stdux(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "stdux", - args: [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn basic_stdx(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "stdx", - args: [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} fn basic_stfdux(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "stfdux", @@ -9575,47 +10465,6 @@ fn simplified_sync(out: &mut ParsedIns, ins: Ins) { } basic_sync(out, ins) } -fn basic_td(out: &mut ParsedIns, ins: Ins) { - *out = ParsedIns { - mnemonic: "td", - args: [ - Argument::OpaqueU(OpaqueU(ins.field_to() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ], - }; -} -fn simplified_td(out: &mut ParsedIns, ins: Ins) { - if ins.field_to() == 0xc { - *out = ParsedIns { - mnemonic: "tdge", - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - }; - return; - } - if ins.field_to() == 0x5 { - *out = ParsedIns { - mnemonic: "tdlnl", - args: [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - }; - return; - } - basic_td(out, ins) -} fn basic_tlbie(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "tlbie", @@ -9697,6 +10546,377 @@ fn basic_xor(out: &mut ParsedIns, ins: Ins) { } }; } +fn basic_cntlzd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["cntlzd", "cntlzd."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_dcbzl(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "dcbzl", + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; +} +fn basic_divd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 4] = ["divd", "divdo", "divd.", "divdo."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_oe() as usize + | (ins.field_rc() as usize) << 1], + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_divdu(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 4] = ["divdu", "divduo", "divdu.", "divduo."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_oe() as usize + | (ins.field_rc() as usize) << 1], + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_extsw(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["extsw", "extsw."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_ldarx(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ldarx", + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ldux(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ldux", + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_ldx(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "ldx", + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_lwaux(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "lwaux", + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_lwax(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "lwax", + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_mtmsrd(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "mtmsrd", + args: [ + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::OpaqueU(OpaqueU(ins.field_mtmsrd_l() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; +} +fn basic_mtsrd(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "mtsrd", + args: [ + Argument::SR(SR(ins.field_sr() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; +} +fn basic_mtsrdin(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "mtsrdin", + args: [ + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; +} +fn basic_mulhd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["mulhd", "mulhd."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_mulhdu(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["mulhdu", "mulhdu."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_mulld(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 4] = ["mulld", "mulldo", "mulld.", "mulldo."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_oe() as usize + | (ins.field_rc() as usize) << 1], + args: [ + Argument::GPR(GPR(ins.field_rd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_slbia(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "slbia", + args: EMPTY_ARGS, + }; +} +fn basic_slbie(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "slbie", + args: [ + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + Argument::None, + ], + }; +} +fn basic_sld(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["sld", "sld."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_srad(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["srad", "srad."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_sradi(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["sradi", "sradi."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::OpaqueU(OpaqueU(ins.field_sh64() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_srd(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["srd", "srd."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_stdcx_(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "stdcx.", + args: [ + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_stdux(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "stdux", + args: [ + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_stdx(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "stdx", + args: [ + Argument::GPR(GPR(ins.field_rs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn basic_td(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "td", + args: [ + Argument::OpaqueU(OpaqueU(ins.field_to() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ], + }; +} +fn simplified_td(out: &mut ParsedIns, ins: Ins) { + if ins.field_to() == 0xc { + *out = ParsedIns { + mnemonic: "tdge", + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; + return; + } + if ins.field_to() == 0x5 { + *out = ParsedIns { + mnemonic: "tdlnl", + args: [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + }; + return; + } + basic_td(out, ins) +} fn basic_dss(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "dss", @@ -10290,6 +11510,30 @@ fn basic_stfdu(out: &mut ParsedIns, ins: Ins) { ], }; } +fn basic_psq_l(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_l", + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::Offset(Offset(ins.field_ps_offset() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_w() as _)), + Argument::GQR(GQR(ins.field_ps_i() as _)), + ], + }; +} +fn basic_psq_lu(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_lu", + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::Offset(Offset(ins.field_ps_offset() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_w() as _)), + Argument::GQR(GQR(ins.field_ps_i() as _)), + ], + }; +} fn basic_ld(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "ld", @@ -10461,6 +11705,30 @@ fn basic_fsubs(out: &mut ParsedIns, ins: Ins) { } }; } +fn basic_psq_st(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_st", + args: [ + Argument::FPR(FPR(ins.field_frs() as _)), + Argument::Offset(Offset(ins.field_ps_offset() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_w() as _)), + Argument::GQR(GQR(ins.field_ps_i() as _)), + ], + }; +} +fn basic_psq_stu(out: &mut ParsedIns, ins: Ins) { + *out = ParsedIns { + mnemonic: "psq_stu", + args: [ + Argument::FPR(FPR(ins.field_frs() as _)), + Argument::Offset(Offset(ins.field_ps_offset() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::OpaqueU(OpaqueU(ins.field_ps_w() as _)), + Argument::GQR(GQR(ins.field_ps_i() as _)), + ], + }; +} fn basic_std(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "std", @@ -10515,21 +11783,6 @@ fn basic_fadd(out: &mut ParsedIns, ins: Ins) { } }; } -fn basic_fcfid(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["fcfid", "fcfid."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - } - }; -} fn basic_fcmpo(out: &mut ParsedIns, ins: Ins) { *out = ParsedIns { mnemonic: "fcmpo", @@ -10554,36 +11807,6 @@ fn basic_fcmpu(out: &mut ParsedIns, ins: Ins) { ], }; } -fn basic_fctid(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["fctid", "fctid."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - } - }; -} -fn basic_fctidz(out: &mut ParsedIns, ins: Ins) { - *out = { - static MODIFIERS: [&str; 2] = ["fctidz", "fctidz."]; - ParsedIns { - mnemonic: MODIFIERS[ins.field_rc() as usize], - args: [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ], - } - }; -} fn basic_fctiw(out: &mut ParsedIns, ins: Ins) { *out = { static MODIFIERS: [&str; 2] = ["fctiw", "fctiw."]; @@ -10896,13 +12119,91 @@ fn basic_mtfsfi(out: &mut ParsedIns, ins: Ins) { } }; } +fn basic_fcfid(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["fcfid", "fcfid."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_fctid(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["fctid", "fctid."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} +fn basic_fctidz(out: &mut ParsedIns, ins: Ins) { + *out = { + static MODIFIERS: [&str; 2] = ["fctidz", "fctidz."]; + ParsedIns { + mnemonic: MODIFIERS[ins.field_rc() as usize], + args: [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ], + } + }; +} fn mnemonic_illegal(out: &mut ParsedIns, _ins: Ins) { *out = ParsedIns::new(); } -static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ +static BASIC_MNEMONICS: [MnemonicFunction; 508] = [ basic_tdi, basic_twi, basic_dcbz_l, + basic_psq_lux, + basic_psq_lx, + basic_psq_stux, + basic_psq_stx, + basic_ps_abs, + basic_ps_add, + basic_ps_cmpo0, + basic_ps_cmpo1, + basic_ps_cmpu0, + basic_ps_cmpu1, + basic_ps_div, + basic_ps_madd, + basic_ps_madds0, + basic_ps_madds1, + basic_ps_merge00, + basic_ps_merge01, + basic_ps_merge10, + basic_ps_merge11, + basic_ps_mr, + basic_ps_msub, + basic_ps_mul, + basic_ps_muls0, + basic_ps_muls1, + basic_ps_nabs, + basic_ps_neg, + basic_ps_nmadd, + basic_ps_nmsub, + basic_ps_res, + basic_ps_rsqrte, + basic_ps_sel, + basic_ps_sub, + basic_ps_sum0, + basic_ps_sum1, basic_mfvscr, basic_mtvscr, basic_vaddcuw, @@ -11173,7 +12474,6 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_andc, basic_cmp, basic_cmpl, - basic_cntlzd, basic_cntlzw, basic_dcbf, basic_dcbi, @@ -11181,8 +12481,6 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_dcbt, basic_dcbtst, basic_dcbz, - basic_divd, - basic_divdu, basic_divw, basic_divwu, basic_eciwx, @@ -11191,13 +12489,9 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_eqv, basic_extsb, basic_extsh, - basic_extsw, basic_icbi, basic_lbzux, basic_lbzx, - basic_ldarx, - basic_ldux, - basic_ldx, basic_lfdux, basic_lfdx, basic_lfsux, @@ -11210,8 +12504,6 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_lswi, basic_lswx, basic_lwarx, - basic_lwaux, - basic_lwax, basic_lwbrx, basic_lwzux, basic_lwzx, @@ -11224,38 +12516,23 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_mftb, basic_mtcrf, basic_mtmsr, - basic_mtmsrd, basic_mtspr, basic_mtsr, - basic_mtsrd, - basic_mtsrdin, basic_mtsrin, - basic_mulhd, - basic_mulhdu, basic_mulhw, basic_mulhwu, - basic_mulld, basic_mullw, basic_nand, basic_neg, basic_nor, basic_or, basic_orc, - basic_slbia, - basic_slbie, - basic_sld, basic_slw, - basic_srad, - basic_sradi, basic_sraw, basic_srawi, - basic_srd, basic_srw, basic_stbux, basic_stbx, - basic_stdcx_, - basic_stdux, - basic_stdx, basic_stfdux, basic_stfdx, basic_stfiwx, @@ -11276,11 +12553,36 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_subfme, basic_subfze, basic_sync, - basic_td, basic_tlbie, basic_tlbsync, basic_tw, basic_xor, + basic_cntlzd, + basic_dcbzl, + basic_divd, + basic_divdu, + basic_extsw, + basic_ldarx, + basic_ldux, + basic_ldx, + basic_lwaux, + basic_lwax, + basic_mtmsrd, + basic_mtsrd, + basic_mtsrdin, + basic_mulhd, + basic_mulhdu, + basic_mulld, + basic_slbia, + basic_slbie, + basic_sld, + basic_srad, + basic_sradi, + basic_srd, + basic_stdcx_, + basic_stdux, + basic_stdx, + basic_td, basic_dss, basic_dst, basic_dstst, @@ -11328,6 +12630,8 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_stfsu, basic_stfd, basic_stfdu, + basic_psq_l, + basic_psq_lu, basic_ld, basic_ldu, basic_lwa, @@ -11340,15 +12644,14 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_fnmsubs, basic_fres, basic_fsubs, + basic_psq_st, + basic_psq_stu, basic_std, basic_stdu, basic_fabs, basic_fadd, - basic_fcfid, basic_fcmpo, basic_fcmpu, - basic_fctid, - basic_fctidz, basic_fctiw, basic_fctiwz, basic_fdiv, @@ -11370,18 +12673,53 @@ static BASIC_MNEMONICS: [MnemonicFunction; 470] = [ basic_mtfsb1, basic_mtfsf, basic_mtfsfi, + basic_fcfid, + basic_fctid, + basic_fctidz, ]; -#[inline] -pub fn parse_basic(out: &mut ParsedIns, ins: Ins) { +pub(crate) fn parse_basic(out: &mut ParsedIns, ins: Ins) { match BASIC_MNEMONICS.get(ins.op as usize) { Some(f) => f(out, ins), None => mnemonic_illegal(out, ins), } } -static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ +static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 508] = [ simplified_tdi, simplified_twi, basic_dcbz_l, + basic_psq_lux, + basic_psq_lx, + basic_psq_stux, + basic_psq_stx, + basic_ps_abs, + basic_ps_add, + basic_ps_cmpo0, + basic_ps_cmpo1, + basic_ps_cmpu0, + basic_ps_cmpu1, + basic_ps_div, + basic_ps_madd, + basic_ps_madds0, + basic_ps_madds1, + basic_ps_merge00, + basic_ps_merge01, + basic_ps_merge10, + basic_ps_merge11, + basic_ps_mr, + basic_ps_msub, + basic_ps_mul, + basic_ps_muls0, + basic_ps_muls1, + basic_ps_nabs, + basic_ps_neg, + basic_ps_nmadd, + basic_ps_nmsub, + basic_ps_res, + basic_ps_rsqrte, + basic_ps_sel, + basic_ps_sub, + basic_ps_sum0, + basic_ps_sum1, basic_mfvscr, basic_mtvscr, basic_vaddcuw, @@ -11652,7 +12990,6 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_andc, simplified_cmp, simplified_cmpl, - basic_cntlzd, basic_cntlzw, basic_dcbf, basic_dcbi, @@ -11660,8 +12997,6 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_dcbt, basic_dcbtst, basic_dcbz, - basic_divd, - basic_divdu, basic_divw, basic_divwu, basic_eciwx, @@ -11670,13 +13005,9 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_eqv, basic_extsb, basic_extsh, - basic_extsw, basic_icbi, basic_lbzux, basic_lbzx, - basic_ldarx, - basic_ldux, - basic_ldx, basic_lfdux, basic_lfdx, basic_lfsux, @@ -11689,8 +13020,6 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_lswi, basic_lswx, basic_lwarx, - basic_lwaux, - basic_lwax, basic_lwbrx, basic_lwzux, basic_lwzx, @@ -11703,38 +13032,23 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_mftb, basic_mtcrf, basic_mtmsr, - basic_mtmsrd, simplified_mtspr, basic_mtsr, - basic_mtsrd, - basic_mtsrdin, basic_mtsrin, - basic_mulhd, - basic_mulhdu, basic_mulhw, basic_mulhwu, - basic_mulld, basic_mullw, basic_nand, basic_neg, basic_nor, simplified_or, basic_orc, - basic_slbia, - basic_slbie, - basic_sld, basic_slw, - basic_srad, - basic_sradi, basic_sraw, basic_srawi, - basic_srd, basic_srw, basic_stbux, basic_stbx, - basic_stdcx_, - basic_stdux, - basic_stdx, basic_stfdux, basic_stfdx, basic_stfiwx, @@ -11755,11 +13069,36 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_subfme, basic_subfze, simplified_sync, - simplified_td, basic_tlbie, basic_tlbsync, simplified_tw, basic_xor, + basic_cntlzd, + basic_dcbzl, + basic_divd, + basic_divdu, + basic_extsw, + basic_ldarx, + basic_ldux, + basic_ldx, + basic_lwaux, + basic_lwax, + basic_mtmsrd, + basic_mtsrd, + basic_mtsrdin, + basic_mulhd, + basic_mulhdu, + basic_mulld, + basic_slbia, + basic_slbie, + basic_sld, + basic_srad, + basic_sradi, + basic_srd, + basic_stdcx_, + basic_stdux, + basic_stdx, + simplified_td, simplified_dss, basic_dst, basic_dstst, @@ -11807,6 +13146,8 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_stfsu, basic_stfd, basic_stfdu, + basic_psq_l, + basic_psq_lu, basic_ld, basic_ldu, basic_lwa, @@ -11819,15 +13160,14 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_fnmsubs, basic_fres, basic_fsubs, + basic_psq_st, + basic_psq_stu, basic_std, basic_stdu, basic_fabs, basic_fadd, - basic_fcfid, basic_fcmpo, basic_fcmpu, - basic_fctid, - basic_fctidz, basic_fctiw, basic_fctiwz, basic_fdiv, @@ -11849,9 +13189,11 @@ static SIMPLIFIED_MNEMONICS: [MnemonicFunction; 470] = [ basic_mtfsb1, basic_mtfsf, basic_mtfsfi, + basic_fcfid, + basic_fctid, + basic_fctidz, ]; -#[inline] -pub fn parse_simplified(out: &mut ParsedIns, ins: Ins) { +pub(crate) fn parse_simplified(out: &mut ParsedIns, ins: Ins) { match SIMPLIFIED_MNEMONICS.get(ins.op as usize) { Some(f) => f(out, ins), None => mnemonic_illegal(out, ins), @@ -11867,15 +13209,6 @@ fn uses_tdi(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_twi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_dcbz_l(out: &mut Arguments, ins: Ins) { *out = [ if ins.field_ra() != 0 { @@ -11889,6 +13222,113 @@ fn uses_dcbz_l(out: &mut Arguments, ins: Ins) { Argument::None, ]; } +fn defs_psq_lux(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn uses_psq_lux(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn defs_psq_lx(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_frd() as _)), + Argument::None, + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn uses_psq_stux(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_frs() as _)), + Argument::GPR(GPR(ins.field_ra() as _)), + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ]; +} +fn uses_psq_stx(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_frs() as _)), + if ins.field_ra() != 0 { + Argument::GPR(GPR(ins.field_ra() as _)) + } else { + Argument::None + }, + Argument::GPR(GPR(ins.field_rb() as _)), + Argument::None, + Argument::None, + ]; +} +fn uses_ps_abs(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn uses_ps_add(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn defs_ps_cmpo0(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::CRField(CRField(ins.field_crfd() as _)), + Argument::None, + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn uses_ps_cmpo0(out: &mut Arguments, ins: Ins) { + *out = [ + if ins.field_fra() != 0 { + Argument::FPR(FPR(ins.field_fra() as _)) + } else { + Argument::None + }, + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + Argument::None, + ]; +} +fn uses_ps_madd(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::FPR(FPR(ins.field_frb() as _)), + Argument::None, + Argument::None, + ]; +} +fn uses_ps_mul(out: &mut Arguments, ins: Ins) { + *out = [ + Argument::FPR(FPR(ins.field_fra() as _)), + Argument::FPR(FPR(ins.field_frc() as _)), + Argument::None, + Argument::None, + Argument::None, + ]; +} fn defs_mfvscr(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vd() as _)), @@ -11907,15 +13347,6 @@ fn uses_mtvscr(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vaddcuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vaddcuw(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va() as _)), @@ -11925,339 +13356,6 @@ fn uses_vaddcuw(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vaddfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vaddsbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddsbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vaddshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vaddsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vaddubm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddubm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vaddubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vadduhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vadduhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vadduhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vadduhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vadduwm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vadduwm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vadduws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vadduws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vandc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vandc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavgsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavgsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavgsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavgsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavgsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavgsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavgub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavgub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavguh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavguh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vavguw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vavguw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcfsx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vcfsx(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vb() as _)), @@ -12267,339 +13365,6 @@ fn uses_vcfsx(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vcfux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcfux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpbfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpbfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpeqfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpeqfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpequb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpequb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpequh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpequh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpequw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpequw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vctsxs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vctsxs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vctuxs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vctuxs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vexptefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vexptefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vlogefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vlogefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaddfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vmaddfp(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va() as _)), @@ -12609,141 +13374,6 @@ fn uses_vmaddfp(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vmaxfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmhaddshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vmhaddshs(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va() as _)), @@ -12753,987 +13383,6 @@ fn uses_vmhaddshs(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vmhraddshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmhraddshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vminfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmladduhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmladduhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmrghb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrghb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrghh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrghh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrghw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrghw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrglb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrglb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrglh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrglh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrglw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrglw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmsummbm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsummbm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmsumshm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsumshm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmsumshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsumshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmsumubm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsumubm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmsumuhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsumuhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmsumuhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsumuhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vmulesb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulesb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmulesh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulesh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmuleub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmuleub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmuleuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmuleuh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmulosb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulosb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmulosh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulosh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmuloub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmuloub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmulouh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulouh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vnmsubfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vnmsubfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vnor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vnor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vperm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vperm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vpkpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkshss(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkshss(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkshus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkshus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkswss(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkswss(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkswus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkswus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuhum(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuhum(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuhus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuhus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuwum(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuwum(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuwus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuwus(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfim(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfim(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfip(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfip(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfiz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfiz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrlb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrlb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrlh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrlh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrlw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrlw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrsqrtefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrsqrtefp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsel(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsel(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::VR(VR(ins.field_vc() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_vsl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vslb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsldoi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vsldoi(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va() as _)), @@ -13743,105 +13392,6 @@ fn uses_vsldoi(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vslh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vslo(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslo(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vslw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsplth(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsplth(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltisb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vspltisb(out: &mut Arguments, ins: Ins) { *out = [ Argument::Simm(Simm(ins.field_vsimm() as _)), @@ -13851,618 +13401,6 @@ fn uses_vspltisb(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vspltish(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltish(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Simm(Simm(ins.field_vsimm() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltisw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltisw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Simm(Simm(ins.field_vsimm() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::Uimm(Uimm(ins.field_vuimm() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrab(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrab(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrah(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrah(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsraw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsraw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsro(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsro(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubcuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubcuw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubfp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubsbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubsbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubshs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsububm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsububm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsububs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsububs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubuhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubuhm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubuhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubuhs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubuwm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubuwm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubuws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubuws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsumsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsumsws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsum2sws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsum2sws(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsum4sbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsum4sbs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsum4shs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsum4shs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsum4ubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsum4ubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupkhpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupkhpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupkhsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupkhsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupkhsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupkhsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupklpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupklpx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupklsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupklsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupklsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupklsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vxor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vxor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va() as _)), - Argument::VR(VR(ins.field_vb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_lvewx128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vds128() as _)), @@ -14472,295 +13410,6 @@ fn defs_lvewx128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_lvewx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvlx128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvlx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvlxl128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvlxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvrx128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvrx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvrxl128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvrxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvsl128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvsl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvsr128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvsr128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvx128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvxl128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvewx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvlx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvlxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvrx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvrxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvx128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvxl128(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsldoi128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vsldoi128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va128() as _)), @@ -14770,213 +13419,6 @@ fn uses_vsldoi128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vaddfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vaddfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vand128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vand128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vandc128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vandc128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaddcfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaddcfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaddfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaddfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmsum3fp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsum3fp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmsum4fp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmsum4fp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmulfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmulfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vnmsubfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vnmsubfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vnor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vnor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vperm128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vperm128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_va128() as _)), @@ -14986,249 +13428,6 @@ fn uses_vperm128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vpkshss128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkshss128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkshus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkshus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkswss128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkswss128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkswus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkswus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuhum128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuhum128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuhus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuhus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuwum128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuwum128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkuwus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpkuwus128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsel128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsel128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vslo128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslo128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsro128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsro128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsubfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsubfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vxor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vxor128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vctsxs128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vctsxs128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vb128() as _)), @@ -15238,285 +13437,6 @@ fn uses_vctsxs128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vctuxs128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vctuxs128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpbfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpbfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpeqfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpeqfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpequw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpequw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcmpgtfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcmpgtfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcfsx128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcfsx128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vcfux128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vcfux128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vexptefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vexptefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vlogefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vlogefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmaxfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmaxfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vminfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vminfp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrghw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrghw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vmrglw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vmrglw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpermwi128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vpermwi128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vpkd3d128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vpkd3d128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vb128() as _)), @@ -15526,249 +13446,6 @@ fn uses_vpkd3d128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vrefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfim128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfim128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfin128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfin128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfip128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfip128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrfiz128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrfiz128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrlimi128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrlimi128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrlw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrlw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vrsqrtefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vrsqrtefp128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vslw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vslw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltisw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltisw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vspltw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vspltw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsraw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsraw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vsrw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vsrw128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_va128() as _)), - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupkd3d128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_vupkd3d128(out: &mut Arguments, ins: Ins) { *out = [ Argument::VR(VR(ins.field_vb128() as _)), @@ -15778,78 +13455,6 @@ fn uses_vupkd3d128(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_vupkhsb128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupkhsb128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupkhsh128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupkhsh128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupklsb128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupklsb128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_vupklsh128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vds128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_vupklsh128(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vb128() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_mulli(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rd() as _)), @@ -15859,114 +13464,6 @@ fn defs_mulli(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_mulli(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_subfic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subfic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cmpli(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cmpli(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cmpi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cmpi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addic_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addic_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_addi(out: &mut Arguments, ins: Ins) { *out = [ if ins.field_ra() != 0 { @@ -15980,28 +13477,6 @@ fn uses_addi(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_addis(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addis(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_crand(out: &mut Arguments, ins: Ins) { *out = [ Argument::CRBit(CRBit(ins.field_crbd() as _)), @@ -16020,141 +13495,6 @@ fn uses_crand(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_crandc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_crandc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_creqv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_creqv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_crnand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_crnand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_crnor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_crnor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cror(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cror(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_crorc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_crorc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_crxor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_crxor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crba() as _)), - Argument::CRBit(CRBit(ins.field_crbb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mcrf(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_mcrf(out: &mut Arguments, ins: Ins) { *out = [ Argument::CRField(CRField(ins.field_crfs() as _)), @@ -16164,15 +13504,6 @@ fn uses_mcrf(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_rlwimi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_rlwimi(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_ra() as _)), @@ -16182,15 +13513,6 @@ fn uses_rlwimi(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_rlwinm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_rlwinm(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -16200,15 +13522,6 @@ fn uses_rlwinm(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_rlwnm(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_rlwnm(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -16218,87 +13531,6 @@ fn uses_rlwnm(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_ori(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ori(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_oris(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_oris(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_xori(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_xori(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_xoris(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_xoris(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_andi_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_andi_(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rb() as _)), @@ -16308,502 +13540,6 @@ fn uses_andi_(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_andis_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_andis_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldcl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldcl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldcr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldcr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldic(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldicl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldicl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldicr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldicr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_rldimi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_rldimi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_add(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_add(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_adde(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_adde(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addme(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addme(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_addze(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_addze(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_and(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_and(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_andc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_andc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cmp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cmp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cmpl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cmpl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cntlzd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cntlzd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_cntlzw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_cntlzw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbf(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbi(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbst(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbt(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbtst(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_dcbz(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_divd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_divd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_divdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_divdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_divw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_divw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_divwu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_divwu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_eciwx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_eciwx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_ecowx(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -16817,91 +13553,6 @@ fn uses_ecowx(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_eqv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_eqv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_extsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_extsb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_extsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_extsh(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_extsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_extsw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_icbi(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_lbzux(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rd() as _)), @@ -16911,445 +13562,6 @@ fn defs_lbzux(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_lbzux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lbzx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lbzx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_ldarx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ldarx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_ldux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ldux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_ldx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ldx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfdx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfdx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfsux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfsux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfsx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfsx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhaux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhaux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhax(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhax(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhbrx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhbrx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhzux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhzux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhzx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhzx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lswi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lswi(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lswx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lswx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwarx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwarx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwaux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwaux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwax(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwax(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwbrx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwbrx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwzux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwzux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwzx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwzx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_mcrxr(out: &mut Arguments, ins: Ins) { *out = [ Argument::CRField(CRField(ins.field_crfd() as _)), @@ -17359,501 +13571,6 @@ fn defs_mcrxr(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_mfcr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mfmsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mfspr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mfsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mfsrin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mfsrin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mftb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtcrf(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtmsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtmsrd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::OpaqueU(OpaqueU(ins.field_mtmsrd_l() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtspr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtsrd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtsrdin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtsrin(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mulhd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mulhd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mulhdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mulhdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mulhw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mulhw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mulhwu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mulhwu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mulld(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mulld(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mullw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mullw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_nand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_nand(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_neg(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_neg(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_nor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_nor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_or(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_or(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_orc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_orc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_slbie(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_sld(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sld(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_slw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_slw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_srad(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_srad(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_sradi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sradi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_sraw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sraw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_srawi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_srawi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_srd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_srd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_srw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_srw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_stbux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_stbux(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -17863,191 +13580,6 @@ fn uses_stbux(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_stbx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stdcx_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_stdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_stdx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stdx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_stfdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stfdux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stfdx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stfiwx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_stfsux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stfsux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stfsx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_sthbrx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_sthux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sthux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_sthx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} fn uses_stswi(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -18061,166 +13593,6 @@ fn uses_stswi(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_stswx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stwbrx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stwcx_(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_stwux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stwux(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn uses_stwx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_subf(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subf(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_subfc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subfc(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_subfe(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subfe(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_subfme(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subfme(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_subfze(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_subfze(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_sync(out: &mut Arguments, ins: Ins) { *out = [ Argument::OpaqueU(OpaqueU(ins.field_sync_l() as _)), @@ -18230,46 +13602,10 @@ fn uses_sync(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_td(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_tlbie(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_tw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_xor(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_xor(out: &mut Arguments, ins: Ins) { +fn uses_mtmsrd(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), + Argument::OpaqueU(OpaqueU(ins.field_mtmsrd_l() as _)), Argument::None, Argument::None, Argument::None, @@ -18293,383 +13629,6 @@ fn uses_dst(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_dstst(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::OpaqueU(OpaqueU(ins.field_strm() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_lvebx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvebx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvehx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvehx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvewx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvewx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvlx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvlx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvlxl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvlxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvrx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvrx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvrxl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvrxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvsl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvsl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvsr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvsr(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvx(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lvxl(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::VR(VR(ins.field_vd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lvxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvebx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvehx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvewx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvlx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvlxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvrx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvrxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvx(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stvxl(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::GPR(GPR(ins.field_rb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_lwz(out: &mut Arguments, ins: Ins) { *out = [ Argument::Offset(Offset(ins.field_offset() as _)), @@ -18683,15 +13642,6 @@ fn uses_lwz(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_lwzu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_lwzu(out: &mut Arguments, ins: Ins) { *out = [ Argument::Offset(Offset(ins.field_offset() as _)), @@ -18701,68 +13651,6 @@ fn uses_lwzu(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_lbz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lbz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lbzu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lbzu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_stwu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_stwu(out: &mut Arguments, ins: Ins) { *out = [ Argument::GPR(GPR(ins.field_rs() as _)), @@ -18772,263 +13660,6 @@ fn uses_stwu(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_stb(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_stbu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stbu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhzu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhzu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lha(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lha(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lhau(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lhau(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sth(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_sthu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_sthu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lmw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lmw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stmw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfsu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfsu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lfdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lfdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::Offset(Offset(ins.field_offset() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_stfs(out: &mut Arguments, ins: Ins) { *out = [ Argument::FPR(FPR(ins.field_frs() as _)), @@ -19042,15 +13673,6 @@ fn uses_stfs(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn defs_stfsu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn uses_stfsu(out: &mut Arguments, ins: Ins) { *out = [ Argument::FPR(FPR(ins.field_frs() as _)), @@ -19060,911 +13682,199 @@ fn uses_stfsu(out: &mut Arguments, ins: Ins) { Argument::None, ]; } -fn uses_stfd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_stfdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stfdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_ld(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ld(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_ldu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_ldu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_lwa(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_lwa(out: &mut Arguments, ins: Ins) { - *out = [ - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fdivs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fdivs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fmadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fmsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fmuls(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmuls(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fnmadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fnmadds(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fnmsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fnmsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fres(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fres(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fsubs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_std(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - if ins.field_ra() != 0 { - Argument::GPR(GPR(ins.field_ra() as _)) - } else { - Argument::None - }, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_stdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_stdu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::GPR(GPR(ins.field_rs() as _)), - Argument::GPR(GPR(ins.field_ra() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fabs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fabs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fcfid(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fcfid(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fcmpo(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fcmpo(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fcmpu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fcmpu(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fctid(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fctid(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fctidz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fctidz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fctiw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fctiw(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fctiwz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fctiwz(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fdiv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fdiv(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fmadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fmr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmr(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fmsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fmul(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fmul(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fnabs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fnabs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fneg(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fneg(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fnmadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fnmadd(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fnmsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fnmsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_frsp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_frsp(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_frsqrte(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_frsqrte(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_fsel(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fsel(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frc() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - ]; -} -fn defs_fsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_fsub(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_fra() as _)), - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mcrfs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mcrfs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfs() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mffs(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mtfsb0(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mtfsb1(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRBit(CRBit(ins.field_crbd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn uses_mtfsf(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::FPR(FPR(ins.field_frb() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} -fn defs_mtfsfi(out: &mut Arguments, ins: Ins) { - *out = [ - Argument::CRField(CRField(ins.field_crfd() as _)), - Argument::None, - Argument::None, - Argument::None, - Argument::None, - ]; -} fn defs_uses_empty(out: &mut Arguments, _ins: Ins) { *out = EMPTY_ARGS; } -static DEFS_FUNCTIONS: [DefsUsesFunction; 470] = [ +static DEFS_FUNCTIONS: [DefsUsesFunction; 508] = [ defs_uses_empty, defs_uses_empty, defs_uses_empty, + defs_psq_lux, + defs_psq_lx, + uses_tdi, + defs_uses_empty, + defs_psq_lx, + defs_psq_lx, + defs_ps_cmpo0, + defs_ps_cmpo0, + defs_ps_cmpo0, + defs_ps_cmpo0, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, defs_mfvscr, defs_uses_empty, - defs_vaddcuw, - defs_vaddfp, - defs_vaddsbs, - defs_vaddshs, - defs_vaddsws, - defs_vaddubm, - defs_vaddubs, - defs_vadduhm, - defs_vadduhs, - defs_vadduwm, - defs_vadduws, - defs_vand, - defs_vandc, - defs_vavgsb, - defs_vavgsh, - defs_vavgsw, - defs_vavgub, - defs_vavguh, - defs_vavguw, - defs_vcfsx, - defs_vcfux, - defs_vcmpbfp, - defs_vcmpeqfp, - defs_vcmpequb, - defs_vcmpequh, - defs_vcmpequw, - defs_vcmpgefp, - defs_vcmpgtfp, - defs_vcmpgtsb, - defs_vcmpgtsh, - defs_vcmpgtsw, - defs_vcmpgtub, - defs_vcmpgtuh, - defs_vcmpgtuw, - defs_vctsxs, - defs_vctuxs, - defs_vexptefp, - defs_vlogefp, - defs_vmaddfp, - defs_vmaxfp, - defs_vmaxsb, - defs_vmaxsh, - defs_vmaxsw, - defs_vmaxub, - defs_vmaxuh, - defs_vmaxuw, - defs_vmhaddshs, - defs_vmhraddshs, - defs_vminfp, - defs_vminsb, - defs_vminsh, - defs_vminsw, - defs_vminub, - defs_vminuh, - defs_vminuw, - defs_vmladduhm, - defs_vmrghb, - defs_vmrghh, - defs_vmrghw, - defs_vmrglb, - defs_vmrglh, - defs_vmrglw, - defs_vmsummbm, - defs_vmsumshm, - defs_vmsumshs, - defs_vmsumubm, - defs_vmsumuhm, - defs_vmsumuhs, - defs_vmulesb, - defs_vmulesh, - defs_vmuleub, - defs_vmuleuh, - defs_vmulosb, - defs_vmulosh, - defs_vmuloub, - defs_vmulouh, - defs_vnmsubfp, - defs_vnor, - defs_vor, - defs_vperm, - defs_vpkpx, - defs_vpkshss, - defs_vpkshus, - defs_vpkswss, - defs_vpkswus, - defs_vpkuhum, - defs_vpkuhus, - defs_vpkuwum, - defs_vpkuwus, - defs_vrefp, - defs_vrfim, - defs_vrfin, - defs_vrfip, - defs_vrfiz, - defs_vrlb, - defs_vrlh, - defs_vrlw, - defs_vrsqrtefp, - defs_vsel, - defs_vsl, - defs_vslb, - defs_vsldoi, - defs_vslh, - defs_vslo, - defs_vslw, - defs_vspltb, - defs_vsplth, - defs_vspltisb, - defs_vspltish, - defs_vspltisw, - defs_vspltw, - defs_vsr, - defs_vsrab, - defs_vsrah, - defs_vsraw, - defs_vsrb, - defs_vsrh, - defs_vsro, - defs_vsrw, - defs_vsubcuw, - defs_vsubfp, - defs_vsubsbs, - defs_vsubshs, - defs_vsubsws, - defs_vsububm, - defs_vsububs, - defs_vsubuhm, - defs_vsubuhs, - defs_vsubuwm, - defs_vsubuws, - defs_vsumsws, - defs_vsum2sws, - defs_vsum4sbs, - defs_vsum4shs, - defs_vsum4ubs, - defs_vupkhpx, - defs_vupkhsb, - defs_vupkhsh, - defs_vupklpx, - defs_vupklsb, - defs_vupklsh, - defs_vxor, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, defs_lvewx128, - defs_lvlx128, - defs_lvlxl128, - defs_lvrx128, - defs_lvrxl128, - defs_lvsl128, - defs_lvsr128, - defs_lvx128, - defs_lvxl128, defs_uses_empty, defs_uses_empty, defs_uses_empty, @@ -19972,238 +13882,239 @@ static DEFS_FUNCTIONS: [DefsUsesFunction; 470] = [ defs_uses_empty, defs_uses_empty, defs_uses_empty, - defs_vsldoi128, - defs_vaddfp128, - defs_vand128, - defs_vandc128, - defs_vmaddcfp128, - defs_vmaddfp128, - defs_vmsum3fp128, - defs_vmsum4fp128, - defs_vmulfp128, - defs_vnmsubfp128, - defs_vnor128, - defs_vor128, - defs_vperm128, - defs_vpkshss128, - defs_vpkshus128, - defs_vpkswss128, - defs_vpkswus128, - defs_vpkuhum128, - defs_vpkuhus128, - defs_vpkuwum128, - defs_vpkuwus128, - defs_vsel128, - defs_vslo128, - defs_vsro128, - defs_vsubfp128, - defs_vxor128, - defs_vctsxs128, - defs_vctuxs128, - defs_vcmpbfp128, - defs_vcmpeqfp128, - defs_vcmpequw128, - defs_vcmpgefp128, - defs_vcmpgtfp128, - defs_vcfsx128, - defs_vcfux128, - defs_vexptefp128, - defs_vlogefp128, - defs_vmaxfp128, - defs_vminfp128, - defs_vmrghw128, - defs_vmrglw128, - defs_vpermwi128, - defs_vpkd3d128, - defs_vrefp128, - defs_vrfim128, - defs_vrfin128, - defs_vrfip128, - defs_vrfiz128, - defs_vrlimi128, - defs_vrlw128, - defs_vrsqrtefp128, - defs_vslw128, - defs_vspltisw128, - defs_vspltw128, - defs_vsraw128, - defs_vsrw128, - defs_vupkd3d128, - defs_vupkhsb128, - defs_vupkhsh128, - defs_vupklsb128, - defs_vupklsh128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_lvewx128, + defs_mulli, + defs_mulli, + defs_ps_cmpo0, + defs_ps_cmpo0, + defs_mulli, + defs_mulli, + defs_mulli, defs_mulli, - defs_subfic, - defs_cmpli, - defs_cmpi, - defs_addic, - defs_addic_, - defs_addi, - defs_addis, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_crand, - defs_crandc, - defs_creqv, - defs_crnand, - defs_crnor, - defs_cror, - defs_crorc, - defs_crxor, + defs_crand, + defs_crand, + defs_crand, + defs_crand, + defs_crand, + defs_crand, + defs_crand, defs_uses_empty, - defs_mcrf, + defs_ps_cmpo0, defs_uses_empty, defs_uses_empty, - defs_rlwimi, - defs_rlwinm, - defs_rlwnm, - defs_ori, - defs_oris, - defs_xori, - defs_xoris, - defs_andi_, - defs_andis_, - defs_rldcl, - defs_rldcr, - defs_rldic, - defs_rldicl, - defs_rldicr, - defs_rldimi, - defs_add, - defs_addc, - defs_adde, - defs_addme, - defs_addze, - defs_and, - defs_andc, - defs_cmp, - defs_cmpl, - defs_cntlzd, - defs_cntlzw, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + uses_tdi, + uses_tdi, + defs_ps_cmpo0, + defs_ps_cmpo0, + uses_tdi, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, - defs_divd, - defs_divdu, - defs_divw, - defs_divwu, - defs_eciwx, + defs_mulli, + defs_mulli, + defs_mulli, defs_uses_empty, defs_uses_empty, - defs_eqv, - defs_extsb, - defs_extsh, - defs_extsw, + uses_tdi, + uses_tdi, + uses_tdi, defs_uses_empty, defs_lbzux, - defs_lbzx, - defs_ldarx, - defs_ldux, - defs_ldx, - defs_lfdux, - defs_lfdx, - defs_lfsux, - defs_lfsx, - defs_lhaux, - defs_lhax, - defs_lhbrx, - defs_lhzux, - defs_lhzx, - defs_lswi, - defs_lswx, - defs_lwarx, - defs_lwaux, - defs_lwax, - defs_lwbrx, - defs_lwzux, - defs_lwzx, + defs_mulli, + defs_psq_lux, + defs_psq_lx, + defs_psq_lux, + defs_psq_lx, + defs_lbzux, + defs_mulli, + defs_mulli, + defs_lbzux, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_lbzux, + defs_mulli, defs_mcrxr, - defs_mfcr, - defs_mfmsr, - defs_mfspr, - defs_mfsr, - defs_mfsrin, - defs_mftb, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, + defs_mulli, + defs_mulli, + defs_mulli, + uses_tdi, + defs_mulli, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + defs_uses_empty, + uses_tdi, defs_uses_empty, defs_uses_empty, - defs_uses_empty, - defs_mulhd, - defs_mulhdu, - defs_mulhw, - defs_mulhwu, - defs_mulld, - defs_mullw, - defs_nand, - defs_neg, - defs_nor, - defs_or, - defs_orc, + uses_tdi, defs_uses_empty, defs_uses_empty, - defs_sld, - defs_slw, - defs_srad, - defs_sradi, - defs_sraw, - defs_srawi, - defs_srd, - defs_srw, - defs_stbux, - defs_uses_empty, - defs_uses_empty, - defs_stdux, - defs_stdx, - defs_stfdux, - defs_uses_empty, - defs_uses_empty, - defs_stfsux, - defs_uses_empty, - defs_uses_empty, - defs_sthux, + uses_tdi, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, - defs_stwux, + uses_tdi, defs_uses_empty, - defs_subf, - defs_subfc, - defs_subfe, - defs_subfme, - defs_subfze, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, + defs_mulli, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, + uses_tdi, + uses_tdi, defs_uses_empty, - defs_xor, + defs_mulli, + defs_mulli, + uses_tdi, + defs_mulli, + defs_lbzux, + defs_mulli, + defs_mulli, + defs_mulli, defs_uses_empty, defs_uses_empty, defs_uses_empty, - defs_lvebx, - defs_lvehx, - defs_lvewx, - defs_lvlx, - defs_lvlxl, - defs_lvrx, - defs_lvrxl, - defs_lvsl, - defs_lvsr, - defs_lvx, - defs_lvxl, + defs_mulli, + defs_mulli, + defs_mulli, + defs_uses_empty, + defs_uses_empty, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + defs_uses_empty, + uses_tdi, + uses_tdi, + defs_uses_empty, + defs_uses_empty, + defs_uses_empty, + defs_uses_empty, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, + defs_mfvscr, defs_uses_empty, defs_uses_empty, defs_uses_empty, @@ -20213,326 +14124,362 @@ static DEFS_FUNCTIONS: [DefsUsesFunction; 470] = [ defs_uses_empty, defs_uses_empty, defs_uses_empty, - defs_lwz, - defs_lwzu, - defs_lbz, - defs_lbzu, + defs_mulli, + defs_lbzux, + defs_mulli, + defs_lbzux, defs_uses_empty, - defs_stwu, + uses_tdi, defs_uses_empty, - defs_stbu, - defs_lhz, - defs_lhzu, - defs_lha, - defs_lhau, + uses_tdi, + defs_mulli, + defs_lbzux, + defs_mulli, + defs_lbzux, defs_uses_empty, - defs_sthu, - defs_lmw, + uses_tdi, + defs_mulli, defs_uses_empty, - defs_lfs, - defs_lfsu, - defs_lfd, - defs_lfdu, + defs_psq_lx, + defs_psq_lux, + defs_psq_lx, + defs_psq_lux, defs_uses_empty, - defs_stfsu, + uses_tdi, defs_uses_empty, - defs_stfdu, - defs_ld, - defs_ldu, - defs_lwa, - defs_fadds, - defs_fdivs, - defs_fmadds, - defs_fmsubs, - defs_fmuls, - defs_fnmadds, - defs_fnmsubs, - defs_fres, - defs_fsubs, + uses_tdi, + defs_psq_lx, + defs_psq_lux, + defs_mulli, + defs_lbzux, + defs_mulli, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, defs_uses_empty, - defs_stdu, - defs_fabs, - defs_fadd, - defs_fcfid, - defs_fcmpo, - defs_fcmpu, - defs_fctid, - defs_fctidz, - defs_fctiw, - defs_fctiwz, - defs_fdiv, - defs_fmadd, - defs_fmr, - defs_fmsub, - defs_fmul, - defs_fnabs, - defs_fneg, - defs_fnmadd, - defs_fnmsub, - defs_frsp, - defs_frsqrte, - defs_fsel, - defs_fsub, - defs_mcrfs, - defs_mffs, - defs_mtfsb0, - defs_mtfsb1, + uses_tdi, defs_uses_empty, - defs_mtfsfi, + uses_tdi, + defs_psq_lx, + defs_psq_lx, + defs_ps_cmpo0, + defs_ps_cmpo0, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, + defs_ps_cmpo0, + defs_psq_lx, + defs_crand, + defs_crand, + defs_uses_empty, + defs_ps_cmpo0, + defs_psq_lx, + defs_psq_lx, + defs_psq_lx, ]; -#[inline] -pub fn parse_defs(out: &mut Arguments, ins: Ins) { +pub(crate) fn parse_defs(out: &mut Arguments, ins: Ins) { match DEFS_FUNCTIONS.get(ins.op as usize) { Some(f) => f(out, ins), None => defs_uses_empty(out, ins), } } -static USES_FUNCTIONS: [DefsUsesFunction; 470] = [ +static USES_FUNCTIONS: [DefsUsesFunction; 508] = [ + uses_tdi, uses_tdi, - uses_twi, uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_psq_stux, + uses_psq_stx, + uses_ps_abs, + uses_ps_add, + uses_ps_cmpo0, + uses_ps_cmpo0, + uses_ps_cmpo0, + uses_ps_cmpo0, + uses_ps_add, + uses_ps_madd, + uses_ps_madd, + uses_ps_madd, + uses_ps_add, + uses_ps_add, + uses_ps_add, + uses_ps_add, + uses_ps_abs, + uses_ps_madd, + uses_ps_mul, + uses_ps_mul, + uses_ps_mul, + uses_ps_abs, + uses_ps_abs, + uses_ps_madd, + uses_ps_madd, + uses_ps_abs, + uses_ps_abs, + uses_ps_madd, + uses_ps_add, + uses_ps_madd, + uses_ps_madd, defs_uses_empty, uses_mtvscr, uses_vaddcuw, - uses_vaddfp, - uses_vaddsbs, - uses_vaddshs, - uses_vaddsws, - uses_vaddubm, - uses_vaddubs, - uses_vadduhm, - uses_vadduhs, - uses_vadduwm, - uses_vadduws, - uses_vand, - uses_vandc, - uses_vavgsb, - uses_vavgsh, - uses_vavgsw, - uses_vavgub, - uses_vavguh, - uses_vavguw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, uses_vcfsx, - uses_vcfux, - uses_vcmpbfp, - uses_vcmpeqfp, - uses_vcmpequb, - uses_vcmpequh, - uses_vcmpequw, - uses_vcmpgefp, - uses_vcmpgtfp, - uses_vcmpgtsb, - uses_vcmpgtsh, - uses_vcmpgtsw, - uses_vcmpgtub, - uses_vcmpgtuh, - uses_vcmpgtuw, - uses_vctsxs, - uses_vctuxs, - uses_vexptefp, - uses_vlogefp, + uses_vcfsx, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vcfsx, + uses_vcfsx, + uses_mtvscr, + uses_mtvscr, uses_vmaddfp, - uses_vmaxfp, - uses_vmaxsb, - uses_vmaxsh, - uses_vmaxsw, - uses_vmaxub, - uses_vmaxuh, - uses_vmaxuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, uses_vmhaddshs, - uses_vmhraddshs, - uses_vminfp, - uses_vminsb, - uses_vminsh, - uses_vminsw, - uses_vminub, - uses_vminuh, - uses_vminuw, - uses_vmladduhm, - uses_vmrghb, - uses_vmrghh, - uses_vmrghw, - uses_vmrglb, - uses_vmrglh, - uses_vmrglw, - uses_vmsummbm, - uses_vmsumshm, - uses_vmsumshs, - uses_vmsumubm, - uses_vmsumuhm, - uses_vmsumuhs, - uses_vmulesb, - uses_vmulesh, - uses_vmuleub, - uses_vmuleuh, - uses_vmulosb, - uses_vmulosh, - uses_vmuloub, - uses_vmulouh, - uses_vnmsubfp, - uses_vnor, - uses_vor, - uses_vperm, - uses_vpkpx, - uses_vpkshss, - uses_vpkshus, - uses_vpkswss, - uses_vpkswus, - uses_vpkuhum, - uses_vpkuhus, - uses_vpkuwum, - uses_vpkuwus, - uses_vrefp, - uses_vrfim, - uses_vrfin, - uses_vrfip, - uses_vrfiz, - uses_vrlb, - uses_vrlh, - uses_vrlw, - uses_vrsqrtefp, - uses_vsel, - uses_vsl, - uses_vslb, + uses_vmhaddshs, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vmhaddshs, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vmhaddshs, + uses_vmhaddshs, + uses_vmhaddshs, + uses_vmhaddshs, + uses_vmhaddshs, + uses_vmhaddshs, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vmaddfp, + uses_vaddcuw, + uses_vaddcuw, + uses_vmhaddshs, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_mtvscr, + uses_vmhaddshs, + uses_vaddcuw, + uses_vaddcuw, uses_vsldoi, - uses_vslh, - uses_vslo, - uses_vslw, - uses_vspltb, - uses_vsplth, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vcfsx, + uses_vcfsx, uses_vspltisb, - uses_vspltish, - uses_vspltisw, - uses_vspltw, - uses_vsr, - uses_vsrab, - uses_vsrah, - uses_vsraw, - uses_vsrb, - uses_vsrh, - uses_vsro, - uses_vsrw, - uses_vsubcuw, - uses_vsubfp, - uses_vsubsbs, - uses_vsubshs, - uses_vsubsws, - uses_vsububm, - uses_vsububs, - uses_vsubuhm, - uses_vsubuhs, - uses_vsubuwm, - uses_vsubuws, - uses_vsumsws, - uses_vsum2sws, - uses_vsum4sbs, - uses_vsum4shs, - uses_vsum4ubs, - uses_vupkhpx, - uses_vupkhsb, - uses_vupkhsh, - uses_vupklpx, - uses_vupklsb, - uses_vupklsh, - uses_vxor, - uses_lvewx128, - uses_lvlx128, - uses_lvlxl128, - uses_lvrx128, - uses_lvrxl128, - uses_lvsl128, - uses_lvsr128, - uses_lvx128, - uses_lvxl128, - uses_stvewx128, - uses_stvlx128, - uses_stvlxl128, - uses_stvrx128, - uses_stvrxl128, - uses_stvx128, - uses_stvxl128, + uses_vspltisb, + uses_vspltisb, + uses_vcfsx, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_vaddcuw, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_mtvscr, + uses_vaddcuw, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, uses_vsldoi128, - uses_vaddfp128, - uses_vand128, - uses_vandc128, - uses_vmaddcfp128, - uses_vmaddfp128, - uses_vmsum3fp128, - uses_vmsum4fp128, - uses_vmulfp128, - uses_vnmsubfp128, - uses_vnor128, - uses_vor128, uses_vperm128, - uses_vpkshss128, - uses_vpkshus128, - uses_vpkswss128, - uses_vpkswus128, - uses_vpkuhum128, - uses_vpkuhus128, - uses_vpkuwum128, - uses_vpkuwus128, - uses_vsel128, - uses_vslo128, - uses_vsro128, - uses_vsubfp128, - uses_vxor128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vctsxs128, + uses_vctsxs128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, + uses_vsldoi128, uses_vctsxs128, - uses_vctuxs128, - uses_vcmpbfp128, - uses_vcmpeqfp128, - uses_vcmpequw128, - uses_vcmpgefp128, - uses_vcmpgtfp128, - uses_vcfsx128, - uses_vcfux128, - uses_vexptefp128, - uses_vlogefp128, - uses_vmaxfp128, - uses_vminfp128, - uses_vmrghw128, - uses_vmrglw128, - uses_vpermwi128, uses_vpkd3d128, - uses_vrefp128, - uses_vrfim128, - uses_vrfin128, - uses_vrfip128, - uses_vrfiz128, - uses_vrlimi128, - uses_vrlw128, - uses_vrsqrtefp128, - uses_vslw128, - uses_vspltisw128, - uses_vspltw128, - uses_vsraw128, - uses_vsrw128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vsldoi128, + uses_vctsxs128, + uses_vsldoi128, + uses_vctsxs128, + uses_vctsxs128, + uses_vsldoi128, + uses_vsldoi128, uses_vupkd3d128, - uses_vupkhsb128, - uses_vupkhsh128, - uses_vupklsb128, - uses_vupklsh128, - uses_mulli, - uses_subfic, - uses_cmpli, - uses_cmpi, - uses_addic, - uses_addic_, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_vctsxs128, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_tdi, + uses_addi, uses_addi, - uses_addis, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, uses_crand, - uses_crandc, - uses_creqv, - uses_crnand, - uses_crnor, - uses_cror, - uses_crorc, - uses_crxor, + uses_crand, + uses_crand, + uses_crand, + uses_crand, + uses_crand, + uses_crand, + uses_crand, defs_uses_empty, uses_mcrf, defs_uses_empty, @@ -20540,227 +14487,231 @@ static USES_FUNCTIONS: [DefsUsesFunction; 470] = [ uses_rlwimi, uses_rlwinm, uses_rlwnm, - uses_ori, - uses_oris, - uses_xori, - uses_xoris, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, uses_andi_, - uses_andis_, - uses_rldcl, - uses_rldcr, - uses_rldic, - uses_rldicl, - uses_rldicr, - uses_rldimi, - uses_add, - uses_addc, - uses_adde, - uses_addme, - uses_addze, - uses_and, - uses_andc, - uses_cmp, - uses_cmpl, - uses_cntlzd, - uses_cntlzw, - uses_dcbf, - uses_dcbi, - uses_dcbst, - uses_dcbt, - uses_dcbtst, - uses_dcbz, - uses_divd, - uses_divdu, - uses_divw, - uses_divwu, - uses_eciwx, + uses_andi_, + uses_rlwnm, + uses_rlwnm, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, + uses_psq_lux, + uses_psq_lux, + uses_psq_lux, + uses_tdi, + uses_tdi, + uses_rlwnm, + uses_rlwnm, + uses_psq_lux, + uses_psq_lux, + uses_rlwinm, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_psq_lux, + uses_psq_lux, + uses_dcbz_l, uses_ecowx, defs_uses_empty, - uses_eqv, - uses_extsb, - uses_extsh, - uses_extsw, - uses_icbi, - uses_lbzux, - uses_lbzx, - uses_ldarx, - uses_ldux, - uses_ldx, - uses_lfdux, - uses_lfdx, - uses_lfsux, - uses_lfsx, - uses_lhaux, - uses_lhax, - uses_lhbrx, - uses_lhzux, - uses_lhzx, - uses_lswi, - uses_lswx, - uses_lwarx, - uses_lwaux, - uses_lwax, - uses_lwbrx, - uses_lwzux, - uses_lwzx, + uses_rlwnm, + uses_rlwinm, + uses_rlwinm, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_addi, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, defs_uses_empty, - uses_mfsrin, + uses_andi_, defs_uses_empty, - uses_mtcrf, - uses_mtmsr, - uses_mtmsrd, - uses_mtspr, - uses_mtsr, - uses_mtsrd, - uses_mtsrdin, - uses_mtsrin, - uses_mulhd, - uses_mulhdu, - uses_mulhw, - uses_mulhwu, - uses_mulld, - uses_mullw, - uses_nand, - uses_neg, - uses_nor, - uses_or, - uses_orc, - defs_uses_empty, - uses_slbie, - uses_sld, - uses_slw, - uses_srad, - uses_sradi, - uses_sraw, - uses_srawi, - uses_srd, - uses_srw, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, + uses_rlwinm, + uses_rlwnm, + uses_psq_lux, + uses_psq_lux, + uses_psq_lux, + uses_rlwnm, + uses_tdi, + uses_rlwnm, + uses_rlwnm, + uses_rlwnm, + uses_rlwnm, + uses_rlwnm, + uses_rlwinm, + uses_psq_lux, uses_stbux, - uses_stbx, - uses_stdcx_, - uses_stdux, - uses_stdx, - uses_stfdux, - uses_stfdx, - uses_stfiwx, - uses_stfsux, - uses_stfsx, - uses_sthbrx, - uses_sthux, - uses_sthx, + uses_ecowx, + uses_psq_stux, + uses_psq_stx, + uses_psq_stx, + uses_psq_stux, + uses_psq_stx, + uses_ecowx, + uses_stbux, + uses_ecowx, uses_stswi, - uses_stswx, - uses_stwbrx, - uses_stwcx_, - uses_stwux, - uses_stwx, - uses_subf, - uses_subfc, - uses_subfe, - uses_subfme, - uses_subfze, + uses_ecowx, + uses_ecowx, + uses_ecowx, + uses_stbux, + uses_ecowx, + uses_psq_lux, + uses_psq_lux, + uses_psq_lux, + uses_tdi, + uses_tdi, uses_sync, - uses_td, - uses_tlbie, + uses_andi_, defs_uses_empty, - uses_tw, - uses_xor, + uses_psq_lux, + uses_rlwnm, + uses_rlwinm, + uses_dcbz_l, + uses_psq_lux, + uses_psq_lux, + uses_rlwinm, + uses_psq_lux, + uses_psq_lux, + uses_dcbz_l, + uses_psq_lux, + uses_dcbz_l, + uses_mtmsrd, + uses_rlwinm, + uses_rlwnm, + uses_psq_lux, + uses_psq_lux, + uses_psq_lux, + defs_uses_empty, + uses_andi_, + uses_rlwnm, + uses_rlwnm, + uses_rlwinm, + uses_psq_lux, + uses_ecowx, + uses_stbux, + uses_ecowx, + uses_psq_lux, uses_dss, uses_dst, - uses_dstst, - uses_lvebx, - uses_lvehx, - uses_lvewx, - uses_lvlx, - uses_lvlxl, - uses_lvrx, - uses_lvrxl, - uses_lvsl, - uses_lvsr, - uses_lvx, - uses_lvxl, - uses_stvebx, - uses_stvehx, - uses_stvewx, - uses_stvlx, - uses_stvlxl, - uses_stvrx, - uses_stvrxl, - uses_stvx, - uses_stvxl, + uses_dst, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, + uses_dcbz_l, uses_lwz, uses_lwzu, - uses_lbz, - uses_lbzu, - uses_stw, + uses_lwz, + uses_lwzu, + uses_stswi, uses_stwu, - uses_stb, - uses_stbu, - uses_lhz, - uses_lhzu, - uses_lha, - uses_lhau, - uses_sth, - uses_sthu, - uses_lmw, - uses_stmw, - uses_lfs, - uses_lfsu, - uses_lfd, - uses_lfdu, + uses_stswi, + uses_stwu, + uses_lwz, + uses_lwzu, + uses_lwz, + uses_lwzu, + uses_stswi, + uses_stwu, + uses_lwz, + uses_stswi, + uses_lwz, + uses_lwzu, + uses_lwz, + uses_lwzu, uses_stfs, uses_stfsu, - uses_stfd, - uses_stfdu, - uses_ld, - uses_ldu, - uses_lwa, - uses_fadds, - uses_fdivs, - uses_fmadds, - uses_fmsubs, - uses_fmuls, - uses_fnmadds, - uses_fnmsubs, - uses_fres, - uses_fsubs, - uses_std, - uses_stdu, - uses_fabs, - uses_fadd, - uses_fcfid, - uses_fcmpo, - uses_fcmpu, - uses_fctid, - uses_fctidz, - uses_fctiw, - uses_fctiwz, - uses_fdiv, - uses_fmadd, - uses_fmr, - uses_fmsub, - uses_fmul, - uses_fnabs, - uses_fneg, - uses_fnmadd, - uses_fnmsub, - uses_frsp, - uses_frsqrte, - uses_fsel, - uses_fsub, - uses_mcrfs, + uses_stfs, + uses_stfsu, + uses_addi, + uses_tdi, + uses_addi, + uses_tdi, + uses_addi, + uses_ps_add, + uses_ps_add, + uses_ps_madd, + uses_ps_madd, + uses_ps_mul, + uses_ps_madd, + uses_ps_madd, + uses_ps_abs, + uses_ps_add, + uses_stfs, + uses_stfsu, + uses_stswi, + uses_stwu, + uses_ps_abs, + uses_ps_add, + uses_ps_add, + uses_ps_add, + uses_ps_abs, + uses_ps_abs, + uses_ps_add, + uses_ps_madd, + uses_ps_abs, + uses_ps_madd, + uses_ps_mul, + uses_ps_abs, + uses_ps_abs, + uses_ps_madd, + uses_ps_madd, + uses_ps_abs, + uses_ps_abs, + uses_ps_madd, + uses_ps_add, + uses_mcrf, defs_uses_empty, defs_uses_empty, defs_uses_empty, - uses_mtfsf, + uses_ps_abs, defs_uses_empty, + uses_ps_abs, + uses_ps_abs, + uses_ps_abs, ]; -#[inline] -pub fn parse_uses(out: &mut Arguments, ins: Ins) { +pub(crate) fn parse_uses(out: &mut Arguments, ins: Ins) { match USES_FUNCTIONS.get(ins.op as usize) { Some(f) => f(out, ins), None => defs_uses_empty(out, ins), diff --git a/disasm/src/lib.rs b/disasm/src/lib.rs index 96176c5..aabccf9 100644 --- a/disasm/src/lib.rs +++ b/disasm/src/lib.rs @@ -3,7 +3,7 @@ mod disasm; mod generated; pub use disasm::{ - Argument, BranchDest, CRBit, CRField, Ins, InsIter, Offset, OpaqueU, ParsedIns, Simm, Uimm, - FPR, GPR, GQR, SPR, SR, + Argument, BranchDest, CRBit, CRField, Extensions, Ins, InsIter, Offset, OpaqueU, ParsedIns, + Simm, Uimm, FPR, GPR, GQR, SPR, SR, }; -pub use generated::{Arguments, Opcode}; +pub use generated::{Arguments, Extension, Opcode}; diff --git a/disasm/tests/test_altivec.rs b/disasm/tests/test_altivec.rs index 5cb5ed1..1a54677 100644 --- a/disasm/tests/test_altivec.rs +++ b/disasm/tests/test_altivec.rs @@ -1,11 +1,13 @@ -use ppc750cl::Ins; +use powerpc::{Extension, Extensions, Ins}; + +const EXTENSIONS: Extensions = Extensions::from_extension(Extension::AltiVec); macro_rules! assert_asm { ($ins:ident, $disasm:literal) => {{ assert_eq!(format!("{}", $ins.simplified()), $disasm) }}; ($code:literal, $disasm:literal) => {{ - let ins = Ins::new($code); + let ins = Ins::new($code, EXTENSIONS); assert_eq!(format!("{}", ins.simplified()), $disasm) }}; } diff --git a/disasm/tests/test_disasm.rs b/disasm/tests/test_disasm.rs index 882ef59..6b2012f 100644 --- a/disasm/tests/test_disasm.rs +++ b/disasm/tests/test_disasm.rs @@ -1,11 +1,13 @@ -use ppc750cl::{Argument, Ins, InsIter, Opcode, GPR}; +use powerpc::{Argument, Extensions, Ins, InsIter, Opcode, GPR}; + +const EXTENSIONS: Extensions = Extensions::none(); macro_rules! assert_asm { ($ins:ident, $disasm:literal) => {{ assert_eq!(format!("{}", $ins.simplified()), $disasm) }}; ($code:literal, $disasm:literal) => {{ - let ins = Ins::new($code); + let ins = Ins::new($code, EXTENSIONS); assert_eq!(format!("{}", ins.simplified()), $disasm) }}; } @@ -15,7 +17,7 @@ macro_rules! assert_basic { assert_eq!(format!("{}", $ins.basic_form()), $disasm) }}; ($code:literal, $disasm:literal) => {{ - let ins = Ins::new($code); + let ins = Ins::new($code, EXTENSIONS); assert_eq!(format!("{}", ins.basic()), $disasm) }}; } @@ -30,7 +32,7 @@ fn test_ins_add() { #[test] fn test_ins_addc() { - let ins = Ins::new(0x7c002014); + let ins = Ins::new(0x7c002014, EXTENSIONS); assert_eq!(ins.op, Opcode::Addc); // assert_eq!(ins.fields(), vec![rD(GPR(0)), rA(GPR(0)), rB(GPR(4))]); assert_asm!(ins, "addc r0, r0, r4"); @@ -42,7 +44,7 @@ fn test_ins_addc() { #[test] fn test_ins_addi() { - let ins = Ins::new(0x38010140); + let ins = Ins::new(0x38010140, EXTENSIONS); assert_eq!(ins.op, Opcode::Addi); // assert_eq!( // ins.fields(), @@ -214,11 +216,6 @@ fn test_ins_cmpli() { assert_asm!(0x2884F8F0, "cmplwi cr1, r4, 0xf8f0"); } -#[test] -fn test_ins_cntlzd() { - assert_asm!(0x7CA30074, "cntlzd r3, r5"); -} - #[test] fn test_ins_cntlzw() { assert_asm!(0x7C030034, "cntlzw r3, r0"); @@ -291,21 +288,6 @@ fn test_ins_dcbz() { assert_asm!(0x7C001FEC, "dcbz r0, r3"); } -#[test] -fn test_ins_dcbz_l() { - assert_asm!(0x10061FEC, "dcbz_l r6, r3"); -} - -#[test] -fn test_ins_divd() { - assert_asm!(0x7CA63BD2, "divd r5, r6, r7"); -} - -#[test] -fn test_ins_divdu() { - assert_asm!(0x7C839392, "divdu r4, r3, r18"); -} - #[test] fn test_ins_divw() { assert_asm!(0x7C8073D6, "divw r4, r0, r14"); @@ -328,12 +310,6 @@ fn test_ins_extsh() { assert_asm!(0x7C000735, "extsh. r0, r0"); } -#[test] -fn test_ins_extsw() { - assert_asm!(0x7CC307B4, "extsw r3, r6"); - assert_asm!(0x7CC307B5, "extsw. r3, r6"); -} - #[test] fn test_ins_fabs() { assert_asm!(0xFC000A10, "fabs f0, f1"); @@ -349,11 +325,6 @@ fn test_ins_fadds() { assert_asm!(0xEC41602A, "fadds f2, f1, f12"); } -#[test] -fn test_ins_fcfid() { - assert_asm!(0xFC602E9C, "fcfid f3, f5"); -} - #[test] fn test_ins_fcmpo() { assert_asm!(0xFC00C840, "fcmpo cr0, f0, f25"); @@ -364,16 +335,6 @@ fn test_ins_fcmpu() { assert_asm!(0xFC00D000, "fcmpu cr0, f0, f26"); } -#[test] -fn test_ins_fctid() { - assert_asm!(0xFC60065C, "fctid f3, f0"); -} - -#[test] -fn test_ins_fctidz() { - assert_asm!(0xFC60065E, "fctidz f3, f0"); -} - #[test] fn test_ins_fctiwz() { assert_asm!(0xFC20001E, "fctiwz f1, f0"); @@ -492,33 +453,6 @@ fn test_ins_lbzx() { assert_asm!(0x7C0300AE, "lbzx r0, r3, r0"); } -#[test] -fn test_ins_ld() { - assert_asm!(0xebe10058, "ld r31, 0x58(r1)"); - assert_asm!(0xe9790010, "ld r11, 0x10(r25)"); -} - -#[test] -fn test_ins_ldarx() { - assert_asm!(0x7C6538A8, "ldarx r3, r5, r7"); -} - -#[test] -fn test_ins_ldu() { - assert_asm!(0xe97cfff9, "ldu r11, -0x8(r28)"); - assert_asm!(0xe8deffe9, "ldu r6, -0x18(r30)"); -} - -#[test] -fn test_ins_ldux() { - assert_asm!(0x7C60286A, "ldux r3, r0, r5"); -} - -#[test] -fn test_ins_ldx() { - assert_asm!(0x7C60282A, "ldx r3, r0, r5"); -} - #[test] fn test_ins_lfd() { assert_asm!(0xC80140C8, "lfd f0, 0x40c8(r1)"); @@ -600,21 +534,6 @@ fn test_ins_lmw() { assert_asm!(0xBB210444, "lmw r25, 0x444(r1)"); } -#[test] -fn test_ins_lwa() { - assert_asm!(0xe97fffea, "lwa r11, -0x18(r31)"); -} - -#[test] -fn test_ins_lwaux() { - assert_asm!(0x7C8532EA, "lwaux r4, r5, r6"); -} - -#[test] -fn test_ins_lwax() { - assert_asm!(0x7CA63AAA, "lwax r5, r6, r7"); -} - #[test] fn test_ins_lwbrx() { assert_asm!(0x7D80242C, "lwbrx r12, r0, r4"); @@ -716,12 +635,6 @@ fn test_ins_mtmsr() { assert_asm!(0x7C000124, "mtmsr r0"); } -#[test] -fn test_ins_mtmsrd() { - assert_asm!(0x7C000164, "mtmsrd r0, 0"); - assert_asm!(0x7D210164, "mtmsrd r9, 1"); -} - #[test] fn test_ins_mtspr() { assert_asm!(0x7E75FBA6, "mtspr DABR, r19"); @@ -741,26 +654,6 @@ fn test_ins_mtsr() { assert_asm!(0x7E0001A4, "mtsr 0, r16"); } -#[test] -fn test_ins_mtsrd() { - assert_asm!(0x7E0000A4, "mtsrd 0, r16"); -} - -#[test] -fn test_ins_mtsrdin() { - assert_asm!(0x7C8040E4, "mtsrdin r4, r8"); -} - -#[test] -fn test_ins_mulhd() { - assert_asm!(0x7C7CF892, "mulhd r3, r28, r31"); -} - -#[test] -fn test_ins_mulhdu() { - assert_asm!(0x7CBCF812, "mulhdu r5, r28, r31"); -} - #[test] fn test_ins_mulhw() { assert_asm!(0x7C7F2096, "mulhw r3, r31, r4"); @@ -771,12 +664,6 @@ fn test_ins_mulhwu() { assert_asm!(0x7C7D0016, "mulhwu r3, r29, r0"); } -#[test] -fn test_ins_mulld() { - assert_asm!(0x7C6419D2, "mulld r3, r4, r3"); - assert_asm!(0x7d6b49d2, "mulld r11, r11, r9"); -} - #[test] fn test_ins_mulli() { assert_asm!(0x1C001880, "mulli r0, r0, 0x1880"); @@ -826,230 +713,11 @@ fn test_ins_oris() { assert_asm!(0x67A06800, "oris r0, r29, 0x6800"); } -// #[test] -// fn test_ins_psq_l() { -// assert_asm!(0xE02500AC, "psq_l f1, 0xac(r5), 0, qr0"); -// } - -// #[test] -// fn test_ins_psq_lu() { -// assert_asm!(0xE5435010, "psq_lu f10, 0x10(r3), 0, qr5"); -// } - -// #[test] -// fn test_ins_psq_lx() { -// let ins = Ins::new(0x1000000C); -// assert_eq!(ins.op, Opcode::PsqLx); -// // assert_eq!( -// // ins.fields(), -// // vec![ -// // frD(FPR(0)), -// // rA(GPR(0)), -// // rB(GPR(0)), -// // ps_WX(OpaqueU(0)), -// // ps_IX(GQR(0)), -// // ] -// // ); -// assert_eq!( -// ins.defs(), -// [Argument::FPR(FPR(0)), Argument::None, Argument::None, Argument::None, Argument::None] -// ); -// assert_eq!( -// ins.uses(), -// [Argument::None, Argument::GPR(GPR(0)), Argument::None, Argument::None, Argument::None] -// ); - -// assert_asm!(0x1000000C, "psq_lx f0, r0, r0, 0, qr0"); -// } - -// #[test] -// fn test_ins_psq_st() { -// assert_asm!(0xF1230210, "psq_st f9, 0x210(r3), 0, qr0"); -// assert_asm!(0xF1238008, "psq_st f9, 0x8(r3), 1, qr0"); -// } - -// #[test] -// fn test_ins_psq_stu() { -// assert_asm!(0xF40A0020, "psq_stu f0, 0x20(r10), 0, qr0"); -// } - -// #[test] -// fn test_ins_psq_stx() { -// assert_asm!(0x13E1000E, "psq_stx f31, r1, r0, 0, qr0"); -// } - -// #[test] -// fn test_ins_ps_abs() { -// assert_asm!(0x10A03210, "ps_abs f5, f6"); -// } - -// #[test] -// fn test_ins_ps_add() { -// assert_asm!(0x1006382A, "ps_add f0, f6, f7"); -// } - -// #[test] -// fn test_ins_ps_cmpo0() { -// assert_asm!(0x10070840, "ps_cmpo0 cr0, f7, f1"); -// } - -// #[test] -// fn test_ins_ps_cmpu0() { -// assert_asm!(0x10003000, "ps_cmpu0 cr0, f0, f6"); -// } - -// #[test] -// fn test_ins_ps_cmpu1() { -// assert_asm!(0x10003080, "ps_cmpu1 cr0, f0, f6"); -// } - -// #[test] -// fn test_ins_ps_madd() { -// assert_asm!(0x112141FA, "ps_madd f9, f1, f7, f8"); -// } - -// #[test] -// fn test_ins_ps_madds0() { -// assert_asm!(0x10AC299C, "ps_madds0 f5, f12, f6, f5"); -// } - -// #[test] -// fn test_ins_ps_madds1() { -// assert_asm!(0x110640DE, "ps_madds1 f8, f6, f3, f8"); -// } - -// #[test] -// fn test_ins_ps_merge00() { -// assert_asm!(0x10400420, "ps_merge00 f2, f0, f0"); -// } - -// #[test] -// fn test_ins_ps_merge01() { -// assert_asm!(0x10400C60, "ps_merge01 f2, f0, f1"); -// } - -// #[test] -// fn test_ins_ps_merge10() { -// assert_asm!(0x104004A0, "ps_merge10 f2, f0, f0"); -// } - -// #[test] -// fn test_ins_ps_merge11() { -// assert_asm!(0x10AA14E0, "ps_merge11 f5, f10, f2"); -// } - -// #[test] -// fn test_ins_ps_mr() { -// assert_asm!(0x10200090, "ps_mr f1, f0"); -// } - -// #[test] -// fn test_ins_ps_msub() { -// assert_asm!(0x10A53778, "ps_msub f5, f5, f29, f6"); -// } - -// #[test] -// fn test_ins_ps_mul() { -// assert_asm!(0x10000032, "ps_mul f0, f0, f0"); -// } - -// #[test] -// fn test_ins_ps_muls0() { -// assert_asm!(0x100002D8, "ps_muls0 f0, f0, f11"); -// } - -// #[test] -// fn test_ins_ps_muls1() { -// assert_asm!(0x10A2005A, "ps_muls1 f5, f2, f1"); -// } - -// #[test] -// fn test_ins_ps_nabs() { -// assert_asm!(0x10803210, "ps_abs f4, f6"); -// } - -// #[test] -// fn test_ins_ps_neg() { -// assert_asm!(0x10E03850, "ps_neg f7, f7"); -// } - -// #[test] -// fn test_ins_ps_nmadd() { -// assert_asm!(0x10CB30FE, "ps_nmadd f6, f11, f3, f6"); -// } - -// #[test] -// fn test_ins_ps_nmsub() { -// assert_asm!(0x107E083C, "ps_nmsub f3, f30, f0, f1"); -// } - -// #[test] -// fn test_ins_ps_sel() { -// assert_asm!(0x106428EE, "ps_sel f3, f4, f3, f5"); -// } - -// #[test] -// fn test_ins_ps_sub() { -// assert_asm!(0x10A92828, "ps_sub f5, f9, f5"); -// } - -// #[test] -// fn test_ins_ps_sum0() { -// assert_asm!(0x10230854, "ps_sum0 f1, f3, f1, f1"); -// } - -// #[test] -// fn test_ins_ps_sum1() { -// assert_asm!(0x10A12956, "ps_sum1 f5, f1, f5, f5"); -// } - #[test] fn test_ins_rfi() { assert_asm!(0x4C000064, "rfi"); } -#[test] -fn test_ins_rfid() { - assert_asm!(0x4c000024, "rfid"); -} - -#[test] -fn test_ins_rldcl() { - assert_asm!(0x780336D0, "rldcl r3, r0, r6, 27"); - assert_asm!(0x78033010, "rotld r3, r0, r6"); -} - -#[test] -fn test_ins_rldcr() { - assert_asm!(0x78A345D2, "rldcr r3, r5, r8, 23"); -} - -#[test] -fn test_ins_rldic() { - assert_asm!(0x78C51928, "rldic r5, r6, 3, 36"); -} - -#[test] -fn test_ins_rldicl() { - assert_asm!(0x78c50020, "rldicl r5, r6, 0, 32"); - assert_asm!(0x7bab07a0, "rldicl r11, r29, 0, 62"); -} - -#[test] -fn test_ins_rldicr() { - assert_asm!(0x7883ffe6, "rldicr r3, r4, 63, 63"); - assert_asm!(0x798c37e4, "rldicr r12, r12, 6, 63"); - assert_asm!(0x798c07c6, "rldicr r12, r12, 32, 31"); - assert_asm!(0x798ccfe6, "rldicr r12, r12, 57, 63"); -} - -#[test] -fn test_ins_rldimi() { - assert_asm!(0x78a3a04e, "rldimi r3, r5, 52, 1"); - assert_asm!(0x794b000e, "rldimi r11, r10, 32, 0"); - assert_asm!(0x780331CC, "rldimi r3, r0, 6, 7"); -} - #[test] fn test_ins_rlwimi() { assert_asm!(0x500306FE, "rlwimi r3, r0, 0, 27, 31"); @@ -1090,39 +758,11 @@ fn test_ins_sc() { assert_asm!(0x44000002, "sc"); } -#[test] -fn test_ins_slbia() { - assert_asm!(0x7c0003e4, "slbia"); -} - -#[test] -fn test_ins_slbie() { - assert_asm!(0x7C002B64, "slbie r5"); -} - -#[test] -fn test_ins_sld() { - assert_asm!(0x7d6a5036, "sld r10, r11, r10"); - assert_asm!(0x7D034836, "sld r3, r8, r9"); -} - #[test] fn test_ins_slw() { assert_asm!(0x7C042830, "slw r4, r0, r5"); } -#[test] -fn test_ins_srad() { - assert_asm!(0x7d0b5e34, "srad r11, r8, r11"); - assert_asm!(0x7C033634, "srad r3, r0, r6"); -} - -#[test] -fn test_ins_sradi() { - assert_asm!(0x7cc4a674, "sradi r4, r6, 20"); - assert_asm!(0x7d6b0676, "sradi r11, r11, 32"); -} - #[test] fn test_ins_sraw() { assert_asm!(0x7C043E30, "sraw r4, r0, r7"); @@ -1134,14 +774,6 @@ fn test_ins_srawi() { assert_asm!(0x7C001670, "srawi r0, r0, 2"); } -#[test] -fn test_ins_srd() { - assert_asm!(0x7d0a4c36, "srd r10, r8, r9"); - assert_asm!(0x7d675436, "srd r7, r11, r10"); - assert_asm!(0x7C001C36, "srd r0, r0, r3"); - assert_asm!(0x7C600436, "srd r0, r3, r0"); -} - #[test] fn test_ins_srw() { assert_asm!(0x7C001C30, "srw r0, r0, r3"); @@ -1170,35 +802,6 @@ fn test_ins_stbx() { assert_asm!(0x7C03F9AE, "stbx r0, r3, r31"); } -#[test] -fn test_ins_std() { - assert_asm!(0xfbe1fff0, "std r31, -0x10(r1)"); -} - -#[test] -fn test_ins_stdcx() { - assert_asm!(0x7CA749AD, "stdcx. r5, r7, r9"); - assert_asm!(0x7fc0e9ad, "stdcx. r30, r0, r29"); -} - -#[test] -fn test_ins_stdu() { - assert_asm!(0xf9690009, "stdu r11, 0x8(r9)"); - assert_asm!(0xf97ffff9, "stdu r11, -0x8(r31)"); -} - -#[test] -fn test_ins_stdux() { - assert_asm!(0x7C03316A, "stdux r0, r3, r6"); - assert_asm!(0x7d5cc96a, "stdux r10, r28, r25"); -} - -#[test] -fn test_ins_stdx() { - assert_asm!(0x7CA7F92A, "stdx r5, r7, r31"); - assert_asm!(0x7cc3212a, "stdx r6, r3, r4"); -} - #[test] fn test_ins_stfd() { assert_asm!(0xD80D97B0, "stfd f0, -0x6850(r13)"); @@ -1319,16 +922,6 @@ fn test_ins_sync() { assert_asm!(0x7c4004Ac, "ptesync"); } -#[test] -fn test_ins_td() { - assert_asm!(0x7DC30088, "td 14, r3, r0"); -} - -#[test] -fn test_ins_tdi() { - assert_asm!(0x09830058, "tdi 12, r3, 0x58"); -} - #[test] fn test_tlbie() { assert_asm!(0x7C001A64, "tlbie r3"); @@ -1373,8 +966,9 @@ fn test_ins_xoris() { #[test] fn test_ins_iter() { - let mut iter = InsIter::new(&[0x7C, 0x43, 0x22, 0x14, 0x7E, 0x1A, 0x02, 0xA6, 0xFF], 0); - assert_eq!(iter.next(), Some((0, Ins::new(0x7C432214)))); - assert_eq!(iter.next(), Some((4, Ins::new(0x7E1A02A6)))); + let mut iter = + InsIter::new(&[0x7C, 0x43, 0x22, 0x14, 0x7E, 0x1A, 0x02, 0xA6, 0xFF], 0, EXTENSIONS); + assert_eq!(iter.next(), Some((0, Ins::new(0x7C432214, EXTENSIONS)))); + assert_eq!(iter.next(), Some((4, Ins::new(0x7E1A02A6, EXTENSIONS)))); assert_eq!(iter.next(), None); } diff --git a/disasm/tests/test_ppc64.rs b/disasm/tests/test_ppc64.rs new file mode 100644 index 0000000..947bab3 --- /dev/null +++ b/disasm/tests/test_ppc64.rs @@ -0,0 +1,245 @@ +use powerpc::{Extension, Extensions, Ins}; + +const EXTENSIONS: Extensions = Extensions::from_extension(Extension::Ppc64); + +macro_rules! assert_asm { + ($ins:ident, $disasm:literal) => {{ + assert_eq!(format!("{}", $ins.simplified()), $disasm) + }}; + ($code:literal, $disasm:literal) => {{ + let ins = Ins::new($code, EXTENSIONS); + assert_eq!(format!("{}", ins.simplified()), $disasm) + }}; +} + +#[test] +fn test_ins_cntlzd() { + assert_asm!(0x7CA30074, "cntlzd r3, r5"); +} + +#[test] +fn test_ins_divd() { + assert_asm!(0x7CA63BD2, "divd r5, r6, r7"); +} + +#[test] +fn test_ins_divdu() { + assert_asm!(0x7C839392, "divdu r4, r3, r18"); +} + +#[test] +fn test_ins_extsw() { + assert_asm!(0x7CC307B4, "extsw r3, r6"); + assert_asm!(0x7CC307B5, "extsw. r3, r6"); +} + +#[test] +fn test_ins_fcfid() { + assert_asm!(0xFC602E9C, "fcfid f3, f5"); +} + +#[test] +fn test_ins_fctid() { + assert_asm!(0xFC60065C, "fctid f3, f0"); +} + +#[test] +fn test_ins_fctidz() { + assert_asm!(0xFC60065E, "fctidz f3, f0"); +} + +#[test] +fn test_ins_ld() { + assert_asm!(0xebe10058, "ld r31, 0x58(r1)"); + assert_asm!(0xe9790010, "ld r11, 0x10(r25)"); +} + +#[test] +fn test_ins_ldarx() { + assert_asm!(0x7C6538A8, "ldarx r3, r5, r7"); +} + +#[test] +fn test_ins_ldu() { + assert_asm!(0xe97cfff9, "ldu r11, -0x8(r28)"); + assert_asm!(0xe8deffe9, "ldu r6, -0x18(r30)"); +} + +#[test] +fn test_ins_ldux() { + assert_asm!(0x7C60286A, "ldux r3, r0, r5"); +} + +#[test] +fn test_ins_ldx() { + assert_asm!(0x7C60282A, "ldx r3, r0, r5"); +} + +#[test] +fn test_ins_lwa() { + assert_asm!(0xe97fffea, "lwa r11, -0x18(r31)"); +} + +#[test] +fn test_ins_lwaux() { + assert_asm!(0x7C8532EA, "lwaux r4, r5, r6"); +} + +#[test] +fn test_ins_lwax() { + assert_asm!(0x7CA63AAA, "lwax r5, r6, r7"); +} + +#[test] +fn test_ins_mtmsrd() { + assert_asm!(0x7C000164, "mtmsrd r0, 0"); + assert_asm!(0x7D210164, "mtmsrd r9, 1"); +} + +#[test] +fn test_ins_mtsrd() { + assert_asm!(0x7E0000A4, "mtsrd 0, r16"); +} + +#[test] +fn test_ins_mtsrdin() { + assert_asm!(0x7C8040E4, "mtsrdin r4, r8"); +} + +#[test] +fn test_ins_mulhd() { + assert_asm!(0x7C7CF892, "mulhd r3, r28, r31"); +} + +#[test] +fn test_ins_mulhdu() { + assert_asm!(0x7CBCF812, "mulhdu r5, r28, r31"); +} + +#[test] +fn test_ins_mulld() { + assert_asm!(0x7C6419D2, "mulld r3, r4, r3"); + assert_asm!(0x7d6b49d2, "mulld r11, r11, r9"); +} + +#[test] +fn test_ins_rfid() { + assert_asm!(0x4c000024, "rfid"); +} + +#[test] +fn test_ins_rldcl() { + assert_asm!(0x780336D0, "rldcl r3, r0, r6, 27"); + assert_asm!(0x78033010, "rotld r3, r0, r6"); +} + +#[test] +fn test_ins_rldcr() { + assert_asm!(0x78A345D2, "rldcr r3, r5, r8, 23"); +} + +#[test] +fn test_ins_rldic() { + assert_asm!(0x78C51928, "rldic r5, r6, 3, 36"); +} + +#[test] +fn test_ins_rldicl() { + assert_asm!(0x78c50020, "rldicl r5, r6, 0, 32"); + assert_asm!(0x7bab07a0, "rldicl r11, r29, 0, 62"); +} + +#[test] +fn test_ins_rldicr() { + assert_asm!(0x7883ffe6, "rldicr r3, r4, 63, 63"); + assert_asm!(0x798c37e4, "rldicr r12, r12, 6, 63"); + assert_asm!(0x798c07c6, "rldicr r12, r12, 32, 31"); + assert_asm!(0x798ccfe6, "rldicr r12, r12, 57, 63"); +} + +#[test] +fn test_ins_rldimi() { + assert_asm!(0x78a3a04e, "rldimi r3, r5, 52, 1"); + assert_asm!(0x794b000e, "rldimi r11, r10, 32, 0"); + assert_asm!(0x780331CC, "rldimi r3, r0, 6, 7"); +} + +#[test] +fn test_ins_slbia() { + assert_asm!(0x7c0003e4, "slbia"); +} + +#[test] +fn test_ins_slbie() { + assert_asm!(0x7C002B64, "slbie r5"); +} + +#[test] +fn test_ins_sld() { + assert_asm!(0x7d6a5036, "sld r10, r11, r10"); + assert_asm!(0x7D034836, "sld r3, r8, r9"); +} + +#[test] +fn test_ins_srad() { + assert_asm!(0x7d0b5e34, "srad r11, r8, r11"); + assert_asm!(0x7C033634, "srad r3, r0, r6"); +} + +#[test] +fn test_ins_sradi() { + assert_asm!(0x7cc4a674, "sradi r4, r6, 20"); + assert_asm!(0x7d6b0676, "sradi r11, r11, 32"); +} + +#[test] +fn test_ins_srd() { + assert_asm!(0x7d0a4c36, "srd r10, r8, r9"); + assert_asm!(0x7d675436, "srd r7, r11, r10"); + assert_asm!(0x7C001C36, "srd r0, r0, r3"); + assert_asm!(0x7C600436, "srd r0, r3, r0"); +} + +#[test] +fn test_ins_std() { + assert_asm!(0xfbe1fff0, "std r31, -0x10(r1)"); +} + +#[test] +fn test_ins_stdcx() { + assert_asm!(0x7CA749AD, "stdcx. r5, r7, r9"); + assert_asm!(0x7fc0e9ad, "stdcx. r30, r0, r29"); +} + +#[test] +fn test_ins_stdu() { + assert_asm!(0xf9690009, "stdu r11, 0x8(r9)"); + assert_asm!(0xf97ffff9, "stdu r11, -0x8(r31)"); +} + +#[test] +fn test_ins_stdux() { + assert_asm!(0x7C03316A, "stdux r0, r3, r6"); + assert_asm!(0x7d5cc96a, "stdux r10, r28, r25"); +} + +#[test] +fn test_ins_stdx() { + assert_asm!(0x7CA7F92A, "stdx r5, r7, r31"); + assert_asm!(0x7cc3212a, "stdx r6, r3, r4"); +} + +#[test] +fn test_ins_td() { + assert_asm!(0x7DC30088, "td 14, r3, r0"); +} + +#[test] +fn test_ins_tdi() { + assert_asm!(0x09830058, "tdi 12, r3, 0x58"); +} + +#[test] +fn test_vmx_dcbzl() { + assert_asm!(0x7c2327ec, "dcbzl r3, r4"); +} diff --git a/disasm/tests/test_ps.rs b/disasm/tests/test_ps.rs new file mode 100644 index 0000000..dfac9f4 --- /dev/null +++ b/disasm/tests/test_ps.rs @@ -0,0 +1,195 @@ +use powerpc::{Argument, Extension, Extensions, Ins, Opcode, FPR, GPR}; + +const EXTENSIONS: Extensions = Extensions::from_extension(Extension::PairedSingles); + +macro_rules! assert_asm { + ($ins:ident, $disasm:literal) => {{ + assert_eq!(format!("{}", $ins.simplified()), $disasm) + }}; + ($code:literal, $disasm:literal) => {{ + let ins = Ins::new($code, EXTENSIONS); + assert_eq!(format!("{}", ins.simplified()), $disasm) + }}; +} + +#[test] +fn test_ins_dcbz_l() { + assert_asm!(0x10061FEC, "dcbz_l r6, r3"); +} + +#[test] +fn test_ins_psq_l() { + assert_asm!(0xE02500AC, "psq_l f1, 0xac(r5), 0, qr0"); +} + +#[test] +fn test_ins_psq_lu() { + assert_asm!(0xE5435010, "psq_lu f10, 0x10(r3), 0, qr5"); +} + +#[test] +fn test_ins_psq_lx() { + let ins = Ins::new(0x1000000C, EXTENSIONS); + assert_eq!(ins.op, Opcode::PsqLx); + // assert_eq!( + // ins.fields(), + // vec![ + // frD(FPR(0)), + // rA(GPR(0)), + // rB(GPR(0)), + // ps_WX(OpaqueU(0)), + // ps_IX(GQR(0)), + // ] + // ); + assert_eq!( + ins.defs(), + [Argument::FPR(FPR(0)), Argument::None, Argument::None, Argument::None, Argument::None] + ); + assert_eq!( + ins.uses(), + [Argument::None, Argument::GPR(GPR(0)), Argument::None, Argument::None, Argument::None] + ); + + assert_asm!(0x1000000C, "psq_lx f0, r0, r0, 0, qr0"); +} + +#[test] +fn test_ins_psq_st() { + assert_asm!(0xF1230210, "psq_st f9, 0x210(r3), 0, qr0"); + assert_asm!(0xF1238008, "psq_st f9, 0x8(r3), 1, qr0"); +} + +#[test] +fn test_ins_psq_stu() { + assert_asm!(0xF40A0020, "psq_stu f0, 0x20(r10), 0, qr0"); +} + +#[test] +fn test_ins_psq_stx() { + assert_asm!(0x13E1000E, "psq_stx f31, r1, r0, 0, qr0"); +} + +#[test] +fn test_ins_ps_abs() { + assert_asm!(0x10A03210, "ps_abs f5, f6"); +} + +#[test] +fn test_ins_ps_add() { + assert_asm!(0x1006382A, "ps_add f0, f6, f7"); +} + +#[test] +fn test_ins_ps_cmpo0() { + assert_asm!(0x10070840, "ps_cmpo0 cr0, f7, f1"); +} + +#[test] +fn test_ins_ps_cmpu0() { + assert_asm!(0x10003000, "ps_cmpu0 cr0, f0, f6"); +} + +#[test] +fn test_ins_ps_cmpu1() { + assert_asm!(0x10003080, "ps_cmpu1 cr0, f0, f6"); +} + +#[test] +fn test_ins_ps_madd() { + assert_asm!(0x112141FA, "ps_madd f9, f1, f7, f8"); +} + +#[test] +fn test_ins_ps_madds0() { + assert_asm!(0x10AC299C, "ps_madds0 f5, f12, f6, f5"); +} + +#[test] +fn test_ins_ps_madds1() { + assert_asm!(0x110640DE, "ps_madds1 f8, f6, f3, f8"); +} + +#[test] +fn test_ins_ps_merge00() { + assert_asm!(0x10400420, "ps_merge00 f2, f0, f0"); +} + +#[test] +fn test_ins_ps_merge01() { + assert_asm!(0x10400C60, "ps_merge01 f2, f0, f1"); +} + +#[test] +fn test_ins_ps_merge10() { + assert_asm!(0x104004A0, "ps_merge10 f2, f0, f0"); +} + +#[test] +fn test_ins_ps_merge11() { + assert_asm!(0x10AA14E0, "ps_merge11 f5, f10, f2"); +} + +#[test] +fn test_ins_ps_mr() { + assert_asm!(0x10200090, "ps_mr f1, f0"); +} + +#[test] +fn test_ins_ps_msub() { + assert_asm!(0x10A53778, "ps_msub f5, f5, f29, f6"); +} + +#[test] +fn test_ins_ps_mul() { + assert_asm!(0x10000032, "ps_mul f0, f0, f0"); +} + +#[test] +fn test_ins_ps_muls0() { + assert_asm!(0x100002D8, "ps_muls0 f0, f0, f11"); +} + +#[test] +fn test_ins_ps_muls1() { + assert_asm!(0x10A2005A, "ps_muls1 f5, f2, f1"); +} + +#[test] +fn test_ins_ps_nabs() { + assert_asm!(0x10803210, "ps_abs f4, f6"); +} + +#[test] +fn test_ins_ps_neg() { + assert_asm!(0x10E03850, "ps_neg f7, f7"); +} + +#[test] +fn test_ins_ps_nmadd() { + assert_asm!(0x10CB30FE, "ps_nmadd f6, f11, f3, f6"); +} + +#[test] +fn test_ins_ps_nmsub() { + assert_asm!(0x107E083C, "ps_nmsub f3, f30, f0, f1"); +} + +#[test] +fn test_ins_ps_sel() { + assert_asm!(0x106428EE, "ps_sel f3, f4, f3, f5"); +} + +#[test] +fn test_ins_ps_sub() { + assert_asm!(0x10A92828, "ps_sub f5, f9, f5"); +} + +#[test] +fn test_ins_ps_sum0() { + assert_asm!(0x10230854, "ps_sum0 f1, f3, f1, f1"); +} + +#[test] +fn test_ins_ps_sum1() { + assert_asm!(0x10A12956, "ps_sum1 f5, f1, f5, f5"); +} diff --git a/disasm/tests/test_vmx.rs b/disasm/tests/test_vmx.rs index 7e44784..74c4c86 100644 --- a/disasm/tests/test_vmx.rs +++ b/disasm/tests/test_vmx.rs @@ -1,15 +1,41 @@ -use ppc750cl::Ins; +use powerpc::{Extension, Extensions, Ins}; + +const EXTENSIONS: Extensions = Extensions::from_extension(Extension::Vmx128); macro_rules! assert_asm { ($ins:ident, $disasm:literal) => {{ assert_eq!(format!("{}", $ins.simplified()), $disasm) }}; ($code:literal, $disasm:literal) => {{ - let ins = Ins::new($code); + let ins = Ins::new($code, EXTENSIONS); assert_eq!(format!("{}", ins.simplified()), $disasm) }}; } +#[test] +fn test_vmx_enables_altivec() { + let extensions = Extensions::from_extension(Extension::Vmx128); + assert!(extensions.contains(Extension::AltiVec)); +} + +#[test] +fn test_extensions_remove_vmx() { + let mut extensions = Extensions::from_extension(Extension::Vmx128); + extensions.remove(Extension::Vmx128); + assert!(!extensions.contains(Extension::Vmx128)); + // Ensure AltiVec is still enabled + assert!(extensions.contains(Extension::AltiVec)); +} + +#[test] +fn test_extensions_remove_altivec() { + let mut extensions = Extensions::from_extension(Extension::Vmx128); + extensions.remove(Extension::AltiVec); + assert!(!extensions.contains(Extension::AltiVec)); + // Ensure Vmx128 is disabled (AltiVec required) + assert!(!extensions.contains(Extension::Vmx128)); +} + #[test] fn test_vmx_lvewx128() { assert_asm!(0x1243388F, "lvewx128 v114, r3, r7"); diff --git a/fuzz/Cargo.toml b/fuzz/Cargo.toml index cb2b77a..6fa5fad 100644 --- a/fuzz/Cargo.toml +++ b/fuzz/Cargo.toml @@ -1,10 +1,10 @@ [package] -name = "ppc750cl-fuzz" +name = "powerpc-fuzz" version.workspace = true edition.workspace = true authors = ["Richard Patel "] license = "GPL-3.0-or-later" -description = "Complete fuzzer for ppc750cl" +description = "Complete fuzzer for powerpc" repository.workspace = true rust-version.workspace = true publish = false @@ -12,4 +12,4 @@ publish = false [dependencies] clap = "4" num_cpus = "1.16" -ppc750cl = { path = "../disasm" } +powerpc = { path = "../disasm" } diff --git a/fuzz/src/main.rs b/fuzz/src/main.rs index 63c6b12..0da06ee 100644 --- a/fuzz/src/main.rs +++ b/fuzz/src/main.rs @@ -1,3 +1,4 @@ +use powerpc::Extensions; use std::io::Write; use std::ops::Range; use std::sync::atomic::{AtomicU32, Ordering}; @@ -5,9 +6,9 @@ use std::sync::Arc; use std::time::{Duration, Instant}; fn main() { - let matches = clap::Command::new("ppc750cl-fuzz") - .version("0.2.0") - .about("Complete \"fuzzer\" for ppc750cl disassembler") + let matches = clap::Command::new("powerpc-fuzz") + .version(env!("CARGO_PKG_VERSION")) + .about("Complete \"fuzzer\" for powerpc disassembler") .arg( clap::Arg::new("threads") .short('t') @@ -101,9 +102,10 @@ impl Fuzzer { let counter = Arc::clone(&self.counter); let range = self.range.clone(); std::thread::spawn(move || { - let mut parsed = ppc750cl::ParsedIns::default(); + let mut parsed = powerpc::ParsedIns::default(); for x in range.clone() { - ppc750cl::Ins::new(x).parse_simplified(&mut parsed); + powerpc::Ins::new(x, Extensions::from_bitmask(u32::MAX)) + .parse_simplified(&mut parsed); writeln!(&mut devnull, "{parsed}").unwrap(); if x % (1 << 19) == 0 { counter.store(x, Ordering::Relaxed); diff --git a/genisa/Cargo.toml b/genisa/Cargo.toml index fde589d..7312217 100644 --- a/genisa/Cargo.toml +++ b/genisa/Cargo.toml @@ -1,18 +1,20 @@ [package] -name = "ppc750cl-genisa" +name = "powerpc-genisa" version.workspace = true edition.workspace = true authors.workspace = true license.workspace = true -description = "Rust code generator for ppc750cl" +description = "Rust code generator for powerpc" repository.workspace = true rust-version.workspace = true publish = false [dependencies] anyhow = "1.0" +indexmap = { version = "2.10", features = ["serde"] } log = "0.4" num-traits = "0.2" +phf_codegen = "0.11" prettyplease = "0.2" proc-macro2 = "1.0" quote = "1.0" @@ -20,5 +22,3 @@ serde = { version = "1.0", features = ["derive"] } serde_yaml = "0.9" simple_logger = "5.0" syn = { version = "2", default-features = false, features = ["full", "parsing"] } -phf = "0.11" -phf_codegen = "0.11" diff --git a/genisa/src/asm.rs b/genisa/src/asm.rs index 6e6f14d..975f003 100644 --- a/genisa/src/asm.rs +++ b/genisa/src/asm.rs @@ -102,7 +102,7 @@ pub fn gen_asm(isa: &Isa, max_args: usize) -> Result { Ok(quote! { #![allow(unused)] #![cfg_attr(rustfmt, rustfmt_skip)] - #[comment = " Code generated by ppc750-genisa. DO NOT EDIT."] + #[comment = " Code generated by powerpc-genisa. DO NOT EDIT."] use crate::types::*; pub type Arguments = [Argument; #max_args]; #functions diff --git a/genisa/src/disasm.rs b/genisa/src/disasm.rs index b23dd0c..5bf877c 100644 --- a/genisa/src/disasm.rs +++ b/genisa/src/disasm.rs @@ -1,10 +1,15 @@ -use crate::condition::{parse_conditions, replace_fields}; -use crate::ident; -use crate::isa::{modifiers_iter, modifiers_valid, HexLiteral, Isa, Opcode}; +use crate::{ + condition::{parse_conditions, replace_fields}, + ident, + isa::{modifiers_iter, modifiers_valid, HexLiteral, Isa, Opcode}, +}; use anyhow::{bail, ensure, Result}; -use proc_macro2::{Literal, TokenStream}; +use proc_macro2::{Ident, Literal, TokenStream}; use quote::{format_ident, quote}; -use std::collections::HashMap; +use std::{ + collections::{btree_map, BTreeMap, HashMap}, + hash::{DefaultHasher, Hash, Hasher}, +}; pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { // The entry table allows us to quickly find the range of possible opcodes @@ -59,7 +64,19 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { let pattern = HexLiteral(opcode.pattern); let enum_idx = Literal::u16_unsuffixed(idx as u16); let name = &opcode.name; - opcode_patterns.extend(quote! { (#bitmask, #pattern), }); + let comment = format!(" {}", name); + let extension = + isa.extensions.iter().find(|(_, e)| e.opcodes.iter().any(|o| o.name == opcode.name)); + let initializer = if let Some((id, _)) = extension { + let ident = format_ident!("{id}"); + quote! { OpcodePattern::extension(#bitmask, #pattern, Extension::#ident) } + } else { + quote! { OpcodePattern::base(#bitmask, #pattern) } + }; + opcode_patterns.extend(quote! { + #[comment = #comment] + #initializer, + }); opcode_names.extend(quote! { #name, }); let doc = opcode.doc(); let variant = opcode.variant(); @@ -244,9 +261,12 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { let mut defs_uses_functions = TokenStream::new(); let mut defs_refs = TokenStream::new(); let mut uses_refs = TokenStream::new(); + + // Deduplicate equivalent functions + let mut hash_to_fn = BTreeMap::::new(); + for opcode in &sorted_ops { let mut defs = TokenStream::new(); - let mut uses = TokenStream::new(); let mut defs_count = 0; for def in &opcode.defs { if isa.find_field(def).is_some_and(|f| f.arg.is_none()) { @@ -256,6 +276,8 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { defs.extend(quote! { #arg, }); defs_count += 1; } + + let mut uses = TokenStream::new(); let mut use_count = 0; for use_ in &opcode.uses { if let Some(use_) = use_.strip_suffix(".nz") { @@ -278,10 +300,23 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { defs.extend(quote! { Argument::None, }); } let defs_name = format_ident!("defs_{}", opcode.ident()); - defs_uses_functions.extend(quote! { - fn #defs_name(out: &mut Arguments, ins: Ins) { *out = [#defs]; } - }); - defs_refs.extend(quote! { #defs_name, }); + + let mut hasher = DefaultHasher::default(); + opcode.defs.hash(&mut hasher); + let defs_hash = hasher.finish(); + match hash_to_fn.entry(defs_hash) { + btree_map::Entry::Vacant(e) => { + e.insert(defs_name.clone()); + defs_uses_functions.extend(quote! { + fn #defs_name(out: &mut Arguments, ins: Ins) { *out = [#defs]; } + }); + defs_refs.extend(quote! { #defs_name, }); + } + btree_map::Entry::Occupied(e) => { + let ident = e.get(); + defs_refs.extend(quote! { #ident, }); + } + } } else { defs_refs.extend(quote! { defs_uses_empty, }); } @@ -291,10 +326,23 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { uses.extend(quote! { Argument::None, }); } let uses_name = format_ident!("uses_{}", opcode.ident()); - defs_uses_functions.extend(quote! { - fn #uses_name(out: &mut Arguments, ins: Ins) { *out = [#uses]; } - }); - uses_refs.extend(quote! { #uses_name, }); + + let mut hasher = DefaultHasher::default(); + opcode.uses.hash(&mut hasher); + let uses_hash = hasher.finish(); + match hash_to_fn.entry(uses_hash) { + btree_map::Entry::Vacant(e) => { + e.insert(uses_name.clone()); + defs_uses_functions.extend(quote! { + fn #uses_name(out: &mut Arguments, ins: Ins) { *out = [#uses]; } + }); + uses_refs.extend(quote! { #uses_name, }); + } + btree_map::Entry::Occupied(e) => { + let ident = e.get(); + uses_refs.extend(quote! { #ident, }); + } + } } else { uses_refs.extend(quote! { defs_uses_empty, }); } @@ -308,19 +356,96 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { none_args.extend(quote! { Argument::None, }); } + let extension_variants = isa + .extensions + .iter() + .map(|(id, ext)| { + let ident = format_ident!("{id}"); + let desc = format!(" {}", ext.name); + quote! { + #[doc = #desc] + #ident, + } + }) + .collect::>(); + let extension_requires = isa + .extensions + .iter() + .filter_map(|(id, ext)| { + if ext.requires.is_empty() { + return None; + } + let requires = ext + .requires + .iter() + .map(|parent| { + let ident = format_ident!("{parent}"); + quote! { Extension::#ident.bitmask() } + }) + .collect::>(); + let ident = format_ident!("{id}"); + Some(quote! { Extension::#ident => #(#requires)|*, }) + }) + .collect::>(); + let extension_names = isa + .extensions + .iter() + .map(|(id, ext)| { + let ident = format_ident!("{id}"); + let name = &ext.name; + Some(quote! { Extension::#ident => #name, }) + }) + .collect::>(); + let extensions = quote! { + #[derive(Copy, Clone, Debug, PartialEq, Eq)] + #[repr(u32)] + pub enum Extension { + #(#extension_variants)* + } + impl Extension { + #[inline] + pub const fn bitmask(self) -> u32 { + (1 << (self as u32)) | match self { + #(#extension_requires)* + _ => 0, + } + } + pub const fn name(self) -> &'static str { + match self { + #(#extension_names)* + } + } + } + }; + let entries_count = Literal::usize_unsuffixed(entries.len()); let opcode_count = Literal::usize_unsuffixed(sorted_ops.len()); let max_args = Literal::usize_unsuffixed(max_args); Ok(quote! { #![allow(unused)] #![cfg_attr(rustfmt, rustfmt_skip)] - #[comment = " Code generated by ppc750-genisa. DO NOT EDIT."] + #[comment = " Code generated by powerpc-genisa. DO NOT EDIT."] use crate::disasm::*; + #extensions #[doc = " The entry table allows us to quickly find the range of possible opcodes for a"] #[doc = " given 6-bit prefix. 2*64 bytes should fit in a cache line (or two)."] static OPCODE_ENTRIES: [(u16, u16); #entries_count] = [#opcode_entries]; + #[derive(Copy, Clone)] + struct OpcodePattern { + bitmask: u32, + pattern: u32, + extensions: Extensions, + } + impl OpcodePattern { + const fn base(bitmask: u32, pattern: u32) -> Self { + Self { bitmask, pattern, extensions: Extensions::none() } + } + const fn extension(bitmask: u32, pattern: u32, extension: Extension) -> Self { + Self { bitmask, pattern, extensions: Extensions::from_extension(extension) } + } + } #[doc = " The bitmask and pattern for each opcode."] - static OPCODE_PATTERNS: [(u32, u32); #opcode_count] = [#opcode_patterns]; + static OPCODE_PATTERNS: [OpcodePattern; #opcode_count] = [#opcode_patterns]; #[doc = " The name of each opcode."] static OPCODE_NAMES: [&str; #opcode_count] = [#opcode_names]; @@ -334,17 +459,15 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { #opcode_enum } impl Opcode { - #[inline] pub fn mnemonic(self) -> &'static str { OPCODE_NAMES.get(self as usize).copied().unwrap_or("") } - #[inline] - pub fn detect(code: u32) -> Self { + pub fn detect(code: u32, extensions: Extensions) -> Self { let entry = OPCODE_ENTRIES[(code >> 26) as usize]; for i in entry.0..entry.1 { - let pattern = OPCODE_PATTERNS[i as usize]; - if (code & pattern.0) == pattern.1 { + let op = OPCODE_PATTERNS[i as usize]; + if extensions.contains_all(op.extensions) && (code & op.bitmask) == op.pattern { #[comment = " Safety: The enum is repr(u16) and the value is within the enum's range"] return unsafe { core::mem::transmute::(i) }; } @@ -380,16 +503,14 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { type MnemonicFunction = fn(&mut ParsedIns, Ins); #mnemonic_functions static BASIC_MNEMONICS: [MnemonicFunction; #opcode_count] = [#basic_functions_ref]; - #[inline] - pub fn parse_basic(out: &mut ParsedIns, ins: Ins) { + pub(crate) fn parse_basic(out: &mut ParsedIns, ins: Ins) { match BASIC_MNEMONICS.get(ins.op as usize) { Some(f) => f(out, ins), None => mnemonic_illegal(out, ins), } } static SIMPLIFIED_MNEMONICS: [MnemonicFunction; #opcode_count] = [#simplified_functions_ref]; - #[inline] - pub fn parse_simplified(out: &mut ParsedIns, ins: Ins) { + pub(crate) fn parse_simplified(out: &mut ParsedIns, ins: Ins) { match SIMPLIFIED_MNEMONICS.get(ins.op as usize) { Some(f) => f(out, ins), None => mnemonic_illegal(out, ins), @@ -399,16 +520,14 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result { type DefsUsesFunction = fn(&mut Arguments, Ins); #defs_uses_functions static DEFS_FUNCTIONS: [DefsUsesFunction; #opcode_count] = [#defs_refs]; - #[inline] - pub fn parse_defs(out: &mut Arguments, ins: Ins) { + pub(crate) fn parse_defs(out: &mut Arguments, ins: Ins) { match DEFS_FUNCTIONS.get(ins.op as usize) { Some(f) => f(out, ins), None => defs_uses_empty(out, ins), } } static USES_FUNCTIONS: [DefsUsesFunction; #opcode_count] = [#uses_refs]; - #[inline] - pub fn parse_uses(out: &mut Arguments, ins: Ins) { + pub(crate) fn parse_uses(out: &mut Arguments, ins: Ins) { match USES_FUNCTIONS.get(ins.op as usize) { Some(f) => f(out, ins), None => defs_uses_empty(out, ins), diff --git a/genisa/src/isa.rs b/genisa/src/isa.rs index 30df38b..8a49264 100644 --- a/genisa/src/isa.rs +++ b/genisa/src/isa.rs @@ -1,7 +1,8 @@ use std::collections::HashMap; use std::{fs::File, path::Path, str::FromStr}; -use anyhow::{Context, Result}; +use anyhow::{bail, Context, Result}; +use indexmap::IndexMap; use num_traits::PrimInt; use proc_macro2::{Ident, Span, TokenStream}; use quote::{format_ident, ToTokens}; @@ -11,8 +12,55 @@ use serde::{Deserialize, Deserializer, Serialize}; pub fn load_isa(path: &Path) -> Result { let yaml_file = File::open(path).with_context(|| format!("Failed to open file {}", path.display()))?; - let isa: Isa = serde_yaml::from_reader(yaml_file) + let mut isa: Isa = serde_yaml::from_reader(yaml_file) .with_context(|| format!("While parsing file {}", path.display()))?; + // Merge in all extensions + for extension in isa.extensions.values() { + for field in &extension.fields { + if isa.find_field(&field.name).is_some() { + bail!( + "Field {} already exists (while applying extension {})", + field.name, + extension.name + ); + } else { + isa.fields.push(field.clone()); + } + } + for modifier in &extension.modifiers { + if isa.find_modifier(&modifier.name).is_some() { + bail!( + "Modifier {} already exists (while applying extension {})", + modifier.name, + extension.name + ); + } else { + isa.modifiers.push(modifier.clone()); + } + } + for opcode in &extension.opcodes { + if isa.find_opcode(&opcode.name).is_some() { + bail!( + "Opcode {} already exists (while applying extension {})", + opcode.name, + extension.name + ); + } else { + isa.opcodes.push(opcode.clone()); + } + } + for mnemonic in &extension.mnemonics { + if isa.find_mnemonic(&mnemonic.name).is_some() { + bail!( + "Mnemonic {} already exists (while applying extension {})", + mnemonic.name, + extension.name + ); + } else { + isa.mnemonics.push(mnemonic.clone()); + } + } + } Ok(isa) } @@ -23,6 +71,18 @@ pub struct Isa { pub modifiers: Vec, pub opcodes: Vec, pub mnemonics: Vec, + pub extensions: IndexMap, +} + +#[derive(Deserialize, Serialize, Clone, Debug, Default)] +#[serde(default)] +pub struct Extension { + pub name: String, + pub requires: Vec, + pub fields: Vec, + pub modifiers: Vec, + pub opcodes: Vec, + pub mnemonics: Vec, } impl Isa { @@ -37,6 +97,10 @@ impl Isa { pub fn find_opcode(&self, name: &str) -> Option<&Opcode> { self.opcodes.iter().find(|o| o.name == name) } + + pub fn find_mnemonic(&self, name: &str) -> Option<&Mnemonic> { + self.mnemonics.iter().find(|m| m.name == name) + } } #[derive(Deserialize, Serialize, Clone, Debug, Default)] @@ -222,6 +286,7 @@ pub fn modifiers_iter<'a>( } #[derive(Copy, Clone, Debug, Default)] +#[repr(transparent)] pub struct BitRange(pub (u8, u8)); impl BitRange { @@ -231,42 +296,42 @@ impl BitRange { } #[inline] - pub fn start(&self) -> u8 { + pub fn start(self) -> u8 { self.0 .0 } #[inline] - pub fn end(&self) -> u8 { + pub fn end(self) -> u8 { self.0 .1 } /// Calculate the mask from the range #[inline] - pub fn mask(&self) -> u32 { + pub fn mask(self) -> u32 { self.max_value() << self.shift() } /// Number of bits to shift #[inline] - pub fn shift(&self) -> u8 { + pub fn shift(self) -> u8 { 32 - self.end() } /// Number of bits in the range #[inline] - pub fn len(&self) -> u8 { + pub fn len(self) -> u8 { self.end() - self.start() } /// Shift and mask a value according to the range #[inline] - pub fn shift_value(&self, value: u32) -> u32 { + pub fn shift_value(self, value: u32) -> u32 { (value & self.max_value()) << self.shift() } /// Calculate the maximum value that can be represented by the range #[inline] - pub fn max_value(&self) -> u32 { + pub fn max_value(self) -> u32 { (1 << self.len()) - 1 } } @@ -308,13 +373,13 @@ pub struct SplitBitRange(pub Vec); impl SplitBitRange { #[inline] pub fn end(&self) -> u8 { - self.0.iter().map(|r| r.end()).max().unwrap_or(0) + self.iter().map(BitRange::end).max().unwrap_or(0) } /// Calculate the mask from the range #[inline] pub fn mask(&self) -> u32 { - self.0.iter().map(|r| r.mask()).fold(0, |acc, m| acc | m) + self.iter().map(BitRange::mask).fold(0, |acc, m| acc | m) } /// Number of bits to shift @@ -326,14 +391,14 @@ impl SplitBitRange { /// Number of bits in the range #[inline] pub fn len(&self) -> u8 { - self.0.iter().map(|r| r.len()).sum() + self.iter().map(BitRange::len).sum() } /// Shift and mask a value according to the range #[inline] pub fn shift_value(&self, mut value: u32) -> u32 { let mut result = 0; - for range in self.0.iter().rev() { + for range in self.iter().rev() { result |= range.shift_value(value); value >>= range.len(); } @@ -345,6 +410,12 @@ impl SplitBitRange { pub fn max_value(&self) -> u32 { (1 << self.len()) - 1 } + + /// Create an iterator over the contained bit ranges + #[inline] + pub fn iter(&self) -> impl DoubleEndedIterator + use<'_> { + self.0.iter().copied() + } } impl<'de> Deserialize<'de> for SplitBitRange { diff --git a/isa.yaml b/isa.yaml index 3190ed8..0430044 100644 --- a/isa.yaml +++ b/isa.yaml @@ -9,26 +9,11 @@ fields: arg: Uimm desc: Unsigned Immediate bits: 16..32 - - name: vsimm - arg: Simm - desc: Vector Signed Immediate - bits: 11..16 - signed: true - - name: vuimm - arg: Uimm - desc: Vector Unsigned Immediate - bits: 11..16 - name: offset arg: Offset desc: Branch Offset bits: 16..32 signed: true - - name: ds - arg: Offset - desc: Load/Store Double Word Offset (for 64-bit instructions) - bits: 16..30 - shift_left: 2 - signed: true # Branch fields - name: BO arg: OpaqueU @@ -55,26 +40,14 @@ fields: arg: OpaqueU desc: Shift Amount bits: 16..21 - - name: SH64 - arg: OpaqueU - desc: Shift Amount (for 64-bit instructions) - bits: 30,16..21 - name: MB arg: OpaqueU desc: Mask Begin bits: 21..26 - - name: MB64 - arg: OpaqueU - desc: Mask Begin (for 64-bit instructions) - bits: 26,21..26 - name: ME arg: OpaqueU desc: Mask End bits: 26..31 - - name: ME64 - arg: OpaqueU - desc: Mask End (for 64-bit instructions) - bits: 26,21..26 # Registers - name: rS arg: GPR @@ -125,31 +98,6 @@ fields: arg: FPR desc: Floating-Point Register C bits: 21..26 - # Vector registers - - name: vS - arg: VR - desc: Vector Source Register - bits: 6..11 - - name: vD - arg: VR - desc: Vector Destination Register - bits: 6..11 - - name: vA - arg: VR - desc: Vector Register A - bits: 11..16 - - name: vA.nz - arg: VR - desc: Vector Register A (non-zero) - bits: 11..16 - - name: vB - arg: VR - desc: Vector Register B - bits: 16..21 - - name: vC - arg: VR - desc: Vector Register C - bits: 21..26 # Condition register bits - name: crbD arg: CRBit @@ -215,62 +163,11 @@ fields: desc: Count Register - name: lr desc: Link Register - - name: mtmsrd_L - arg: OpaqueU - desc: L field for mtmsrd - bits: 15..16 - name: sync_L arg: OpaqueU desc: L field for sync bits: 9..11 - # AltiVec exclusive - - name: ds_A - arg: OpaqueU - desc: All field for ds instructions - bits: 6..7 - - name: STRM - arg: OpaqueU - desc: Stream ID - bits: 9..11 - - name: SHB - arg: OpaqueU - bits: 22..26 - - # VMX128 exclusive - - name: VDS128 - arg: VR - desc: VMX128 Source/Dest Register - bits: 28..30,6..11 - - name: VA128 - arg: VR - desc: VMX128 Register A - bits: 21,26,11..16 - - name: VB128 - arg: VR - desc: VMX128 Register B - bits: 30..32,16..21 - - name: VC128 - arg: VR - desc: VMX128 Register C - bits: 23..26 - - name: PERM - arg: OpaqueU - desc: VMX128 Permutation - bits: 23..26,11..16 - - name: D3DType - arg: OpaqueU - desc: the packed data type - bits: 11..14 - - name: VMASK - arg: OpaqueU - desc: the pack mask - bits: 14..16 - - name: Zimm - arg: OpaqueU - desc: amount to rotate/shift left - bits: 24..26 - modifiers: - name: OE desc: Field used by XO-form instructions to enable setting OV and SO in the XER. @@ -306,21 +203,6 @@ modifiers: suffix: + bit: 10 - # AltiVec exclusive - - name: T - desc: Transient bit - suffix: t - bit: 6 - - name: RcAV - desc: Record Bit (AltiVec) - suffix: . - bit: 21 - # VMX128 exclusive - - name: Rc128 - desc: Record Bit (VMX128) - suffix: . - bit: 25 - opcodes: - name: add desc: Add @@ -499,16 +381,6 @@ opcodes: defs: [ crfD ] uses: [ rA ] - # 64-bit only - - name: cntlzd - desc: Count Leading Zeros Double Word - bitmask: 0xfc00fffe - pattern: 0x7c000074 - modifiers: [ Rc ] - args: [ rA, rS ] - defs: [ rA ] - uses: [ rS ] - - name: cntlzw desc: Count Leading Zeros Word bitmask: 0xfc00fffe @@ -624,33 +496,6 @@ opcodes: args: [ rA, rB ] uses: [ rA.nz, rB ] - - name: dcbz_l - desc: Data Cache Block Set to Zero Locked - bitmask: 0xffe007ff - pattern: 0x100007ec - args: [ rA, rB ] - uses: [ rA.nz, rB ] - - # 64-bit only - - name: divd - desc: Divide Double Word - bitmask: 0xfc0003fe - pattern: 0x7c0003d2 - modifiers: [ OE, Rc ] - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - # 64-bit only - - name: divdu - desc: Divide Double Word Unsigned - bitmask: 0xfc0003fe - pattern: 0x7c000392 - modifiers: [ OE, Rc ] - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - name: divw desc: Divide Word bitmask: 0xfc0003fe @@ -716,16 +561,6 @@ opcodes: defs: [ rA ] uses: [ rS ] - # 64-bit only - - name: extsw - desc: Extend Sign Word - bitmask: 0xfc00fffe - pattern: 0x7c0007b4 - modifiers: [ Rc ] - args: [ rA, rS ] - defs: [ rA ] - uses: [ rS ] - - name: fabs desc: Floating Absolute Value bitmask: 0xfc1f07fe @@ -753,16 +588,6 @@ opcodes: defs: [ frD ] uses: [ frA, frB ] - # 64-bit only - - name: fcfid - desc: Floating Convert from Integer Double Word - bitmask: 0xfc1f07fe - pattern: 0xfc00069c - modifiers: [ Rc ] - args: [ frD, frB ] - defs: [ frD ] - uses: [ frB ] - - name: fcmpo desc: Floating Compare Ordered bitmask: 0xfc6007ff @@ -779,26 +604,6 @@ opcodes: defs: [ crfD ] uses: [ frA, frB ] - # 64-bit only - - name: fctid - desc: Floating Convert to Integer Double Word - bitmask: 0xfc1f07fe - pattern: 0xfc00065c - modifiers: [ Rc ] - args: [ frD, frB ] - defs: [ frD ] - uses: [ frB ] - - # 64-bit only - - name: fctidz - desc: Floating Convert to Integer Double Word with Round toward Zero - bitmask: 0xfc1f07fe - pattern: 0xfc00065e - modifiers: [ Rc ] - args: [ frD, frB ] - defs: [ frD ] - uses: [ frB ] - - name: fctiw desc: Floating Convert to Integer Word bitmask: 0xfc1f07fe @@ -1051,51 +856,6 @@ opcodes: defs: [ rD ] uses: [ rA.nz, rB ] - # 64-bit only - - name: ld - desc: Load Double Word - bitmask: 0xfc000003 - pattern: 0xe8000000 - args: [ rD, ds, rA ] - defs: [ rD ] - uses: [ rA.nz ] - - # 64-bit only - - name: ldarx - desc: Load Double Word and Reserve Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0000a8 - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - # 64-bit only - - name: ldu - desc: Load Double Word with Update - bitmask: 0xfc000003 - pattern: 0xe8000001 - args: [ rD, ds, rA ] - defs: [ rD, rA ] - uses: [ rA ] - - # 64-bit only - - name: ldux - desc: Load Double Word with Update Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00006a - args: [ rD, rA, rB ] - defs: [ rD, rA ] - uses: [ rA, rB ] - - # 64-bit only - - name: ldx - desc: Load Double Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00002a - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA.nz, rB ] - - name: lfd desc: Load Floating-Point Double bitmask: 0xfc000000 @@ -1257,15 +1017,6 @@ opcodes: defs: [ rD ] uses: [ rA.nz, rB ] - # 64-bit only - - name: lwa - desc: Load Word Algebraic - bitmask: 0xfc000003 - pattern: 0xe8000002 - args: [ rD, ds, rA ] - defs: [ rD ] - uses: [ rA.nz ] - - name: lwarx desc: Load String Word and Reverse Indexed bitmask: 0xfc0007ff @@ -1274,24 +1025,6 @@ opcodes: defs: [ rD ] uses: [ rA.nz, rB ] - # 64-bit only - - name: lwaux - desc: Load Word Algebraic with Update Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0002ea - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - # 64-bit only - - name: lwax - desc: Load Word Algebraic Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0002aa - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA.nz, rB ] - - name: lwbrx desc: Load String Word and Byte-Reverse Indexed bitmask: 0xfc0007ff @@ -1452,14 +1185,6 @@ opcodes: args: [ rS ] uses: [ rS ] - # 64-bit only - - name: mtmsrd - desc: Move to Machine State Register Double Word - bitmask: 0xFC1EFFFF - pattern: 0x7c000164 - args: [ rS, mtmsrd_L ] - uses: [ rS, mtmsrd_L ] - - name: mtspr desc: Move to Special-Purpose Register bitmask: 0xfc0007ff @@ -1474,22 +1199,6 @@ opcodes: args: [ sr, rS ] uses: [ rS ] - # 64-bit only - - name: mtsrd - desc: Move to Segment Register Double Word - bitmask: 0xfc10ffff - pattern: 0x7c0000a4 - args: [ sr, rS ] - uses: [ rS ] - - # 64-bit only - - name: mtsrdin - desc: Move to Segment Register Double Word Indirect - bitmask: 0xfc1f07ff - pattern: 0x7c0000e4 - args: [ rS, rB ] - uses: [ rS, rB ] - - name: mtsrin desc: Move to Segment Register Indirect bitmask: 0xfc1f07ff @@ -1497,26 +1206,6 @@ opcodes: args: [ rS, rB ] uses: [ rS, rB ] - # 64-bit only - - name: mulhd - desc: Multiply High Double Word - bitmask: 0xfc0007fe - pattern: 0x7c000092 - modifiers: [ Rc ] - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - # 64-bit only - - name: mulhdu - desc: Multiply High Double Word Unsigned - bitmask: 0xfc0007fe - pattern: 0x7c000012 - modifiers: [ Rc ] - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - name: mulhw desc: Multiply High Word bitmask: 0xfc0007fe @@ -1535,16 +1224,6 @@ opcodes: defs: [ rD ] uses: [ rA, rB ] - # 64-bit only - - name: mulld - desc: Multiply Low Double Word - bitmask: 0xfc0003fe - pattern: 0x7c0001d2 - modifiers: [ OE, Rc ] - args: [ rD, rA, rB ] - defs: [ rD ] - uses: [ rA, rB ] - - name: mulli desc: Multiply Low Immediate bitmask: 0xfc000000 @@ -1628,72 +1307,6 @@ opcodes: bitmask: 0xffffffff pattern: 0x4c000064 - # 64-bit only - - name: rfid - desc: Return from Interrupt Double Word - bitmask: 0xffffffff - pattern: 0x4c000024 - - # 64-bit only - - name: rldcl - desc: Rotate Left Double Word then Clear Left - bitmask: 0xfc00001e - pattern: 0x78000010 - modifiers: [ Rc ] - args: [ rA, rS, rB, MB64 ] - defs: [ rA ] - uses: [ rS, rB ] - - # 64-bit only - - name: rldcr - desc: Rotate Left Double Word then Clear Right - bitmask: 0xfc00001e - pattern: 0x78000012 - modifiers: [ Rc ] - args: [ rA, rS, rB, ME64 ] - defs: [ rA ] - uses: [ rS, rB ] - - # 64-bit only - - name: rldic - desc: Rotate Left Double Word Immediate then Clear - bitmask: 0xfc00001c - pattern: 0x78000008 - modifiers: [ Rc ] - args: [ rA, rS, SH64, MB64 ] - defs: [ rA ] - uses: [ rS ] - - # 64-bit only - - name: rldicl - desc: Rotate Left Double Word Immediate then Clear Left - bitmask: 0xfc00001c - pattern: 0x78000000 - modifiers: [ Rc ] - args: [ rA, rS, SH64, MB64 ] - defs: [ rA ] - uses: [ rS ] - - # 64-bit only - - name: rldicr - desc: Rotate Left Double Word Immediate then Clear Right - bitmask: 0xfc00001c - pattern: 0x78000004 - modifiers: [ Rc ] - args: [ rA, rS, SH64, ME64 ] - defs: [ rA ] - uses: [ rS ] - - # 64-bit only - - name: rldimi - desc: Rotate Left Double Word Immediate then Mask Insert - bitmask: 0xfc00001c - pattern: 0x7800000c - modifiers: [ Rc ] - args: [ rA, rS, SH64, MB64 ] - defs: [ rA ] - uses: [ rS ] - - name: rlwimi desc: Rotate Left Word Immediate then Mask Insert bitmask: 0xfc000000 @@ -1726,30 +1339,6 @@ opcodes: bitmask: 0xffffffff pattern: 0x44000002 - # 64-bit only - - name: slbia - desc: SLB Invalidate All - bitmask: 0xffffffff - pattern: 0x7c0003e4 - - # 64-bit only - - name: slbie - desc: SLB Invalidate Entry - bitmask: 0xffff07ff - pattern: 0x7c000364 - args: [ rB ] - uses: [ rB ] - - # 64-bit only - - name: sld - desc: Shift Left Double Word - bitmask: 0xfc0007fe - pattern: 0x7c000036 - modifiers: [ Rc ] - args: [ rA, rS, rB ] - defs: [ rA ] - uses: [ rS, rB ] - - name: slw desc: Shift Left Word bitmask: 0xfc0007fe @@ -1759,26 +1348,6 @@ opcodes: defs: [ rA ] uses: [ rS, rB ] - # 64-bit only - - name: srad - desc: Shift Right Algebraic Double Word - bitmask: 0xfc0007fe - pattern: 0x7c000634 - modifiers: [ Rc ] - args: [ rA, rS, rB ] - defs: [ rA ] - uses: [ rS, rB ] - - # 64-bit only - - name: sradi - desc: Shift Right Algebraic Double Word Immediate - bitmask: 0xFC0007FC - pattern: 0x7c000674 - modifiers: [ Rc ] - args: [ rA, rS, SH64 ] - defs: [ rA ] - uses: [ rS ] - - name: sraw desc: Shift Right Algebraic Word bitmask: 0xfc0007fe @@ -1797,16 +1366,6 @@ opcodes: defs: [ rA ] uses: [ rS ] - # 64-bit only - - name: srd - desc: Shift Right Double Word - bitmask: 0xfc0007fe - pattern: 0x7c000436 - modifiers: [ Rc ] - args: [ rA, rS, rB ] - defs: [ rA ] - uses: [ rA, rB ] - - name: srw desc: Shift Right Word bitmask: 0xfc0007fe @@ -1846,50 +1405,6 @@ opcodes: args: [ rS, rA, rB ] uses: [ rS, rA.nz, rB ] - # 64-bit only - - name: std - desc: Store Double Word - bitmask: 0xfc000003 - pattern: 0xf8000000 - args: [ rS, ds, rA ] - uses: [ rS, rA.nz ] - - # 64-bit only - - name: stdcx. - desc: Store Double Word Conditional Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0001ad - side_effects: [ Rc ] - args: [ rS, rA, rB ] - uses: [ rS, rA.nz, rB ] - - # 64-bit only - - name: stdu - desc: Store Double Word with Update - bitmask: 0xfc000003 - pattern: 0xf8000001 - args: [ rS, ds, rA ] - defs: [ rA ] - uses: [ rS, rA ] - - # 64-bit only - - name: stdux - desc: Store Double Word with Update Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00016a - args: [ rS, rA, rB ] - defs: [ rA ] - uses: [ rS, rA, rB ] - - # 64-bit only - - name: stdx - desc: Store Double Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00012a - args: [ rS, rA, rB ] - defs: [ rA ] - uses: [ rS, rA.nz, rB ] - - name: stfd desc: Store Floating-Point Double bitmask: 0xfc000000 @@ -2119,22 +1634,6 @@ opcodes: args: [ sync_L ] uses: [ sync_L ] - # 64-bit only - - name: td - desc: Trap Double Word - bitmask: 0xfc0007ff - pattern: 0x7c000088 - args: [ TO, rA, rB ] - uses: [ rA, rB ] - - # 64-bit only - - name: tdi - desc: Trap Double Word Immediate - bitmask: 0xfc000000 - pattern: 0x08000000 - args: [ TO, rA, simm ] - uses: [ rA ] - - name: tlbie desc: Translation Lookaside Buffer Invalidate Entry bitmask: 0xffff07ff @@ -2186,1969 +1685,6 @@ opcodes: defs: [ rA ] uses: [ rS ] - # altivec insts: dss to vxor - - name: dss - desc: Data Stream Stop - bitmask: 0xfd9fffff - pattern: 0x7c00066c - args: [ STRM, ds_A ] - uses: [ STRM ] - - - name: dst - desc: Data Stream Touch - bitmask: 0xfd8007ff - pattern: 0x7c0002ac - modifiers: [ T ] - args: [ rA, rB, STRM ] - uses: [ rA, rB, STRM ] - - - name: dstst - desc: Data Stream Touch for Store - bitmask: 0xfd8007ff - pattern: 0x7c0002ec - modifiers: [ T ] - args: [ rA, rB, STRM ] - uses: [ rA, rB, STRM ] - - - name: lvebx - desc: Load Vector Element Byte Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00000e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvehx - desc: Load Vector Element Half Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00004e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvewx - desc: Load Vector Element Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00008e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvlx - desc: Load Vector Left Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00040e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvlxl - desc: Load Vector Left Indexed Last - bitmask: 0xfc0007ff - pattern: 0x7c00060e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvrx - desc: Load Vector Right Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00044e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvrxl - desc: Load Vector Right Indexed Last - bitmask: 0xfc0007ff - pattern: 0x7c00064e - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvsl - desc: Load Vector for Shift Left - bitmask: 0xfc0007ff - pattern: 0x7c00000c - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvsr - desc: Load Vector for Shift Right - bitmask: 0xfc0007ff - pattern: 0x7c00004c - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvx - desc: Load Vector Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0000ce - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: lvxl - desc: Load Vector Indexed LRU - bitmask: 0xfc0007ff - pattern: 0x7c0002ce - args: [ vD, rA, rB ] - defs: [ vD ] - uses: [ rA.nz, rB ] - - - name: mfvscr - desc: Move from Vector Status and Control Register - bitmask: 0xfc1fffff - pattern: 0x10000604 - args: [ vD ] - defs: [ vD ] - - - name: mtvscr - desc: Move to Vector Status and Control Register - bitmask: 0xffff07ff - pattern: 0x10000644 - args: [ vB ] - uses: [ vB ] - - - name: stvebx - desc: Store Vector Element Byte Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00010e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvehx - desc: Store Vector Element Half Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00014e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvewx - desc: Store Vector Element Word Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00018e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvlx - desc: Store Vector Left Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00050e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvlxl - desc: Store Vector Left Indexed Last - bitmask: 0xfc0007ff - pattern: 0x7c00070e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvrx - desc: Store Vector Right Indexed - bitmask: 0xfc0007ff - pattern: 0x7c00054e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvrxl - desc: Store Vector Right Indexed Last - bitmask: 0xfc0007ff - pattern: 0x7c00074e - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvx - desc: Store Vector Indexed - bitmask: 0xfc0007ff - pattern: 0x7c0001ce - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvxl - desc: Store Vector Indexed LRU - bitmask: 0xfc0007ff - pattern: 0x7c0003ce - args: [ vS, rA, rB ] - uses: [ rA.nz, rB ] - - - name: vaddcuw - desc: Vector Add Carryout Unsigned Word - bitmask: 0xfc0007ff - pattern: 0x10000180 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddfp - desc: Vector Add Floating Point - bitmask: 0xfc0007ff - pattern: 0x1000000a - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddsbs - desc: Vector Add Signed Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000300 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddshs - desc: Vector Add Signed Half Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000340 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddsws - desc: Vector Add Signed Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000380 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddubm - desc: Vector Add Unsigned Byte Modulo - bitmask: 0xfc0007ff - pattern: 0x10000000 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vaddubs - desc: Vector Add Unsigned Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000200 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vadduhm - desc: Vector Add Unsigned Half Word Modulo - bitmask: 0xfc0007ff - pattern: 0x10000040 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vadduhs - desc: Vector Add Unsigned Half Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000240 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vadduwm - desc: Vector Add Unsigned Word Modulo - bitmask: 0xfc0007ff - pattern: 0x10000080 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vadduws - desc: Vector Add Unsigned Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000280 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vand - desc: Vector Logical AND - bitmask: 0xfc0007ff - pattern: 0x10000404 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vandc - desc: Vector Logical AND with Complement - bitmask: 0xfc0007ff - pattern: 0x10000444 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavgsb - desc: Vector Average Signed Byte - bitmask: 0xfc0007ff - pattern: 0x10000502 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavgsh - desc: Vector Average Signed Half Word - bitmask: 0xfc0007ff - pattern: 0x10000542 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavgsw - desc: Vector Average Signed Word - bitmask: 0xfc0007ff - pattern: 0x10000582 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavgub - desc: Vector Average Unsigned Byte - bitmask: 0xfc0007ff - pattern: 0x10000402 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavguh - desc: Vector Average Unsigned Half Word - bitmask: 0xfc0007ff - pattern: 0x10000442 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vavguw - desc: Vector Average Unsigned Word - bitmask: 0xfc0007ff - pattern: 0x10000482 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcfsx - aliases: [ vcsxwfp ] - desc: Vector Convert from Signed Fixed-Point Word - bitmask: 0xfc0007ff - pattern: 0x1000034a - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vcfux - aliases: [ vcuxwfp ] - desc: Vector Convert from Unsigned Fixed-Point Word - bitmask: 0xfc0007ff - pattern: 0x1000030a - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vcmpbfp - desc: Vector Compare Bounds Floating Point - bitmask: 0xfc0003ff - pattern: 0x100003c6 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpeqfp - desc: Vector Compare Equal-to-Floating Point - bitmask: 0xfc0003ff - pattern: 0x100000c6 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpequb - desc: Vector Compare Equal-to Unsigned Byte - bitmask: 0xfc0003ff - pattern: 0x10000006 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpequh - desc: Vector Compare Equal-to Unsigned Half Word - bitmask: 0xfc0003ff - pattern: 0x10000046 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpequw - desc: Vector Compare Equal-to Unsigned Word - bitmask: 0xfc0003ff - pattern: 0x10000086 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgefp - desc: Vector Compare Greater-Than-or-Equal-to Floating Point - bitmask: 0xfc0003ff - pattern: 0x100001c6 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtfp - desc: Vector Compare Greater-Than Floating Point - bitmask: 0xfc0003ff - pattern: 0x100002c6 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtsb - desc: Vector Compare Greater-Than Signed Byte - bitmask: 0xfc0003ff - pattern: 0x10000306 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtsh - desc: Vector Compare Greater-Than Condition Register Signed Half Word - bitmask: 0xfc0003ff - pattern: 0x10000346 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtsw - desc: Vector Compare Greater-Than Signed Word - bitmask: 0xfc0003ff - pattern: 0x10000386 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtub - desc: Vector Compare Greater-Than Unsigned Byte - bitmask: 0xfc0003ff - pattern: 0x10000206 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtuh - desc: Vector Compare Greater-Than Unsigned Half Word - bitmask: 0xfc0003ff - pattern: 0x10000246 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vcmpgtuw - desc: Vector Compare Greater-Than Unsigned Word - bitmask: 0xfc0003ff - pattern: 0x10000286 - modifiers: [ RcAV ] - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vctsxs - aliases: [ vcfpsxws ] - desc: Vector Convert to Signed Fixed-Point Word Saturate - bitmask: 0xfc0007ff - pattern: 0x100003ca - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vctuxs - aliases: [ vcfpuxws ] - desc: Vector Convert to Unsigned Fixed-Point Word Saturate - bitmask: 0xfc0007ff - pattern: 0x1000038a - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vexptefp - desc: Vector 2 Raised to the Exponent Estimate Floating Point - bitmask: 0xfc1f07ff - pattern: 0x1000018a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vlogefp - desc: Vector Log2 Estimate Floating Point - bitmask: 0xfc1f07ff - pattern: 0x100001ca - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vmaddfp - desc: Vector Multiply Add Floating Point - bitmask: 0xfc00003f - pattern: 0x1000002e - args: [ vD, vA, vC, vB ] - defs: [ vD ] - uses: [ vA, vC, vB ] - - - name: vmaxfp - desc: Vector Maximum Floating Point - bitmask: 0xfc0007ff - pattern: 0x1000040a - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxsb - desc: Vector Maximum Signed Byte - bitmask: 0xfc0007ff - pattern: 0x10000102 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxsh - desc: Vector Maximum Signed Half Word - bitmask: 0xfc0007ff - pattern: 0x10000142 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxsw - desc: Vector Maximum Signed Word - bitmask: 0xfc0007ff - pattern: 0x10000182 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxub - desc: Vector Maximum Unsigned Byte - bitmask: 0xfc0007ff - pattern: 0x10000002 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxuh - desc: Vector Maximum Unsigned Half Word - bitmask: 0xfc0007ff - pattern: 0x10000042 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmaxuw - desc: Vector Maximum Unsigned Word - bitmask: 0xfc0007ff - pattern: 0x10000082 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmhaddshs - desc: Vector Multiply High and Add Signed Half Word Saturate - bitmask: 0xfc00003f - pattern: 0x10000020 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmhraddshs - desc: Vector Multiply High Round and Add Signed Half Word Saturate - bitmask: 0xfc00003f - pattern: 0x10000021 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vminfp - desc: Vector Minimum Floating Point - bitmask: 0xfc0007ff - pattern: 0x1000044a - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminsb - desc: Vector Minimum Signed Byte - bitmask: 0xfc0007ff - pattern: 0x10000302 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminsh - desc: Vector Minimum Signed Half Word - bitmask: 0xfc0007ff - pattern: 0x10000342 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminsw - desc: Vector Minimum Signed Word - bitmask: 0xfc0007ff - pattern: 0x10000382 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminub - desc: Vector Minimum Unsigned Byte - bitmask: 0xfc0007ff - pattern: 0x10000202 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminuh - desc: Vector Minimum Unsigned Half Word - bitmask: 0xfc0007ff - pattern: 0x10000242 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vminuw - desc: Vector Minimum Unsigned Word - bitmask: 0xfc0007ff - pattern: 0x10000282 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmladduhm - desc: Vector Multiply Low and Add Unsigned Half Word Modulo - bitmask: 0xfc00003f - pattern: 0x10000022 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmrghb - desc: Vector Merge High Byte - bitmask: 0xfc0007ff - pattern: 0x1000000c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmrghh - desc: Vector Merge High Half Word - bitmask: 0xfc0007ff - pattern: 0x1000004c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmrghw - desc: Vector Merge High Word - bitmask: 0xfc0007ff - pattern: 0x1000008c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmrglb - desc: Vector Merge Low Byte - bitmask: 0xfc0007ff - pattern: 0x1000010c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmrglh - desc: Vector Merge Low Half Word - bitmask: 0xfc0007ff - pattern: 0x1000014c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmrglw - desc: Vector Merge Low Word - bitmask: 0xfc0007ff - pattern: 0x1000018c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmsummbm - desc: Vector Multiply Sum Mixed-Sign Byte Modulo - bitmask: 0xfc00003f - pattern: 0x10000025 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmsumshm - desc: Vector Multiply Sum Signed Half Word Modulo - bitmask: 0xfc00003f - pattern: 0x10000028 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmsumshs - desc: Vector Multiply Sum Signed Half Word Saturate - bitmask: 0xfc00003f - pattern: 0x10000029 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmsumubm - desc: Vector Multiply Sum Unsigned Byte Modulo - bitmask: 0xfc00003f - pattern: 0x10000024 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmsumuhm - desc: Vector Multiply Sum Unsigned Half Word Modulo - bitmask: 0xfc00003f - pattern: 0x10000026 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmsumuhs - desc: Vector Multiply Sum Unsigned Half Word Saturate - bitmask: 0xfc00003f - pattern: 0x10000027 - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vmulesb - desc: Vector Multiply Even Signed Byte - bitmask: 0xfc0007ff - pattern: 0x10000308 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmulesh - desc: Vector Multiply Even Signed Half Word - bitmask: 0xfc0007ff - pattern: 0x10000348 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmuleub - desc: Vector Multiply Even Unsigned Byte - bitmask: 0xfc0007ff - pattern: 0x10000208 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmuleuh - desc: Vector Multiply Even Unsigned Half Word - bitmask: 0xfc0007ff - pattern: 0x10000248 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmulosb - desc: Vector Multiply Odd Signed Byte - bitmask: 0xfc0007ff - pattern: 0x10000108 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmulosh - desc: Vector Multiply Odd Signed Half Word - bitmask: 0xfc0007ff - pattern: 0x10000148 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmuloub - desc: Vector Multiply Odd Unsigned Byte - bitmask: 0xfc0007ff - pattern: 0x10000008 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vmulouh - desc: Vector Multiply Odd Unsigned Half Word - bitmask: 0xfc0007ff - pattern: 0x10000048 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vnmsubfp - desc: Vector Negative Multiply-Subtract Floating Point - bitmask: 0xfc00003f - pattern: 0x1000002f - args: [ vD, vA, vC, vB ] - defs: [ vD ] - uses: [ vA, vC, vB ] - - - name: vnor - desc: Vector Logical NOR - bitmask: 0xfc0007ff - pattern: 0x10000504 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vor - desc: Vector Logical OR - bitmask: 0xfc0007ff - pattern: 0x10000484 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vperm - desc: Vector Permute - bitmask: 0xfc00003f - pattern: 0x1000002b - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vpkpx - desc: Vector Pack Pixel32 - bitmask: 0xfc0007ff - pattern: 0x1000030e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkshss - desc: Vector Pack Signed Half Word Signed Saturate - bitmask: 0xfc0007ff - pattern: 0x1000018e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkshus - desc: Vector Pack Signed Half Word Unsigned Saturate - bitmask: 0xfc0007ff - pattern: 0x1000010e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkswss - desc: Vector Pack Signed Word Signed Saturate - bitmask: 0xfc0007ff - pattern: 0x100001ce - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkswus - desc: Vector Pack Signed Word Unsigned Saturate - bitmask: 0xfc0007ff - pattern: 0x1000014e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkuhum - desc: Vector Pack Unsigned Half Word Unsigned Modulo - bitmask: 0xfc0007ff - pattern: 0x1000000e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkuhus - desc: Vector Pack Unsigned Half Word Unsigned Saturate - bitmask: 0xfc0007ff - pattern: 0x1000008e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkuwum - desc: Vector Pack Unsigned Word Unsigned Modulo - bitmask: 0xfc0007ff - pattern: 0x1000004e - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vpkuwus - desc: Vector Pack Unsigned Word Unsigned Saturate - bitmask: 0xfc0007ff - pattern: 0x100000ce - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vrefp - desc: Vector Reciprocal Estimate Floating Point - bitmask: 0xfc1f07ff - pattern: 0x1000010a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vrfim - desc: Vector Round to Floating-Point Integer toward Minus Infinity - bitmask: 0xfc1f07ff - pattern: 0x100002ca - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vrfin - desc: Vector Round to Floating-Point Integer Nearest - bitmask: 0xfc1f07ff - pattern: 0x1000020a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vrfip - desc: Vector Round to Floating-Point Integer toward Plus Infinity - bitmask: 0xfc1f07ff - pattern: 0x1000028a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vrfiz - desc: Vector Round to Floating-Point Integer toward Zero - bitmask: 0xfc1f07ff - pattern: 0x1000024a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vrlb - desc: Vector Rotate Left Integer Byte - bitmask: 0xfc0007ff - pattern: 0x10000004 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vrlh - desc: Vector Rotate Left Integer Half Word - bitmask: 0xfc0007ff - pattern: 0x10000044 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vrlw - desc: Vector Rotate Left Integer Word - bitmask: 0xfc0007ff - pattern: 0x10000084 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vrsqrtefp - desc: Vector Reciprocal Square Root Estimate Floating Point - bitmask: 0xfc1f07ff - pattern: 0x1000014a - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vsel - desc: Vector Conditional Select - bitmask: 0xfc00003f - pattern: 0x1000002a - args: [ vD, vA, vB, vC ] - defs: [ vD ] - uses: [ vA, vB, vC ] - - - name: vsl - desc: Vector Shift Left - bitmask: 0xfc0007ff - pattern: 0x100001c4 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vslb - desc: Vector Shift Left Integer Byte - bitmask: 0xfc0007ff - pattern: 0x10000104 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsldoi - desc: Vector Shift Left Double by Octet Immediate - bitmask: 0xfc00043f - pattern: 0x1000002c - args: [ vD, vA, vB, SHB ] - defs: [ vD ] - uses: [ vA, vB, SHB ] - - - name: vslh - desc: Vector Shift Left Integer Half Word - bitmask: 0xfc0007ff - pattern: 0x10000144 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vslo - desc: Vector Shift Left by Octet - bitmask: 0xfc0007ff - pattern: 0x1000040c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vslw - desc: Vector Shift Left Integer Word - bitmask: 0xfc0007ff - pattern: 0x10000184 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vspltb - desc: Vector Splat Byte - bitmask: 0xfc0007ff - pattern: 0x1000020c - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vsplth - desc: Vector Splat Half Word - bitmask: 0xfc0007ff - pattern: 0x1000024c - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vspltisb - desc: Vector Splat Immediate Signed Byte - bitmask: 0xfc00ffff - pattern: 0x1000030c - args: [ vD, vsimm ] - defs: [ vD ] - uses: [ vsimm ] - - - name: vspltish - desc: Vector Splat Immediate Signed Half Word - bitmask: 0xfc00ffff - pattern: 0x1000034c - args: [ vD, vsimm ] - defs: [ vD ] - uses: [ vsimm ] - - - name: vspltisw - desc: Vector Splat Immediate Signed Word - bitmask: 0xfc00ffff - pattern: 0x1000038c - args: [ vD, vsimm ] - defs: [ vD ] - uses: [ vsimm ] - - - name: vspltw - desc: Vector Splat Word - bitmask: 0xfc0007ff - pattern: 0x1000028c - args: [ vD, vB, vuimm ] - defs: [ vD ] - uses: [ vB, vuimm ] - - - name: vsr - desc: Vector Shift Right - bitmask: 0xfc0007ff - pattern: 0x100002c4 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsrab - desc: Vector Shift Right Algebraic Byte - bitmask: 0xfc0007ff - pattern: 0x10000304 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsrah - desc: Vector Shift Right Algebraic Half Word - bitmask: 0xfc0007ff - pattern: 0x10000344 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsraw - desc: Vector Shift Right Algebraic Word - bitmask: 0xfc0007ff - pattern: 0x10000384 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsrb - desc: Vector Shift Right Byte - bitmask: 0xfc0007ff - pattern: 0x10000204 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsrh - desc: Vector Shift Right Half Word - bitmask: 0xfc0007ff - pattern: 0x10000244 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsro - desc: Vector Shift Right by Octet - bitmask: 0xfc0007ff - pattern: 0x1000044c - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsrw - desc: Vector Shift Right Word - bitmask: 0xfc0007ff - pattern: 0x10000284 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubcuw - desc: Vector Subtract Carryout Unsigned Word - bitmask: 0xfc0007ff - pattern: 0x10000580 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubfp - desc: Vector Subtract Floating Point - bitmask: 0xfc0007ff - pattern: 0x1000004a - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubsbs - desc: Vector Subtract Signed Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000700 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubshs - desc: Vector Subtract Signed Half Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000740 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubsws - desc: Vector Subtract Signed Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000780 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsububm - desc: Vector Subtract Unsigned Byte Modulo - bitmask: 0xfc0007ff - pattern: 0x10000400 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsububs - desc: Vector Subtract Unsigned Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000600 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubuhm - desc: Vector Subtract Unsigned Half Word Modulo - bitmask: 0xfc0007ff - pattern: 0x10000440 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubuhs - desc: Vector Subtract Unsigned Half Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000640 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubuwm - desc: Vector Subtract Unsigned Word Modulo - bitmask: 0xfc0007ff - pattern: 0x10000480 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsubuws - desc: Vector Subtract Unsigned Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000680 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsumsws - desc: Vector Sum Across Signed Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000788 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsum2sws - desc: Vector Sum Across Partial (1/2) Signed Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000688 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsum4sbs - desc: Vector Sum Across Partial (1/4) Signed Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000708 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsum4shs - desc: Vector Sum Across Partial (1/4) Signed Half Word Saturate - bitmask: 0xfc0007ff - pattern: 0x10000648 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vsum4ubs - desc: Vector Sum Across Partial (1/4) Unsigned Byte Saturate - bitmask: 0xfc0007ff - pattern: 0x10000608 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - - name: vupkhpx - desc: Vector Unpack High Pixel16 - bitmask: 0xfc1f07ff - pattern: 0x1000034e - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vupkhsb - desc: Vector Unpack High Signed Byte - bitmask: 0xfc1f07ff - pattern: 0x1000020e - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vupkhsh - desc: Vector Unpack High Signed Half Word - bitmask: 0xfc1f07ff - pattern: 0x1000024e - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vupklpx - desc: Vector Unpack Low Pixel16 - bitmask: 0xfc1f07ff - pattern: 0x100003ce - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vupklsb - desc: Vector Unpack Low Signed Byte - bitmask: 0xfc1f07ff - pattern: 0x1000028e - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vupklsh - desc: Vector Unpack Low Signed Half Word - bitmask: 0xfc1f07ff - pattern: 0x100002ce - args: [ vD, vB ] - defs: [ vD ] - uses: [ vB ] - - - name: vxor - desc: Vector Logical XOR - bitmask: 0xfc0007ff - pattern: 0x100004c4 - args: [ vD, vA, vB ] - defs: [ vD ] - uses: [ vA, vB ] - - # VMX128 exclusives - # found here: https://github.com/xenia-project/xenia/blob/master/docs/ppc/vmx128.txt - # and here: https://github.com/kakaroto/ps3ida/blob/master/plugins/PPCAltivec/src/main.cpp - - name: lvewx128 - desc: Load Vector128 Element Word Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000083 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvlx128 - desc: Load Vector128 Left Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000403 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvlxl128 - desc: Load Vector128 Left Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x10000603 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvrx128 - desc: Load Vector128 Right Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000443 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvrxl128 - desc: Load Vector128 Right Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x10000643 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvsl128 - desc: Load Vector128 for Shift Left - bitmask: 0xfc0007f3 - pattern: 0x10000003 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvsr128 - desc: Load Vector128 for Shift Right - bitmask: 0xfc0007f3 - pattern: 0x10000043 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvx128 - desc: Load Vector128 Indexed - bitmask: 0xfc0007f3 - pattern: 0x100000C3 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: lvxl128 - desc: Load Vector128 Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x100002C3 - args: [ VDS128, rA, rB ] - defs: [ VDS128 ] - uses: [ rA.nz, rB ] - - - name: stvewx128 - desc: Store Vector128 Element Word Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000183 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvlx128 - desc: Store Vector128 Left Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000503 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvlxl128 - desc: Store Vector128 Left Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x10000703 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvrx128 - desc: Store Vector128 Right Indexed - bitmask: 0xfc0007f3 - pattern: 0x10000543 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvrxl128 - desc: Store Vector128 Right Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x10000743 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvx128 - desc: Store Vector128 Indexed - bitmask: 0xfc0007f3 - pattern: 0x100001C3 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: stvxl128 - desc: Store Vector128 Indexed LRU - bitmask: 0xfc0007f3 - pattern: 0x100003C3 - args: [ VDS128, rA, rB ] - uses: [ rA.nz, rB ] - - - name: vaddfp128 - desc: Vector128 Add Floating Point - bitmask: 0xfc0003d0 - pattern: 0x14000010 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vand128 - desc: Vector128 Logical AND - bitmask: 0xfc0003d0 - pattern: 0x14000210 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vandc128 - desc: Vector128 Logical AND with Complement - bitmask: 0xfc0003d0 - pattern: 0x14000250 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vctsxs128 - aliases: [ vcfpsxws128 ] - desc: Vector128 Convert to Signed Fixed-Point Word Saturate - bitmask: 0xfc0007f0 - pattern: 0x18000230 - args: [ VDS128, VB128, vsimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vctuxs128 - aliases: [ vcfpuxws128 ] - desc: Vector128 Convert to Unsigned Fixed-Point Word Saturate - bitmask: 0xfc0007f0 - pattern: 0x18000270 - args: [ VDS128, VB128, vuimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vcmpbfp128 - desc: Vector128 Compare Bounds Floating Point - bitmask: 0xfc000390 - pattern: 0x18000180 - modifiers: [ Rc128 ] - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vcmpeqfp128 - desc: Vector128 Compare Equal-to Floating Point - bitmask: 0xfc000390 - pattern: 0x18000000 - modifiers: [ Rc128 ] - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vcmpequw128 - desc: Vector128 Compare Equal-to Unsigned Word - bitmask: 0xfc000390 - pattern: 0x18000200 - modifiers: [ Rc128 ] - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vcmpgefp128 - desc: Vector128 Compare Greater-Than-or-Equal-to Floating Point - bitmask: 0xfc000390 - pattern: 0x18000080 - modifiers: [ Rc128 ] - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vcmpgtfp128 - desc: Vector128 Compare Greater-Than Floating-Point - bitmask: 0xfc000390 - pattern: 0x18000100 - modifiers: [ Rc128 ] - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vcfsx128 - aliases: [ vcsxwfp128 ] - desc: Vector128 Convert From Signed Fixed-Point Word - bitmask: 0xfc0007f0 - pattern: 0x180002b0 - args: [ VDS128, VB128, vsimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vcfux128 - aliases: [ vcuxwfp128 ] - desc: Vector128 Convert From Unsigned Fixed-Point Word - bitmask: 0xfc0007f0 - pattern: 0x180002f0 - args: [ VDS128, VB128, vuimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vexptefp128 - desc: Vector128 2 Raised to the Exponent Estimate Floating Point - bitmask: 0xfc1f07f0 - pattern: 0x180006b0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vlogefp128 - desc: Vector128 Log2 Estimate Floating Point - bitmask: 0xfc1f07f0 - pattern: 0x180006f0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vmaddcfp128 - desc: Vector128 Multiply Add Carryout Floating Point - bitmask: 0xfc0003d0 - pattern: 0x14000110 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmaddfp128 - desc: Vector128 Multiply Add Floating Point - bitmask: 0xfc0003d0 - pattern: 0x140000d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmaxfp128 - desc: Vector128 Maximum Floating Point - bitmask: 0xfc0003d0 - pattern: 0x18000280 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vminfp128 - desc: Vector128 Minimum Floating Point - bitmask: 0xfc0003d0 - pattern: 0x180002c0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmrghw128 - desc: Vector128 Merge High Word - bitmask: 0xfc0003d0 - pattern: 0x18000300 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmrglw128 - desc: Vector128 Merge Low Word - bitmask: 0xfc0003d0 - pattern: 0x18000340 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmsum3fp128 - desc: Vector128 Multiply Sum 3-way Floating Point - bitmask: 0xfc0003d0 - pattern: 0x14000190 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmsum4fp128 - desc: Vector128 Multiply Sum 4-way Floating Point - bitmask: 0xfc0003d0 - pattern: 0x140001d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vmulfp128 - desc: Vector128 Multiply Floating-Point - bitmask: 0xfc0003d0 - pattern: 0x14000090 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vnmsubfp128 - desc: Vector128 Negative Multiply-Subtract Floating Point - bitmask: 0xfc0003d0 - pattern: 0x14000150 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vnor128 - desc: Vector128 Logical NOR - bitmask: 0xfc0003d0 - pattern: 0x14000290 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vor128 - desc: Vector128 Logical OR - bitmask: 0xfc0003d0 - pattern: 0x140002d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vperm128 - desc: Vector128 Permutation - bitmask: 0xfc000210 - pattern: 0x14000000 - args: [ VDS128, VA128, VB128, VC128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128, VC128 ] - - - name: vpermwi128 - desc: Vector128 Permutate Word Immediate - bitmask: 0xfc000630 - pattern: 0x18000210 - args: [ VDS128, VB128, PERM ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vpkd3d128 - desc: Vector128 Pack D3Dtype, Rotate Left Immediate and Mask Insert - bitmask: 0xfc000730 - pattern: 0x18000610 - args: [ VDS128, VB128, D3DType, VMASK, Zimm ] - defs: [ VDS128 ] - uses: [ VB128, D3DType, VMASK, Zimm ] - - - name: vpkshss128 - desc: Vector128 Pack Signed Half Word Signed Saturate - bitmask: 0xfc0003d0 - pattern: 0x14000200 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkshus128 - desc: Vector128 Pack Signed Half Word Unsigned Saturate - bitmask: 0xfc0003d0 - pattern: 0x14000240 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkswss128 - desc: Vector128 Pack Signed Word Signed Saturate - bitmask: 0xfc0003d0 - pattern: 0x14000280 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkswus128 - desc: Vector128 Pack Signed Word Unsigned Saturate - bitmask: 0xfc0003d0 - pattern: 0x140002c0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkuhum128 - desc: Vector128 Pack Unsigned Half Word Unsigned Modulo - bitmask: 0xfc0003d0 - pattern: 0x14000300 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkuhus128 - desc: Vector128 Pack Unsigned Half Word Unsigned Saturate - bitmask: 0xfc0003d0 - pattern: 0x14000340 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkuwum128 - desc: Vector128 Pack Unsigned Word Unsigned Modulo - bitmask: 0xfc0003d0 - pattern: 0x14000380 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vpkuwus128 - desc: Vector128 Pack Unsigned Word Unsigned Saturate - bitmask: 0xfc0003d0 - pattern: 0x140003c0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vrefp128 - desc: Vector128 Reciprocal Estimate Floating Point - bitmask: 0xfc1f07f0 - pattern: 0x18000630 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrfim128 - desc: Vector128 Round to Floating-Point Integer toward Minus Infinity - bitmask: 0xfc1f07f0 - pattern: 0x18000330 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrfin128 - desc: Vector128 Round to Floating-Point Integer toward Nearest - bitmask: 0xfc1f07f0 - pattern: 0x18000370 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrfip128 - desc: Vector128 Round to Floating-Point Integer toward Plus Infinity - bitmask: 0xfc1f07f0 - pattern: 0x180003b0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrfiz128 - desc: Vector128 Round to Floating-Point Integer toward Zero - bitmask: 0xfc1f07f0 - pattern: 0x180003f0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrlimi128 - desc: Vector128 Rotate Left Immediate and Mask Insert - bitmask: 0xfc000730 - pattern: 0x18000710 - args: [ VDS128, VB128, vuimm, Zimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vrlw128 - desc: Vector128 Rotate Left Word - bitmask: 0xfc0003d0 - pattern: 0x18000050 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vrsqrtefp128 - desc: Vector128 Reciprocal Square Root Estimate Floating Point - bitmask: 0xfc1f07f0 - pattern: 0x18000670 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vsel128 - desc: Vector128 Select - bitmask: 0xfc0003d0 - pattern: 0x14000350 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vsldoi128 - desc: Vector128 Shift Left Double by Octet Immediate - bitmask: 0xfc000010 - pattern: 0x10000010 - args: [ VDS128, VA128, VB128, SHB ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vslo128 - desc: Vector128 Shift Left Octet - bitmask: 0xfc0003d0 - pattern: 0x14000390 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vslw128 - desc: Vector128 Shift Left Word - bitmask: 0xfc0003d0 - pattern: 0x180000d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vspltisw128 - desc: Vector128 Splat Immediate Signed Word - bitmask: 0xfc0007f0 - pattern: 0x18000770 - args: [ VDS128, VB128, vsimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vspltw128 - desc: Vector128 Splat Word - bitmask: 0xfc0007f0 - pattern: 0x18000730 - args: [ VDS128, VB128, vuimm ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vsraw128 - desc: Vector128 Shift Right Arithmetic Word - bitmask: 0xfc0003d0 - pattern: 0x18000150 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vsro128 - desc: Vector128 Shift Right Octet - bitmask: 0xfc0003d0 - pattern: 0x140003d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vsrw128 - desc: Vector128 Shift Right Word - bitmask: 0xfc0003d0 - pattern: 0x180001d0 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vsubfp128 - desc: Vector128 Subtract Floating Point - bitmask: 0xfc0003d0 - pattern: 0x14000050 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - - - name: vupkd3d128 - desc: Vector128 Unpack D3Dtype - bitmask: 0xfc0007f0 - pattern: 0x180007f0 - args: [ VDS128, VB128, vuimm ] - defs: [ VDS128 ] - uses: [ VB128, vuimm ] - - - name: vupkhsb128 - desc: Vector128 Unpack High Signed Byte - bitmask: 0xfc1f07f0 - pattern: 0x18000380 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vupkhsh128 - desc: Vector128 Unpack High Signed Half Word - bitmask: 0xfc1f07f0 - pattern: 0x180007a0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vupklsb128 - desc: Vector128 Unpack Low Signed Byte - bitmask: 0xfc1f07f0 - pattern: 0x180003c0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vupklsh128 - desc: Vector128 Unpack Low Signed Half Word - bitmask: 0xfc1f07f0 - pattern: 0x180007e0 - args: [ VDS128, VB128 ] - defs: [ VDS128 ] - uses: [ VB128 ] - - - name: vxor128 - desc: Vector128 Logical XOR - bitmask: 0xfc0003d0 - pattern: 0x14000310 - args: [ VDS128, VA128, VB128 ] - defs: [ VDS128 ] - uses: [ VA128, VB128 ] - mnemonics: # Arithmetic - name: lis @@ -4204,13 +1740,8 @@ mnemonics: opcode: rlwnm args: [ rA, rS, rB ] condition: MB == 0 && ME == 31 - - name: rotld - opcode: rldcl - args: [ rA, rS, rB ] - condition: MB64 == 0 # TODO rlwimi: inslwi/insrwi - # TODO: the mnemonics for rldic, rldicl, rldicr, and rldimi # Rotates/Shifts Immediate - name: clrrwi @@ -4382,22 +1913,6 @@ mnemonics: opcode: twi args: [ rA, simm ] condition: TO == 31 - - name: tdge - opcode: td - args: [ rA, rB ] - condition: TO == 12 - - name: tdlnl - opcode: td - args: [ rA, rB ] - condition: TO == 5 - - name: tdlti - opcode: tdi - args: [ rA, simm ] - condition: TO == 16 - - name: tdnei - opcode: tdi - args: [ rA, simm ] - condition: TO == 24 - name: sync opcode: sync @@ -4816,19 +2331,2834 @@ mnemonics: args: [ BI ] condition: BO & 0b11110 == 0 - # AltiVec - - name: dss - opcode: dss - args: [ STRM ] - condition: ds_A == 0 - - name: dssall - opcode: dss - condition: ds_A == 1 && STRM == 0 - - name: vnot - opcode: vnor - args: [ vD, vA ] - condition: vB == vA - - name: vmr - opcode: vor - args: [ vD, vA ] - condition: vB == vA +extensions: + Ppc64: + name: PowerPC 64-bit + + fields: + - name: ds + arg: Offset + desc: Load/Store Double Word Offset (for 64-bit instructions) + bits: 16..30 + shift_left: 2 + signed: true + - name: SH64 + arg: OpaqueU + desc: Shift Amount (for 64-bit instructions) + bits: 30,16..21 + - name: MB64 + arg: OpaqueU + desc: Mask Begin (for 64-bit instructions) + bits: 26,21..26 + - name: ME64 + arg: OpaqueU + desc: Mask End (for 64-bit instructions) + bits: 26,21..26 + - name: mtmsrd_L + arg: OpaqueU + desc: L field for mtmsrd + bits: 15..16 + + opcodes: + - name: cntlzd + desc: Count Leading Zeros Double Word + bitmask: 0xfc00fffe + pattern: 0x7c000074 + modifiers: [ Rc ] + args: [ rA, rS ] + defs: [ rA ] + uses: [ rS ] + + - name: dcbzl + aliases: [ dcbz128 ] + desc: Data Cache Block Clear to Zero (128 bytes) + bitmask: 0xffe007ff + pattern: 0x7c2007ec + args: [ rA, rB ] + uses: [ rA.nz, rB ] + + - name: divd + desc: Divide Double Word + bitmask: 0xfc0003fe + pattern: 0x7c0003d2 + modifiers: [ OE, Rc ] + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: divdu + desc: Divide Double Word Unsigned + bitmask: 0xfc0003fe + pattern: 0x7c000392 + modifiers: [ OE, Rc ] + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: extsw + desc: Extend Sign Word + bitmask: 0xfc00fffe + pattern: 0x7c0007b4 + modifiers: [ Rc ] + args: [ rA, rS ] + defs: [ rA ] + uses: [ rS ] + + - name: fcfid + desc: Floating Convert from Integer Double Word + bitmask: 0xfc1f07fe + pattern: 0xfc00069c + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: fctid + desc: Floating Convert to Integer Double Word + bitmask: 0xfc1f07fe + pattern: 0xfc00065c + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: fctidz + desc: Floating Convert to Integer Double Word with Round toward Zero + bitmask: 0xfc1f07fe + pattern: 0xfc00065e + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ld + desc: Load Double Word + bitmask: 0xfc000003 + pattern: 0xe8000000 + args: [ rD, ds, rA ] + defs: [ rD ] + uses: [ rA.nz ] + + - name: ldarx + desc: Load Double Word and Reserve Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0000a8 + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: ldu + desc: Load Double Word with Update + bitmask: 0xfc000003 + pattern: 0xe8000001 + args: [ rD, ds, rA ] + defs: [ rD, rA ] + uses: [ rA ] + + - name: ldux + desc: Load Double Word with Update Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00006a + args: [ rD, rA, rB ] + defs: [ rD, rA ] + uses: [ rA, rB ] + + - name: ldx + desc: Load Double Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00002a + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA.nz, rB ] + + - name: lwa + desc: Load Word Algebraic + bitmask: 0xfc000003 + pattern: 0xe8000002 + args: [ rD, ds, rA ] + defs: [ rD ] + uses: [ rA.nz ] + + - name: lwaux + desc: Load Word Algebraic with Update Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0002ea + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: lwax + desc: Load Word Algebraic Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0002aa + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA.nz, rB ] + + - name: mtmsrd + desc: Move to Machine State Register Double Word + bitmask: 0xFC1EFFFF + pattern: 0x7c000164 + args: [ rS, mtmsrd_L ] + uses: [ rS, mtmsrd_L ] + + - name: mtsrd + desc: Move to Segment Register Double Word + bitmask: 0xfc10ffff + pattern: 0x7c0000a4 + args: [ sr, rS ] + uses: [ rS ] + + - name: mtsrdin + desc: Move to Segment Register Double Word Indirect + bitmask: 0xfc1f07ff + pattern: 0x7c0000e4 + args: [ rS, rB ] + uses: [ rS, rB ] + + - name: mulhd + desc: Multiply High Double Word + bitmask: 0xfc0007fe + pattern: 0x7c000092 + modifiers: [ Rc ] + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: mulhdu + desc: Multiply High Double Word Unsigned + bitmask: 0xfc0007fe + pattern: 0x7c000012 + modifiers: [ Rc ] + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: mulld + desc: Multiply Low Double Word + bitmask: 0xfc0003fe + pattern: 0x7c0001d2 + modifiers: [ OE, Rc ] + args: [ rD, rA, rB ] + defs: [ rD ] + uses: [ rA, rB ] + + - name: rfid + desc: Return from Interrupt Double Word + bitmask: 0xffffffff + pattern: 0x4c000024 + + - name: rldcl + desc: Rotate Left Double Word then Clear Left + bitmask: 0xfc00001e + pattern: 0x78000010 + modifiers: [ Rc ] + args: [ rA, rS, rB, MB64 ] + defs: [ rA ] + uses: [ rS, rB ] + + - name: rldcr + desc: Rotate Left Double Word then Clear Right + bitmask: 0xfc00001e + pattern: 0x78000012 + modifiers: [ Rc ] + args: [ rA, rS, rB, ME64 ] + defs: [ rA ] + uses: [ rS, rB ] + + - name: rldic + desc: Rotate Left Double Word Immediate then Clear + bitmask: 0xfc00001c + pattern: 0x78000008 + modifiers: [ Rc ] + args: [ rA, rS, SH64, MB64 ] + defs: [ rA ] + uses: [ rS ] + + - name: rldicl + desc: Rotate Left Double Word Immediate then Clear Left + bitmask: 0xfc00001c + pattern: 0x78000000 + modifiers: [ Rc ] + args: [ rA, rS, SH64, MB64 ] + defs: [ rA ] + uses: [ rS ] + + - name: rldicr + desc: Rotate Left Double Word Immediate then Clear Right + bitmask: 0xfc00001c + pattern: 0x78000004 + modifiers: [ Rc ] + args: [ rA, rS, SH64, ME64 ] + defs: [ rA ] + uses: [ rS ] + + - name: rldimi + desc: Rotate Left Double Word Immediate then Mask Insert + bitmask: 0xfc00001c + pattern: 0x7800000c + modifiers: [ Rc ] + args: [ rA, rS, SH64, MB64 ] + defs: [ rA ] + uses: [ rS ] + + - name: slbia + desc: SLB Invalidate All + bitmask: 0xffffffff + pattern: 0x7c0003e4 + + - name: slbie + desc: SLB Invalidate Entry + bitmask: 0xffff07ff + pattern: 0x7c000364 + args: [ rB ] + uses: [ rB ] + + - name: sld + desc: Shift Left Double Word + bitmask: 0xfc0007fe + pattern: 0x7c000036 + modifiers: [ Rc ] + args: [ rA, rS, rB ] + defs: [ rA ] + uses: [ rS, rB ] + + - name: srad + desc: Shift Right Algebraic Double Word + bitmask: 0xfc0007fe + pattern: 0x7c000634 + modifiers: [ Rc ] + args: [ rA, rS, rB ] + defs: [ rA ] + uses: [ rS, rB ] + + - name: sradi + desc: Shift Right Algebraic Double Word Immediate + bitmask: 0xFC0007FC + pattern: 0x7c000674 + modifiers: [ Rc ] + args: [ rA, rS, SH64 ] + defs: [ rA ] + uses: [ rS ] + + - name: srd + desc: Shift Right Double Word + bitmask: 0xfc0007fe + pattern: 0x7c000436 + modifiers: [ Rc ] + args: [ rA, rS, rB ] + defs: [ rA ] + uses: [ rA, rB ] + + - name: std + desc: Store Double Word + bitmask: 0xfc000003 + pattern: 0xf8000000 + args: [ rS, ds, rA ] + uses: [ rS, rA.nz ] + + - name: stdcx. + desc: Store Double Word Conditional Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0001ad + side_effects: [ Rc ] + args: [ rS, rA, rB ] + uses: [ rS, rA.nz, rB ] + + - name: stdu + desc: Store Double Word with Update + bitmask: 0xfc000003 + pattern: 0xf8000001 + args: [ rS, ds, rA ] + defs: [ rA ] + uses: [ rS, rA ] + + - name: stdux + desc: Store Double Word with Update Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00016a + args: [ rS, rA, rB ] + defs: [ rA ] + uses: [ rS, rA, rB ] + + - name: stdx + desc: Store Double Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00012a + args: [ rS, rA, rB ] + defs: [ rA ] + uses: [ rS, rA.nz, rB ] + + - name: td + desc: Trap Double Word + bitmask: 0xfc0007ff + pattern: 0x7c000088 + args: [ TO, rA, rB ] + uses: [ rA, rB ] + + - name: tdi + desc: Trap Double Word Immediate + bitmask: 0xfc000000 + pattern: 0x08000000 + args: [ TO, rA, simm ] + uses: [ rA ] + + mnemonics: + # TODO: the mnemonics for rldic, rldicl, rldicr, and rldimi + - name: rotld + opcode: rldcl + args: [ rA, rS, rB ] + condition: MB64 == 0 + + - name: tdge + opcode: td + args: [ rA, rB ] + condition: TO == 12 + + - name: tdlnl + opcode: td + args: [ rA, rB ] + condition: TO == 5 + + - name: tdlti + opcode: tdi + args: [ rA, simm ] + condition: TO == 16 + + - name: tdnei + opcode: tdi + args: [ rA, simm ] + condition: TO == 24 + + PairedSingles: + name: Paired Singles + + fields: + - name: ps_offset + arg: Offset + desc: Paired Single Offset + bits: 20..32 + signed: true + - name: ps_I + arg: GQR + bits: 17..20 + - name: ps_IX + arg: GQR + bits: 22..25 + - name: ps_W + arg: OpaqueU + bits: 16..17 + - name: ps_WX + arg: OpaqueU + bits: 21..22 + + opcodes: + - name: dcbz_l + desc: Data Cache Block Set to Zero Locked + bitmask: 0xffe007ff + pattern: 0x100007ec + args: [ rA, rB ] + uses: [ rA.nz, rB ] + + - name: psq_l + desc: Paired Single Quantized Load + bitmask: 0xfc000000 + pattern: 0xe0000000 + args: [ frD, ps_offset, rA, ps_W, ps_I ] + defs: [ frD ] + uses: [ rA.nz ] + + - name: psq_lu + desc: Paired Single Quantized Load with Update + bitmask: 0xfc000000 + pattern: 0xe4000000 + args: [ frD, ps_offset, rA, ps_W, ps_I ] + defs: [ frD, rA ] + uses: [ rA ] + + - name: psq_lux + desc: Paired Single Quantized Load with Update Indexed + bitmask: 0xfc00007f + pattern: 0x1000004c + args: [ frD, rA, rB, ps_WX, ps_IX ] + defs: [ frD, rA ] + uses: [ rA, rB ] + + - name: psq_lx + desc: Paired Single Quantized Load Indexed + bitmask: 0xfc00007f + pattern: 0x1000000c + args: [ frD, rA, rB, ps_WX, ps_IX ] + defs: [ frD ] + uses: [ rA.nz, rB ] + + - name: psq_st + desc: Paired Single Quantized Store + bitmask: 0xfc000000 + pattern: 0xf0000000 + args: [ frS, ps_offset, rA, ps_W, ps_I ] + uses: [ frS, rA.nz ] + + - name: psq_stu + desc: Paired Single Quantized Store with Update + bitmask: 0xfc000000 + pattern: 0xf4000000 + args: [ frS, ps_offset, rA, ps_W, ps_I ] + defs: [ rA ] + uses: [ frS, rA ] + + - name: psq_stux + desc: Paired Single Quantized Store with Update Indexed + bitmask: 0xfc00007f + pattern: 0x1000004e + args: [ frS, rA, rB, ps_WX, ps_IX ] + defs: [ rA ] + uses: [ frS, rA, rB ] + + - name: psq_stx + desc: Paired Single Quantized Store Indexed + bitmask: 0xfc00007f + pattern: 0x1000000e + args: [ frS, rA, rB, ps_WX, ps_IX ] + uses: [ frS, rA.nz, rB ] + + - name: ps_abs + desc: Paired Single Absolute Value + bitmask: 0xfc1f07fe + pattern: 0x10000210 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_add + desc: Paired Single Add + bitmask: 0xfc0007fe + pattern: 0x1000002a + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_cmpo0 + desc: Paired Singles Compare Ordered High + bitmask: 0xfc6007ff + pattern: 0x10000040 + args: [ crfD, frA, frB ] + defs: [ crfD ] + uses: [ frA.nz, frB ] + + - name: ps_cmpo1 + desc: Paired Singles Compare Ordered Low + bitmask: 0xfc6007ff + pattern: 0x100000c0 + args: [ crfD, frA, frB ] + defs: [ crfD ] + uses: [ frA.nz, frB ] + + - name: ps_cmpu0 + desc: Paired Singles Compare Unordered High + bitmask: 0xfc6007ff + pattern: 0x10000000 + args: [ crfD, frA, frB ] + defs: [ crfD ] + uses: [ frA.nz, frB ] + + - name: ps_cmpu1 + desc: Paired Singles Compare Unordered Low + bitmask: 0xfc6007ff + pattern: 0x10000080 + args: [ crfD, frA, frB ] + defs: [ crfD ] + uses: [ frA.nz, frB ] + + - name: ps_div + desc: Paired Single Divide + bitmask: 0xfc0007fe + pattern: 0x10000024 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_madd + desc: Paired Single Multiply-Add + bitmask: 0xfc00003e + pattern: 0x1000003a + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_madds0 + desc: Paired Single Multiply-Add Scalar high + bitmask: 0xfc00003e + pattern: 0x1000001c + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_madds1 + desc: Paired Single Multiply-Add Scalar low + bitmask: 0xfc00003e + pattern: 0x1000001e + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_merge00 + desc: Paired Single MERGE high + bitmask: 0xfc0007fe + pattern: 0x10000420 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_merge01 + desc: Paired Single MERGE direct + bitmask: 0xfc0007fe + pattern: 0x10000460 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_merge10 + desc: Paired Single MERGE swapped + bitmask: 0xfc0007fe + pattern: 0x100004a0 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_merge11 + desc: Paired Single MERGE low + bitmask: 0xfc0007fe + pattern: 0x100004e0 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_mr + desc: Paired Single Move Register + bitmask: 0xfc1f07fe + pattern: 0x10000090 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_msub + desc: Paired Single Multiply-Subtract + bitmask: 0xfc00003e + pattern: 0x10000038 + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_mul + desc: Paired Single Multiply + bitmask: 0xfc00f83e + pattern: 0x10000032 + modifiers: [ Rc ] + args: [ frD, frA, frC ] + defs: [ frD ] + uses: [ frA, frC ] + + - name: ps_muls0 + desc: Paired Single Multiply Scalar high + bitmask: 0xfc00f83e + pattern: 0x10000018 + modifiers: [ Rc ] + args: [ frD, frA, frC ] + defs: [ frD ] + uses: [ frA, frC ] + + - name: ps_muls1 + desc: Paired Single Multiply Scalar low + bitmask: 0xfc00f83e + pattern: 0x1000001a + modifiers: [ Rc ] + args: [ frD, frA, frC ] + defs: [ frD ] + uses: [ frA, frC ] + + - name: ps_nabs + desc: Paired Single Negative Absolute Value + bitmask: 0xfc1f07fe + pattern: 0x10000110 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_neg + desc: Paired Single Negate + bitmask: 0xfc1f07fe + pattern: 0x10000050 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_nmadd + desc: Paired Single Negative Multiply-Add + bitmask: 0xfc00003e + pattern: 0x1000003e + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_nmsub + desc: Paired Single Negative Multiply-Subtract + bitmask: 0xfc00003e + pattern: 0x1000003c + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_res + desc: Paired Single Reciprocal Estimate + bitmask: 0xfc1f07fe + pattern: 0x10000030 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_rsqrte + desc: Paired Single Reciprocal Square Root Estimate + bitmask: 0xfc1f07fe + pattern: 0x10000034 + modifiers: [ Rc ] + args: [ frD, frB ] + defs: [ frD ] + uses: [ frB ] + + - name: ps_sel + desc: Paired Single Select + bitmask: 0xfc00003e + pattern: 0x1000002e + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_sub + desc: Paired Single Subtract + bitmask: 0xfc0007fe + pattern: 0x10000028 + modifiers: [ Rc ] + args: [ frD, frA, frB ] + defs: [ frD ] + uses: [ frA, frB ] + + - name: ps_sum0 + desc: Paired Single vector SUM high + bitmask: 0xfc00003e + pattern: 0x10000014 + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + - name: ps_sum1 + desc: Paired Single vector SUM low + bitmask: 0xfc00003e + pattern: 0x10000016 + modifiers: [ Rc ] + args: [ frD, frA, frC, frB ] + defs: [ frD ] + uses: [ frA, frC, frB ] + + AltiVec: + name: AltiVec + + fields: + - name: vsimm + arg: Simm + desc: Vector Signed Immediate + bits: 11..16 + signed: true + - name: vuimm + arg: Uimm + desc: Vector Unsigned Immediate + bits: 11..16 + - name: vS + arg: VR + desc: Vector Source Register + bits: 6..11 + - name: vD + arg: VR + desc: Vector Destination Register + bits: 6..11 + - name: vA + arg: VR + desc: Vector Register A + bits: 11..16 + - name: vA.nz + arg: VR + desc: Vector Register A (non-zero) + bits: 11..16 + - name: vB + arg: VR + desc: Vector Register B + bits: 16..21 + - name: vC + arg: VR + desc: Vector Register C + bits: 21..26 + - name: ds_A + arg: OpaqueU + desc: All field for ds instructions + bits: 6..7 + - name: STRM + arg: OpaqueU + desc: Stream ID + bits: 9..11 + - name: SHB + arg: OpaqueU + bits: 22..26 + + modifiers: + - name: T + desc: Transient bit + suffix: t + bit: 6 + - name: RcAV + desc: Record Bit (AltiVec) + suffix: . + bit: 21 + + opcodes: + - name: dss + desc: Data Stream Stop + bitmask: 0xfd9fffff + pattern: 0x7c00066c + args: [ STRM, ds_A ] + uses: [ STRM ] + + - name: dst + desc: Data Stream Touch + bitmask: 0xfd8007ff + pattern: 0x7c0002ac + modifiers: [ T ] + args: [ rA, rB, STRM ] + uses: [ rA, rB, STRM ] + + - name: dstst + desc: Data Stream Touch for Store + bitmask: 0xfd8007ff + pattern: 0x7c0002ec + modifiers: [ T ] + args: [ rA, rB, STRM ] + uses: [ rA, rB, STRM ] + + - name: lvebx + desc: Load Vector Element Byte Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00000e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvehx + desc: Load Vector Element Half Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00004e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvewx + desc: Load Vector Element Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00008e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvlx + desc: Load Vector Left Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00040e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvlxl + desc: Load Vector Left Indexed Last + bitmask: 0xfc0007ff + pattern: 0x7c00060e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvrx + desc: Load Vector Right Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00044e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvrxl + desc: Load Vector Right Indexed Last + bitmask: 0xfc0007ff + pattern: 0x7c00064e + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvsl + desc: Load Vector for Shift Left + bitmask: 0xfc0007ff + pattern: 0x7c00000c + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvsr + desc: Load Vector for Shift Right + bitmask: 0xfc0007ff + pattern: 0x7c00004c + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvx + desc: Load Vector Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0000ce + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: lvxl + desc: Load Vector Indexed LRU + bitmask: 0xfc0007ff + pattern: 0x7c0002ce + args: [ vD, rA, rB ] + defs: [ vD ] + uses: [ rA.nz, rB ] + + - name: mfvscr + desc: Move from Vector Status and Control Register + bitmask: 0xfc1fffff + pattern: 0x10000604 + args: [ vD ] + defs: [ vD ] + + - name: mtvscr + desc: Move to Vector Status and Control Register + bitmask: 0xffff07ff + pattern: 0x10000644 + args: [ vB ] + uses: [ vB ] + + - name: stvebx + desc: Store Vector Element Byte Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00010e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvehx + desc: Store Vector Element Half Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00014e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvewx + desc: Store Vector Element Word Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00018e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvlx + desc: Store Vector Left Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00050e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvlxl + desc: Store Vector Left Indexed Last + bitmask: 0xfc0007ff + pattern: 0x7c00070e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvrx + desc: Store Vector Right Indexed + bitmask: 0xfc0007ff + pattern: 0x7c00054e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvrxl + desc: Store Vector Right Indexed Last + bitmask: 0xfc0007ff + pattern: 0x7c00074e + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvx + desc: Store Vector Indexed + bitmask: 0xfc0007ff + pattern: 0x7c0001ce + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvxl + desc: Store Vector Indexed LRU + bitmask: 0xfc0007ff + pattern: 0x7c0003ce + args: [ vS, rA, rB ] + uses: [ rA.nz, rB ] + + - name: vaddcuw + desc: Vector Add Carryout Unsigned Word + bitmask: 0xfc0007ff + pattern: 0x10000180 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddfp + desc: Vector Add Floating Point + bitmask: 0xfc0007ff + pattern: 0x1000000a + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddsbs + desc: Vector Add Signed Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000300 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddshs + desc: Vector Add Signed Half Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000340 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddsws + desc: Vector Add Signed Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000380 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddubm + desc: Vector Add Unsigned Byte Modulo + bitmask: 0xfc0007ff + pattern: 0x10000000 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vaddubs + desc: Vector Add Unsigned Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000200 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vadduhm + desc: Vector Add Unsigned Half Word Modulo + bitmask: 0xfc0007ff + pattern: 0x10000040 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vadduhs + desc: Vector Add Unsigned Half Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000240 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vadduwm + desc: Vector Add Unsigned Word Modulo + bitmask: 0xfc0007ff + pattern: 0x10000080 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vadduws + desc: Vector Add Unsigned Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000280 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vand + desc: Vector Logical AND + bitmask: 0xfc0007ff + pattern: 0x10000404 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vandc + desc: Vector Logical AND with Complement + bitmask: 0xfc0007ff + pattern: 0x10000444 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavgsb + desc: Vector Average Signed Byte + bitmask: 0xfc0007ff + pattern: 0x10000502 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavgsh + desc: Vector Average Signed Half Word + bitmask: 0xfc0007ff + pattern: 0x10000542 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavgsw + desc: Vector Average Signed Word + bitmask: 0xfc0007ff + pattern: 0x10000582 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavgub + desc: Vector Average Unsigned Byte + bitmask: 0xfc0007ff + pattern: 0x10000402 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavguh + desc: Vector Average Unsigned Half Word + bitmask: 0xfc0007ff + pattern: 0x10000442 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vavguw + desc: Vector Average Unsigned Word + bitmask: 0xfc0007ff + pattern: 0x10000482 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcfsx + aliases: [ vcsxwfp ] + desc: Vector Convert from Signed Fixed-Point Word + bitmask: 0xfc0007ff + pattern: 0x1000034a + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vcfux + aliases: [ vcuxwfp ] + desc: Vector Convert from Unsigned Fixed-Point Word + bitmask: 0xfc0007ff + pattern: 0x1000030a + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vcmpbfp + desc: Vector Compare Bounds Floating Point + bitmask: 0xfc0003ff + pattern: 0x100003c6 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpeqfp + desc: Vector Compare Equal-to-Floating Point + bitmask: 0xfc0003ff + pattern: 0x100000c6 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpequb + desc: Vector Compare Equal-to Unsigned Byte + bitmask: 0xfc0003ff + pattern: 0x10000006 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpequh + desc: Vector Compare Equal-to Unsigned Half Word + bitmask: 0xfc0003ff + pattern: 0x10000046 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpequw + desc: Vector Compare Equal-to Unsigned Word + bitmask: 0xfc0003ff + pattern: 0x10000086 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgefp + desc: Vector Compare Greater-Than-or-Equal-to Floating Point + bitmask: 0xfc0003ff + pattern: 0x100001c6 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtfp + desc: Vector Compare Greater-Than Floating Point + bitmask: 0xfc0003ff + pattern: 0x100002c6 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtsb + desc: Vector Compare Greater-Than Signed Byte + bitmask: 0xfc0003ff + pattern: 0x10000306 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtsh + desc: Vector Compare Greater-Than Condition Register Signed Half Word + bitmask: 0xfc0003ff + pattern: 0x10000346 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtsw + desc: Vector Compare Greater-Than Signed Word + bitmask: 0xfc0003ff + pattern: 0x10000386 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtub + desc: Vector Compare Greater-Than Unsigned Byte + bitmask: 0xfc0003ff + pattern: 0x10000206 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtuh + desc: Vector Compare Greater-Than Unsigned Half Word + bitmask: 0xfc0003ff + pattern: 0x10000246 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vcmpgtuw + desc: Vector Compare Greater-Than Unsigned Word + bitmask: 0xfc0003ff + pattern: 0x10000286 + modifiers: [ RcAV ] + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vctsxs + aliases: [ vcfpsxws ] + desc: Vector Convert to Signed Fixed-Point Word Saturate + bitmask: 0xfc0007ff + pattern: 0x100003ca + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vctuxs + aliases: [ vcfpuxws ] + desc: Vector Convert to Unsigned Fixed-Point Word Saturate + bitmask: 0xfc0007ff + pattern: 0x1000038a + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vexptefp + desc: Vector 2 Raised to the Exponent Estimate Floating Point + bitmask: 0xfc1f07ff + pattern: 0x1000018a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vlogefp + desc: Vector Log2 Estimate Floating Point + bitmask: 0xfc1f07ff + pattern: 0x100001ca + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vmaddfp + desc: Vector Multiply Add Floating Point + bitmask: 0xfc00003f + pattern: 0x1000002e + args: [ vD, vA, vC, vB ] + defs: [ vD ] + uses: [ vA, vC, vB ] + + - name: vmaxfp + desc: Vector Maximum Floating Point + bitmask: 0xfc0007ff + pattern: 0x1000040a + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxsb + desc: Vector Maximum Signed Byte + bitmask: 0xfc0007ff + pattern: 0x10000102 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxsh + desc: Vector Maximum Signed Half Word + bitmask: 0xfc0007ff + pattern: 0x10000142 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxsw + desc: Vector Maximum Signed Word + bitmask: 0xfc0007ff + pattern: 0x10000182 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxub + desc: Vector Maximum Unsigned Byte + bitmask: 0xfc0007ff + pattern: 0x10000002 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxuh + desc: Vector Maximum Unsigned Half Word + bitmask: 0xfc0007ff + pattern: 0x10000042 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmaxuw + desc: Vector Maximum Unsigned Word + bitmask: 0xfc0007ff + pattern: 0x10000082 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmhaddshs + desc: Vector Multiply High and Add Signed Half Word Saturate + bitmask: 0xfc00003f + pattern: 0x10000020 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmhraddshs + desc: Vector Multiply High Round and Add Signed Half Word Saturate + bitmask: 0xfc00003f + pattern: 0x10000021 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vminfp + desc: Vector Minimum Floating Point + bitmask: 0xfc0007ff + pattern: 0x1000044a + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminsb + desc: Vector Minimum Signed Byte + bitmask: 0xfc0007ff + pattern: 0x10000302 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminsh + desc: Vector Minimum Signed Half Word + bitmask: 0xfc0007ff + pattern: 0x10000342 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminsw + desc: Vector Minimum Signed Word + bitmask: 0xfc0007ff + pattern: 0x10000382 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminub + desc: Vector Minimum Unsigned Byte + bitmask: 0xfc0007ff + pattern: 0x10000202 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminuh + desc: Vector Minimum Unsigned Half Word + bitmask: 0xfc0007ff + pattern: 0x10000242 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vminuw + desc: Vector Minimum Unsigned Word + bitmask: 0xfc0007ff + pattern: 0x10000282 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmladduhm + desc: Vector Multiply Low and Add Unsigned Half Word Modulo + bitmask: 0xfc00003f + pattern: 0x10000022 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmrghb + desc: Vector Merge High Byte + bitmask: 0xfc0007ff + pattern: 0x1000000c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmrghh + desc: Vector Merge High Half Word + bitmask: 0xfc0007ff + pattern: 0x1000004c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmrghw + desc: Vector Merge High Word + bitmask: 0xfc0007ff + pattern: 0x1000008c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmrglb + desc: Vector Merge Low Byte + bitmask: 0xfc0007ff + pattern: 0x1000010c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmrglh + desc: Vector Merge Low Half Word + bitmask: 0xfc0007ff + pattern: 0x1000014c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmrglw + desc: Vector Merge Low Word + bitmask: 0xfc0007ff + pattern: 0x1000018c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmsummbm + desc: Vector Multiply Sum Mixed-Sign Byte Modulo + bitmask: 0xfc00003f + pattern: 0x10000025 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmsumshm + desc: Vector Multiply Sum Signed Half Word Modulo + bitmask: 0xfc00003f + pattern: 0x10000028 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmsumshs + desc: Vector Multiply Sum Signed Half Word Saturate + bitmask: 0xfc00003f + pattern: 0x10000029 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmsumubm + desc: Vector Multiply Sum Unsigned Byte Modulo + bitmask: 0xfc00003f + pattern: 0x10000024 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmsumuhm + desc: Vector Multiply Sum Unsigned Half Word Modulo + bitmask: 0xfc00003f + pattern: 0x10000026 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmsumuhs + desc: Vector Multiply Sum Unsigned Half Word Saturate + bitmask: 0xfc00003f + pattern: 0x10000027 + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vmulesb + desc: Vector Multiply Even Signed Byte + bitmask: 0xfc0007ff + pattern: 0x10000308 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmulesh + desc: Vector Multiply Even Signed Half Word + bitmask: 0xfc0007ff + pattern: 0x10000348 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmuleub + desc: Vector Multiply Even Unsigned Byte + bitmask: 0xfc0007ff + pattern: 0x10000208 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmuleuh + desc: Vector Multiply Even Unsigned Half Word + bitmask: 0xfc0007ff + pattern: 0x10000248 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmulosb + desc: Vector Multiply Odd Signed Byte + bitmask: 0xfc0007ff + pattern: 0x10000108 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmulosh + desc: Vector Multiply Odd Signed Half Word + bitmask: 0xfc0007ff + pattern: 0x10000148 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmuloub + desc: Vector Multiply Odd Unsigned Byte + bitmask: 0xfc0007ff + pattern: 0x10000008 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vmulouh + desc: Vector Multiply Odd Unsigned Half Word + bitmask: 0xfc0007ff + pattern: 0x10000048 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vnmsubfp + desc: Vector Negative Multiply-Subtract Floating Point + bitmask: 0xfc00003f + pattern: 0x1000002f + args: [ vD, vA, vC, vB ] + defs: [ vD ] + uses: [ vA, vC, vB ] + + - name: vnor + desc: Vector Logical NOR + bitmask: 0xfc0007ff + pattern: 0x10000504 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vor + desc: Vector Logical OR + bitmask: 0xfc0007ff + pattern: 0x10000484 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vperm + desc: Vector Permute + bitmask: 0xfc00003f + pattern: 0x1000002b + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vpkpx + desc: Vector Pack Pixel32 + bitmask: 0xfc0007ff + pattern: 0x1000030e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkshss + desc: Vector Pack Signed Half Word Signed Saturate + bitmask: 0xfc0007ff + pattern: 0x1000018e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkshus + desc: Vector Pack Signed Half Word Unsigned Saturate + bitmask: 0xfc0007ff + pattern: 0x1000010e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkswss + desc: Vector Pack Signed Word Signed Saturate + bitmask: 0xfc0007ff + pattern: 0x100001ce + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkswus + desc: Vector Pack Signed Word Unsigned Saturate + bitmask: 0xfc0007ff + pattern: 0x1000014e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkuhum + desc: Vector Pack Unsigned Half Word Unsigned Modulo + bitmask: 0xfc0007ff + pattern: 0x1000000e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkuhus + desc: Vector Pack Unsigned Half Word Unsigned Saturate + bitmask: 0xfc0007ff + pattern: 0x1000008e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkuwum + desc: Vector Pack Unsigned Word Unsigned Modulo + bitmask: 0xfc0007ff + pattern: 0x1000004e + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vpkuwus + desc: Vector Pack Unsigned Word Unsigned Saturate + bitmask: 0xfc0007ff + pattern: 0x100000ce + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vrefp + desc: Vector Reciprocal Estimate Floating Point + bitmask: 0xfc1f07ff + pattern: 0x1000010a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vrfim + desc: Vector Round to Floating-Point Integer toward Minus Infinity + bitmask: 0xfc1f07ff + pattern: 0x100002ca + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vrfin + desc: Vector Round to Floating-Point Integer Nearest + bitmask: 0xfc1f07ff + pattern: 0x1000020a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vrfip + desc: Vector Round to Floating-Point Integer toward Plus Infinity + bitmask: 0xfc1f07ff + pattern: 0x1000028a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vrfiz + desc: Vector Round to Floating-Point Integer toward Zero + bitmask: 0xfc1f07ff + pattern: 0x1000024a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vrlb + desc: Vector Rotate Left Integer Byte + bitmask: 0xfc0007ff + pattern: 0x10000004 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vrlh + desc: Vector Rotate Left Integer Half Word + bitmask: 0xfc0007ff + pattern: 0x10000044 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vrlw + desc: Vector Rotate Left Integer Word + bitmask: 0xfc0007ff + pattern: 0x10000084 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vrsqrtefp + desc: Vector Reciprocal Square Root Estimate Floating Point + bitmask: 0xfc1f07ff + pattern: 0x1000014a + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vsel + desc: Vector Conditional Select + bitmask: 0xfc00003f + pattern: 0x1000002a + args: [ vD, vA, vB, vC ] + defs: [ vD ] + uses: [ vA, vB, vC ] + + - name: vsl + desc: Vector Shift Left + bitmask: 0xfc0007ff + pattern: 0x100001c4 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vslb + desc: Vector Shift Left Integer Byte + bitmask: 0xfc0007ff + pattern: 0x10000104 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsldoi + desc: Vector Shift Left Double by Octet Immediate + bitmask: 0xfc00043f + pattern: 0x1000002c + args: [ vD, vA, vB, SHB ] + defs: [ vD ] + uses: [ vA, vB, SHB ] + + - name: vslh + desc: Vector Shift Left Integer Half Word + bitmask: 0xfc0007ff + pattern: 0x10000144 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vslo + desc: Vector Shift Left by Octet + bitmask: 0xfc0007ff + pattern: 0x1000040c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vslw + desc: Vector Shift Left Integer Word + bitmask: 0xfc0007ff + pattern: 0x10000184 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vspltb + desc: Vector Splat Byte + bitmask: 0xfc0007ff + pattern: 0x1000020c + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vsplth + desc: Vector Splat Half Word + bitmask: 0xfc0007ff + pattern: 0x1000024c + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vspltisb + desc: Vector Splat Immediate Signed Byte + bitmask: 0xfc00ffff + pattern: 0x1000030c + args: [ vD, vsimm ] + defs: [ vD ] + uses: [ vsimm ] + + - name: vspltish + desc: Vector Splat Immediate Signed Half Word + bitmask: 0xfc00ffff + pattern: 0x1000034c + args: [ vD, vsimm ] + defs: [ vD ] + uses: [ vsimm ] + + - name: vspltisw + desc: Vector Splat Immediate Signed Word + bitmask: 0xfc00ffff + pattern: 0x1000038c + args: [ vD, vsimm ] + defs: [ vD ] + uses: [ vsimm ] + + - name: vspltw + desc: Vector Splat Word + bitmask: 0xfc0007ff + pattern: 0x1000028c + args: [ vD, vB, vuimm ] + defs: [ vD ] + uses: [ vB, vuimm ] + + - name: vsr + desc: Vector Shift Right + bitmask: 0xfc0007ff + pattern: 0x100002c4 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsrab + desc: Vector Shift Right Algebraic Byte + bitmask: 0xfc0007ff + pattern: 0x10000304 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsrah + desc: Vector Shift Right Algebraic Half Word + bitmask: 0xfc0007ff + pattern: 0x10000344 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsraw + desc: Vector Shift Right Algebraic Word + bitmask: 0xfc0007ff + pattern: 0x10000384 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsrb + desc: Vector Shift Right Byte + bitmask: 0xfc0007ff + pattern: 0x10000204 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsrh + desc: Vector Shift Right Half Word + bitmask: 0xfc0007ff + pattern: 0x10000244 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsro + desc: Vector Shift Right by Octet + bitmask: 0xfc0007ff + pattern: 0x1000044c + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsrw + desc: Vector Shift Right Word + bitmask: 0xfc0007ff + pattern: 0x10000284 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubcuw + desc: Vector Subtract Carryout Unsigned Word + bitmask: 0xfc0007ff + pattern: 0x10000580 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubfp + desc: Vector Subtract Floating Point + bitmask: 0xfc0007ff + pattern: 0x1000004a + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubsbs + desc: Vector Subtract Signed Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000700 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubshs + desc: Vector Subtract Signed Half Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000740 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubsws + desc: Vector Subtract Signed Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000780 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsububm + desc: Vector Subtract Unsigned Byte Modulo + bitmask: 0xfc0007ff + pattern: 0x10000400 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsububs + desc: Vector Subtract Unsigned Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000600 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubuhm + desc: Vector Subtract Unsigned Half Word Modulo + bitmask: 0xfc0007ff + pattern: 0x10000440 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubuhs + desc: Vector Subtract Unsigned Half Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000640 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubuwm + desc: Vector Subtract Unsigned Word Modulo + bitmask: 0xfc0007ff + pattern: 0x10000480 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsubuws + desc: Vector Subtract Unsigned Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000680 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsumsws + desc: Vector Sum Across Signed Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000788 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsum2sws + desc: Vector Sum Across Partial (1/2) Signed Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000688 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsum4sbs + desc: Vector Sum Across Partial (1/4) Signed Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000708 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsum4shs + desc: Vector Sum Across Partial (1/4) Signed Half Word Saturate + bitmask: 0xfc0007ff + pattern: 0x10000648 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vsum4ubs + desc: Vector Sum Across Partial (1/4) Unsigned Byte Saturate + bitmask: 0xfc0007ff + pattern: 0x10000608 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + - name: vupkhpx + desc: Vector Unpack High Pixel16 + bitmask: 0xfc1f07ff + pattern: 0x1000034e + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vupkhsb + desc: Vector Unpack High Signed Byte + bitmask: 0xfc1f07ff + pattern: 0x1000020e + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vupkhsh + desc: Vector Unpack High Signed Half Word + bitmask: 0xfc1f07ff + pattern: 0x1000024e + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vupklpx + desc: Vector Unpack Low Pixel16 + bitmask: 0xfc1f07ff + pattern: 0x100003ce + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vupklsb + desc: Vector Unpack Low Signed Byte + bitmask: 0xfc1f07ff + pattern: 0x1000028e + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vupklsh + desc: Vector Unpack Low Signed Half Word + bitmask: 0xfc1f07ff + pattern: 0x100002ce + args: [ vD, vB ] + defs: [ vD ] + uses: [ vB ] + + - name: vxor + desc: Vector Logical XOR + bitmask: 0xfc0007ff + pattern: 0x100004c4 + args: [ vD, vA, vB ] + defs: [ vD ] + uses: [ vA, vB ] + + mnemonics: + - name: dss + opcode: dss + args: [ STRM ] + condition: ds_A == 0 + + - name: dssall + opcode: dss + condition: ds_A == 1 && STRM == 0 + + - name: vnot + opcode: vnor + args: [ vD, vA ] + condition: vB == vA + + - name: vmr + opcode: vor + args: [ vD, vA ] + condition: vB == vA + + Vmx128: + name: VMX128 + requires: [ AltiVec ] + + fields: + - name: VDS128 + arg: VR + desc: VMX128 Source/Dest Register + bits: 28..30,6..11 + - name: VA128 + arg: VR + desc: VMX128 Register A + bits: 21,26,11..16 + - name: VB128 + arg: VR + desc: VMX128 Register B + bits: 30..32,16..21 + - name: VC128 + arg: VR + desc: VMX128 Register C + bits: 23..26 + - name: PERM + arg: OpaqueU + desc: VMX128 Permutation + bits: 23..26,11..16 + - name: D3DType + arg: OpaqueU + desc: the packed data type + bits: 11..14 + - name: VMASK + arg: OpaqueU + desc: the pack mask + bits: 14..16 + - name: Zimm + arg: OpaqueU + desc: amount to rotate/shift left + bits: 24..26 + + modifiers: + - name: Rc128 + desc: Record Bit (VMX128) + suffix: . + bit: 25 + + opcodes: + - name: lvewx128 + desc: Load Vector128 Element Word Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000083 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvlx128 + desc: Load Vector128 Left Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000403 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvlxl128 + desc: Load Vector128 Left Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x10000603 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvrx128 + desc: Load Vector128 Right Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000443 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvrxl128 + desc: Load Vector128 Right Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x10000643 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvsl128 + desc: Load Vector128 for Shift Left + bitmask: 0xfc0007f3 + pattern: 0x10000003 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvsr128 + desc: Load Vector128 for Shift Right + bitmask: 0xfc0007f3 + pattern: 0x10000043 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvx128 + desc: Load Vector128 Indexed + bitmask: 0xfc0007f3 + pattern: 0x100000C3 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: lvxl128 + desc: Load Vector128 Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x100002C3 + args: [ VDS128, rA, rB ] + defs: [ VDS128 ] + uses: [ rA.nz, rB ] + + - name: stvewx128 + desc: Store Vector128 Element Word Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000183 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvlx128 + desc: Store Vector128 Left Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000503 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvlxl128 + desc: Store Vector128 Left Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x10000703 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvrx128 + desc: Store Vector128 Right Indexed + bitmask: 0xfc0007f3 + pattern: 0x10000543 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvrxl128 + desc: Store Vector128 Right Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x10000743 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvx128 + desc: Store Vector128 Indexed + bitmask: 0xfc0007f3 + pattern: 0x100001C3 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: stvxl128 + desc: Store Vector128 Indexed LRU + bitmask: 0xfc0007f3 + pattern: 0x100003C3 + args: [ VDS128, rA, rB ] + uses: [ rA.nz, rB ] + + - name: vaddfp128 + desc: Vector128 Add Floating Point + bitmask: 0xfc0003d0 + pattern: 0x14000010 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vand128 + desc: Vector128 Logical AND + bitmask: 0xfc0003d0 + pattern: 0x14000210 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vandc128 + desc: Vector128 Logical AND with Complement + bitmask: 0xfc0003d0 + pattern: 0x14000250 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vctsxs128 + aliases: [ vcfpsxws128 ] + desc: Vector128 Convert to Signed Fixed-Point Word Saturate + bitmask: 0xfc0007f0 + pattern: 0x18000230 + args: [ VDS128, VB128, vsimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vctuxs128 + aliases: [ vcfpuxws128 ] + desc: Vector128 Convert to Unsigned Fixed-Point Word Saturate + bitmask: 0xfc0007f0 + pattern: 0x18000270 + args: [ VDS128, VB128, vuimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vcmpbfp128 + desc: Vector128 Compare Bounds Floating Point + bitmask: 0xfc000390 + pattern: 0x18000180 + modifiers: [ Rc128 ] + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vcmpeqfp128 + desc: Vector128 Compare Equal-to Floating Point + bitmask: 0xfc000390 + pattern: 0x18000000 + modifiers: [ Rc128 ] + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vcmpequw128 + desc: Vector128 Compare Equal-to Unsigned Word + bitmask: 0xfc000390 + pattern: 0x18000200 + modifiers: [ Rc128 ] + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vcmpgefp128 + desc: Vector128 Compare Greater-Than-or-Equal-to Floating Point + bitmask: 0xfc000390 + pattern: 0x18000080 + modifiers: [ Rc128 ] + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vcmpgtfp128 + desc: Vector128 Compare Greater-Than Floating-Point + bitmask: 0xfc000390 + pattern: 0x18000100 + modifiers: [ Rc128 ] + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vcfsx128 + aliases: [ vcsxwfp128 ] + desc: Vector128 Convert From Signed Fixed-Point Word + bitmask: 0xfc0007f0 + pattern: 0x180002b0 + args: [ VDS128, VB128, vsimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vcfux128 + aliases: [ vcuxwfp128 ] + desc: Vector128 Convert From Unsigned Fixed-Point Word + bitmask: 0xfc0007f0 + pattern: 0x180002f0 + args: [ VDS128, VB128, vuimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vexptefp128 + desc: Vector128 2 Raised to the Exponent Estimate Floating Point + bitmask: 0xfc1f07f0 + pattern: 0x180006b0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vlogefp128 + desc: Vector128 Log2 Estimate Floating Point + bitmask: 0xfc1f07f0 + pattern: 0x180006f0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vmaddcfp128 + desc: Vector128 Multiply Add Carryout Floating Point + bitmask: 0xfc0003d0 + pattern: 0x14000110 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmaddfp128 + desc: Vector128 Multiply Add Floating Point + bitmask: 0xfc0003d0 + pattern: 0x140000d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmaxfp128 + desc: Vector128 Maximum Floating Point + bitmask: 0xfc0003d0 + pattern: 0x18000280 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vminfp128 + desc: Vector128 Minimum Floating Point + bitmask: 0xfc0003d0 + pattern: 0x180002c0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmrghw128 + desc: Vector128 Merge High Word + bitmask: 0xfc0003d0 + pattern: 0x18000300 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmrglw128 + desc: Vector128 Merge Low Word + bitmask: 0xfc0003d0 + pattern: 0x18000340 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmsum3fp128 + desc: Vector128 Multiply Sum 3-way Floating Point + bitmask: 0xfc0003d0 + pattern: 0x14000190 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmsum4fp128 + desc: Vector128 Multiply Sum 4-way Floating Point + bitmask: 0xfc0003d0 + pattern: 0x140001d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vmulfp128 + desc: Vector128 Multiply Floating-Point + bitmask: 0xfc0003d0 + pattern: 0x14000090 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vnmsubfp128 + desc: Vector128 Negative Multiply-Subtract Floating Point + bitmask: 0xfc0003d0 + pattern: 0x14000150 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vnor128 + desc: Vector128 Logical NOR + bitmask: 0xfc0003d0 + pattern: 0x14000290 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vor128 + desc: Vector128 Logical OR + bitmask: 0xfc0003d0 + pattern: 0x140002d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vperm128 + desc: Vector128 Permutation + bitmask: 0xfc000210 + pattern: 0x14000000 + args: [ VDS128, VA128, VB128, VC128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128, VC128 ] + + - name: vpermwi128 + desc: Vector128 Permutate Word Immediate + bitmask: 0xfc000630 + pattern: 0x18000210 + args: [ VDS128, VB128, PERM ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vpkd3d128 + desc: Vector128 Pack D3Dtype, Rotate Left Immediate and Mask Insert + bitmask: 0xfc000730 + pattern: 0x18000610 + args: [ VDS128, VB128, D3DType, VMASK, Zimm ] + defs: [ VDS128 ] + uses: [ VB128, D3DType, VMASK, Zimm ] + + - name: vpkshss128 + desc: Vector128 Pack Signed Half Word Signed Saturate + bitmask: 0xfc0003d0 + pattern: 0x14000200 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkshus128 + desc: Vector128 Pack Signed Half Word Unsigned Saturate + bitmask: 0xfc0003d0 + pattern: 0x14000240 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkswss128 + desc: Vector128 Pack Signed Word Signed Saturate + bitmask: 0xfc0003d0 + pattern: 0x14000280 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkswus128 + desc: Vector128 Pack Signed Word Unsigned Saturate + bitmask: 0xfc0003d0 + pattern: 0x140002c0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkuhum128 + desc: Vector128 Pack Unsigned Half Word Unsigned Modulo + bitmask: 0xfc0003d0 + pattern: 0x14000300 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkuhus128 + desc: Vector128 Pack Unsigned Half Word Unsigned Saturate + bitmask: 0xfc0003d0 + pattern: 0x14000340 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkuwum128 + desc: Vector128 Pack Unsigned Word Unsigned Modulo + bitmask: 0xfc0003d0 + pattern: 0x14000380 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vpkuwus128 + desc: Vector128 Pack Unsigned Word Unsigned Saturate + bitmask: 0xfc0003d0 + pattern: 0x140003c0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vrefp128 + desc: Vector128 Reciprocal Estimate Floating Point + bitmask: 0xfc1f07f0 + pattern: 0x18000630 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrfim128 + desc: Vector128 Round to Floating-Point Integer toward Minus Infinity + bitmask: 0xfc1f07f0 + pattern: 0x18000330 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrfin128 + desc: Vector128 Round to Floating-Point Integer toward Nearest + bitmask: 0xfc1f07f0 + pattern: 0x18000370 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrfip128 + desc: Vector128 Round to Floating-Point Integer toward Plus Infinity + bitmask: 0xfc1f07f0 + pattern: 0x180003b0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrfiz128 + desc: Vector128 Round to Floating-Point Integer toward Zero + bitmask: 0xfc1f07f0 + pattern: 0x180003f0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrlimi128 + desc: Vector128 Rotate Left Immediate and Mask Insert + bitmask: 0xfc000730 + pattern: 0x18000710 + args: [ VDS128, VB128, vuimm, Zimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vrlw128 + desc: Vector128 Rotate Left Word + bitmask: 0xfc0003d0 + pattern: 0x18000050 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vrsqrtefp128 + desc: Vector128 Reciprocal Square Root Estimate Floating Point + bitmask: 0xfc1f07f0 + pattern: 0x18000670 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vsel128 + desc: Vector128 Select + bitmask: 0xfc0003d0 + pattern: 0x14000350 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vsldoi128 + desc: Vector128 Shift Left Double by Octet Immediate + bitmask: 0xfc000010 + pattern: 0x10000010 + args: [ VDS128, VA128, VB128, SHB ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vslo128 + desc: Vector128 Shift Left Octet + bitmask: 0xfc0003d0 + pattern: 0x14000390 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vslw128 + desc: Vector128 Shift Left Word + bitmask: 0xfc0003d0 + pattern: 0x180000d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vspltisw128 + desc: Vector128 Splat Immediate Signed Word + bitmask: 0xfc0007f0 + pattern: 0x18000770 + args: [ VDS128, VB128, vsimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vspltw128 + desc: Vector128 Splat Word + bitmask: 0xfc0007f0 + pattern: 0x18000730 + args: [ VDS128, VB128, vuimm ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vsraw128 + desc: Vector128 Shift Right Arithmetic Word + bitmask: 0xfc0003d0 + pattern: 0x18000150 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vsro128 + desc: Vector128 Shift Right Octet + bitmask: 0xfc0003d0 + pattern: 0x140003d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vsrw128 + desc: Vector128 Shift Right Word + bitmask: 0xfc0003d0 + pattern: 0x180001d0 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vsubfp128 + desc: Vector128 Subtract Floating Point + bitmask: 0xfc0003d0 + pattern: 0x14000050 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ] + + - name: vupkd3d128 + desc: Vector128 Unpack D3Dtype + bitmask: 0xfc0007f0 + pattern: 0x180007f0 + args: [ VDS128, VB128, vuimm ] + defs: [ VDS128 ] + uses: [ VB128, vuimm ] + + - name: vupkhsb128 + desc: Vector128 Unpack High Signed Byte + bitmask: 0xfc1f07f0 + pattern: 0x18000380 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vupkhsh128 + desc: Vector128 Unpack High Signed Half Word + bitmask: 0xfc1f07f0 + pattern: 0x180007a0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vupklsb128 + desc: Vector128 Unpack Low Signed Byte + bitmask: 0xfc1f07f0 + pattern: 0x180003c0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vupklsh128 + desc: Vector128 Unpack Low Signed Half Word + bitmask: 0xfc1f07f0 + pattern: 0x180007e0 + args: [ VDS128, VB128 ] + defs: [ VDS128 ] + uses: [ VB128 ] + + - name: vxor128 + desc: Vector128 Logical XOR + bitmask: 0xfc0003d0 + pattern: 0x14000310 + args: [ VDS128, VA128, VB128 ] + defs: [ VDS128 ] + uses: [ VA128, VB128 ]