isa: add missing `L` arg to the `cmp` instruction family

Also fix the mnemonics for said instruction family

disasm/src/generated.rs

@@ -1166,6 +1166,7 @@ pub enum Field {
     mtfsf_FM(OpaqueU),
     mtfsf_IMM(OpaqueU),
     TO(OpaqueU),
+    L(OpaqueU),
     xer,
     ctr,
     lr,
@@ -1212,6 +1213,7 @@ impl Field {
             Field::mtfsf_FM(x) => Some(Argument::OpaqueU(*x)),
             Field::mtfsf_IMM(x) => Some(Argument::OpaqueU(*x)),
             Field::TO(x) => Some(Argument::OpaqueU(*x)),
+            Field::L(x) => Some(Argument::OpaqueU(*x)),
             _ => None,
         }
     }
@@ -1256,6 +1258,7 @@ impl Field {
             Field::mtfsf_FM(_) => "mtfsf_FM",
             Field::mtfsf_IMM(_) => "mtfsf_IMM",
             Field::TO(_) => "TO",
+            Field::L(_) => "L",
             Field::xer => "xer",
             Field::ctr => "ctr",
             Field::lr => "lr",
@@ -1360,11 +1363,13 @@ impl Ins {
             ],
             Opcode::Cmp => vec![
                 Field::crfD(CRField(((self.code >> 23u8) & 0x7) as _)),
+                Field::L(OpaqueU(((self.code >> 21u8) & 0x1) as _)),
                 Field::rA(GPR(((self.code >> 16u8) & 0x1f) as _)),
                 Field::rB(GPR(((self.code >> 11u8) & 0x1f) as _)),
             ],
             Opcode::Cmpi => vec![
                 Field::crfD(CRField(((self.code >> 23u8) & 0x7) as _)),
+                Field::L(OpaqueU(((self.code >> 21u8) & 0x1) as _)),
                 Field::rA(GPR(((self.code >> 16u8) & 0x1f) as _)),
                 Field::simm(Simm(
                     ((((self.code & 0xffff) ^ 0x8000).wrapping_sub(0x8000)) as i32) as _,
@@ -1372,11 +1377,13 @@ impl Ins {
             ],
             Opcode::Cmpl => vec![
                 Field::crfD(CRField(((self.code >> 23u8) & 0x7) as _)),
+                Field::L(OpaqueU(((self.code >> 21u8) & 0x1) as _)),
                 Field::rA(GPR(((self.code >> 16u8) & 0x1f) as _)),
                 Field::rB(GPR(((self.code >> 11u8) & 0x1f) as _)),
             ],
             Opcode::Cmpli => vec![
                 Field::crfD(CRField(((self.code >> 23u8) & 0x7) as _)),
+                Field::L(OpaqueU(((self.code >> 21u8) & 0x1) as _)),
                 Field::rA(GPR(((self.code >> 16u8) & 0x1f) as _)),
                 Field::uimm(Uimm((self.code & 0xffff) as _)),
             ],
@@ -5566,7 +5573,7 @@ impl Ins {
                 }
             }
             Opcode::Cmp => {
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmpw",
                         args: vec![
@@ -5576,9 +5583,41 @@ impl Ins {
                         ins: self,
                     };
                 }
+                if ((self.code >> 21u8) & 0x1) == 0 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpw",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpd",
+                        args: vec![
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpd",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
             }
             Opcode::Cmpi => {
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmpwi",
                         args: vec![
@@ -5591,7 +5630,7 @@ impl Ins {
                         ins: self,
                     };
                 }
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmpwi",
                         args: vec![
@@ -5605,9 +5644,36 @@ impl Ins {
                         ins: self,
                     };
                 }
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpdi",
+                        args: vec![
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::Simm(Simm(
+                                ((((self.code & 0xffff) ^ 0x8000).wrapping_sub(0x8000)) as i32)
+                                    as _,
+                            )),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpdi",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::Simm(Simm(
+                                ((((self.code & 0xffff) ^ 0x8000).wrapping_sub(0x8000)) as i32)
+                                    as _,
+                            )),
+                        ],
+                        ins: self,
+                    };
+                }
             }
             Opcode::Cmpl => {
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmplw",
                         args: vec![
@@ -5617,9 +5683,41 @@ impl Ins {
                         ins: self,
                     };
                 }
+                if ((self.code >> 21u8) & 0x1) == 0 {
+                    return SimplifiedIns {
+                        mnemonic: "cmplw",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpld",
+                        args: vec![
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpld",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::GPR(GPR(((self.code >> 11u8) & 0x1f) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
             }
             Opcode::Cmpli => {
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmplwi",
                         args: vec![
@@ -5629,7 +5727,7 @@ impl Ins {
                         ins: self,
                     };
                 }
-                if ((self.code >> 23u8) & 0x7) == 0 {
+                if ((self.code >> 21u8) & 0x1) == 0 {
                     return SimplifiedIns {
                         mnemonic: "cmplwi",
                         args: vec![
@@ -5640,6 +5738,27 @@ impl Ins {
                         ins: self,
                     };
                 }
+                if ((self.code >> 23u8) & 0x7) == 0 && ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpldi",
+                        args: vec![
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::Uimm(Uimm((self.code & 0xffff) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
+                if ((self.code >> 21u8) & 0x1) == 1 {
+                    return SimplifiedIns {
+                        mnemonic: "cmpldi",
+                        args: vec![
+                            Argument::CRField(CRField(((self.code >> 23u8) & 0x7) as _)),
+                            Argument::GPR(GPR(((self.code >> 16u8) & 0x1f) as _)),
+                            Argument::Uimm(Uimm((self.code & 0xffff) as _)),
+                        ],
+                        ins: self,
+                    };
+                }
             }
             Opcode::Creqv => {
                 if ((self.code >> 21u8) & 0x1f) == ((self.code >> 16u8) & 0x1f)
@@ -6093,6 +6212,10 @@ impl Ins {
         ((self.code >> 21u8) & 0x1f) as _
     }
     #[inline(always)]
+    pub fn field_L(&self) -> usize {
+        ((self.code >> 21u8) & 0x1) as _
+    }
+    #[inline(always)]
     pub fn field_OE(&self) -> bool {
         self.bit(21usize)
     }

isa.yaml

@@ -145,6 +145,10 @@ fields:
     arg: OpaqueU
     desc: Bitset for tw and twi
     bits: 6..11
+  - name: L
+    arg: OpaqueU
+    desc: Bitset for cmp, cmpi, cmpl, cmpli
+    bits: 10..11
   - name: xer
   - name: ctr
   - name: lr
@@ -313,7 +317,7 @@ opcodes:
     desc: Compare
     bitmask: 0xfc4007ff
     pattern: 0x7c000000
-    args: [ crfD, rA, rB ]
+    args: [ crfD, L, rA, rB ]
     defs: [ crfD ]
     uses: [ rA, rB ]
 
@@ -321,7 +325,7 @@ opcodes:
     desc: Compare Immediate
     bitmask: 0xfc400000
     pattern: 0x2c000000
-    args: [ crfD, rA, simm ]
+    args: [ crfD, L, rA, simm ]
     defs: [ crfD ]
     uses: [ rA ]
 
@@ -329,7 +333,7 @@ opcodes:
     desc: Compare Logical
     bitmask: 0xfc4007ff
     pattern: 0x7c000040
-    args: [ crfD, rA, rB ]
+    args: [ crfD, L, rA, rB ]
     defs: [ crfD ]
     uses: [ rA, rB ]
 
@@ -337,7 +341,7 @@ opcodes:
     desc: Compare Logical Immediate
     bitmask: 0xfc400000
     pattern: 0x28000000
-    args: [ crfD, rA, uimm ]
+    args: [ crfD, L, rA, uimm ]
     defs: [ crfD ]
     uses: [ rA ]
 
@@ -2005,37 +2009,73 @@ mnemonics:
     args: [ rA, rS, MB ]
     condition: ME == 31 && 32 - MB == SH
 
-  # Compares
+  # Compares Word
-  - name: cmpw
-    opcode: cmp
-    args: [ rA, rB ]
-    condition: crfD == 0
-  - name: cmpw
-    opcode: cmp
-    args: [ crfD, rA, rB ]
-  - name: cmplw
-    opcode: cmpl
-    args: [ rA, rB ]
-    condition: crfD == 0
-  - name: cmplw
-    opcode: cmpl
-    args: [ crfD, rA, rB ]
   - name: cmpwi
     opcode: cmpi
     args: [ rA, simm ]
-    condition: crfD == 0
+    condition: crfD == 0 && L == 0
   - name: cmpwi
     opcode: cmpi
     args: [ crfD, rA, simm ]
-    condition: crfD == 0
+    condition: L == 0
+  - name: cmpw
+    opcode: cmp
+    args: [ rA, rB ]
+    condition: crfD == 0 && L == 0
+  - name: cmpw
+    opcode: cmp
+    args: [ crfD, rA, rB ]
+    condition: L == 0
   - name: cmplwi
     opcode: cmpli
     args: [ rA, uimm ]
-    condition: crfD == 0
+    condition: crfD == 0 && L == 0
   - name: cmplwi
     opcode: cmpli
     args: [ crfD, rA, uimm ]
-    condition: crfD == 0
+    condition: L == 0
+  - name: cmplw
+    opcode: cmpl
+    args: [ rA, rB ]
+    condition: crfD == 0 && L == 0
+  - name: cmplw
+    opcode: cmpl
+    args: [ crfD, rA, rB ]
+    condition: L == 0
+
+  # Compares Doubleword
+  - name: cmpdi
+    opcode: cmpi
+    args: [ rA, simm ]
+    condition: crfD == 0 && L == 1
+  - name: cmpdi
+    opcode: cmpi
+    args: [ crfD, rA, simm ]
+    condition: L == 1
+  - name: cmpd
+    opcode: cmp
+    args: [ rA, rB ]
+    condition: crfD == 0 && L == 1
+  - name: cmpd
+    opcode: cmp
+    args: [ crfD, rA, rB ]
+    condition: L == 1
+  - name: cmpldi
+    opcode: cmpli
+    args: [ rA, uimm ]
+    condition: crfD == 0 && L == 1
+  - name: cmpldi
+    opcode: cmpli
+    args: [ crfD, rA, uimm ]
+    condition: L == 1
+  - name: cmpld
+    opcode: cmpl
+    args: [ rA, rB ]
+    condition: crfD == 0 && L == 1
+  - name: cmpld
+    opcode: cmpl
+    args: [ crfD, rA, rB ]
+    condition: L == 1
 
   # Condition Register Logical
   - name: crset