mirror of https://github.com/PrimeDecomp/prime.git
358 lines
16 KiB
ArmAsm
358 lines
16 KiB
ArmAsm
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.include "macros.inc"
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.section .text, "ax"
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.global OSRegisterResetFunction
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OSRegisterResetFunction:
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/* 8038302C 0037FF8C 80 AD AD 38 */ lwz r5, lbl_805A98F8@sda21(r13)
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/* 80383030 0037FF90 48 00 00 08 */ b lbl_80383038
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lbl_80383034:
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/* 80383034 0037FF94 80 A5 00 08 */ lwz r5, 8(r5)
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lbl_80383038:
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/* 80383038 0037FF98 28 05 00 00 */ cmplwi r5, 0
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/* 8038303C 0037FF9C 41 82 00 14 */ beq lbl_80383050
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/* 80383040 0037FFA0 80 85 00 04 */ lwz r4, 4(r5)
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/* 80383044 0037FFA4 80 03 00 04 */ lwz r0, 4(r3)
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/* 80383048 0037FFA8 7C 04 00 40 */ cmplw r4, r0
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/* 8038304C 0037FFAC 40 81 FF E8 */ ble lbl_80383034
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lbl_80383050:
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/* 80383050 0037FFB0 28 05 00 00 */ cmplwi r5, 0
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/* 80383054 0037FFB4 40 82 00 34 */ bne lbl_80383088
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/* 80383058 0037FFB8 38 AD AD 38 */ addi r5, r13, lbl_805A98F8@sda21
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/* 8038305C 0037FFBC 84 85 00 04 */ lwzu r4, 4(r5)
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/* 80383060 0037FFC0 28 04 00 00 */ cmplwi r4, 0
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/* 80383064 0037FFC4 40 82 00 0C */ bne lbl_80383070
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/* 80383068 0037FFC8 90 6D AD 38 */ stw r3, lbl_805A98F8@sda21(r13)
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/* 8038306C 0037FFCC 48 00 00 08 */ b lbl_80383074
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lbl_80383070:
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/* 80383070 0037FFD0 90 64 00 08 */ stw r3, 8(r4)
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lbl_80383074:
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/* 80383074 0037FFD4 90 83 00 0C */ stw r4, 0xc(r3)
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/* 80383078 0037FFD8 38 00 00 00 */ li r0, 0
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/* 8038307C 0037FFDC 90 03 00 08 */ stw r0, 8(r3)
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/* 80383080 0037FFE0 90 65 00 00 */ stw r3, 0(r5)
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/* 80383084 0037FFE4 4E 80 00 20 */ blr
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lbl_80383088:
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/* 80383088 0037FFE8 90 A3 00 08 */ stw r5, 8(r3)
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/* 8038308C 0037FFEC 80 85 00 0C */ lwz r4, 0xc(r5)
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/* 80383090 0037FFF0 90 65 00 0C */ stw r3, 0xc(r5)
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/* 80383094 0037FFF4 28 04 00 00 */ cmplwi r4, 0
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/* 80383098 0037FFF8 90 83 00 0C */ stw r4, 0xc(r3)
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/* 8038309C 0037FFFC 40 82 00 0C */ bne lbl_803830A8
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/* 803830A0 00380000 90 6D AD 38 */ stw r3, lbl_805A98F8@sda21(r13)
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/* 803830A4 00380004 4E 80 00 20 */ blr
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lbl_803830A8:
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/* 803830A8 00380008 90 64 00 08 */ stw r3, 8(r4)
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/* 803830AC 0038000C 4E 80 00 20 */ blr
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.global __OSCallResetFunctions
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__OSCallResetFunctions:
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/* 803830B0 00380010 7C 08 02 A6 */ mflr r0
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/* 803830B4 00380014 90 01 00 04 */ stw r0, 4(r1)
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/* 803830B8 00380018 94 21 FF E0 */ stwu r1, -0x20(r1)
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/* 803830BC 0038001C 93 E1 00 1C */ stw r31, 0x1c(r1)
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/* 803830C0 00380020 93 C1 00 18 */ stw r30, 0x18(r1)
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/* 803830C4 00380024 3B C0 00 00 */ li r30, 0
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/* 803830C8 00380028 93 A1 00 14 */ stw r29, 0x14(r1)
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/* 803830CC 0038002C 3B A3 00 00 */ addi r29, r3, 0
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/* 803830D0 00380030 83 ED AD 38 */ lwz r31, lbl_805A98F8@sda21(r13)
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/* 803830D4 00380034 48 00 00 24 */ b lbl_803830F8
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lbl_803830D8:
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/* 803830D8 00380038 81 9F 00 00 */ lwz r12, 0(r31)
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/* 803830DC 0038003C 38 7D 00 00 */ addi r3, r29, 0
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/* 803830E0 00380040 7D 88 03 A6 */ mtlr r12
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/* 803830E4 00380044 4E 80 00 21 */ blrl
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/* 803830E8 00380048 7C 60 00 34 */ cntlzw r0, r3
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/* 803830EC 0038004C 83 FF 00 08 */ lwz r31, 8(r31)
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/* 803830F0 00380050 54 00 D9 7E */ srwi r0, r0, 5
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/* 803830F4 00380054 7F DE 03 78 */ or r30, r30, r0
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lbl_803830F8:
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/* 803830F8 00380058 28 1F 00 00 */ cmplwi r31, 0
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/* 803830FC 0038005C 40 82 FF DC */ bne lbl_803830D8
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/* 80383100 00380060 48 00 0D DD */ bl __OSSyncSram
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/* 80383104 00380064 7C 60 00 34 */ cntlzw r0, r3
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/* 80383108 00380068 54 00 D9 7E */ srwi r0, r0, 5
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/* 8038310C 0038006C 7F DE 03 79 */ or. r30, r30, r0
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/* 80383110 00380070 41 82 00 0C */ beq lbl_8038311C
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/* 80383114 00380074 38 60 00 00 */ li r3, 0
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/* 80383118 00380078 48 00 00 08 */ b lbl_80383120
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lbl_8038311C:
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/* 8038311C 0038007C 38 60 00 01 */ li r3, 1
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lbl_80383120:
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/* 80383120 00380080 80 01 00 24 */ lwz r0, 0x24(r1)
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/* 80383124 00380084 83 E1 00 1C */ lwz r31, 0x1c(r1)
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/* 80383128 00380088 83 C1 00 18 */ lwz r30, 0x18(r1)
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/* 8038312C 0038008C 83 A1 00 14 */ lwz r29, 0x14(r1)
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/* 80383130 00380090 38 21 00 20 */ addi r1, r1, 0x20
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/* 80383134 00380094 7C 08 03 A6 */ mtlr r0
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/* 80383138 00380098 4E 80 00 20 */ blr
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.global Reset
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Reset:
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/* 8038313C 0038009C 48 00 00 20 */ b lbl_8038315C
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lbl_80383140:
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/* 80383140 003800A0 7D 10 FA A6 */ mfspr r8, 0x3f0
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/* 80383144 003800A4 61 08 00 08 */ ori r8, r8, 8
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/* 80383148 003800A8 7D 10 FB A6 */ mtspr 0x3f0, r8
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/* 8038314C 003800AC 4C 00 01 2C */ isync
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/* 80383150 003800B0 7C 00 04 AC */ sync 0
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/* 80383154 003800B4 60 00 00 00 */ nop
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/* 80383158 003800B8 48 00 00 08 */ b lbl_80383160
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lbl_8038315C:
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/* 8038315C 003800BC 48 00 00 20 */ b lbl_8038317C
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lbl_80383160:
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/* 80383160 003800C0 7C AC 42 E6 */ mftb r5, 0x10c
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lbl_80383164:
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/* 80383164 003800C4 7C CC 42 E6 */ mftb r6, 0x10c
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/* 80383168 003800C8 7C E5 30 50 */ subf r7, r5, r6
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/* 8038316C 003800CC 28 07 11 24 */ cmplwi r7, 0x1124
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/* 80383170 003800D0 41 80 FF F4 */ blt lbl_80383164
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/* 80383174 003800D4 60 00 00 00 */ nop
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/* 80383178 003800D8 48 00 00 08 */ b lbl_80383180
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lbl_8038317C:
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/* 8038317C 003800DC 48 00 00 20 */ b lbl_8038319C
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lbl_80383180:
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/* 80383180 003800E0 3D 00 CC 00 */ lis r8, 0xCC003000@h
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/* 80383184 003800E4 61 08 30 00 */ ori r8, r8, 0xCC003000@l
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/* 80383188 003800E8 38 80 00 03 */ li r4, 3
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/* 8038318C 003800EC 90 88 00 24 */ stw r4, 0x24(r8)
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/* 80383190 003800F0 90 68 00 24 */ stw r3, 0x24(r8)
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/* 80383194 003800F4 60 00 00 00 */ nop
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/* 80383198 003800F8 48 00 00 08 */ b lbl_803831A0
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lbl_8038319C:
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/* 8038319C 003800FC 48 00 00 0C */ b lbl_803831A8
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lbl_803831A0:
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/* 803831A0 00380100 60 00 00 00 */ nop
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/* 803831A4 00380104 4B FF FF FC */ b lbl_803831A0
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lbl_803831A8:
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/* 803831A8 00380108 4B FF FF 98 */ b lbl_80383140
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.global __OSDoHotReset
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__OSDoHotReset:
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/* 803831AC 0038010C 7C 08 02 A6 */ mflr r0
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/* 803831B0 00380110 90 01 00 04 */ stw r0, 4(r1)
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/* 803831B4 00380114 94 21 FF E8 */ stwu r1, -0x18(r1)
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/* 803831B8 00380118 93 E1 00 14 */ stw r31, 0x14(r1)
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/* 803831BC 0038011C 7C 7F 1B 78 */ mr r31, r3
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/* 803831C0 00380120 4B FF E4 A1 */ bl OSDisableInterrupts
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/* 803831C4 00380124 3C 60 CC 00 */ lis r3, 0xCC002000@ha
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/* 803831C8 00380128 38 63 20 00 */ addi r3, r3, 0xCC002000@l
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/* 803831CC 0038012C 38 00 00 00 */ li r0, 0
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/* 803831D0 00380130 B0 03 00 02 */ sth r0, 2(r3)
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/* 803831D4 00380134 4B FF B9 F5 */ bl ICFlashInvalidate
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/* 803831D8 00380138 57 E3 18 38 */ slwi r3, r31, 3
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/* 803831DC 0038013C 4B FF FF 61 */ bl Reset
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/* 803831E0 00380140 80 01 00 1C */ lwz r0, 0x1c(r1)
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/* 803831E4 00380144 83 E1 00 14 */ lwz r31, 0x14(r1)
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/* 803831E8 00380148 38 21 00 18 */ addi r1, r1, 0x18
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/* 803831EC 0038014C 7C 08 03 A6 */ mtlr r0
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/* 803831F0 00380150 4E 80 00 20 */ blr
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.global OSResetSystem
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OSResetSystem:
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/* 803831F4 00380154 7C 08 02 A6 */ mflr r0
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/* 803831F8 00380158 90 01 00 04 */ stw r0, 4(r1)
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/* 803831FC 0038015C 94 21 FF C0 */ stwu r1, -0x40(r1)
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/* 80383200 00380160 BF 41 00 28 */ stmw r26, 0x28(r1)
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/* 80383204 00380164 7C 7A 1B 78 */ mr r26, r3
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/* 80383208 00380168 7C 9D 23 78 */ mr r29, r4
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/* 8038320C 0038016C 7C BE 2B 78 */ mr r30, r5
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/* 80383210 00380170 48 00 13 D1 */ bl OSDisableScheduler
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/* 80383214 00380174 4B FF B7 85 */ bl __OSStopAudioSystem
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/* 80383218 00380178 2C 1A 00 02 */ cmpwi r26, 2
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/* 8038321C 0038017C 40 82 00 10 */ bne lbl_8038322C
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/* 80383220 00380180 38 60 00 01 */ li r3, 1
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/* 80383224 00380184 48 00 43 E5 */ bl __PADDisableRecalibration
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/* 80383228 00380188 7C 7F 1B 78 */ mr r31, r3
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lbl_8038322C:
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/* 8038322C 0038018C 48 00 00 04 */ b lbl_80383230
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lbl_80383230:
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/* 80383230 00380190 48 00 00 04 */ b lbl_80383234
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lbl_80383234:
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/* 80383234 00380194 83 6D AD 38 */ lwz r27, lbl_805A98F8@sda21(r13)
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/* 80383238 00380198 3B 80 00 00 */ li r28, 0
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/* 8038323C 0038019C 48 00 00 04 */ b lbl_80383240
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lbl_80383240:
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/* 80383240 003801A0 48 00 00 04 */ b lbl_80383244
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lbl_80383244:
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/* 80383244 003801A4 48 00 00 24 */ b lbl_80383268
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lbl_80383248:
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/* 80383248 003801A8 38 60 00 00 */ li r3, 0
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/* 8038324C 003801AC 81 9B 00 00 */ lwz r12, 0(r27)
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/* 80383250 003801B0 7D 88 03 A6 */ mtlr r12
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/* 80383254 003801B4 4E 80 00 21 */ blrl
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/* 80383258 003801B8 7C 60 00 34 */ cntlzw r0, r3
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/* 8038325C 003801BC 83 7B 00 08 */ lwz r27, 8(r27)
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/* 80383260 003801C0 54 00 D9 7E */ srwi r0, r0, 5
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/* 80383264 003801C4 7F 9C 03 78 */ or r28, r28, r0
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lbl_80383268:
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/* 80383268 003801C8 28 1B 00 00 */ cmplwi r27, 0
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/* 8038326C 003801CC 40 82 FF DC */ bne lbl_80383248
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/* 80383270 003801D0 48 00 0C 6D */ bl __OSSyncSram
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/* 80383274 003801D4 7C 60 00 34 */ cntlzw r0, r3
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/* 80383278 003801D8 54 00 D9 7E */ srwi r0, r0, 5
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/* 8038327C 003801DC 7F 9C 03 78 */ or r28, r28, r0
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/* 80383280 003801E0 2C 1C 00 00 */ cmpwi r28, 0
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/* 80383284 003801E4 41 82 00 0C */ beq lbl_80383290
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/* 80383288 003801E8 38 00 00 00 */ li r0, 0
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/* 8038328C 003801EC 48 00 00 08 */ b lbl_80383294
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lbl_80383290:
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/* 80383290 003801F0 38 00 00 01 */ li r0, 1
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lbl_80383294:
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/* 80383294 003801F4 2C 00 00 00 */ cmpwi r0, 0
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/* 80383298 003801F8 41 82 FF 9C */ beq lbl_80383234
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/* 8038329C 003801FC 2C 1A 00 01 */ cmpwi r26, 1
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/* 803832A0 00380200 40 82 00 38 */ bne lbl_803832D8
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/* 803832A4 00380204 2C 1E 00 00 */ cmpwi r30, 0
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/* 803832A8 00380208 41 82 00 30 */ beq lbl_803832D8
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/* 803832AC 0038020C 48 00 08 29 */ bl __OSLockSram
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/* 803832B0 00380210 88 03 00 13 */ lbz r0, 0x13(r3)
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/* 803832B4 00380214 60 00 00 40 */ ori r0, r0, 0x40
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/* 803832B8 00380218 98 03 00 13 */ stb r0, 0x13(r3)
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/* 803832BC 0038021C 38 60 00 01 */ li r3, 1
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/* 803832C0 00380220 48 00 0B D5 */ bl __OSUnlockSram
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/* 803832C4 00380224 48 00 00 04 */ b lbl_803832C8
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lbl_803832C8:
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/* 803832C8 00380228 48 00 00 04 */ b lbl_803832CC
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lbl_803832CC:
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/* 803832CC 0038022C 48 00 0C 11 */ bl __OSSyncSram
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/* 803832D0 00380230 2C 03 00 00 */ cmpwi r3, 0
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/* 803832D4 00380234 41 82 FF F8 */ beq lbl_803832CC
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lbl_803832D8:
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/* 803832D8 00380238 4B FF E3 89 */ bl OSDisableInterrupts
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/* 803832DC 0038023C 83 8D AD 38 */ lwz r28, lbl_805A98F8@sda21(r13)
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/* 803832E0 00380240 3B 60 00 00 */ li r27, 0
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/* 803832E4 00380244 48 00 00 04 */ b lbl_803832E8
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lbl_803832E8:
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/* 803832E8 00380248 48 00 00 04 */ b lbl_803832EC
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lbl_803832EC:
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/* 803832EC 0038024C 48 00 00 24 */ b lbl_80383310
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lbl_803832F0:
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/* 803832F0 00380250 38 60 00 01 */ li r3, 1
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/* 803832F4 00380254 81 9C 00 00 */ lwz r12, 0(r28)
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/* 803832F8 00380258 7D 88 03 A6 */ mtlr r12
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/* 803832FC 0038025C 4E 80 00 21 */ blrl
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/* 80383300 00380260 7C 60 00 34 */ cntlzw r0, r3
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/* 80383304 00380264 83 9C 00 08 */ lwz r28, 8(r28)
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/* 80383308 00380268 54 00 D9 7E */ srwi r0, r0, 5
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/* 8038330C 0038026C 7F 7B 03 78 */ or r27, r27, r0
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lbl_80383310:
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/* 80383310 00380270 28 1C 00 00 */ cmplwi r28, 0
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/* 80383314 00380274 40 82 FF DC */ bne lbl_803832F0
|
||
|
|
/* 80383318 00380278 48 00 0B C5 */ bl __OSSyncSram
|
||
|
|
/* 8038331C 0038027C 4B FF B9 D5 */ bl LCDisable
|
||
|
|
/* 80383320 00380280 2C 1A 00 01 */ cmpwi r26, 1
|
||
|
|
/* 80383324 00380284 40 82 00 28 */ bne lbl_8038334C
|
||
|
|
/* 80383328 00380288 4B FF E3 39 */ bl OSDisableInterrupts
|
||
|
|
/* 8038332C 0038028C 3C 60 CC 00 */ lis r3, 0xCC002000@ha
|
||
|
|
/* 80383330 00380290 38 63 20 00 */ addi r3, r3, 0xCC002000@l
|
||
|
|
/* 80383334 00380294 38 00 00 00 */ li r0, 0
|
||
|
|
/* 80383338 00380298 B0 03 00 02 */ sth r0, 2(r3)
|
||
|
|
/* 8038333C 0038029C 4B FF B8 8D */ bl ICFlashInvalidate
|
||
|
|
/* 80383340 003802A0 57 A3 18 38 */ slwi r3, r29, 3
|
||
|
|
/* 80383344 003802A4 4B FF FD F9 */ bl Reset
|
||
|
|
/* 80383348 003802A8 48 00 00 60 */ b lbl_803833A8
|
||
|
|
lbl_8038334C:
|
||
|
|
/* 8038334C 003802AC 2C 1A 00 00 */ cmpwi r26, 0
|
||
|
|
/* 80383350 003802B0 40 82 00 58 */ bne lbl_803833A8
|
||
|
|
/* 80383354 003802B4 3C 60 80 00 */ lis r3, 0x800000DC@ha
|
||
|
|
/* 80383358 003802B8 80 63 00 DC */ lwz r3, 0x800000DC@l(r3)
|
||
|
|
/* 8038335C 003802BC 48 00 00 04 */ b lbl_80383360
|
||
|
|
lbl_80383360:
|
||
|
|
/* 80383360 003802C0 48 00 00 04 */ b lbl_80383364
|
||
|
|
lbl_80383364:
|
||
|
|
/* 80383364 003802C4 48 00 00 2C */ b lbl_80383390
|
||
|
|
lbl_80383368:
|
||
|
|
/* 80383368 003802C8 A0 03 02 C8 */ lhz r0, 0x2c8(r3)
|
||
|
|
/* 8038336C 003802CC 83 63 02 FC */ lwz r27, 0x2fc(r3)
|
||
|
|
/* 80383370 003802D0 2C 00 00 04 */ cmpwi r0, 4
|
||
|
|
/* 80383374 003802D4 41 82 00 14 */ beq lbl_80383388
|
||
|
|
/* 80383378 003802D8 40 80 00 14 */ bge lbl_8038338C
|
||
|
|
/* 8038337C 003802DC 2C 00 00 01 */ cmpwi r0, 1
|
||
|
|
/* 80383380 003802E0 41 82 00 08 */ beq lbl_80383388
|
||
|
|
/* 80383384 003802E4 48 00 00 08 */ b lbl_8038338C
|
||
|
|
lbl_80383388:
|
||
|
|
/* 80383388 003802E8 48 00 17 D1 */ bl OSCancelThread
|
||
|
|
lbl_8038338C:
|
||
|
|
/* 8038338C 003802EC 7F 63 DB 78 */ mr r3, r27
|
||
|
|
lbl_80383390:
|
||
|
|
/* 80383390 003802F0 28 03 00 00 */ cmplwi r3, 0
|
||
|
|
/* 80383394 003802F4 40 82 FF D4 */ bne lbl_80383368
|
||
|
|
/* 80383398 003802F8 48 00 12 89 */ bl OSEnableScheduler
|
||
|
|
/* 8038339C 003802FC 7F A3 EB 78 */ mr r3, r29
|
||
|
|
/* 803833A0 00380300 7F C4 F3 78 */ mr r4, r30
|
||
|
|
/* 803833A4 00380304 4B FF FA A1 */ bl sub_80382e44
|
||
|
|
lbl_803833A8:
|
||
|
|
/* 803833A8 00380308 3C 60 80 00 */ lis r3, 0x800000DC@ha
|
||
|
|
/* 803833AC 0038030C 80 63 00 DC */ lwz r3, 0x800000DC@l(r3)
|
||
|
|
/* 803833B0 00380310 48 00 00 04 */ b lbl_803833B4
|
||
|
|
lbl_803833B4:
|
||
|
|
/* 803833B4 00380314 48 00 00 04 */ b lbl_803833B8
|
||
|
|
lbl_803833B8:
|
||
|
|
/* 803833B8 00380318 48 00 00 2C */ b lbl_803833E4
|
||
|
|
lbl_803833BC:
|
||
|
|
/* 803833BC 0038031C A0 03 02 C8 */ lhz r0, 0x2c8(r3)
|
||
|
|
/* 803833C0 00380320 83 63 02 FC */ lwz r27, 0x2fc(r3)
|
||
|
|
/* 803833C4 00380324 2C 00 00 04 */ cmpwi r0, 4
|
||
|
|
/* 803833C8 00380328 41 82 00 14 */ beq lbl_803833DC
|
||
|
|
/* 803833CC 0038032C 40 80 00 14 */ bge lbl_803833E0
|
||
|
|
/* 803833D0 00380330 2C 00 00 01 */ cmpwi r0, 1
|
||
|
|
/* 803833D4 00380334 41 82 00 08 */ beq lbl_803833DC
|
||
|
|
/* 803833D8 00380338 48 00 00 08 */ b lbl_803833E0
|
||
|
|
lbl_803833DC:
|
||
|
|
/* 803833DC 0038033C 48 00 17 7D */ bl OSCancelThread
|
||
|
|
lbl_803833E0:
|
||
|
|
/* 803833E0 00380340 7F 63 DB 78 */ mr r3, r27
|
||
|
|
lbl_803833E4:
|
||
|
|
/* 803833E4 00380344 28 03 00 00 */ cmplwi r3, 0
|
||
|
|
/* 803833E8 00380348 40 82 FF D4 */ bne lbl_803833BC
|
||
|
|
/* 803833EC 0038034C 3F A0 80 00 */ lis r29, 0x80000040@ha
|
||
|
|
/* 803833F0 00380350 38 7D 00 40 */ addi r3, r29, 0x80000040@l
|
||
|
|
/* 803833F4 00380354 38 80 00 00 */ li r4, 0
|
||
|
|
/* 803833F8 00380358 38 A0 00 8C */ li r5, 0x8c
|
||
|
|
/* 803833FC 0038035C 4B C7 FF AD */ bl memset
|
||
|
|
/* 80383400 00380360 38 7D 00 D4 */ addi r3, r29, 0xd4
|
||
|
|
/* 80383404 00380364 38 80 00 00 */ li r4, 0
|
||
|
|
/* 80383408 00380368 38 A0 00 14 */ li r5, 0x14
|
||
|
|
/* 8038340C 0038036C 4B C7 FF 9D */ bl memset
|
||
|
|
/* 80383410 00380370 38 7D 00 F4 */ addi r3, r29, 0xf4
|
||
|
|
/* 80383414 00380374 38 80 00 00 */ li r4, 0
|
||
|
|
/* 80383418 00380378 38 A0 00 04 */ li r5, 4
|
||
|
|
/* 8038341C 0038037C 4B C7 FF 8D */ bl memset
|
||
|
|
/* 80383420 00380380 38 7D 30 00 */ addi r3, r29, 0x3000
|
||
|
|
/* 80383424 00380384 38 80 00 00 */ li r4, 0
|
||
|
|
/* 80383428 00380388 38 A0 00 C0 */ li r5, 0xc0
|
||
|
|
/* 8038342C 0038038C 4B C7 FF 7D */ bl memset
|
||
|
|
/* 80383430 00380390 38 7D 30 C8 */ addi r3, r29, 0x30c8
|
||
|
|
/* 80383434 00380394 38 80 00 00 */ li r4, 0
|
||
|
|
/* 80383438 00380398 38 A0 00 0C */ li r5, 0xc
|
||
|
|
/* 8038343C 0038039C 4B C7 FF 6D */ bl memset
|
||
|
|
/* 80383440 003803A0 38 7D 30 E2 */ addi r3, r29, 0x30e2
|
||
|
|
/* 80383444 003803A4 38 80 00 00 */ li r4, 0
|
||
|
|
/* 80383448 003803A8 38 A0 00 01 */ li r5, 1
|
||
|
|
/* 8038344C 003803AC 4B C7 FF 5D */ bl memset
|
||
|
|
/* 80383450 003803B0 7F E3 FB 78 */ mr r3, r31
|
||
|
|
/* 80383454 003803B4 48 00 41 B5 */ bl __PADDisableRecalibration
|
||
|
|
/* 80383458 003803B8 BB 41 00 28 */ lmw r26, 0x28(r1)
|
||
|
|
/* 8038345C 003803BC 80 01 00 44 */ lwz r0, 0x44(r1)
|
||
|
|
/* 80383460 003803C0 38 21 00 40 */ addi r1, r1, 0x40
|
||
|
|
/* 80383464 003803C4 7C 08 03 A6 */ mtlr r0
|
||
|
|
/* 80383468 003803C8 4E 80 00 20 */ blr
|
||
|
|
|
||
|
|
.global OSGetResetCode
|
||
|
|
OSGetResetCode:
|
||
|
|
/* 8038346C 003803CC 3C 60 80 00 */ lis r3, 0x800030E2@ha
|
||
|
|
/* 80383470 003803D0 88 03 30 E2 */ lbz r0, 0x800030E2@l(r3)
|
||
|
|
/* 80383474 003803D4 28 00 00 00 */ cmplwi r0, 0
|
||
|
|
/* 80383478 003803D8 41 82 00 0C */ beq lbl_80383484
|
||
|
|
/* 8038347C 003803DC 3C 60 80 00 */ lis r3, 0x8000
|
||
|
|
/* 80383480 003803E0 48 00 00 18 */ b lbl_80383498
|
||
|
|
lbl_80383484:
|
||
|
|
/* 80383484 003803E4 3C 60 CC 00 */ lis r3, 0xCC003000@ha
|
||
|
|
/* 80383488 003803E8 38 63 30 00 */ addi r3, r3, 0xCC003000@l
|
||
|
|
/* 8038348C 003803EC 80 03 00 24 */ lwz r0, 0x24(r3)
|
||
|
|
/* 80383490 003803F0 54 00 00 38 */ rlwinm r0, r0, 0, 0, 0x1c
|
||
|
|
/* 80383494 003803F4 54 03 E8 FE */ srwi r3, r0, 3
|
||
|
|
lbl_80383498:
|
||
|
|
/* 80383498 003803F8 4E 80 00 20 */ blr
|