2022-04-02 21:03:04 +00:00
|
|
|
.include "macros.inc"
|
|
|
|
|
|
2022-04-08 05:17:01 +00:00
|
|
|
.section .bss
|
2022-08-10 23:08:58 +00:00
|
|
|
.balign 8
|
2022-04-30 08:32:00 +00:00
|
|
|
Scb:
|
2022-04-08 05:17:01 +00:00
|
|
|
.skip 0x58
|
2022-07-14 05:48:03 +00:00
|
|
|
|
2022-04-02 21:03:04 +00:00
|
|
|
.section .text, "ax"
|
|
|
|
|
|
|
|
|
|
.global WriteSramCallback
|
|
|
|
|
WriteSramCallback:
|
|
|
|
|
/* 80383828 00380788 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038382C 0038078C 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383830 00380790 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383834 00380794 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
|
|
|
/* 80383838 00380798 93 E1 00 14 */ stw r31, 0x14(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038383C 0038079C 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383840 003807A0 93 C1 00 10 */ stw r30, 0x10(r1)
|
|
|
|
|
/* 80383844 003807A4 3B DF 00 40 */ addi r30, r31, 0x40
|
|
|
|
|
/* 80383848 003807A8 80 9F 00 40 */ lwz r4, 0x40(r31)
|
|
|
|
|
/* 8038384C 003807AC 7C 7F 22 14 */ add r3, r31, r4
|
|
|
|
|
/* 80383850 003807B0 20 A4 00 40 */ subfic r5, r4, 0x40
|
|
|
|
|
/* 80383854 003807B4 48 00 00 35 */ bl WriteSram
|
|
|
|
|
/* 80383858 003807B8 90 7F 00 4C */ stw r3, 0x4c(r31)
|
|
|
|
|
/* 8038385C 003807BC 80 1F 00 4C */ lwz r0, 0x4c(r31)
|
|
|
|
|
/* 80383860 003807C0 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80383864 003807C4 41 82 00 0C */ beq lbl_80383870
|
|
|
|
|
/* 80383868 003807C8 38 00 00 40 */ li r0, 0x40
|
|
|
|
|
/* 8038386C 003807CC 90 1E 00 00 */ stw r0, 0(r30)
|
|
|
|
|
lbl_80383870:
|
|
|
|
|
/* 80383870 003807D0 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
|
|
|
/* 80383874 003807D4 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
|
|
|
/* 80383878 003807D8 83 C1 00 10 */ lwz r30, 0x10(r1)
|
|
|
|
|
/* 8038387C 003807DC 38 21 00 18 */ addi r1, r1, 0x18
|
|
|
|
|
/* 80383880 003807E0 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383884 003807E4 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global WriteSram
|
|
|
|
|
WriteSram:
|
|
|
|
|
/* 80383888 003807E8 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 8038388C 003807EC 3C C0 80 38 */ lis r6, WriteSramCallback@ha
|
|
|
|
|
/* 80383890 003807F0 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383894 003807F4 38 06 38 28 */ addi r0, r6, WriteSramCallback@l
|
|
|
|
|
/* 80383898 003807F8 94 21 FF D8 */ stwu r1, -0x28(r1)
|
|
|
|
|
/* 8038389C 003807FC 93 E1 00 24 */ stw r31, 0x24(r1)
|
|
|
|
|
/* 803838A0 00380800 3B E4 00 00 */ addi r31, r4, 0
|
|
|
|
|
/* 803838A4 00380804 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 803838A8 00380808 93 C1 00 20 */ stw r30, 0x20(r1)
|
|
|
|
|
/* 803838AC 0038080C 3B C5 00 00 */ addi r30, r5, 0
|
|
|
|
|
/* 803838B0 00380810 7C 05 03 78 */ mr r5, r0
|
|
|
|
|
/* 803838B4 00380814 93 A1 00 1C */ stw r29, 0x1c(r1)
|
|
|
|
|
/* 803838B8 00380818 3B A3 00 00 */ addi r29, r3, 0
|
|
|
|
|
/* 803838BC 0038081C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803838C0 00380820 48 03 DA A5 */ bl EXILock
|
|
|
|
|
/* 803838C4 00380824 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 803838C8 00380828 40 82 00 0C */ bne lbl_803838D4
|
|
|
|
|
/* 803838CC 0038082C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803838D0 00380830 48 00 00 B4 */ b lbl_80383984
|
|
|
|
|
lbl_803838D4:
|
|
|
|
|
/* 803838D4 00380834 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803838D8 00380838 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 803838DC 0038083C 38 A0 00 03 */ li r5, 3
|
|
|
|
|
/* 803838E0 00380840 48 03 D3 7D */ bl EXISelect
|
|
|
|
|
/* 803838E4 00380844 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 803838E8 00380848 40 82 00 14 */ bne lbl_803838FC
|
|
|
|
|
/* 803838EC 0038084C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803838F0 00380850 48 03 DB 69 */ bl EXIUnlock
|
|
|
|
|
/* 803838F4 00380854 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803838F8 00380858 48 00 00 8C */ b lbl_80383984
|
|
|
|
|
lbl_803838FC:
|
|
|
|
|
/* 803838FC 0038085C 57 FF 30 32 */ slwi r31, r31, 6
|
|
|
|
|
/* 80383900 00380860 38 1F 01 00 */ addi r0, r31, 0x100
|
|
|
|
|
/* 80383904 00380864 64 00 A0 00 */ oris r0, r0, 0xa000
|
|
|
|
|
/* 80383908 00380868 90 01 00 14 */ stw r0, 0x14(r1)
|
|
|
|
|
/* 8038390C 0038086C 38 81 00 14 */ addi r4, r1, 0x14
|
|
|
|
|
/* 80383910 00380870 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383914 00380874 38 A0 00 04 */ li r5, 4
|
|
|
|
|
/* 80383918 00380878 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 8038391C 0038087C 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383920 00380880 48 03 C7 E9 */ bl EXIImm
|
|
|
|
|
/* 80383924 00380884 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383928 00380888 54 1F D9 7E */ srwi r31, r0, 5
|
|
|
|
|
/* 8038392C 0038088C 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383930 00380890 48 03 CB C1 */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383934 00380894 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383938 00380898 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 8038393C 0038089C 38 9D 00 00 */ addi r4, r29, 0
|
|
|
|
|
/* 80383940 003808A0 38 BE 00 00 */ addi r5, r30, 0
|
|
|
|
|
/* 80383944 003808A4 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383948 003808A8 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 8038394C 003808AC 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 80383950 003808B0 48 03 CA 15 */ bl EXIImmEx
|
|
|
|
|
/* 80383954 003808B4 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383958 003808B8 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 8038395C 003808BC 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383960 003808C0 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383964 003808C4 48 03 D4 25 */ bl EXIDeselect
|
|
|
|
|
/* 80383968 003808C8 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 8038396C 003808CC 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383970 003808D0 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383974 003808D4 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383978 003808D8 48 03 DA E1 */ bl EXIUnlock
|
|
|
|
|
/* 8038397C 003808DC 7F E0 00 34 */ cntlzw r0, r31
|
|
|
|
|
/* 80383980 003808E0 54 03 D9 7E */ srwi r3, r0, 5
|
|
|
|
|
lbl_80383984:
|
|
|
|
|
/* 80383984 003808E4 80 01 00 2C */ lwz r0, 0x2c(r1)
|
|
|
|
|
/* 80383988 003808E8 83 E1 00 24 */ lwz r31, 0x24(r1)
|
|
|
|
|
/* 8038398C 003808EC 83 C1 00 20 */ lwz r30, 0x20(r1)
|
|
|
|
|
/* 80383990 003808F0 83 A1 00 1C */ lwz r29, 0x1c(r1)
|
|
|
|
|
/* 80383994 003808F4 38 21 00 28 */ addi r1, r1, 0x28
|
|
|
|
|
/* 80383998 003808F8 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8038399C 003808FC 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
2022-04-30 08:32:00 +00:00
|
|
|
.global __OSInitSram
|
|
|
|
|
__OSInitSram:
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803839A0 00380900 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803839A4 00380904 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803839A8 00380908 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 803839AC 0038090C 38 80 00 40 */ li r4, 0x40
|
|
|
|
|
/* 803839B0 00380910 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
|
|
|
/* 803839B4 00380914 93 E1 00 14 */ stw r31, 0x14(r1)
|
|
|
|
|
/* 803839B8 00380918 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 803839BC 0038091C 93 C1 00 10 */ stw r30, 0x10(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803839C0 00380920 3B C3 15 A0 */ addi r30, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803839C4 00380924 38 7E 00 00 */ addi r3, r30, 0
|
|
|
|
|
/* 803839C8 00380928 93 FE 00 44 */ stw r31, 0x44(r30)
|
|
|
|
|
/* 803839CC 0038092C 93 FE 00 48 */ stw r31, 0x48(r30)
|
|
|
|
|
/* 803839D0 00380930 4B FF B0 B5 */ bl DCInvalidateRange
|
|
|
|
|
/* 803839D4 00380934 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803839D8 00380938 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 803839DC 0038093C 38 A0 00 00 */ li r5, 0
|
|
|
|
|
/* 803839E0 00380940 48 03 D9 85 */ bl EXILock
|
|
|
|
|
/* 803839E4 00380944 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 803839E8 00380948 40 82 00 08 */ bne lbl_803839F0
|
|
|
|
|
/* 803839EC 0038094C 48 00 00 C4 */ b lbl_80383AB0
|
|
|
|
|
lbl_803839F0:
|
|
|
|
|
/* 803839F0 00380950 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803839F4 00380954 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 803839F8 00380958 38 A0 00 03 */ li r5, 3
|
|
|
|
|
/* 803839FC 0038095C 48 03 D2 61 */ bl EXISelect
|
|
|
|
|
/* 80383A00 00380960 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383A04 00380964 40 82 00 10 */ bne lbl_80383A14
|
|
|
|
|
/* 80383A08 00380968 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383A0C 0038096C 48 03 DA 4D */ bl EXIUnlock
|
|
|
|
|
/* 80383A10 00380970 48 00 00 A0 */ b lbl_80383AB0
|
|
|
|
|
lbl_80383A14:
|
|
|
|
|
/* 80383A14 00380974 3C 60 20 00 */ lis r3, 0x20000100@ha
|
|
|
|
|
/* 80383A18 00380978 38 03 01 00 */ addi r0, r3, 0x20000100@l
|
|
|
|
|
/* 80383A1C 0038097C 90 01 00 08 */ stw r0, 8(r1)
|
|
|
|
|
/* 80383A20 00380980 38 81 00 08 */ addi r4, r1, 8
|
|
|
|
|
/* 80383A24 00380984 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383A28 00380988 38 A0 00 04 */ li r5, 4
|
|
|
|
|
/* 80383A2C 0038098C 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 80383A30 00380990 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383A34 00380994 48 03 C6 D5 */ bl EXIImm
|
|
|
|
|
/* 80383A38 00380998 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383A3C 0038099C 54 1F D9 7E */ srwi r31, r0, 5
|
|
|
|
|
/* 80383A40 003809A0 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383A44 003809A4 48 03 CA AD */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383A48 003809A8 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383A4C 003809AC 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383A50 003809B0 38 9E 00 00 */ addi r4, r30, 0
|
|
|
|
|
/* 80383A54 003809B4 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383A58 003809B8 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383A5C 003809BC 38 A0 00 40 */ li r5, 0x40
|
|
|
|
|
/* 80383A60 003809C0 38 C0 00 00 */ li r6, 0
|
|
|
|
|
/* 80383A64 003809C4 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383A68 003809C8 48 03 C9 9D */ bl EXIDma
|
|
|
|
|
/* 80383A6C 003809CC 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383A70 003809D0 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383A74 003809D4 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383A78 003809D8 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383A7C 003809DC 48 03 CA 75 */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383A80 003809E0 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383A84 003809E4 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383A88 003809E8 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383A8C 003809EC 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383A90 003809F0 48 03 D2 F9 */ bl EXIDeselect
|
|
|
|
|
/* 80383A94 003809F4 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383A98 003809F8 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383A9C 003809FC 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383AA0 00380A00 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383AA4 00380A04 48 03 D9 B5 */ bl EXIUnlock
|
|
|
|
|
/* 80383AA8 00380A08 7F E0 00 34 */ cntlzw r0, r31
|
|
|
|
|
/* 80383AAC 00380A0C 54 1F D9 7E */ srwi r31, r0, 5
|
|
|
|
|
lbl_80383AB0:
|
|
|
|
|
/* 80383AB0 00380A10 93 FE 00 4C */ stw r31, 0x4c(r30)
|
|
|
|
|
/* 80383AB4 00380A14 38 00 00 40 */ li r0, 0x40
|
|
|
|
|
/* 80383AB8 00380A18 90 1E 00 40 */ stw r0, 0x40(r30)
|
|
|
|
|
/* 80383ABC 00380A1C 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
|
|
|
/* 80383AC0 00380A20 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
|
|
|
/* 80383AC4 00380A24 83 C1 00 10 */ lwz r30, 0x10(r1)
|
|
|
|
|
/* 80383AC8 00380A28 38 21 00 18 */ addi r1, r1, 0x18
|
|
|
|
|
/* 80383ACC 00380A2C 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383AD0 00380A30 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global __OSLockSram
|
|
|
|
|
__OSLockSram:
|
|
|
|
|
/* 80383AD4 00380A34 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383AD8 00380A38 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383ADC 00380A3C 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383AE0 00380A40 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
|
|
|
/* 80383AE4 00380A44 93 E1 00 0C */ stw r31, 0xc(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383AE8 00380A48 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383AEC 00380A4C 4B FF DB 75 */ bl OSDisableInterrupts
|
|
|
|
|
/* 80383AF0 00380A50 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80383AF4 00380A54 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 80383AF8 00380A58 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80383AFC 00380A5C 41 82 00 10 */ beq lbl_80383B0C
|
|
|
|
|
/* 80383B00 00380A60 4B FF DB 89 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80383B04 00380A64 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 80383B08 00380A68 48 00 00 10 */ b lbl_80383B18
|
|
|
|
|
lbl_80383B0C:
|
|
|
|
|
/* 80383B0C 00380A6C 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 80383B10 00380A70 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80383B14 00380A74 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80383B18:
|
|
|
|
|
/* 80383B18 00380A78 7F E3 FB 78 */ mr r3, r31
|
|
|
|
|
/* 80383B1C 00380A7C 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
|
|
|
/* 80383B20 00380A80 83 E1 00 0C */ lwz r31, 0xc(r1)
|
|
|
|
|
/* 80383B24 00380A84 38 21 00 10 */ addi r1, r1, 0x10
|
|
|
|
|
/* 80383B28 00380A88 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383B2C 00380A8C 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global __OSLockSramEx
|
|
|
|
|
__OSLockSramEx:
|
|
|
|
|
/* 80383B30 00380A90 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383B34 00380A94 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383B38 00380A98 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383B3C 00380A9C 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
|
|
|
/* 80383B40 00380AA0 93 E1 00 0C */ stw r31, 0xc(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383B44 00380AA4 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383B48 00380AA8 4B FF DB 19 */ bl OSDisableInterrupts
|
|
|
|
|
/* 80383B4C 00380AAC 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80383B50 00380AB0 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 80383B54 00380AB4 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80383B58 00380AB8 41 82 00 10 */ beq lbl_80383B68
|
|
|
|
|
/* 80383B5C 00380ABC 4B FF DB 2D */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80383B60 00380AC0 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383B64 00380AC4 48 00 00 14 */ b lbl_80383B78
|
|
|
|
|
lbl_80383B68:
|
|
|
|
|
/* 80383B68 00380AC8 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 80383B6C 00380ACC 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80383B70 00380AD0 38 7F 00 14 */ addi r3, r31, 0x14
|
|
|
|
|
/* 80383B74 00380AD4 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80383B78:
|
|
|
|
|
/* 80383B78 00380AD8 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
|
|
|
/* 80383B7C 00380ADC 83 E1 00 0C */ lwz r31, 0xc(r1)
|
|
|
|
|
/* 80383B80 00380AE0 38 21 00 10 */ addi r1, r1, 0x10
|
|
|
|
|
/* 80383B84 00380AE4 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383B88 00380AE8 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
2022-04-30 08:32:00 +00:00
|
|
|
.global UnlockSram
|
|
|
|
|
UnlockSram:
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383B8C 00380AEC 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 80383B90 00380AF0 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383B94 00380AF4 90 01 00 04 */ stw r0, 4(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383B98 00380AF8 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383B9C 00380AFC 94 21 FF D0 */ stwu r1, -0x30(r1)
|
|
|
|
|
/* 80383BA0 00380B00 BF 61 00 1C */ stmw r27, 0x1c(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383BA4 00380B04 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383BA8 00380B08 41 82 02 C4 */ beq lbl_80383E6C
|
|
|
|
|
/* 80383BAC 00380B0C 28 04 00 00 */ cmplwi r4, 0
|
|
|
|
|
/* 80383BB0 00380B10 40 82 01 B0 */ bne lbl_80383D60
|
|
|
|
|
/* 80383BB4 00380B14 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
|
|
|
/* 80383BB8 00380B18 54 60 07 BE */ clrlwi r0, r3, 0x1e
|
|
|
|
|
/* 80383BBC 00380B1C 28 00 00 02 */ cmplwi r0, 2
|
|
|
|
|
/* 80383BC0 00380B20 40 81 00 0C */ ble lbl_80383BCC
|
|
|
|
|
/* 80383BC4 00380B24 54 60 00 3A */ rlwinm r0, r3, 0, 0, 0x1d
|
|
|
|
|
/* 80383BC8 00380B28 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
|
|
|
lbl_80383BCC:
|
|
|
|
|
/* 80383BCC 00380B2C 38 00 00 00 */ li r0, 0
|
|
|
|
|
/* 80383BD0 00380B30 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383BD4 00380B34 38 BF 00 14 */ addi r5, r31, 0x14
|
|
|
|
|
/* 80383BD8 00380B38 38 DF 00 0C */ addi r6, r31, 0xc
|
|
|
|
|
/* 80383BDC 00380B3C 38 65 00 01 */ addi r3, r5, 1
|
|
|
|
|
/* 80383BE0 00380B40 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383BE4 00380B44 7C 66 18 50 */ subf r3, r6, r3
|
|
|
|
|
/* 80383BE8 00380B48 7C 06 28 40 */ cmplw r6, r5
|
|
|
|
|
/* 80383BEC 00380B4C 54 63 F8 7E */ srwi r3, r3, 1
|
|
|
|
|
/* 80383BF0 00380B50 40 80 01 70 */ bge lbl_80383D60
|
|
|
|
|
/* 80383BF4 00380B54 54 60 E8 FF */ rlwinm. r0, r3, 0x1d, 3, 0x1f
|
|
|
|
|
/* 80383BF8 00380B58 7C 09 03 A6 */ mtctr r0
|
|
|
|
|
/* 80383BFC 00380B5C 41 82 01 34 */ beq lbl_80383D30
|
|
|
|
|
lbl_80383C00:
|
|
|
|
|
/* 80383C00 00380B60 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383C04 00380B64 A0 06 00 00 */ lhz r0, 0(r6)
|
|
|
|
|
/* 80383C08 00380B68 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C0C 00380B6C B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383C10 00380B70 A0 06 00 00 */ lhz r0, 0(r6)
|
|
|
|
|
/* 80383C14 00380B74 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383C18 00380B78 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383C1C 00380B7C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C20 00380B80 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383C24 00380B84 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383C28 00380B88 A0 06 00 02 */ lhz r0, 2(r6)
|
|
|
|
|
/* 80383C2C 00380B8C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C30 00380B90 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383C34 00380B94 A0 06 00 02 */ lhz r0, 2(r6)
|
|
|
|
|
/* 80383C38 00380B98 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383C3C 00380B9C 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383C40 00380BA0 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C44 00380BA4 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383C48 00380BA8 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383C4C 00380BAC A0 06 00 04 */ lhz r0, 4(r6)
|
|
|
|
|
/* 80383C50 00380BB0 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C54 00380BB4 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383C58 00380BB8 A0 06 00 04 */ lhz r0, 4(r6)
|
|
|
|
|
/* 80383C5C 00380BBC A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383C60 00380BC0 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383C64 00380BC4 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C68 00380BC8 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383C6C 00380BCC A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383C70 00380BD0 A0 06 00 06 */ lhz r0, 6(r6)
|
|
|
|
|
/* 80383C74 00380BD4 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C78 00380BD8 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383C7C 00380BDC A0 06 00 06 */ lhz r0, 6(r6)
|
|
|
|
|
/* 80383C80 00380BE0 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383C84 00380BE4 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383C88 00380BE8 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C8C 00380BEC B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383C90 00380BF0 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383C94 00380BF4 A0 06 00 08 */ lhz r0, 8(r6)
|
|
|
|
|
/* 80383C98 00380BF8 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383C9C 00380BFC B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383CA0 00380C00 A0 06 00 08 */ lhz r0, 8(r6)
|
|
|
|
|
/* 80383CA4 00380C04 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383CA8 00380C08 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383CAC 00380C0C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383CB0 00380C10 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383CB4 00380C14 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383CB8 00380C18 A0 06 00 0A */ lhz r0, 0xa(r6)
|
|
|
|
|
/* 80383CBC 00380C1C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383CC0 00380C20 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383CC4 00380C24 A0 06 00 0A */ lhz r0, 0xa(r6)
|
|
|
|
|
/* 80383CC8 00380C28 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383CCC 00380C2C 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383CD0 00380C30 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383CD4 00380C34 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383CD8 00380C38 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383CDC 00380C3C A0 06 00 0C */ lhz r0, 0xc(r6)
|
|
|
|
|
/* 80383CE0 00380C40 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383CE4 00380C44 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383CE8 00380C48 A0 06 00 0C */ lhz r0, 0xc(r6)
|
|
|
|
|
/* 80383CEC 00380C4C A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383CF0 00380C50 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383CF4 00380C54 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383CF8 00380C58 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383CFC 00380C5C A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383D00 00380C60 A0 06 00 0E */ lhz r0, 0xe(r6)
|
|
|
|
|
/* 80383D04 00380C64 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383D08 00380C68 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383D0C 00380C6C A0 06 00 0E */ lhz r0, 0xe(r6)
|
|
|
|
|
/* 80383D10 00380C70 38 C6 00 10 */ addi r6, r6, 0x10
|
|
|
|
|
/* 80383D14 00380C74 A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383D18 00380C78 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383D1C 00380C7C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383D20 00380C80 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383D24 00380C84 42 00 FE DC */ bdnz lbl_80383C00
|
|
|
|
|
/* 80383D28 00380C88 70 63 00 07 */ andi. r3, r3, 7
|
|
|
|
|
/* 80383D2C 00380C8C 41 82 00 34 */ beq lbl_80383D60
|
|
|
|
|
lbl_80383D30:
|
|
|
|
|
/* 80383D30 00380C90 7C 69 03 A6 */ mtctr r3
|
|
|
|
|
lbl_80383D34:
|
|
|
|
|
/* 80383D34 00380C94 A0 BF 00 00 */ lhz r5, 0(r31)
|
|
|
|
|
/* 80383D38 00380C98 A0 06 00 00 */ lhz r0, 0(r6)
|
|
|
|
|
/* 80383D3C 00380C9C 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383D40 00380CA0 B0 1F 00 00 */ sth r0, 0(r31)
|
|
|
|
|
/* 80383D44 00380CA4 A0 06 00 00 */ lhz r0, 0(r6)
|
|
|
|
|
/* 80383D48 00380CA8 38 C6 00 02 */ addi r6, r6, 2
|
|
|
|
|
/* 80383D4C 00380CAC A0 BF 00 02 */ lhz r5, 2(r31)
|
|
|
|
|
/* 80383D50 00380CB0 7C 00 00 F8 */ nor r0, r0, r0
|
|
|
|
|
/* 80383D54 00380CB4 7C 05 02 14 */ add r0, r5, r0
|
|
|
|
|
/* 80383D58 00380CB8 B0 1F 00 02 */ sth r0, 2(r31)
|
|
|
|
|
/* 80383D5C 00380CBC 42 00 FF D8 */ bdnz lbl_80383D34
|
|
|
|
|
lbl_80383D60:
|
|
|
|
|
/* 80383D60 00380CC0 3B DF 00 40 */ addi r30, r31, 0x40
|
|
|
|
|
/* 80383D64 00380CC4 80 1F 00 40 */ lwz r0, 0x40(r31)
|
|
|
|
|
/* 80383D68 00380CC8 7C 04 00 40 */ cmplw r4, r0
|
|
|
|
|
/* 80383D6C 00380CCC 40 80 00 08 */ bge lbl_80383D74
|
|
|
|
|
/* 80383D70 00380CD0 90 9E 00 00 */ stw r4, 0(r30)
|
|
|
|
|
lbl_80383D74:
|
|
|
|
|
/* 80383D74 00380CD4 83 BE 00 00 */ lwz r29, 0(r30)
|
|
|
|
|
/* 80383D78 00380CD8 3C 60 80 38 */ lis r3, WriteSramCallback@ha
|
|
|
|
|
/* 80383D7C 00380CDC 38 A3 38 28 */ addi r5, r3, WriteSramCallback@l
|
|
|
|
|
/* 80383D80 00380CE0 23 7D 00 40 */ subfic r27, r29, 0x40
|
|
|
|
|
/* 80383D84 00380CE4 7F 9F EA 14 */ add r28, r31, r29
|
|
|
|
|
/* 80383D88 00380CE8 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383D8C 00380CEC 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 80383D90 00380CF0 48 03 D5 D5 */ bl EXILock
|
|
|
|
|
/* 80383D94 00380CF4 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383D98 00380CF8 40 82 00 0C */ bne lbl_80383DA4
|
|
|
|
|
/* 80383D9C 00380CFC 38 00 00 00 */ li r0, 0
|
|
|
|
|
/* 80383DA0 00380D00 48 00 00 B4 */ b lbl_80383E54
|
|
|
|
|
lbl_80383DA4:
|
|
|
|
|
/* 80383DA4 00380D04 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383DA8 00380D08 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 80383DAC 00380D0C 38 A0 00 03 */ li r5, 3
|
|
|
|
|
/* 80383DB0 00380D10 48 03 CE AD */ bl EXISelect
|
|
|
|
|
/* 80383DB4 00380D14 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383DB8 00380D18 40 82 00 14 */ bne lbl_80383DCC
|
|
|
|
|
/* 80383DBC 00380D1C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383DC0 00380D20 48 03 D6 99 */ bl EXIUnlock
|
|
|
|
|
/* 80383DC4 00380D24 38 00 00 00 */ li r0, 0
|
|
|
|
|
/* 80383DC8 00380D28 48 00 00 8C */ b lbl_80383E54
|
|
|
|
|
lbl_80383DCC:
|
|
|
|
|
/* 80383DCC 00380D2C 57 A3 30 32 */ slwi r3, r29, 6
|
|
|
|
|
/* 80383DD0 00380D30 38 03 01 00 */ addi r0, r3, 0x100
|
|
|
|
|
/* 80383DD4 00380D34 64 00 A0 00 */ oris r0, r0, 0xa000
|
|
|
|
|
/* 80383DD8 00380D38 90 01 00 10 */ stw r0, 0x10(r1)
|
|
|
|
|
/* 80383DDC 00380D3C 38 81 00 10 */ addi r4, r1, 0x10
|
|
|
|
|
/* 80383DE0 00380D40 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383DE4 00380D44 38 A0 00 04 */ li r5, 4
|
|
|
|
|
/* 80383DE8 00380D48 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 80383DEC 00380D4C 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383DF0 00380D50 48 03 C3 19 */ bl EXIImm
|
|
|
|
|
/* 80383DF4 00380D54 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383DF8 00380D58 54 1D D9 7E */ srwi r29, r0, 5
|
|
|
|
|
/* 80383DFC 00380D5C 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383E00 00380D60 48 03 C6 F1 */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383E04 00380D64 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383E08 00380D68 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383E0C 00380D6C 38 9C 00 00 */ addi r4, r28, 0
|
|
|
|
|
/* 80383E10 00380D70 38 BB 00 00 */ addi r5, r27, 0
|
|
|
|
|
/* 80383E14 00380D74 7F BD 03 78 */ or r29, r29, r0
|
|
|
|
|
/* 80383E18 00380D78 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383E1C 00380D7C 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 80383E20 00380D80 48 03 C5 45 */ bl EXIImmEx
|
|
|
|
|
/* 80383E24 00380D84 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383E28 00380D88 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383E2C 00380D8C 7F BD 03 78 */ or r29, r29, r0
|
|
|
|
|
/* 80383E30 00380D90 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383E34 00380D94 48 03 CF 55 */ bl EXIDeselect
|
|
|
|
|
/* 80383E38 00380D98 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383E3C 00380D9C 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383E40 00380DA0 7F BD 03 78 */ or r29, r29, r0
|
|
|
|
|
/* 80383E44 00380DA4 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383E48 00380DA8 48 03 D6 11 */ bl EXIUnlock
|
|
|
|
|
/* 80383E4C 00380DAC 7F A0 00 34 */ cntlzw r0, r29
|
|
|
|
|
/* 80383E50 00380DB0 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
lbl_80383E54:
|
|
|
|
|
/* 80383E54 00380DB4 90 1F 00 4C */ stw r0, 0x4c(r31)
|
|
|
|
|
/* 80383E58 00380DB8 80 1F 00 4C */ lwz r0, 0x4c(r31)
|
|
|
|
|
/* 80383E5C 00380DBC 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80383E60 00380DC0 41 82 00 0C */ beq lbl_80383E6C
|
|
|
|
|
/* 80383E64 00380DC4 38 00 00 40 */ li r0, 0x40
|
|
|
|
|
/* 80383E68 00380DC8 90 1E 00 00 */ stw r0, 0(r30)
|
|
|
|
|
lbl_80383E6C:
|
|
|
|
|
/* 80383E6C 00380DCC 38 00 00 00 */ li r0, 0
|
|
|
|
|
/* 80383E70 00380DD0 90 1F 00 48 */ stw r0, 0x48(r31)
|
|
|
|
|
/* 80383E74 00380DD4 80 7F 00 44 */ lwz r3, 0x44(r31)
|
|
|
|
|
/* 80383E78 00380DD8 4B FF D8 11 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80383E7C 00380DDC 80 7F 00 4C */ lwz r3, 0x4c(r31)
|
|
|
|
|
/* 80383E80 00380DE0 BB 61 00 1C */ lmw r27, 0x1c(r1)
|
|
|
|
|
/* 80383E84 00380DE4 80 01 00 34 */ lwz r0, 0x34(r1)
|
|
|
|
|
/* 80383E88 00380DE8 38 21 00 30 */ addi r1, r1, 0x30
|
|
|
|
|
/* 80383E8C 00380DEC 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383E90 00380DF0 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global __OSUnlockSram
|
|
|
|
|
__OSUnlockSram:
|
|
|
|
|
/* 80383E94 00380DF4 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 80383E98 00380DF8 38 80 00 00 */ li r4, 0
|
|
|
|
|
/* 80383E9C 00380DFC 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383EA0 00380E00 94 21 FF F8 */ stwu r1, -8(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383EA4 00380E04 4B FF FC E9 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383EA8 00380E08 80 01 00 0C */ lwz r0, 0xc(r1)
|
|
|
|
|
/* 80383EAC 00380E0C 38 21 00 08 */ addi r1, r1, 8
|
|
|
|
|
/* 80383EB0 00380E10 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383EB4 00380E14 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global __OSUnlockSramEx
|
|
|
|
|
__OSUnlockSramEx:
|
|
|
|
|
/* 80383EB8 00380E18 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 80383EBC 00380E1C 38 80 00 14 */ li r4, 0x14
|
|
|
|
|
/* 80383EC0 00380E20 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383EC4 00380E24 94 21 FF F8 */ stwu r1, -8(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383EC8 00380E28 4B FF FC C5 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383ECC 00380E2C 80 01 00 0C */ lwz r0, 0xc(r1)
|
|
|
|
|
/* 80383ED0 00380E30 38 21 00 08 */ addi r1, r1, 8
|
|
|
|
|
/* 80383ED4 00380E34 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383ED8 00380E38 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global __OSSyncSram
|
|
|
|
|
__OSSyncSram:
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80383EDC 00380E3C 3C 60 80 54 */ lis r3, Scb@ha
|
|
|
|
|
/* 80383EE0 00380E40 38 63 15 A0 */ addi r3, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383EE4 00380E44 80 63 00 4C */ lwz r3, 0x4c(r3)
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80383EE8 00380E48 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global sub_80383eec
|
|
|
|
|
sub_80383eec:
|
|
|
|
|
/* 80383EEC 00380E4C 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 80383EF0 00380E50 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80383EF4 00380E54 94 21 FF D8 */ stwu r1, -0x28(r1)
|
|
|
|
|
/* 80383EF8 00380E58 93 E1 00 24 */ stw r31, 0x24(r1)
|
|
|
|
|
/* 80383EFC 00380E5C 3B E5 00 00 */ addi r31, r5, 0
|
|
|
|
|
/* 80383F00 00380E60 93 C1 00 20 */ stw r30, 0x20(r1)
|
|
|
|
|
/* 80383F04 00380E64 3B C4 00 00 */ addi r30, r4, 0
|
|
|
|
|
/* 80383F08 00380E68 93 A1 00 1C */ stw r29, 0x1c(r1)
|
|
|
|
|
/* 80383F0C 00380E6C 3B A3 00 00 */ addi r29, r3, 0
|
|
|
|
|
/* 80383F10 00380E70 4B FF AB 75 */ bl DCInvalidateRange
|
|
|
|
|
/* 80383F14 00380E74 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F18 00380E78 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 80383F1C 00380E7C 38 A0 00 00 */ li r5, 0
|
|
|
|
|
/* 80383F20 00380E80 48 03 D4 45 */ bl EXILock
|
|
|
|
|
/* 80383F24 00380E84 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383F28 00380E88 40 82 00 0C */ bne lbl_80383F34
|
|
|
|
|
/* 80383F2C 00380E8C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F30 00380E90 48 00 00 C4 */ b lbl_80383FF4
|
|
|
|
|
lbl_80383F34:
|
|
|
|
|
/* 80383F34 00380E94 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F38 00380E98 38 80 00 01 */ li r4, 1
|
|
|
|
|
/* 80383F3C 00380E9C 38 A0 00 03 */ li r5, 3
|
|
|
|
|
/* 80383F40 00380EA0 48 03 CD 1D */ bl EXISelect
|
|
|
|
|
/* 80383F44 00380EA4 2C 03 00 00 */ cmpwi r3, 0
|
|
|
|
|
/* 80383F48 00380EA8 40 82 00 14 */ bne lbl_80383F5C
|
|
|
|
|
/* 80383F4C 00380EAC 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F50 00380EB0 48 03 D5 09 */ bl EXIUnlock
|
|
|
|
|
/* 80383F54 00380EB4 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F58 00380EB8 48 00 00 9C */ b lbl_80383FF4
|
|
|
|
|
lbl_80383F5C:
|
|
|
|
|
/* 80383F5C 00380EBC 57 E0 30 32 */ slwi r0, r31, 6
|
|
|
|
|
/* 80383F60 00380EC0 90 01 00 14 */ stw r0, 0x14(r1)
|
|
|
|
|
/* 80383F64 00380EC4 38 81 00 14 */ addi r4, r1, 0x14
|
|
|
|
|
/* 80383F68 00380EC8 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383F6C 00380ECC 38 A0 00 04 */ li r5, 4
|
|
|
|
|
/* 80383F70 00380ED0 38 C0 00 01 */ li r6, 1
|
|
|
|
|
/* 80383F74 00380ED4 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383F78 00380ED8 48 03 C1 91 */ bl EXIImm
|
|
|
|
|
/* 80383F7C 00380EDC 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383F80 00380EE0 54 1F D9 7E */ srwi r31, r0, 5
|
|
|
|
|
/* 80383F84 00380EE4 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383F88 00380EE8 48 03 C5 69 */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383F8C 00380EEC 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383F90 00380EF0 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383F94 00380EF4 38 9D 00 00 */ addi r4, r29, 0
|
|
|
|
|
/* 80383F98 00380EF8 38 BE 00 00 */ addi r5, r30, 0
|
|
|
|
|
/* 80383F9C 00380EFC 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383FA0 00380F00 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383FA4 00380F04 38 C0 00 00 */ li r6, 0
|
|
|
|
|
/* 80383FA8 00380F08 38 E0 00 00 */ li r7, 0
|
|
|
|
|
/* 80383FAC 00380F0C 48 03 C4 59 */ bl EXIDma
|
|
|
|
|
/* 80383FB0 00380F10 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383FB4 00380F14 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383FB8 00380F18 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383FBC 00380F1C 38 60 00 00 */ li r3, 0
|
2022-08-05 10:23:49 +00:00
|
|
|
/* 80383FC0 00380F20 48 03 C5 31 */ bl EXISync
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80383FC4 00380F24 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383FC8 00380F28 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383FCC 00380F2C 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383FD0 00380F30 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383FD4 00380F34 48 03 CD B5 */ bl EXIDeselect
|
|
|
|
|
/* 80383FD8 00380F38 7C 60 00 34 */ cntlzw r0, r3
|
|
|
|
|
/* 80383FDC 00380F3C 54 00 D9 7E */ srwi r0, r0, 5
|
|
|
|
|
/* 80383FE0 00380F40 7F FF 03 78 */ or r31, r31, r0
|
|
|
|
|
/* 80383FE4 00380F44 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80383FE8 00380F48 48 03 D4 71 */ bl EXIUnlock
|
|
|
|
|
/* 80383FEC 00380F4C 7F E0 00 34 */ cntlzw r0, r31
|
|
|
|
|
/* 80383FF0 00380F50 54 03 D9 7E */ srwi r3, r0, 5
|
|
|
|
|
lbl_80383FF4:
|
|
|
|
|
/* 80383FF4 00380F54 80 01 00 2C */ lwz r0, 0x2c(r1)
|
|
|
|
|
/* 80383FF8 00380F58 83 E1 00 24 */ lwz r31, 0x24(r1)
|
|
|
|
|
/* 80383FFC 00380F5C 83 C1 00 20 */ lwz r30, 0x20(r1)
|
|
|
|
|
/* 80384000 00380F60 83 A1 00 1C */ lwz r29, 0x1c(r1)
|
|
|
|
|
/* 80384004 00380F64 38 21 00 28 */ addi r1, r1, 0x28
|
|
|
|
|
/* 80384008 00380F68 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8038400C 00380F6C 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global OSGetSoundMode
|
|
|
|
|
OSGetSoundMode:
|
|
|
|
|
/* 80384010 00380F70 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384014 00380F74 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384018 00380F78 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 8038401C 00380F7C 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
|
|
|
/* 80384020 00380F80 93 E1 00 1C */ stw r31, 0x1c(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384024 00380F84 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384028 00380F88 4B FF D6 39 */ bl OSDisableInterrupts
|
|
|
|
|
/* 8038402C 00380F8C 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80384030 00380F90 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 80384034 00380F94 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80384038 00380F98 41 82 00 10 */ beq lbl_80384048
|
|
|
|
|
/* 8038403C 00380F9C 4B FF D6 4D */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80384040 00380FA0 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 80384044 00380FA4 48 00 00 10 */ b lbl_80384054
|
|
|
|
|
lbl_80384048:
|
|
|
|
|
/* 80384048 00380FA8 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 8038404C 00380FAC 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80384050 00380FB0 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80384054:
|
|
|
|
|
/* 80384054 00380FB4 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
|
|
|
/* 80384058 00380FB8 54 00 07 7B */ rlwinm. r0, r0, 0, 0x1d, 0x1d
|
|
|
|
|
/* 8038405C 00380FBC 41 82 00 0C */ beq lbl_80384068
|
|
|
|
|
/* 80384060 00380FC0 3B E0 00 01 */ li r31, 1
|
|
|
|
|
/* 80384064 00380FC4 48 00 00 08 */ b lbl_8038406C
|
|
|
|
|
lbl_80384068:
|
|
|
|
|
/* 80384068 00380FC8 3B E0 00 00 */ li r31, 0
|
|
|
|
|
lbl_8038406C:
|
|
|
|
|
/* 8038406C 00380FCC 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80384070 00380FD0 38 80 00 00 */ li r4, 0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384074 00380FD4 4B FF FB 19 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384078 00380FD8 7F E3 FB 78 */ mr r3, r31
|
|
|
|
|
/* 8038407C 00380FDC 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
|
|
|
/* 80384080 00380FE0 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
|
|
|
/* 80384084 00380FE4 38 21 00 20 */ addi r1, r1, 0x20
|
|
|
|
|
/* 80384088 00380FE8 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8038408C 00380FEC 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global OSSetSoundMode
|
|
|
|
|
OSSetSoundMode:
|
|
|
|
|
/* 80384090 00380FF0 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384094 00380FF4 3C 80 80 54 */ lis r4, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384098 00380FF8 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 8038409C 00380FFC 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
|
|
|
/* 803840A0 00381000 93 E1 00 1C */ stw r31, 0x1c(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803840A4 00381004 3B E4 15 A0 */ addi r31, r4, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803840A8 00381008 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
|
|
|
/* 803840AC 0038100C 54 7E 17 7A */ rlwinm r30, r3, 2, 0x1d, 0x1d
|
|
|
|
|
/* 803840B0 00381010 4B FF D5 B1 */ bl OSDisableInterrupts
|
|
|
|
|
/* 803840B4 00381014 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 803840B8 00381018 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 803840BC 0038101C 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 803840C0 00381020 41 82 00 10 */ beq lbl_803840D0
|
|
|
|
|
/* 803840C4 00381024 4B FF D5 C5 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 803840C8 00381028 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 803840CC 0038102C 48 00 00 10 */ b lbl_803840DC
|
|
|
|
|
lbl_803840D0:
|
|
|
|
|
/* 803840D0 00381030 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 803840D4 00381034 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 803840D8 00381038 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_803840DC:
|
|
|
|
|
/* 803840DC 0038103C 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
|
|
|
/* 803840E0 00381040 54 60 07 7A */ rlwinm r0, r3, 0, 0x1d, 0x1d
|
|
|
|
|
/* 803840E4 00381044 7C 1E 00 40 */ cmplw r30, r0
|
|
|
|
|
/* 803840E8 00381048 40 82 00 14 */ bne lbl_803840FC
|
|
|
|
|
/* 803840EC 0038104C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803840F0 00381050 38 80 00 00 */ li r4, 0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803840F4 00381054 4B FF FA 99 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803840F8 00381058 48 00 00 24 */ b lbl_8038411C
|
|
|
|
|
lbl_803840FC:
|
|
|
|
|
/* 803840FC 0038105C 54 60 07 B8 */ rlwinm r0, r3, 0, 0x1e, 0x1c
|
|
|
|
|
/* 80384100 00381060 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
|
|
|
/* 80384104 00381064 38 60 00 01 */ li r3, 1
|
|
|
|
|
/* 80384108 00381068 38 80 00 00 */ li r4, 0
|
|
|
|
|
/* 8038410C 0038106C 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
|
|
|
/* 80384110 00381070 7C 00 F3 78 */ or r0, r0, r30
|
|
|
|
|
/* 80384114 00381074 98 1F 00 13 */ stb r0, 0x13(r31)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384118 00381078 4B FF FA 75 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
lbl_8038411C:
|
|
|
|
|
/* 8038411C 0038107C 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
|
|
|
/* 80384120 00381080 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
|
|
|
/* 80384124 00381084 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
|
|
|
/* 80384128 00381088 38 21 00 20 */ addi r1, r1, 0x20
|
|
|
|
|
/* 8038412C 0038108C 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80384130 00381090 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global OSGetProgressiveMode
|
|
|
|
|
OSGetProgressiveMode:
|
|
|
|
|
/* 80384134 00381094 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384138 00381098 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038413C 0038109C 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80384140 003810A0 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
|
|
|
/* 80384144 003810A4 93 E1 00 14 */ stw r31, 0x14(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384148 003810A8 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038414C 003810AC 4B FF D5 15 */ bl OSDisableInterrupts
|
|
|
|
|
/* 80384150 003810B0 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80384154 003810B4 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 80384158 003810B8 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 8038415C 003810BC 41 82 00 10 */ beq lbl_8038416C
|
|
|
|
|
/* 80384160 003810C0 4B FF D5 29 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80384164 003810C4 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 80384168 003810C8 48 00 00 10 */ b lbl_80384178
|
|
|
|
|
lbl_8038416C:
|
|
|
|
|
/* 8038416C 003810CC 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 80384170 003810D0 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80384174 003810D4 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80384178:
|
|
|
|
|
/* 80384178 003810D8 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
|
|
|
/* 8038417C 003810DC 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80384180 003810E0 38 80 00 00 */ li r4, 0
|
|
|
|
|
/* 80384184 003810E4 54 1F CF FE */ rlwinm r31, r0, 0x19, 0x1f, 0x1f
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384188 003810E8 4B FF FA 05 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038418C 003810EC 7F E3 FB 78 */ mr r3, r31
|
|
|
|
|
/* 80384190 003810F0 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
|
|
|
/* 80384194 003810F4 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
|
|
|
/* 80384198 003810F8 38 21 00 18 */ addi r1, r1, 0x18
|
|
|
|
|
/* 8038419C 003810FC 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 803841A0 00381100 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global sub_803841a4
|
|
|
|
|
sub_803841a4:
|
|
|
|
|
/* 803841A4 00381104 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803841A8 00381108 3C 80 80 54 */ lis r4, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803841AC 0038110C 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 803841B0 00381110 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
|
|
|
/* 803841B4 00381114 93 E1 00 1C */ stw r31, 0x1c(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803841B8 00381118 3B E4 15 A0 */ addi r31, r4, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803841BC 0038111C 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
|
|
|
/* 803841C0 00381120 54 7E 3E 30 */ rlwinm r30, r3, 7, 0x18, 0x18
|
|
|
|
|
/* 803841C4 00381124 4B FF D4 9D */ bl OSDisableInterrupts
|
|
|
|
|
/* 803841C8 00381128 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 803841CC 0038112C 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 803841D0 00381130 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 803841D4 00381134 41 82 00 10 */ beq lbl_803841E4
|
|
|
|
|
/* 803841D8 00381138 4B FF D4 B1 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 803841DC 0038113C 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 803841E0 00381140 48 00 00 10 */ b lbl_803841F0
|
|
|
|
|
lbl_803841E4:
|
|
|
|
|
/* 803841E4 00381144 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 803841E8 00381148 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 803841EC 0038114C 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_803841F0:
|
|
|
|
|
/* 803841F0 00381150 88 7F 00 13 */ lbz r3, 0x13(r31)
|
|
|
|
|
/* 803841F4 00381154 54 60 06 30 */ rlwinm r0, r3, 0, 0x18, 0x18
|
|
|
|
|
/* 803841F8 00381158 7C 1E 00 40 */ cmplw r30, r0
|
|
|
|
|
/* 803841FC 0038115C 40 82 00 14 */ bne lbl_80384210
|
|
|
|
|
/* 80384200 00381160 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80384204 00381164 38 80 00 00 */ li r4, 0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384208 00381168 4B FF F9 85 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038420C 0038116C 48 00 00 24 */ b lbl_80384230
|
|
|
|
|
lbl_80384210:
|
|
|
|
|
/* 80384210 00381170 54 60 06 6E */ rlwinm r0, r3, 0, 0x19, 0x17
|
|
|
|
|
/* 80384214 00381174 98 1F 00 13 */ stb r0, 0x13(r31)
|
|
|
|
|
/* 80384218 00381178 38 60 00 01 */ li r3, 1
|
|
|
|
|
/* 8038421C 0038117C 38 80 00 00 */ li r4, 0
|
|
|
|
|
/* 80384220 00381180 88 1F 00 13 */ lbz r0, 0x13(r31)
|
|
|
|
|
/* 80384224 00381184 7C 00 F3 78 */ or r0, r0, r30
|
|
|
|
|
/* 80384228 00381188 98 1F 00 13 */ stb r0, 0x13(r31)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038422C 0038118C 4B FF F9 61 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
lbl_80384230:
|
|
|
|
|
/* 80384230 00381190 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
|
|
|
/* 80384234 00381194 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
|
|
|
/* 80384238 00381198 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
|
|
|
/* 8038423C 0038119C 38 21 00 20 */ addi r1, r1, 0x20
|
|
|
|
|
/* 80384240 003811A0 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80384244 003811A4 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
2022-08-23 03:54:30 +00:00
|
|
|
.if version < 2
|
|
|
|
|
|
2022-04-02 21:03:04 +00:00
|
|
|
.global OSGetLanguage
|
|
|
|
|
OSGetLanguage:
|
|
|
|
|
/* 80384248 003811A8 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038424C 003811AC 3C 60 80 54 */ lis r3, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384250 003811B0 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80384254 003811B4 94 21 FF E8 */ stwu r1, -0x18(r1)
|
|
|
|
|
/* 80384258 003811B8 93 E1 00 14 */ stw r31, 0x14(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038425C 003811BC 3B E3 15 A0 */ addi r31, r3, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384260 003811C0 4B FF D4 01 */ bl OSDisableInterrupts
|
|
|
|
|
/* 80384264 003811C4 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80384268 003811C8 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 8038426C 003811CC 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80384270 003811D0 41 82 00 10 */ beq lbl_80384280
|
|
|
|
|
/* 80384274 003811D4 4B FF D4 15 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80384278 003811D8 3B E0 00 00 */ li r31, 0
|
|
|
|
|
/* 8038427C 003811DC 48 00 00 10 */ b lbl_8038428C
|
|
|
|
|
lbl_80384280:
|
|
|
|
|
/* 80384280 003811E0 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 80384284 003811E4 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80384288 003811E8 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_8038428C:
|
|
|
|
|
/* 8038428C 003811EC 8B FF 00 12 */ lbz r31, 0x12(r31)
|
|
|
|
|
/* 80384290 003811F0 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80384294 003811F4 38 80 00 00 */ li r4, 0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384298 003811F8 4B FF F8 F5 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038429C 003811FC 7F E3 FB 78 */ mr r3, r31
|
|
|
|
|
/* 803842A0 00381200 80 01 00 1C */ lwz r0, 0x1c(r1)
|
|
|
|
|
/* 803842A4 00381204 83 E1 00 14 */ lwz r31, 0x14(r1)
|
|
|
|
|
/* 803842A8 00381208 38 21 00 18 */ addi r1, r1, 0x18
|
|
|
|
|
/* 803842AC 0038120C 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 803842B0 00381210 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
2022-08-23 03:54:30 +00:00
|
|
|
.endif
|
|
|
|
|
|
2022-04-02 21:03:04 +00:00
|
|
|
.global OSGetWirelessID
|
|
|
|
|
OSGetWirelessID:
|
|
|
|
|
/* 803842B4 00381214 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803842B8 00381218 3C 80 80 54 */ lis r4, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803842BC 0038121C 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 803842C0 00381220 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
|
|
|
/* 803842C4 00381224 93 E1 00 1C */ stw r31, 0x1c(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803842C8 00381228 3B E4 15 A0 */ addi r31, r4, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803842CC 0038122C 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
|
|
|
/* 803842D0 00381230 3B C3 00 00 */ addi r30, r3, 0
|
|
|
|
|
/* 803842D4 00381234 4B FF D3 8D */ bl OSDisableInterrupts
|
|
|
|
|
/* 803842D8 00381238 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 803842DC 0038123C 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 803842E0 00381240 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 803842E4 00381244 41 82 00 10 */ beq lbl_803842F4
|
|
|
|
|
/* 803842E8 00381248 4B FF D3 A1 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 803842EC 0038124C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803842F0 00381250 48 00 00 14 */ b lbl_80384304
|
|
|
|
|
lbl_803842F4:
|
|
|
|
|
/* 803842F4 00381254 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 803842F8 00381258 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 803842FC 0038125C 38 7F 00 14 */ addi r3, r31, 0x14
|
|
|
|
|
/* 80384300 00381260 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80384304:
|
|
|
|
|
/* 80384304 00381264 57 C0 08 3C */ slwi r0, r30, 1
|
|
|
|
|
/* 80384308 00381268 7C 63 02 14 */ add r3, r3, r0
|
|
|
|
|
/* 8038430C 0038126C A3 E3 00 1C */ lhz r31, 0x1c(r3)
|
|
|
|
|
/* 80384310 00381270 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 80384314 00381274 38 80 00 14 */ li r4, 0x14
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 80384318 00381278 4B FF F8 75 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 8038431C 0038127C 7F E3 FB 78 */ mr r3, r31
|
|
|
|
|
/* 80384320 00381280 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
|
|
|
/* 80384324 00381284 83 E1 00 1C */ lwz r31, 0x1c(r1)
|
|
|
|
|
/* 80384328 00381288 83 C1 00 18 */ lwz r30, 0x18(r1)
|
|
|
|
|
/* 8038432C 0038128C 38 21 00 20 */ addi r1, r1, 0x20
|
|
|
|
|
/* 80384330 00381290 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 80384334 00381294 4E 80 00 20 */ blr
|
2022-04-02 21:03:04 +00:00
|
|
|
|
|
|
|
|
.global OSSetWirelessID
|
|
|
|
|
OSSetWirelessID:
|
|
|
|
|
/* 80384338 00381298 7C 08 02 A6 */ mflr r0
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038433C 0038129C 3C A0 80 54 */ lis r5, Scb@ha
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384340 003812A0 90 01 00 04 */ stw r0, 4(r1)
|
|
|
|
|
/* 80384344 003812A4 94 21 FF D8 */ stwu r1, -0x28(r1)
|
|
|
|
|
/* 80384348 003812A8 93 E1 00 24 */ stw r31, 0x24(r1)
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 8038434C 003812AC 3B E5 15 A0 */ addi r31, r5, Scb@l
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 80384350 003812B0 93 C1 00 20 */ stw r30, 0x20(r1)
|
|
|
|
|
/* 80384354 003812B4 3B C4 00 00 */ addi r30, r4, 0
|
|
|
|
|
/* 80384358 003812B8 93 A1 00 1C */ stw r29, 0x1c(r1)
|
|
|
|
|
/* 8038435C 003812BC 3B A3 00 00 */ addi r29, r3, 0
|
|
|
|
|
/* 80384360 003812C0 4B FF D3 01 */ bl OSDisableInterrupts
|
|
|
|
|
/* 80384364 003812C4 80 1F 00 48 */ lwz r0, 0x48(r31)
|
|
|
|
|
/* 80384368 003812C8 38 9F 00 48 */ addi r4, r31, 0x48
|
|
|
|
|
/* 8038436C 003812CC 2C 00 00 00 */ cmpwi r0, 0
|
|
|
|
|
/* 80384370 003812D0 41 82 00 10 */ beq lbl_80384380
|
|
|
|
|
/* 80384374 003812D4 4B FF D3 15 */ bl OSRestoreInterrupts
|
|
|
|
|
/* 80384378 003812D8 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 8038437C 003812DC 48 00 00 14 */ b lbl_80384390
|
|
|
|
|
lbl_80384380:
|
|
|
|
|
/* 80384380 003812E0 90 7F 00 44 */ stw r3, 0x44(r31)
|
|
|
|
|
/* 80384384 003812E4 38 00 00 01 */ li r0, 1
|
|
|
|
|
/* 80384388 003812E8 38 7F 00 14 */ addi r3, r31, 0x14
|
|
|
|
|
/* 8038438C 003812EC 90 04 00 00 */ stw r0, 0(r4)
|
|
|
|
|
lbl_80384390:
|
|
|
|
|
/* 80384390 003812F0 57 A0 08 3C */ slwi r0, r29, 1
|
|
|
|
|
/* 80384394 003812F4 7C 83 02 14 */ add r4, r3, r0
|
|
|
|
|
/* 80384398 003812F8 A4 64 00 1C */ lhzu r3, 0x1c(r4)
|
|
|
|
|
/* 8038439C 003812FC 57 C0 04 3E */ clrlwi r0, r30, 0x10
|
|
|
|
|
/* 803843A0 00381300 7C 03 00 40 */ cmplw r3, r0
|
|
|
|
|
/* 803843A4 00381304 41 82 00 18 */ beq lbl_803843BC
|
|
|
|
|
/* 803843A8 00381308 B3 C4 00 00 */ sth r30, 0(r4)
|
|
|
|
|
/* 803843AC 0038130C 38 60 00 01 */ li r3, 1
|
|
|
|
|
/* 803843B0 00381310 38 80 00 14 */ li r4, 0x14
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803843B4 00381314 4B FF F7 D9 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
/* 803843B8 00381318 48 00 00 10 */ b lbl_803843C8
|
|
|
|
|
lbl_803843BC:
|
|
|
|
|
/* 803843BC 0038131C 38 60 00 00 */ li r3, 0
|
|
|
|
|
/* 803843C0 00381320 38 80 00 14 */ li r4, 0x14
|
2022-04-30 08:32:00 +00:00
|
|
|
/* 803843C4 00381324 4B FF F7 C9 */ bl UnlockSram
|
2022-04-02 21:03:04 +00:00
|
|
|
lbl_803843C8:
|
|
|
|
|
/* 803843C8 00381328 80 01 00 2C */ lwz r0, 0x2c(r1)
|
|
|
|
|
/* 803843CC 0038132C 83 E1 00 24 */ lwz r31, 0x24(r1)
|
|
|
|
|
/* 803843D0 00381330 83 C1 00 20 */ lwz r30, 0x20(r1)
|
|
|
|
|
/* 803843D4 00381334 83 A1 00 1C */ lwz r29, 0x1c(r1)
|
|
|
|
|
/* 803843D8 00381338 38 21 00 28 */ addi r1, r1, 0x28
|
|
|
|
|
/* 803843DC 0038133C 7C 08 03 A6 */ mtlr r0
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 803843E0 00381340 4E 80 00 20 */ blr
|
