2022-04-12 05:41:21 +00:00
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.include "macros.inc"
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2022-08-10 05:34:11 +00:00
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.section .ctors, "wa"
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lbl_ctor:
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.4byte __sinit_CEulerAngles_cpp
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2022-08-11 02:27:22 +00:00
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.section .bss, "wa"
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.balign 8
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.comm lbl_8056A5F4, 0xC, 4
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2022-07-18 05:20:04 +00:00
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.section .sdata2, "a"
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2022-08-10 23:08:58 +00:00
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.balign 8
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2022-07-18 05:20:04 +00:00
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.global lbl_805A9F78
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lbl_805A9F78:
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# ROM: 0x3F6818
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.float 1.0
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.global lbl_805A9F7C
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lbl_805A9F7C:
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# ROM: 0x3F681C
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.4byte 0
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.global lbl_805A9F80
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lbl_805A9F80:
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# ROM: 0x3F6820
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.float 2.0
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.4byte 0
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.global lbl_805A9F88
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lbl_805A9F88:
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# ROM: 0x3F6828
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.4byte 0
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.4byte 0
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.global lbl_805A9F90
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lbl_805A9F90:
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# ROM: 0x3F6830
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.4byte 0x3FE00000
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.4byte 0
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.global lbl_805A9F98
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lbl_805A9F98:
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# ROM: 0x3F6838
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.4byte 0x40080000
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.4byte 0
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.global lbl_805A9FA0
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lbl_805A9FA0:
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# ROM: 0x3F6840
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.4byte 0x3727C5AC
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.4byte 0
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2022-04-12 05:41:21 +00:00
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.section .text, "ax"
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.global FromQuaternion__12CEulerAnglesFRC11CQuaternion
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FromQuaternion__12CEulerAnglesFRC11CQuaternion:
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/* 8001B5C4 00018524 94 21 FF A0 */ stwu r1, -0x60(r1)
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/* 8001B5C8 00018528 7C 08 02 A6 */ mflr r0
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/* 8001B5CC 0001852C 90 01 00 64 */ stw r0, 0x64(r1)
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/* 8001B5D0 00018530 DB E1 00 50 */ stfd f31, 0x50(r1)
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/* 8001B5D4 00018534 F3 E1 00 58 */ psq_st f31, 88(r1), 0, qr0
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/* 8001B5D8 00018538 DB C1 00 40 */ stfd f30, 0x40(r1)
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/* 8001B5DC 0001853C F3 C1 00 48 */ psq_st f30, 72(r1), 0, qr0
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/* 8001B5E0 00018540 DB A1 00 30 */ stfd f29, 0x30(r1)
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/* 8001B5E4 00018544 F3 A1 00 38 */ psq_st f29, 56(r1), 0, qr0
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/* 8001B5E8 00018548 DB 81 00 20 */ stfd f28, 0x20(r1)
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/* 8001B5EC 0001854C F3 81 00 28 */ psq_st f28, 40(r1), 0, qr0
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/* 8001B5F0 00018550 DB 61 00 10 */ stfd f27, 0x10(r1)
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/* 8001B5F4 00018554 F3 61 00 18 */ psq_st f27, 24(r1), 0, qr0
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/* 8001B5F8 00018558 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 8001B5FC 0001855C C0 84 00 04 */ lfs f4, 4(r4)
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/* 8001B600 00018560 7C 7F 1B 78 */ mr r31, r3
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/* 8001B604 00018564 C0 E4 00 08 */ lfs f7, 8(r4)
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/* 8001B608 00018568 EC 24 01 32 */ fmuls f1, f4, f4
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/* 8001B60C 0001856C C0 A4 00 0C */ lfs f5, 0xc(r4)
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/* 8001B610 00018570 EC 07 01 F2 */ fmuls f0, f7, f7
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/* 8001B614 00018574 C0 C4 00 00 */ lfs f6, 0(r4)
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/* 8001B618 00018578 EC 45 01 72 */ fmuls f2, f5, f5
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/* 8001B61C 0001857C C0 62 82 5C */ lfs f3, lbl_805A9F7C@sda21(r2)
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/* 8001B620 00018580 EC 01 00 2A */ fadds f0, f1, f0
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/* 8001B624 00018584 EC 26 01 B2 */ fmuls f1, f6, f6
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/* 8001B628 00018588 EC 02 00 2A */ fadds f0, f2, f0
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/* 8001B62C 0001858C EC 21 00 2A */ fadds f1, f1, f0
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/* 8001B630 00018590 FC 01 18 40 */ fcmpo cr0, f1, f3
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/* 8001B634 00018594 40 81 00 0C */ ble lbl_8001B640
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/* 8001B638 00018598 C0 02 82 60 */ lfs f0, lbl_805A9F80@sda21(r2)
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/* 8001B63C 0001859C EC 60 08 24 */ fdivs f3, f0, f1
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lbl_8001B640:
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/* 8001B640 000185A0 ED 83 01 72 */ fmuls f12, f3, f5
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/* 8001B644 000185A4 C1 02 82 58 */ lfs f8, lbl_805A9F78@sda21(r2)
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/* 8001B648 000185A8 ED 63 01 F2 */ fmuls f11, f3, f7
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/* 8001B64C 000185AC C9 22 82 68 */ lfd f9, lbl_805A9F88@sda21(r2)
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/* 8001B650 000185B0 ED 43 01 32 */ fmuls f10, f3, f4
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/* 8001B654 000185B4 EC 6C 01 72 */ fmuls f3, f12, f5
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/* 8001B658 000185B8 EC 4B 01 32 */ fmuls f2, f11, f4
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/* 8001B65C 000185BC EC AA 01 32 */ fmuls f5, f10, f4
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/* 8001B660 000185C0 EC 2C 01 B2 */ fmuls f1, f12, f6
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/* 8001B664 000185C4 ED AB 01 F2 */ fmuls f13, f11, f7
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/* 8001B668 000185C8 EC 05 18 2A */ fadds f0, f5, f3
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/* 8001B66C 000185CC EC 22 08 28 */ fsubs f1, f2, f1
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/* 8001B670 000185D0 EC 6D 18 2A */ fadds f3, f13, f3
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/* 8001B674 000185D4 EC 48 00 28 */ fsubs f2, f8, f0
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/* 8001B678 000185D8 EC 01 00 72 */ fmuls f0, f1, f1
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/* 8001B67C 000185DC EC A5 68 2A */ fadds f5, f5, f13
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/* 8001B680 000185E0 ED 6B 01 B2 */ fmuls f11, f11, f6
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/* 8001B684 000185E4 ED AC 01 32 */ fmuls f13, f12, f4
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/* 8001B688 000185E8 EC 82 00 BA */ fmadds f4, f2, f2, f0
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/* 8001B68C 000185EC EC EC 01 F2 */ fmuls f7, f12, f7
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/* 8001B690 000185F0 EC CA 01 B2 */ fmuls f6, f10, f6
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/* 8001B694 000185F4 FC 04 48 40 */ fcmpo cr0, f4, f9
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/* 8001B698 000185F8 EC 08 18 28 */ fsubs f0, f8, f3
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/* 8001B69C 000185FC EC 6D 58 2A */ fadds f3, f13, f11
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/* 8001B6A0 00018600 EF ED 58 28 */ fsubs f31, f13, f11
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/* 8001B6A4 00018604 EF C7 30 2A */ fadds f30, f7, f6
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/* 8001B6A8 00018608 EF A8 28 28 */ fsubs f29, f8, f5
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/* 8001B6AC 0001860C 40 81 00 58 */ ble lbl_8001B704
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/* 8001B6B0 00018610 FC C0 20 34 */ frsqrte f6, f4
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/* 8001B6B4 00018614 C9 02 82 70 */ lfd f8, lbl_805A9F90@sda21(r2)
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/* 8001B6B8 00018618 C8 E2 82 78 */ lfd f7, lbl_805A9F98@sda21(r2)
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/* 8001B6BC 0001861C FC A6 01 B2 */ fmul f5, f6, f6
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/* 8001B6C0 00018620 FC C8 01 B2 */ fmul f6, f8, f6
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/* 8001B6C4 00018624 FC A4 39 7C */ fnmsub f5, f4, f5, f7
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/* 8001B6C8 00018628 FC C6 01 72 */ fmul f6, f6, f5
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/* 8001B6CC 0001862C FC A6 01 B2 */ fmul f5, f6, f6
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/* 8001B6D0 00018630 FC C8 01 B2 */ fmul f6, f8, f6
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/* 8001B6D4 00018634 FC A4 39 7C */ fnmsub f5, f4, f5, f7
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/* 8001B6D8 00018638 FC C6 01 72 */ fmul f6, f6, f5
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/* 8001B6DC 0001863C FC A6 01 B2 */ fmul f5, f6, f6
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/* 8001B6E0 00018640 FC C8 01 B2 */ fmul f6, f8, f6
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/* 8001B6E4 00018644 FC A4 39 7C */ fnmsub f5, f4, f5, f7
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/* 8001B6E8 00018648 FC C6 01 72 */ fmul f6, f6, f5
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/* 8001B6EC 0001864C FC A6 01 B2 */ fmul f5, f6, f6
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/* 8001B6F0 00018650 FC C8 01 B2 */ fmul f6, f8, f6
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/* 8001B6F4 00018654 FC A4 39 7C */ fnmsub f5, f4, f5, f7
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/* 8001B6F8 00018658 FC A6 01 72 */ fmul f5, f6, f5
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/* 8001B6FC 0001865C FD 24 01 72 */ fmul f9, f4, f5
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/* 8001B700 00018660 48 00 00 2C */ b lbl_8001B72C
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lbl_8001B704:
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/* 8001B704 00018664 FC 09 20 00 */ fcmpu cr0, f9, f4
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/* 8001B708 00018668 40 82 00 08 */ bne lbl_8001B710
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/* 8001B70C 0001866C 48 00 00 20 */ b lbl_8001B72C
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lbl_8001B710:
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/* 8001B710 00018670 FC 04 48 00 */ fcmpu cr0, f4, f9
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/* 8001B714 00018674 41 82 00 10 */ beq lbl_8001B724
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/* 8001B718 00018678 3C 60 80 5B */ lis r3, lbl_805A8BA0@ha
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/* 8001B71C 0001867C C1 23 8B A0 */ lfs f9, lbl_805A8BA0@l(r3)
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/* 8001B720 00018680 48 00 00 0C */ b lbl_8001B72C
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lbl_8001B724:
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/* 8001B724 00018684 3C 60 80 5B */ lis r3, lbl_805A8BA4@ha
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/* 8001B728 00018688 C1 23 8B A4 */ lfs f9, lbl_805A8BA4@l(r3)
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lbl_8001B72C:
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/* 8001B72C 0001868C FF 80 48 18 */ frsp f28, f9
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/* 8001B730 00018690 C0 A2 82 5C */ lfs f5, lbl_805A9F7C@sda21(r2)
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/* 8001B734 00018694 C0 82 82 80 */ lfs f4, lbl_805A9FA0@sda21(r2)
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/* 8001B738 00018698 EC BC 28 28 */ fsubs f5, f28, f5
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/* 8001B73C 0001869C FC A0 2A 10 */ fabs f5, f5
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/* 8001B740 000186A0 FC 05 20 40 */ fcmpo cr0, f5, f4
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/* 8001B744 000186A4 41 80 00 48 */ blt lbl_8001B78C
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/* 8001B748 000186A8 48 37 95 25 */ bl atan2
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/* 8001B74C 000186AC FF 60 08 50 */ fneg f27, f1
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/* 8001B750 000186B0 FC 20 F8 90 */ fmr f1, f31
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/* 8001B754 000186B4 FC 40 E8 90 */ fmr f2, f29
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/* 8001B758 000186B8 48 37 95 15 */ bl atan2
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/* 8001B75C 000186BC FF A0 08 50 */ fneg f29, f1
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/* 8001B760 000186C0 FC 40 E0 90 */ fmr f2, f28
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/* 8001B764 000186C4 FC 20 F0 50 */ fneg f1, f30
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/* 8001B768 000186C8 48 37 95 05 */ bl atan2
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/* 8001B76C 000186CC FC 40 08 50 */ fneg f2, f1
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/* 8001B770 000186D0 FC 20 E8 18 */ frsp f1, f29
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/* 8001B774 000186D4 FC 00 D8 18 */ frsp f0, f27
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/* 8001B778 000186D8 FC 40 10 18 */ frsp f2, f2
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/* 8001B77C 000186DC D0 5F 00 00 */ stfs f2, 0(r31)
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/* 8001B780 000186E0 D0 3F 00 04 */ stfs f1, 4(r31)
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/* 8001B784 000186E4 D0 1F 00 08 */ stfs f0, 8(r31)
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/* 8001B788 000186E8 48 00 00 3C */ b lbl_8001B7C4
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lbl_8001B78C:
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/* 8001B78C 000186EC FC 40 00 90 */ fmr f2, f0
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/* 8001B790 000186F0 FC 20 18 50 */ fneg f1, f3
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/* 8001B794 000186F4 48 37 94 D9 */ bl atan2
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/* 8001B798 000186F8 FF 60 08 50 */ fneg f27, f1
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/* 8001B79C 000186FC FC 40 E0 90 */ fmr f2, f28
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/* 8001B7A0 00018700 FC 20 F0 50 */ fneg f1, f30
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/* 8001B7A4 00018704 48 37 94 C9 */ bl atan2
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/* 8001B7A8 00018708 FC 40 08 50 */ fneg f2, f1
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/* 8001B7AC 0001870C C0 02 82 5C */ lfs f0, lbl_805A9F7C@sda21(r2)
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/* 8001B7B0 00018710 FC 20 D8 18 */ frsp f1, f27
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/* 8001B7B4 00018714 FC 40 10 18 */ frsp f2, f2
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/* 8001B7B8 00018718 D0 5F 00 00 */ stfs f2, 0(r31)
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/* 8001B7BC 0001871C D0 3F 00 04 */ stfs f1, 4(r31)
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/* 8001B7C0 00018720 D0 1F 00 08 */ stfs f0, 8(r31)
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lbl_8001B7C4:
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/* 8001B7C4 00018724 E3 E1 00 58 */ psq_l f31, 88(r1), 0, qr0
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/* 8001B7C8 00018728 CB E1 00 50 */ lfd f31, 0x50(r1)
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/* 8001B7CC 0001872C E3 C1 00 48 */ psq_l f30, 72(r1), 0, qr0
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/* 8001B7D0 00018730 CB C1 00 40 */ lfd f30, 0x40(r1)
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/* 8001B7D4 00018734 E3 A1 00 38 */ psq_l f29, 56(r1), 0, qr0
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/* 8001B7D8 00018738 CB A1 00 30 */ lfd f29, 0x30(r1)
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/* 8001B7DC 0001873C E3 81 00 28 */ psq_l f28, 40(r1), 0, qr0
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/* 8001B7E0 00018740 CB 81 00 20 */ lfd f28, 0x20(r1)
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/* 8001B7E4 00018744 E3 61 00 18 */ psq_l f27, 24(r1), 0, qr0
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/* 8001B7E8 00018748 CB 61 00 10 */ lfd f27, 0x10(r1)
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/* 8001B7EC 0001874C 80 01 00 64 */ lwz r0, 0x64(r1)
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/* 8001B7F0 00018750 83 E1 00 0C */ lwz r31, 0xc(r1)
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/* 8001B7F4 00018754 7C 08 03 A6 */ mtlr r0
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/* 8001B7F8 00018758 38 21 00 60 */ addi r1, r1, 0x60
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2022-07-14 05:48:03 +00:00
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/* 8001B7FC 0001875C 4E 80 00 20 */ blr
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2022-04-12 05:41:21 +00:00
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.global sub_8001b800
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sub_8001b800:
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/* 8001B800 00018760 94 21 FF 90 */ stwu r1, -0x70(r1)
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/* 8001B804 00018764 7C 08 02 A6 */ mflr r0
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/* 8001B808 00018768 90 01 00 74 */ stw r0, 0x74(r1)
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/* 8001B80C 0001876C DB E1 00 60 */ stfd f31, 0x60(r1)
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/* 8001B810 00018770 F3 E1 00 68 */ psq_st f31, 104(r1), 0, qr0
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/* 8001B814 00018774 DB C1 00 50 */ stfd f30, 0x50(r1)
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/* 8001B818 00018778 F3 C1 00 58 */ psq_st f30, 88(r1), 0, qr0
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/* 8001B81C 0001877C DB A1 00 40 */ stfd f29, 0x40(r1)
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/* 8001B820 00018780 F3 A1 00 48 */ psq_st f29, 72(r1), 0, qr0
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/* 8001B824 00018784 93 E1 00 3C */ stw r31, 0x3c(r1)
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/* 8001B828 00018788 7C 7F 1B 78 */ mr r31, r3
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/* 8001B82C 0001878C 38 61 00 08 */ addi r3, r1, 8
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|
/* 8001B830 00018790 48 00 01 8D */ bl FromMatrix3f__12CEulerAnglesFRC9CMatrix3f
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/* 8001B834 00018794 C0 01 00 0C */ lfs f0, 0xc(r1)
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|
/* 8001B838 00018798 C0 41 00 18 */ lfs f2, 0x18(r1)
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|
|
/* 8001B83C 0001879C EC 00 00 32 */ fmuls f0, f0, f0
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/* 8001B840 000187A0 C8 22 82 68 */ lfd f1, lbl_805A9F88@sda21(r2)
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/* 8001B844 000187A4 EC 82 00 BA */ fmadds f4, f2, f2, f0
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/* 8001B848 000187A8 FC 04 08 40 */ fcmpo cr0, f4, f1
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/* 8001B84C 000187AC 40 81 00 58 */ ble lbl_8001B8A4
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/* 8001B850 000187B0 FC 20 20 34 */ frsqrte f1, f4
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|
/* 8001B854 000187B4 C8 62 82 70 */ lfd f3, lbl_805A9F90@sda21(r2)
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|
/* 8001B858 000187B8 C8 42 82 78 */ lfd f2, lbl_805A9F98@sda21(r2)
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/* 8001B85C 000187BC FC 01 00 72 */ fmul f0, f1, f1
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/* 8001B860 000187C0 FC 23 00 72 */ fmul f1, f3, f1
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/* 8001B864 000187C4 FC 04 10 3C */ fnmsub f0, f4, f0, f2
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/* 8001B868 000187C8 FC 21 00 32 */ fmul f1, f1, f0
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/* 8001B86C 000187CC FC 01 00 72 */ fmul f0, f1, f1
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/* 8001B870 000187D0 FC 23 00 72 */ fmul f1, f3, f1
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/* 8001B874 000187D4 FC 04 10 3C */ fnmsub f0, f4, f0, f2
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/* 8001B878 000187D8 FC 21 00 32 */ fmul f1, f1, f0
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/* 8001B87C 000187DC FC 01 00 72 */ fmul f0, f1, f1
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/* 8001B880 000187E0 FC 23 00 72 */ fmul f1, f3, f1
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/* 8001B884 000187E4 FC 04 10 3C */ fnmsub f0, f4, f0, f2
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/* 8001B888 000187E8 FC 21 00 32 */ fmul f1, f1, f0
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/* 8001B88C 000187EC FC 01 00 72 */ fmul f0, f1, f1
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/* 8001B890 000187F0 FC 23 00 72 */ fmul f1, f3, f1
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/* 8001B894 000187F4 FC 04 10 3C */ fnmsub f0, f4, f0, f2
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/* 8001B898 000187F8 FC 01 00 32 */ fmul f0, f1, f0
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/* 8001B89C 000187FC FC 24 00 32 */ fmul f1, f4, f0
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|
/* 8001B8A0 00018800 48 00 00 2C */ b lbl_8001B8CC
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lbl_8001B8A4:
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/* 8001B8A4 00018804 FC 01 20 00 */ fcmpu cr0, f1, f4
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/* 8001B8A8 00018808 40 82 00 08 */ bne lbl_8001B8B0
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/* 8001B8AC 0001880C 48 00 00 20 */ b lbl_8001B8CC
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|
lbl_8001B8B0:
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/* 8001B8B0 00018810 FC 04 08 00 */ fcmpu cr0, f4, f1
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/* 8001B8B4 00018814 41 82 00 10 */ beq lbl_8001B8C4
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/* 8001B8B8 00018818 3C 60 80 5B */ lis r3, lbl_805A8BA0@ha
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|
/* 8001B8BC 0001881C C0 23 8B A0 */ lfs f1, lbl_805A8BA0@l(r3)
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|
/* 8001B8C0 00018820 48 00 00 0C */ b lbl_8001B8CC
|
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|
|
lbl_8001B8C4:
|
|
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|
/* 8001B8C4 00018824 3C 60 80 5B */ lis r3, lbl_805A8BA4@ha
|
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|
|
/* 8001B8C8 00018828 C0 23 8B A4 */ lfs f1, lbl_805A8BA4@l(r3)
|
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|
|
lbl_8001B8CC:
|
|
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|
/* 8001B8CC 0001882C FF E0 08 18 */ frsp f31, f1
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|
|
/* 8001B8D0 00018830 C0 22 82 5C */ lfs f1, lbl_805A9F7C@sda21(r2)
|
|
|
|
|
/* 8001B8D4 00018834 C0 02 82 80 */ lfs f0, lbl_805A9FA0@sda21(r2)
|
|
|
|
|
/* 8001B8D8 00018838 EC 3F 08 28 */ fsubs f1, f31, f1
|
|
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|
|
/* 8001B8DC 0001883C FC 20 0A 10 */ fabs f1, f1
|
|
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|
|
/* 8001B8E0 00018840 FC 01 00 40 */ fcmpo cr0, f1, f0
|
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|
|
/* 8001B8E4 00018844 41 80 00 54 */ blt lbl_8001B938
|
|
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|
/* 8001B8E8 00018848 C0 21 00 0C */ lfs f1, 0xc(r1)
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|
|
/* 8001B8EC 0001884C C0 41 00 18 */ lfs f2, 0x18(r1)
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|
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|
|
/* 8001B8F0 00018850 48 37 93 7D */ bl atan2
|
|
|
|
|
/* 8001B8F4 00018854 FF A0 08 50 */ fneg f29, f1
|
|
|
|
|
/* 8001B8F8 00018858 C0 21 00 20 */ lfs f1, 0x20(r1)
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|
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|
|
/* 8001B8FC 0001885C C0 41 00 28 */ lfs f2, 0x28(r1)
|
|
|
|
|
/* 8001B900 00018860 48 37 93 6D */ bl atan2
|
|
|
|
|
/* 8001B904 00018864 C0 01 00 24 */ lfs f0, 0x24(r1)
|
|
|
|
|
/* 8001B908 00018868 FF C0 08 50 */ fneg f30, f1
|
|
|
|
|
/* 8001B90C 0001886C FC 40 F8 90 */ fmr f2, f31
|
|
|
|
|
/* 8001B910 00018870 FC 20 00 50 */ fneg f1, f0
|
|
|
|
|
/* 8001B914 00018874 48 37 93 59 */ bl atan2
|
|
|
|
|
/* 8001B918 00018878 FC 40 08 50 */ fneg f2, f1
|
|
|
|
|
/* 8001B91C 0001887C FC 20 F0 18 */ frsp f1, f30
|
|
|
|
|
/* 8001B920 00018880 FC 00 E8 18 */ frsp f0, f29
|
|
|
|
|
/* 8001B924 00018884 FC 40 10 18 */ frsp f2, f2
|
|
|
|
|
/* 8001B928 00018888 D0 5F 00 00 */ stfs f2, 0(r31)
|
|
|
|
|
/* 8001B92C 0001888C D0 3F 00 04 */ stfs f1, 4(r31)
|
|
|
|
|
/* 8001B930 00018890 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
|
|
|
/* 8001B934 00018894 48 00 00 44 */ b lbl_8001B978
|
|
|
|
|
lbl_8001B938:
|
|
|
|
|
/* 8001B938 00018898 C0 01 00 10 */ lfs f0, 0x10(r1)
|
|
|
|
|
/* 8001B93C 0001889C C0 41 00 08 */ lfs f2, 8(r1)
|
|
|
|
|
/* 8001B940 000188A0 FC 20 00 50 */ fneg f1, f0
|
|
|
|
|
/* 8001B944 000188A4 48 37 93 29 */ bl atan2
|
|
|
|
|
/* 8001B948 000188A8 C0 01 00 24 */ lfs f0, 0x24(r1)
|
|
|
|
|
/* 8001B94C 000188AC FF A0 08 50 */ fneg f29, f1
|
|
|
|
|
/* 8001B950 000188B0 FC 40 F8 90 */ fmr f2, f31
|
|
|
|
|
/* 8001B954 000188B4 FC 20 00 50 */ fneg f1, f0
|
|
|
|
|
/* 8001B958 000188B8 48 37 93 15 */ bl atan2
|
|
|
|
|
/* 8001B95C 000188BC FC 40 08 50 */ fneg f2, f1
|
|
|
|
|
/* 8001B960 000188C0 C0 02 82 5C */ lfs f0, lbl_805A9F7C@sda21(r2)
|
|
|
|
|
/* 8001B964 000188C4 FC 20 E8 18 */ frsp f1, f29
|
|
|
|
|
/* 8001B968 000188C8 FC 40 10 18 */ frsp f2, f2
|
|
|
|
|
/* 8001B96C 000188CC D0 5F 00 00 */ stfs f2, 0(r31)
|
|
|
|
|
/* 8001B970 000188D0 D0 3F 00 04 */ stfs f1, 4(r31)
|
|
|
|
|
/* 8001B974 000188D4 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
|
|
|
lbl_8001B978:
|
|
|
|
|
/* 8001B978 000188D8 E3 E1 00 68 */ psq_l f31, 104(r1), 0, qr0
|
|
|
|
|
/* 8001B97C 000188DC CB E1 00 60 */ lfd f31, 0x60(r1)
|
|
|
|
|
/* 8001B980 000188E0 E3 C1 00 58 */ psq_l f30, 88(r1), 0, qr0
|
|
|
|
|
/* 8001B984 000188E4 CB C1 00 50 */ lfd f30, 0x50(r1)
|
|
|
|
|
/* 8001B988 000188E8 E3 A1 00 48 */ psq_l f29, 72(r1), 0, qr0
|
|
|
|
|
/* 8001B98C 000188EC CB A1 00 40 */ lfd f29, 0x40(r1)
|
|
|
|
|
/* 8001B990 000188F0 80 01 00 74 */ lwz r0, 0x74(r1)
|
|
|
|
|
/* 8001B994 000188F4 83 E1 00 3C */ lwz r31, 0x3c(r1)
|
|
|
|
|
/* 8001B998 000188F8 7C 08 03 A6 */ mtlr r0
|
|
|
|
|
/* 8001B99C 000188FC 38 21 00 70 */ addi r1, r1, 0x70
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8001B9A0 00018900 4E 80 00 20 */ blr
|
2022-04-12 05:41:21 +00:00
|
|
|
|
|
|
|
|
.global __sinit_CEulerAngles_cpp
|
|
|
|
|
__sinit_CEulerAngles_cpp:
|
|
|
|
|
/* 8001B9A4 00018904 C0 02 82 5C */ lfs f0, lbl_805A9F7C@sda21(r2)
|
|
|
|
|
/* 8001B9A8 00018908 3C 60 80 57 */ lis r3, lbl_8056A5F4@ha
|
|
|
|
|
/* 8001B9AC 0001890C D4 03 A5 F4 */ stfsu f0, lbl_8056A5F4@l(r3)
|
|
|
|
|
/* 8001B9B0 00018910 D0 03 00 04 */ stfs f0, 4(r3)
|
|
|
|
|
/* 8001B9B4 00018914 D0 03 00 08 */ stfs f0, 8(r3)
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8001B9B8 00018918 4E 80 00 20 */ blr
|
2022-04-12 05:41:21 +00:00
|
|
|
|
|
|
|
|
.global FromMatrix3f__12CEulerAnglesFRC9CMatrix3f
|
|
|
|
|
FromMatrix3f__12CEulerAnglesFRC9CMatrix3f:
|
|
|
|
|
/* 8001B9BC 0001891C 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
|
|
|
/* 8001B9C0 00018920 7C 08 02 A6 */ mflr r0
|
|
|
|
|
/* 8001B9C4 00018924 38 A4 00 10 */ addi r5, r4, 0x10
|
|
|
|
|
/* 8001B9C8 00018928 38 C4 00 20 */ addi r6, r4, 0x20
|
|
|
|
|
/* 8001B9CC 0001892C 90 01 00 14 */ stw r0, 0x14(r1)
|
|
|
|
|
/* 8001B9D0 00018930 48 2F 4C AD */ bl __ct__9CMatrix3fFRC9CVector3fRC9CVector3fRC9CVector3f
|
|
|
|
|
/* 8001B9D4 00018934 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
|
|
|
/* 8001B9D8 00018938 7C 08 03 A6 */ mtlr r0
|
|
|
|
|
/* 8001B9DC 0001893C 38 21 00 10 */ addi r1, r1, 0x10
|
2022-07-14 05:48:03 +00:00
|
|
|
/* 8001B9E0 00018940 4E 80 00 20 */ blr
|
