Update macros.inc with SPR names; PPCArch cleanup

include/asm_types.h

@@ -0,0 +1,84 @@
+#ifndef _ASM_TYPES
+#define _ASM_TYPES
+
+// Special Purpose Registers (SPRs)
+#define XER 1
+#define LR 8
+#define CTR 9
+#define DSISR 18
+#define DAR 19
+#define DEC 22
+#define SDR1 25
+#define SRR0 26
+#define SRR1 27
+#define SPRG0 272
+#define SPRG1 273
+#define SPRG2 274
+#define SPRG3 275
+#define EAR 282
+#define PVR 287
+#define IBAT0U 528
+#define IBAT0L 529
+#define IBAT1U 530
+#define IBAT1L 531
+#define IBAT2U 532
+#define IBAT2L 533
+#define IBAT3U 534
+#define IBAT3L 535
+#define DBAT0U 536
+#define DBAT0L 537
+#define DBAT1U 538
+#define DBAT1L 539
+#define DBAT2U 540
+#define DBAT2L 541
+#define DBAT3U 542
+#define DBAT3L 543
+#define GQR0 912
+#define GQR1 913
+#define GQR2 914
+#define GQR3 915
+#define GQR4 916
+#define GQR5 917
+#define GQR6 918
+#define GQR7 919
+#define HID2 920
+#define WPAR 921
+#define DMA_U 922
+#define DMA_L 923
+#define UMMCR0 936
+#define UPMC1 937
+#define UPMC2 938
+#define USIA 939
+#define UMMCR1 940
+#define UPMC3 941
+#define UPMC4 942
+#define USDA 943
+#define MMCR0 952
+#define PMC1 953
+#define PMC2 954
+#define SIA 955
+#define MMCR1 956
+#define PMC3 957
+#define PMC4 958
+#define SDA 959
+#define HID0 1008
+#define HID1 1009
+#define IABR 1010
+#define DABR 1013
+#define L2CR 1017
+#define ICTC 1019
+#define THRM1 1020
+#define THRM2 1021
+#define THRM3 1022
+
+// Condition Registers (CRs)
+#define cr0 0
+#define cr1 1
+#define cr2 2
+#define cr3 3
+#define cr4 4
+#define cr5 5
+#define cr6 6
+#define cr7 7
+
+#endif // _ASM_TYPES

include/macros.inc

@@ -1,4 +1,4 @@
-# PowerPC Register Constants
+# General Purpose Registers (GPRs)
 .set r0, 0
 .set r1, 1
 .set r2, 2
@@ -31,6 +31,8 @@
 .set r29, 29
 .set r30, 30
 .set r31, 31
+
+# Floating Point Registers (FPRs)
 .set f0, 0
 .set f1, 1
 .set f2, 2
@@ -63,6 +65,8 @@
 .set f29, 29
 .set f30, 30
 .set f31, 31
+
+# Graphics Quantization Registers (GQRs)
 .set qr0, 0
 .set qr1, 1
 .set qr2, 2
@@ -71,3 +75,73 @@
 .set qr5, 5
 .set qr6, 6
 .set qr7, 7
+
+# Special Purpose Registers (SPRs)
+.set XER, 1
+.set LR, 8
+.set CTR, 9
+.set DSISR, 18
+.set DAR, 19
+.set DEC, 22
+.set SDR1, 25
+.set SRR0, 26
+.set SRR1, 27
+.set SPRG0, 272
+.set SPRG1, 273
+.set SPRG2, 274
+.set SPRG3, 275
+.set EAR, 282
+.set PVR, 287
+.set IBAT0U, 528
+.set IBAT0L, 529
+.set IBAT1U, 530
+.set IBAT1L, 531
+.set IBAT2U, 532
+.set IBAT2L, 533
+.set IBAT3U, 534
+.set IBAT3L, 535
+.set DBAT0U, 536
+.set DBAT0L, 537
+.set DBAT1U, 538
+.set DBAT1L, 539
+.set DBAT2U, 540
+.set DBAT2L, 541
+.set DBAT3U, 542
+.set DBAT3L, 543
+.set GQR0, 912
+.set GQR1, 913
+.set GQR2, 914
+.set GQR3, 915
+.set GQR4, 916
+.set GQR5, 917
+.set GQR6, 918
+.set GQR7, 919
+.set HID2, 920
+.set WPAR, 921
+.set DMA_U, 922
+.set DMA_L, 923
+.set UMMCR0, 936
+.set UPMC1, 937
+.set UPMC2, 938
+.set USIA, 939
+.set UMMCR1, 940
+.set UPMC3, 941
+.set UPMC4, 942
+.set USDA, 943
+.set MMCR0, 952
+.set PMC1, 953
+.set PMC2, 954
+.set SIA, 955
+.set MMCR1, 956
+.set PMC3, 957
+.set PMC4, 958
+.set SDA, 959
+.set HID0, 1008
+.set HID1, 1009
+.set IABR, 1010
+.set DABR, 1013
+.set L2CR, 1017
+.set ICTC, 1019
+.set THRM1, 1020
+.set THRM2, 1021
+.set THRM3, 1022

src/Dolphin/PPCArch.c

@@ -1,4 +1,5 @@
 #include "types.h"
+#include "asm_types.h"
 // clang-format off
 
 union FpscrUnion
@@ -422,7 +423,7 @@ void PPCMtfpscr(register u32 newFPSCR)
 asm u32 PPCMfhid2 ( void )
 {
     nofralloc
-    mfspr r3, 920
+    mfspr r3, HID2
     blr
 }
 
@@ -434,7 +435,7 @@ asm u32 PPCMfhid2 ( void )
 asm void PPCMthid2 ( register u32 newhid2 )
 {
     nofralloc
-    mtspr 920, newhid2
+    mtspr HID2, newhid2
     blr
 }
 
@@ -447,7 +448,7 @@ asm u32 PPCMfwpar(void)
 {
 	nofralloc
 	sync
-	mfspr r3, 921
+	mfspr r3, WPAR
 	blr
 }
 
@@ -545,7 +546,7 @@ void PPCDisableSpeculation (void)
 asm void PPCSetFpIEEEMode(void)
 {
     nofralloc
-    mtfsb0      29
+    mtfsb0      4*cr7+1
     blr
 }
 /*
@@ -556,7 +557,7 @@ asm void PPCSetFpIEEEMode(void)
 asm void PPCSetFpNonIEEEMode (void)
 {
     nofralloc
-    mtfsb1      29
+    mtfsb1      4*cr7+1
     blr
 }
 // clang-format on