mirror of https://github.com/PrimeDecomp/prime.git
Match and link OSCache
This commit is contained in:
parent
1f7d9fe70c
commit
2c8976221f
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@ -23,7 +23,9 @@
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"dvd.h": "c",
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"dvdpriv.h": "c",
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"__ppc_eabi_linker.h": "c",
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"hack.h": "c"
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"hack.h": "c",
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"db.h": "c",
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"ppcarch.h": "c"
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},
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"files.autoSave": "onFocusChange",
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"files.insertFinalNewline": true,
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@ -131,9 +131,6 @@ lbl_8037EB84:
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/* 8037EB84 0037BAE4 7C 00 1F EC */ dcbz r0, r3
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/* 8037EB88 0037BAE8 38 63 00 20 */ addi r3, r3, 0x20
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/* 8037EB8C 0037BAEC 42 00 FF F8 */ bdnz lbl_8037EB84
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.global sub_8037eb90
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sub_8037eb90:
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/* 8037EB90 0037BAF0 4E 80 00 20 */ blr
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.global ICInvalidateRange
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@ -255,8 +252,8 @@ lbl_8037ECFC:
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/* 8037ED10 0037BC70 7C 98 E3 A6 */ mtspr 0x398, r4
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/* 8037ED14 0037BC74 4E 80 00 20 */ blr
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.global sub_8037ed18
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sub_8037ed18:
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.global LCLoadBlocks
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LCLoadBlocks:
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/* 8037ED18 0037BC78 54 A6 F6 FE */ rlwinm r6, r5, 0x1e, 0x1b, 0x1f
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/* 8037ED1C 0037BC7C 54 84 01 3E */ clrlwi r4, r4, 4
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/* 8037ED20 0037BC80 7C C6 23 78 */ or r6, r6, r4
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@ -279,8 +276,8 @@ LCStoreBlocks:
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/* 8037ED58 0037BCB8 7C DB E3 A6 */ mtspr 0x39b, r6
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/* 8037ED5C 0037BCBC 4E 80 00 20 */ blr
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.global sub_8037ed60
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sub_8037ed60:
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.global LCLoadData
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LCLoadData:
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/* 8037ED60 0037BCC0 7C 08 02 A6 */ mflr r0
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/* 8037ED64 0037BCC4 90 01 00 04 */ stw r0, 4(r1)
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/* 8037ED68 0037BCC8 94 21 FF D8 */ stwu r1, -0x28(r1)
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@ -306,14 +303,14 @@ lbl_8037EDA4:
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/* 8037EDAC 0037BD0C 7F 83 E3 78 */ mr r3, r28
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/* 8037EDB0 0037BD10 7F A4 EB 78 */ mr r4, r29
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/* 8037EDB4 0037BD14 7F E5 FB 78 */ mr r5, r31
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/* 8037EDB8 0037BD18 4B FF FF 61 */ bl sub_8037ed18
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/* 8037EDB8 0037BD18 4B FF FF 61 */ bl LCLoadBlocks
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/* 8037EDBC 0037BD1C 3B E0 00 00 */ li r31, 0
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/* 8037EDC0 0037BD20 48 00 00 20 */ b lbl_8037EDE0
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lbl_8037EDC4:
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/* 8037EDC4 0037BD24 7F 83 E3 78 */ mr r3, r28
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/* 8037EDC8 0037BD28 7F A4 EB 78 */ mr r4, r29
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/* 8037EDCC 0037BD2C 38 A0 00 00 */ li r5, 0
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/* 8037EDD0 0037BD30 4B FF FF 49 */ bl sub_8037ed18
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/* 8037EDD0 0037BD30 4B FF FF 49 */ bl LCLoadBlocks
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/* 8037EDD4 0037BD34 3B FF FF 80 */ addi r31, r31, -128
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/* 8037EDD8 0037BD38 3B 9C 10 00 */ addi r28, r28, 0x1000
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/* 8037EDDC 0037BD3C 3B BD 10 00 */ addi r29, r29, 0x1000
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@ -289,7 +289,7 @@ lbl_80353BD0:
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/* 80353BD0 00350B30 1C BF 00 0C */ mulli r5, r31, 0xc
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/* 80353BD4 00350B34 38 05 00 1F */ addi r0, r5, 0x1f
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/* 80353BD8 00350B38 54 05 00 34 */ rlwinm r5, r0, 0, 0, 0x1a
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/* 80353BDC 00350B3C 48 02 B1 85 */ bl sub_8037ed60
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/* 80353BDC 00350B3C 48 02 B1 85 */ bl LCLoadData
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/* 80353BE0 00350B40 88 0D 9E 04 */ lbz r0, lbl_805A89C4@sda21(r13)
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/* 80353BE4 00350B44 80 6D AA 74 */ lwz r3, lbl_805A9634@sda21(r13)
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/* 80353BE8 00350B48 7C 00 00 34 */ cntlzw r0, r0
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@ -1126,4 +1126,3 @@ lbl_803D8300:
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# ROM: 0x3D5300
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.asciz "??(??)"
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.balign 4
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@ -6,6 +6,35 @@
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define MSR_IR 0x00000020
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#define MSR_DR 0x00000010
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#define L2CR_L2E 0x80000000
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#define L2CR_L2PE 0x40000000
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#define L2CR_L2SIZ_256K 0x10000000
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#define L2CR_L2SIZ_512K 0x20000000
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#define L2CR_L2SIZ_1M 0x30000000
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#define L2CR_L2CLK_1_0 0x02000000
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#define L2CR_L2CLK_1_5 0x04000000
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#define L2CR_L2CLK_2_0 0x08000000
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#define L2CR_L2CLK_2_5 0x0A000000
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#define L2CR_L2CLK_3_0 0x0C000000
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#define L2CR_RAM_FLOW_THRU_BURST 0x00000000
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#define L2CR_RAM_PIPELINE_BURST 0x01000000
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#define L2CR_RAM_PIPELINE_LATE 0x01800000
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#define L2CR_L2I 0x00200000
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#define SRR1_DMA_BIT 0x00200000
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#define SRR1_L2DP_BIT 0x00100000
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#define HID0_ICE 0x00008000
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#define HID0_DCE 0x00004000
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#define HID2_DCHERR 0x00800000
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#define HID2_DNCERR 0x00400000
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#define HID2_DCMERR 0x00200000
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#define HID2_DQOERR 0x00100000
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#define HID2_DCHEE 0x00080000
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#define HID2_DNCEE 0x00040000
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#define HID2_DCMEE 0x00020000
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#define HID2_DQOEE 0x00010000
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u32 PPCMfmsr();
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void PPCMtmsr(u32 newMSR);
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@ -22,6 +22,7 @@ extern DBInterface* __DBInterface;
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void DBInit(void);
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void DBInitComm(int* inputFlagPtr, int* mtrCallback);
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static void __DBExceptionDestination(void);
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void DBPrintf(char* format, ...);
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#ifdef __cplusplus
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}
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@ -7,9 +7,27 @@
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extern "C" {
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#endif
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void DCInvalidateRange(void* addr, u32 nBytes);
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void DCFlushRange(void* addr, u32 nBytes);
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void DCStoreRange(void* addr, u32 nBytes);
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void DCFlushRangeNoSync(void* addr, u32 nBytes);
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void DCStoreRangeNoSync(void* addr, u32 nBytes);
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void DCZeroRange(void* addr, u32 nBytes);
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void DCTouchRange(void* addr, u32 nBytes);
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void ICInvalidateRange(void* addr, u32 nBytes);
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#define LC_BASE_PREFIX 0xE000
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#define LC_BASE (LC_BASE_PREFIX << 16)
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void LCEnable();
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void LCDisable(void);
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void LCLoadBlocks(void* destTag, void* srcAddr, u32 numBlocks);
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void LCStoreBlocks(void* destAddr, void* srcTag, u32 numBlocks);
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u32 LCLoadData(void* destAddr, void* srcAddr, u32 nBytes);
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u32 LCStoreData(void* destAddr, void* srcAddr, u32 nBytes);
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u32 LCQueueLength(void);
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void LCQueueWait(u32 len);
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void LCFlushQueue(void);
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#ifdef __cplusplus
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}
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@ -7,6 +7,26 @@
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extern "C" {
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#endif
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#define OS_ERROR_SYSTEM_RESET 0
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#define OS_ERROR_MACHINE_CHECK 1
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#define OS_ERROR_DSI 2
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#define OS_ERROR_ISI 3
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#define OS_ERROR_EXTERNAL_INTERRUPT 4
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#define OS_ERROR_ALIGNMENT 5
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#define OS_ERROR_PROGRAM 6
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#define OS_ERROR_FLOATING_POINT 7
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#define OS_ERROR_DECREMENTER 8
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#define OS_ERROR_SYSTEM_CALL 9
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#define OS_ERROR_TRACE 10
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#define OS_ERROR_PERFORMACE_MONITOR 11
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#define OS_ERROR_BREAKPOINT 12
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#define OS_ERROR_SYSTEM_INTERRUPT 13
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#define OS_ERROR_THERMAL_INTERRUPT 14
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#define OS_ERROR_PROTECTION 15
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#define OS_ERROR_FPE 16
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#define OS_ERROR_MAX (OS_ERROR_FPE + 1)
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typedef u16 OSError;
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typedef void OSErrorHandler(OSError, OSContext* context, ...);
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@ -692,7 +692,7 @@ OS_FILES :=\
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$(BUILD_DIR)/asm/Dolphin/os/OSAlarm.o\
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$(BUILD_DIR)/asm/Dolphin/os/OSArena.o\
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$(BUILD_DIR)/src/Dolphin/os/OSAudioSystem.ep.o\
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$(BUILD_DIR)/asm/Dolphin/os/OSCache.o\
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$(BUILD_DIR)/src/Dolphin/os/OSCache.ep.o\
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$(BUILD_DIR)/asm/Dolphin/os/OSContext.o\
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$(BUILD_DIR)/asm/Dolphin/os/OSError.o\
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$(BUILD_DIR)/asm/Dolphin/os/OSFatal.o\
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@ -546,7 +546,7 @@ void PPCDisableSpeculation (void)
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asm void PPCSetFpIEEEMode(void)
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{
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nofralloc
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mtfsb0 4*cr7+1
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mtfsb0 4*7+1
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blr
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}
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/*
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@ -557,7 +557,7 @@ asm void PPCSetFpIEEEMode(void)
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asm void PPCSetFpNonIEEEMode (void)
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{
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nofralloc
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mtfsb1 4*cr7+1
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mtfsb1 4*7+1
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blr
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}
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// clang-format on
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@ -0,0 +1,427 @@
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#include "dolphin/PPCArch.h"
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#include "dolphin/os.h"
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// Can't use this due to weird condition register issues
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//#include "asm_types.h"
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#define HID2 920
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#include "dolphin/db.h"
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/* clang-format off */
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asm void DCEnable() {
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nofralloc
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sync
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mfspr r3, HID0
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ori r3, r3, 0x4000
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mtspr HID0, r3
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blr
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}
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asm void DCInvalidateRange(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbi r0, addr
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addi addr, addr, 32
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bdnz @1
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blr
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}
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asm void DCFlushRange(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbf r0, addr
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addi addr, addr, 32
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bdnz @1
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sc
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blr
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}
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asm void DCStoreRange(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbst r0, addr
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addi addr, addr, 32
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bdnz @1
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||||
sc
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|
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blr
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}
|
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asm void DCFlushRangeNoSync(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
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srwi nBytes, nBytes, 5
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mtctr nBytes
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@1
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dcbf r0, addr
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addi addr, addr, 32
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||||
bdnz @1
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blr
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||||
}
|
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|
||||
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asm void DCStoreRangeNoSync(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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||||
add nBytes, nBytes, r5
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addi nBytes, nBytes, 31
|
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srwi nBytes, nBytes, 5
|
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mtctr nBytes
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@1
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dcbst r0, addr
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addi addr, addr, 32
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||||
bdnz @1
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|
||||
blr
|
||||
}
|
||||
|
||||
asm void DCZeroRange(register void* addr, register u32 nBytes) {
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nofralloc
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cmplwi nBytes, 0
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blelr
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clrlwi r5, addr, 27
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||||
add nBytes, nBytes, r5
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||||
addi nBytes, nBytes, 31
|
||||
srwi nBytes, nBytes, 5
|
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mtctr nBytes
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||||
|
||||
@1
|
||||
dcbz r0, addr
|
||||
addi addr, addr, 32
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||||
bdnz @1
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||||
|
||||
blr
|
||||
}
|
||||
|
||||
|
||||
asm void ICInvalidateRange(register void* addr, register u32 nBytes) {
|
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nofralloc
|
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nofralloc
|
||||
cmplwi nBytes, 0
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||||
blelr
|
||||
clrlwi r5, addr, 27
|
||||
add nBytes, nBytes, r5
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||||
addi nBytes, nBytes, 31
|
||||
srwi nBytes, nBytes, 5
|
||||
mtctr nBytes
|
||||
|
||||
@1
|
||||
icbi r0, addr
|
||||
addi addr, addr, 32
|
||||
bdnz @1
|
||||
sync
|
||||
isync
|
||||
|
||||
blr
|
||||
}
|
||||
|
||||
|
||||
asm void ICFlashInvalidate() {
|
||||
nofralloc
|
||||
mfspr r3, HID0
|
||||
ori r3, r3, 0x800
|
||||
mtspr HID0, r3
|
||||
blr
|
||||
}
|
||||
|
||||
asm void ICEnable() {
|
||||
nofralloc
|
||||
isync
|
||||
mfspr r3, HID0
|
||||
ori r3, r3, 0x8000
|
||||
mtspr HID0, r3
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||||
blr
|
||||
}
|
||||
|
||||
#define LC_LINES 512
|
||||
#define CACHE_LINES 1024
|
||||
|
||||
asm void __LCEnable() {
|
||||
nofralloc
|
||||
mfmsr r5
|
||||
ori r5, r5, 0x1000
|
||||
mtmsr r5
|
||||
|
||||
lis r3, OS_CACHED_REGION_PREFIX
|
||||
li r4, CACHE_LINES
|
||||
mtctr r4
|
||||
_touchloop:
|
||||
dcbt 0,r3
|
||||
dcbst 0,r3
|
||||
addi r3,r3,32
|
||||
bdnz _touchloop
|
||||
mfspr r4, HID2
|
||||
oris r4, r4, 0x100F
|
||||
mtspr HID2, r4
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
lis r3, LC_BASE_PREFIX
|
||||
ori r3, r3, 0x0002
|
||||
mtspr DBAT3L, r3
|
||||
ori r3, r3, 0x01fe
|
||||
mtspr DBAT3U, r3
|
||||
isync
|
||||
lis r3, LC_BASE_PREFIX
|
||||
li r6, LC_LINES
|
||||
mtctr r6
|
||||
li r6, 0
|
||||
|
||||
_lockloop:
|
||||
dcbz_l r6, r3
|
||||
addi r3, r3, 32
|
||||
bdnz+ _lockloop
|
||||
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
nop
|
||||
|
||||
blr
|
||||
}
|
||||
|
||||
void LCEnable() {
|
||||
BOOL enabled;
|
||||
|
||||
enabled = OSDisableInterrupts();
|
||||
__LCEnable();
|
||||
OSRestoreInterrupts(enabled);
|
||||
}
|
||||
|
||||
|
||||
asm void LCDisable() {
|
||||
nofralloc
|
||||
lis r3, LC_BASE_PREFIX
|
||||
li r4, LC_LINES
|
||||
mtctr r4
|
||||
@1
|
||||
dcbi r0, r3
|
||||
addi r3, r3, 32
|
||||
bdnz @1
|
||||
mfspr r4, HID2
|
||||
rlwinm r4, r4, 0, 4, 2
|
||||
mtspr HID2, r4
|
||||
blr
|
||||
}
|
||||
|
||||
|
||||
asm void LCLoadBlocks(register void* destTag, register void* srcAddr, register u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm srcAddr, srcAddr, 0, 4, 31
|
||||
or r6, r6, srcAddr
|
||||
mtspr DMA_U, r6
|
||||
rlwinm r6, numBlocks, 2, 28, 29
|
||||
or r6, r6, destTag
|
||||
ori r6, r6, 0x12
|
||||
mtspr DMA_L, r6
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCStoreBlocks(register void* destAddr, register void* srcTag, register u32 numBlocks) {
|
||||
nofralloc
|
||||
rlwinm r6, numBlocks, 30, 27, 31
|
||||
rlwinm destAddr, destAddr, 0, 4, 31
|
||||
or r6, r6, destAddr
|
||||
mtspr DMA_U, r6
|
||||
rlwinm r6, numBlocks, 2, 28, 29
|
||||
or r6, r6, srcTag
|
||||
ori r6, r6, 0x2
|
||||
mtspr DMA_L, r6
|
||||
blr
|
||||
}
|
||||
|
||||
/* clang-format on */
|
||||
|
||||
u32 LCLoadData(register void* destAddr, register void* srcAddr, register u32 nBytes) {
|
||||
u32 numBlocks = (nBytes + 31) / 32;
|
||||
u32 numTransactions = (numBlocks + 128 - 1) / 128;
|
||||
|
||||
while (numBlocks > 0) {
|
||||
if (numBlocks < 128) {
|
||||
LCLoadBlocks(destAddr, srcAddr, numBlocks);
|
||||
numBlocks = 0;
|
||||
} else {
|
||||
LCLoadBlocks(destAddr, srcAddr, 0);
|
||||
numBlocks -= 128;
|
||||
destAddr = (void*)((u32)destAddr + 4096);
|
||||
srcAddr = (void*)((u32)srcAddr + 4096);
|
||||
}
|
||||
}
|
||||
|
||||
return numTransactions;
|
||||
}
|
||||
u32 LCStoreData(void* destAddr, void* srcAddr, u32 nBytes) {
|
||||
u32 numBlocks = (nBytes + 31) / 32;
|
||||
u32 numTransactions = (numBlocks + 128 - 1) / 128;
|
||||
|
||||
while (numBlocks > 0) {
|
||||
if (numBlocks < 128) {
|
||||
LCStoreBlocks(destAddr, srcAddr, numBlocks);
|
||||
numBlocks = 0;
|
||||
} else {
|
||||
LCStoreBlocks(destAddr, srcAddr, 0);
|
||||
numBlocks -= 128;
|
||||
destAddr = (void*)((u32)destAddr + 4096);
|
||||
srcAddr = (void*)((u32)srcAddr + 4096);
|
||||
}
|
||||
}
|
||||
|
||||
return numTransactions;
|
||||
}
|
||||
|
||||
/* clang-format off */
|
||||
asm u32 LCQueueLength() {
|
||||
nofralloc
|
||||
mfspr r4, HID2
|
||||
rlwinm r3, r4, 8, 28, 31
|
||||
blr
|
||||
}
|
||||
|
||||
asm void LCQueueWait(register u32 len) {
|
||||
nofralloc
|
||||
addi len, len, 1
|
||||
@1
|
||||
mfspr r4, HID2
|
||||
rlwinm r4, r4, 8, 28, 31
|
||||
cmpw cr2, r4, r3
|
||||
bge cr2, @1
|
||||
blr
|
||||
}
|
||||
|
||||
/* clang-format on */
|
||||
static void L2Disable(void) {
|
||||
__sync();
|
||||
PPCMtl2cr(PPCMfl2cr() & ~0x80000000);
|
||||
__sync();
|
||||
}
|
||||
|
||||
void L2GlobalInvalidate(void) {
|
||||
L2Disable();
|
||||
PPCMtl2cr(PPCMfl2cr() | 0x00200000);
|
||||
while (PPCMfl2cr() & 0x00000001u)
|
||||
;
|
||||
PPCMtl2cr(PPCMfl2cr() & ~0x00200000);
|
||||
while (PPCMfl2cr() & 0x00000001u) {
|
||||
DBPrintf(">>> L2 INVALIDATE : SHOULD NEVER HAPPEN\n");
|
||||
}
|
||||
}
|
||||
|
||||
static void L2Init(void) {
|
||||
u32 oldMSR;
|
||||
oldMSR = PPCMfmsr();
|
||||
__sync();
|
||||
PPCMtmsr(MSR_IR | MSR_DR);
|
||||
__sync();
|
||||
L2Disable();
|
||||
L2GlobalInvalidate();
|
||||
PPCMtmsr(oldMSR);
|
||||
}
|
||||
|
||||
void L2Enable(void) { PPCMtl2cr((PPCMfl2cr() | L2CR_L2E) & ~L2CR_L2I); }
|
||||
|
||||
void DMAErrorHandler(OSError error, OSContext* context, ...) {
|
||||
u32 hid2 = PPCMfhid2();
|
||||
|
||||
OSReport("Machine check received\n");
|
||||
OSReport("HID2 = 0x%x SRR1 = 0x%x\n", hid2, context->srr1);
|
||||
if (!(hid2 & (HID2_DCHERR | HID2_DNCERR | HID2_DCMERR | HID2_DQOERR)) ||
|
||||
!(context->srr1 & SRR1_DMA_BIT)) {
|
||||
OSReport("Machine check was not DMA/locked cache related\n");
|
||||
OSDumpContext(context);
|
||||
PPCHalt();
|
||||
}
|
||||
|
||||
OSReport("DMAErrorHandler(): An error occurred while processing DMA.\n");
|
||||
OSReport("The following errors have been detected and cleared :\n");
|
||||
|
||||
if (hid2 & HID2_DCHERR) {
|
||||
OSReport("\t- Requested a locked cache tag that was already in the cache\n");
|
||||
}
|
||||
|
||||
if (hid2 & HID2_DNCERR) {
|
||||
OSReport("\t- DMA attempted to access normal cache\n");
|
||||
}
|
||||
|
||||
if (hid2 & HID2_DCMERR) {
|
||||
OSReport("\t- DMA missed in data cache\n");
|
||||
}
|
||||
|
||||
if (hid2 & HID2_DQOERR) {
|
||||
OSReport("\t- DMA queue overflowed\n");
|
||||
}
|
||||
|
||||
// write hid2 back to clear the error bits
|
||||
PPCMthid2(hid2);
|
||||
}
|
||||
|
||||
void __OSCacheInit() {
|
||||
if (!(PPCMfhid0() & HID0_ICE)) {
|
||||
ICEnable();
|
||||
DBPrintf("L1 i-caches initialized\n");
|
||||
}
|
||||
if (!(PPCMfhid0() & HID0_DCE)) {
|
||||
DCEnable();
|
||||
DBPrintf("L1 d-caches initialized\n");
|
||||
}
|
||||
|
||||
if (!(PPCMfl2cr() & L2CR_L2E)) {
|
||||
L2Init();
|
||||
L2Enable();
|
||||
DBPrintf("L2 cache initialized\n");
|
||||
}
|
||||
|
||||
OSSetErrorHandler(OS_ERROR_MACHINE_CHECK, DMAErrorHandler);
|
||||
DBPrintf("Locked cache machine check handler installed\n");
|
||||
}
|
||||
Loading…
Reference in New Issue