mirror of https://github.com/PrimeDecomp/prime.git
Remove NONMATCHING, use frank (oops)
This commit is contained in:
parent
e7eaf286f9
commit
7fd2ea8dda
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@ -736,7 +736,7 @@ LIBS = [
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},
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{
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"lib": "dsp",
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"mwcc_version": "1.2.5",
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"mwcc_version": "1.2.5e",
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"cflags": "$cflags_base",
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"host": False,
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"objects": [
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@ -195,7 +195,6 @@ void __DSPHandler(__OSInterrupt, OSContext* context) {
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OSSetCurrentContext(context);
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}
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#if NONMATCHING
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void __DSP_exec_task(DSPTaskInfo* curr, DSPTaskInfo* next) {
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if (curr) {
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DSPSendMailToDSP((u32)(curr->dram_mmem_addr));
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@ -260,144 +259,8 @@ void __DSP_exec_task(DSPTaskInfo* curr, DSPTaskInfo* next) {
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;
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}
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}
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#else
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/* clang-format off */
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#pragma push
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#pragma optimization_level 0
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#pragma optimizewithasm off
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asm void __DSP_exec_task(DSPTaskInfo* curr, DSPTaskInfo* next) {
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nofralloc
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mflr r0
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stw r0, 4(r1)
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stwu r1, -0x18(r1)
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stw r31, 0x14(r1)
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addi r31, r4, 0
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stw r30, 0x10(r1)
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or. r30, r3, r3
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beq lbl_803700A4
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lwz r3, 0x18(r30)
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bl DSPSendMailToDSP
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lbl_8037006C:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_8037006C
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lwz r3, 0x1c(r30)
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bl DSPSendMailToDSP
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lbl_80370080:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370080
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lwz r3, 0x20(r30)
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bl DSPSendMailToDSP
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lbl_80370094:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370094
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b lbl_803700E0
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lbl_803700A4:
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li r3, 0
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bl DSPSendMailToDSP
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lbl_803700AC:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803700AC
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li r3, 0
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bl DSPSendMailToDSP
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lbl_803700C0:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803700C0
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li r3, 0
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bl DSPSendMailToDSP
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lbl_803700D4:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803700D4
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lbl_803700E0:
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lwz r3, 0xc(r31)
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bl DSPSendMailToDSP
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lbl_803700E8:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803700E8
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lwz r3, 0x10(r31)
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bl DSPSendMailToDSP
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lbl_803700FC:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803700FC
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lwz r3, 0x14(r31)
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bl DSPSendMailToDSP
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lbl_80370110:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370110
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lwz r0, 0(r31)
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cmplwi r0, 0
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bne lbl_8037017C
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lhz r3, 0x24(r31)
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bl DSPSendMailToDSP
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lbl_80370130:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370130
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li r3, 0
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bl DSPSendMailToDSP
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lbl_80370144:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370144
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li r3, 0
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bl DSPSendMailToDSP
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lbl_80370158:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370158
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li r3, 0
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bl DSPSendMailToDSP
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lbl_8037016C:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_8037016C
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b lbl_803701CC
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lbl_8037017C:
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lhz r3, 0x26(r31)
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bl DSPSendMailToDSP
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lbl_80370184:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370184
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lwz r3, 0x18(r31)
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bl DSPSendMailToDSP
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lbl_80370198:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_80370198
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lwz r3, 0x1c(r31)
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bl DSPSendMailToDSP
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lbl_803701AC:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803701AC
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lwz r3, 0x20(r31)
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bl DSPSendMailToDSP
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lbl_803701C0:
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bl DSPCheckMailToDSP
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cmplwi r3, 0
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bne lbl_803701C0
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lbl_803701CC:
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lwz r0, 0x1c(r1)
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lwz r31, 0x14(r1)
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lwz r30, 0x10(r1)
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addi r1, r1, 0x18
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mtlr r0
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blr
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}
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#pragma pop
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/* clang-format on */
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#endif
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#if NONMATCHING
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#define MSG_BASE 0x80F30000
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void __DSP_boot_task(DSPTaskInfo* task) {
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@ -450,135 +313,6 @@ void __DSP_boot_task(DSPTaskInfo* task) {
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__DSP_debug_printf("__DSP_boot_task() : DRAM MMEM ADDR: 0x%08X\n", (u32)(task->dram_length));
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__DSP_debug_printf("__DSP_boot_task() : Start Vector : 0x%08X\n", (u32)(task->dsp_init_vector));
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}
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#else
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char __DSP_msgs[] = "DSP is booting task: 0x%08X\n\0\0\0\0"
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"__DSP_boot_task() : IRAM MMEM ADDR: 0x%08X\n\0\0\0\0"
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"__DSP_boot_task() : IRAM DSP ADDR : 0x%08X\n\0\0\0\0"
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"__DSP_boot_task() : IRAM LENGTH : 0x%08X\n\0\0\0\0"
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"__DSP_boot_task() : DRAM MMEM ADDR: 0x%08X\n\0\0\0\0"
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"__DSP_boot_task() : Start Vector : 0x%08X\n\0\0\0\0"
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"__DSP_add_task() : Added task : 0x%08X\n\0\0";
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/* clang-format off */
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#pragma push
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#pragma optimization_level 0
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#pragma optimizewithasm off
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asm void __DSP_boot_task(DSPTaskInfo* task) {
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nofralloc
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/* 803701E4 0036D144 7C 08 02 A6 */ mflr r0
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/* 803701E8 0036D148 3C 80 80 3F */ lis r4, __DSP_msgs@ha
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/* 803701EC 0036D14C 90 01 00 04 */ stw r0, 4(r1)
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/* 803701F0 0036D150 94 21 FF E8 */ stwu r1, -0x18(r1)
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/* 803701F4 0036D154 93 E1 00 14 */ stw r31, 0x14(r1)
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/* 803701F8 0036D158 3B E4 FA 50 */ addi r31, r4, __DSP_msgs@l
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/* 803701FC 0036D15C 93 C1 00 10 */ stw r30, 0x10(r1)
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/* 80370200 0036D160 3B C3 00 00 */ addi r30, r3, 0
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lbl_80370204:
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/* 80370204 0036D164 4B FF F7 C5 */ bl DSPCheckMailFromDSP
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/* 80370208 0036D168 28 03 00 00 */ cmplwi r3, 0
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/* 8037020C 0036D16C 41 82 FF F8 */ beq lbl_80370204
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/* 80370210 0036D170 4B FF F7 C9 */ bl DSPReadMailFromDSP
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/* 80370214 0036D174 90 61 00 0C */ stw r3, 0xc(r1)
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/* 80370218 0036D178 3C 60 80 F4 */ lis r3, 0x80F3A001@ha
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/* 8037021C 0036D17C 38 63 A0 01 */ addi r3, r3, 0x80F3A001@l
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/* 80370220 0036D180 4B FF F7 D1 */ bl DSPSendMailToDSP
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lbl_80370224:
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/* 80370224 0036D184 4B FF F7 95 */ bl DSPCheckMailToDSP
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/* 80370228 0036D188 28 03 00 00 */ cmplwi r3, 0
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/* 8037022C 0036D18C 40 82 FF F8 */ bne lbl_80370224
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/* 80370230 0036D190 80 7E 00 0C */ lwz r3, 0xc(r30)
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/* 80370234 0036D194 4B FF F7 BD */ bl DSPSendMailToDSP
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lbl_80370238:
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/* 80370238 0036D198 4B FF F7 81 */ bl DSPCheckMailToDSP
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/* 8037023C 0036D19C 28 03 00 00 */ cmplwi r3, 0
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/* 80370240 0036D1A0 40 82 FF F8 */ bne lbl_80370238
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/* 80370244 0036D1A4 3C 60 80 F4 */ lis r3, 0x80F3C002@ha
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/* 80370248 0036D1A8 38 63 C0 02 */ addi r3, r3, 0x80F3C002@l
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/* 8037024C 0036D1AC 4B FF F7 A5 */ bl DSPSendMailToDSP
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lbl_80370250:
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/* 80370250 0036D1B0 4B FF F7 69 */ bl DSPCheckMailToDSP
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/* 80370254 0036D1B4 28 03 00 00 */ cmplwi r3, 0
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/* 80370258 0036D1B8 40 82 FF F8 */ bne lbl_80370250
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/* 8037025C 0036D1BC 80 1E 00 14 */ lwz r0, 0x14(r30)
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/* 80370260 0036D1C0 54 03 04 3E */ clrlwi r3, r0, 0x10
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/* 80370264 0036D1C4 4B FF F7 8D */ bl DSPSendMailToDSP
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lbl_80370268:
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/* 80370268 0036D1C8 4B FF F7 51 */ bl DSPCheckMailToDSP
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/* 8037026C 0036D1CC 28 03 00 00 */ cmplwi r3, 0
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/* 80370270 0036D1D0 40 82 FF F8 */ bne lbl_80370268
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/* 80370274 0036D1D4 3C 60 80 F4 */ lis r3, 0x80F3A002@ha
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/* 80370278 0036D1D8 38 63 A0 02 */ addi r3, r3, 0x80F3A002@l
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/* 8037027C 0036D1DC 4B FF F7 75 */ bl DSPSendMailToDSP
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lbl_80370280:
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/* 80370280 0036D1E0 4B FF F7 39 */ bl DSPCheckMailToDSP
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/* 80370284 0036D1E4 28 03 00 00 */ cmplwi r3, 0
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/* 80370288 0036D1E8 40 82 FF F8 */ bne lbl_80370280
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/* 8037028C 0036D1EC 80 7E 00 10 */ lwz r3, 0x10(r30)
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/* 80370290 0036D1F0 4B FF F7 61 */ bl DSPSendMailToDSP
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lbl_80370294:
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/* 80370294 0036D1F4 4B FF F7 25 */ bl DSPCheckMailToDSP
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/* 80370298 0036D1F8 28 03 00 00 */ cmplwi r3, 0
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/* 8037029C 0036D1FC 40 82 FF F8 */ bne lbl_80370294
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/* 803702A0 0036D200 3C 60 80 F4 */ lis r3, 0x80F3B002@ha
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/* 803702A4 0036D204 38 63 B0 02 */ addi r3, r3, 0x80F3B002@l
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/* 803702A8 0036D208 4B FF F7 49 */ bl DSPSendMailToDSP
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lbl_803702AC:
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/* 803702AC 0036D20C 4B FF F7 0D */ bl DSPCheckMailToDSP
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/* 803702B0 0036D210 28 03 00 00 */ cmplwi r3, 0
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/* 803702B4 0036D214 40 82 FF F8 */ bne lbl_803702AC
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/* 803702B8 0036D218 38 60 00 00 */ li r3, 0
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/* 803702BC 0036D21C 4B FF F7 35 */ bl DSPSendMailToDSP
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lbl_803702C0:
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/* 803702C0 0036D220 4B FF F6 F9 */ bl DSPCheckMailToDSP
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/* 803702C4 0036D224 28 03 00 00 */ cmplwi r3, 0
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/* 803702C8 0036D228 40 82 FF F8 */ bne lbl_803702C0
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/* 803702CC 0036D22C 3C 60 80 F4 */ lis r3, 0x80F3D001@ha
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/* 803702D0 0036D230 38 63 D0 01 */ addi r3, r3, 0x80F3D001@l
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/* 803702D4 0036D234 4B FF F7 1D */ bl DSPSendMailToDSP
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lbl_803702D8:
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/* 803702D8 0036D238 4B FF F6 E1 */ bl DSPCheckMailToDSP
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/* 803702DC 0036D23C 28 03 00 00 */ cmplwi r3, 0
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/* 803702E0 0036D240 40 82 FF F8 */ bne lbl_803702D8
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/* 803702E4 0036D244 A0 7E 00 24 */ lhz r3, 0x24(r30)
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/* 803702E8 0036D248 4B FF F7 09 */ bl DSPSendMailToDSP
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lbl_803702EC:
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/* 803702EC 0036D24C 4B FF F6 CD */ bl DSPCheckMailToDSP
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/* 803702F0 0036D250 28 03 00 00 */ cmplwi r3, 0
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/* 803702F4 0036D254 40 82 FF F8 */ bne lbl_803702EC
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/* 803702F8 0036D258 38 7F 00 00 */ addi r3, r31, 0
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/* 803702FC 0036D25C 4C C6 31 82 */ crclr 6
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/* 80370300 0036D260 38 9E 00 00 */ addi r4, r30, 0
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/* 80370304 0036D264 4B FF F8 CD */ bl __DSP_debug_printf
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/* 80370308 0036D268 80 9E 00 0C */ lwz r4, 0xc(r30)
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/* 8037030C 0036D26C 38 7F 00 20 */ addi r3, r31, 0x20
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/* 80370310 0036D270 4C C6 31 82 */ crclr 6
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/* 80370314 0036D274 4B FF F8 BD */ bl __DSP_debug_printf
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/* 80370318 0036D278 80 9E 00 14 */ lwz r4, 0x14(r30)
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/* 8037031C 0036D27C 38 7F 00 50 */ addi r3, r31, 0x50
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/* 80370320 0036D280 4C C6 31 82 */ crclr 6
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/* 80370324 0036D284 4B FF F8 AD */ bl __DSP_debug_printf
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/* 80370328 0036D288 80 9E 00 10 */ lwz r4, 0x10(r30)
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/* 8037032C 0036D28C 38 7F 00 80 */ addi r3, r31, 0x80
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/* 80370330 0036D290 4C C6 31 82 */ crclr 6
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/* 80370334 0036D294 4B FF F8 9D */ bl __DSP_debug_printf
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/* 80370338 0036D298 80 9E 00 1C */ lwz r4, 0x1c(r30)
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/* 8037033C 0036D29C 38 7F 00 B0 */ addi r3, r31, 0xb0
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/* 80370340 0036D2A0 4C C6 31 82 */ crclr 6
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/* 80370344 0036D2A4 4B FF F8 8D */ bl __DSP_debug_printf
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/* 80370348 0036D2A8 A0 9E 00 24 */ lhz r4, 0x24(r30)
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/* 8037034C 0036D2AC 38 7F 00 E0 */ addi r3, r31, 0xe0
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/* 80370350 0036D2B0 4C C6 31 82 */ crclr 6
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/* 80370354 0036D2B4 4B FF F8 7D */ bl __DSP_debug_printf
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/* 80370358 0036D2B8 80 01 00 1C */ lwz r0, 0x1c(r1)
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/* 8037035C 0036D2BC 83 E1 00 14 */ lwz r31, 0x14(r1)
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/* 80370360 0036D2C0 83 C1 00 10 */ lwz r30, 0x10(r1)
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/* 80370364 0036D2C4 38 21 00 18 */ addi r1, r1, 0x18
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/* 80370368 0036D2C8 7C 08 03 A6 */ mtlr r0
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/* 8037036C 0036D2CC 4E 80 00 20 */ blr
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}
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#pragma pop
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/* clang-format on */
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#endif
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void __DSP_insert_task(DSPTaskInfo* task) {
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