mirror of https://github.com/PrimeDecomp/prime.git
parent
c24d11a819
commit
95cabc4518
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@ -56,7 +56,8 @@
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"math.h": "c",
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"math.h": "c",
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"gxpriv.h": "c",
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"gxpriv.h": "c",
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"osfastcast.h": "c",
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"osfastcast.h": "c",
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"osfont.h": "c"
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"osfont.h": "c",
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"arq.h": "c"
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},
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},
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"files.autoSave": "onFocusChange",
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"files.autoSave": "onFocusChange",
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"files.insertFinalNewline": true,
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"files.insertFinalNewline": true,
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@ -17,35 +17,35 @@ lbl_805A8A78:
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.section .sbss
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.section .sbss
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.balign 8
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.balign 8
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.global lbl_805A9718
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.global __ARQRequestQueueHi
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lbl_805A9718:
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__ARQRequestQueueHi:
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.skip 0x4
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.skip 0x4
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.global lbl_805A971C
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.global __ARQRequestTailHi
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lbl_805A971C:
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__ARQRequestTailHi:
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.skip 0x4
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.skip 0x4
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.global lbl_805A9720
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.global __ARQRequestQueueLo
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lbl_805A9720:
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__ARQRequestQueueLo:
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.skip 0x4
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.skip 0x4
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.global lbl_805A9724
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.global __ARQRequestTailLo
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lbl_805A9724:
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__ARQRequestTailLo:
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.skip 0x4
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.skip 0x4
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.global lbl_805A9728
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.global __ARQRequestPendingHi
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lbl_805A9728:
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__ARQRequestPendingHi:
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.skip 0x4
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.skip 0x4
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.global lbl_805A972C
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.global __ARQRequestPendingLo
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lbl_805A972C:
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__ARQRequestPendingLo:
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.skip 0x4
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.skip 0x4
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.global lbl_805A9730
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.global __ARQCallbackHi
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lbl_805A9730:
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__ARQCallbackHi:
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.skip 0x4
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.skip 0x4
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.global lbl_805A9734
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.global __ARQCallbackLo
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lbl_805A9734:
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__ARQCallbackLo:
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.skip 0x4
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.skip 0x4
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.global __ARQChunkSize
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.global __ARQChunkSize
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__ARQChunkSize:
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__ARQChunkSize:
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.skip 0x4
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.skip 0x4
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.global lbl_805A973C
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.global __ARQ_init_flag
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lbl_805A973C:
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__ARQ_init_flag:
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.skip 0x4
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.skip 0x4
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.section .text, "ax"
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.section .text, "ax"
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@ -55,17 +55,17 @@ __ARQServiceQueueLo:
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/* 8036F430 0036C390 7C 08 02 A6 */ mflr r0
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/* 8036F430 0036C390 7C 08 02 A6 */ mflr r0
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/* 8036F434 0036C394 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F434 0036C394 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F438 0036C398 94 21 FF F8 */ stwu r1, -8(r1)
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/* 8036F438 0036C398 94 21 FF F8 */ stwu r1, -8(r1)
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/* 8036F43C 0036C39C 80 0D AB 6C */ lwz r0, lbl_805A972C@sda21(r13)
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/* 8036F43C 0036C39C 80 0D AB 6C */ lwz r0, __ARQRequestPendingLo@sda21(r13)
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/* 8036F440 0036C3A0 28 00 00 00 */ cmplwi r0, 0
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/* 8036F440 0036C3A0 28 00 00 00 */ cmplwi r0, 0
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/* 8036F444 0036C3A4 40 82 00 1C */ bne lbl_8036F460
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/* 8036F444 0036C3A4 40 82 00 1C */ bne lbl_8036F460
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/* 8036F448 0036C3A8 80 6D AB 60 */ lwz r3, lbl_805A9720@sda21(r13)
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/* 8036F448 0036C3A8 80 6D AB 60 */ lwz r3, __ARQRequestQueueLo@sda21(r13)
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/* 8036F44C 0036C3AC 28 03 00 00 */ cmplwi r3, 0
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/* 8036F44C 0036C3AC 28 03 00 00 */ cmplwi r3, 0
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/* 8036F450 0036C3B0 41 82 00 10 */ beq lbl_8036F460
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/* 8036F450 0036C3B0 41 82 00 10 */ beq lbl_8036F460
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/* 8036F454 0036C3B4 90 6D AB 6C */ stw r3, lbl_805A972C@sda21(r13)
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/* 8036F454 0036C3B4 90 6D AB 6C */ stw r3, __ARQRequestPendingLo@sda21(r13)
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/* 8036F458 0036C3B8 80 03 00 00 */ lwz r0, 0(r3)
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/* 8036F458 0036C3B8 80 03 00 00 */ lwz r0, 0(r3)
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/* 8036F45C 0036C3BC 90 0D AB 60 */ stw r0, lbl_805A9720@sda21(r13)
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/* 8036F45C 0036C3BC 90 0D AB 60 */ stw r0, __ARQRequestQueueLo@sda21(r13)
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lbl_8036F460:
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lbl_8036F460:
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/* 8036F460 0036C3C0 80 AD AB 6C */ lwz r5, lbl_805A972C@sda21(r13)
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/* 8036F460 0036C3C0 80 AD AB 6C */ lwz r5, __ARQRequestPendingLo@sda21(r13)
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/* 8036F464 0036C3C4 28 05 00 00 */ cmplwi r5, 0
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/* 8036F464 0036C3C4 28 05 00 00 */ cmplwi r5, 0
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/* 8036F468 0036C3C8 41 82 00 B8 */ beq lbl_8036F520
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/* 8036F468 0036C3C8 41 82 00 B8 */ beq lbl_8036F520
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/* 8036F46C 0036C3CC 80 C5 00 18 */ lwz r6, 0x18(r5)
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/* 8036F46C 0036C3CC 80 C5 00 18 */ lwz r6, 0x18(r5)
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@ -84,9 +84,9 @@ lbl_8036F498:
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/* 8036F49C 0036C3FC 80 A5 00 10 */ lwz r5, 0x10(r5)
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/* 8036F49C 0036C3FC 80 A5 00 10 */ lwz r5, 0x10(r5)
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/* 8036F4A0 0036C400 4B FF E4 85 */ bl ARStartDMA
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/* 8036F4A0 0036C400 4B FF E4 85 */ bl ARStartDMA
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lbl_8036F4A4:
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lbl_8036F4A4:
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/* 8036F4A4 0036C404 80 6D AB 6C */ lwz r3, lbl_805A972C@sda21(r13)
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/* 8036F4A4 0036C404 80 6D AB 6C */ lwz r3, __ARQRequestPendingLo@sda21(r13)
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/* 8036F4A8 0036C408 80 03 00 1C */ lwz r0, 0x1c(r3)
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/* 8036F4A8 0036C408 80 03 00 1C */ lwz r0, 0x1c(r3)
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/* 8036F4AC 0036C40C 90 0D AB 74 */ stw r0, lbl_805A9734@sda21(r13)
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/* 8036F4AC 0036C40C 90 0D AB 74 */ stw r0, __ARQCallbackLo@sda21(r13)
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/* 8036F4B0 0036C410 48 00 00 34 */ b lbl_8036F4E4
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/* 8036F4B0 0036C410 48 00 00 34 */ b lbl_8036F4E4
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lbl_8036F4B4:
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lbl_8036F4B4:
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/* 8036F4B4 0036C414 80 65 00 08 */ lwz r3, 8(r5)
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/* 8036F4B4 0036C414 80 65 00 08 */ lwz r3, 8(r5)
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@ -103,17 +103,17 @@ lbl_8036F4D4:
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/* 8036F4DC 0036C43C 80 A5 00 10 */ lwz r5, 0x10(r5)
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/* 8036F4DC 0036C43C 80 A5 00 10 */ lwz r5, 0x10(r5)
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/* 8036F4E0 0036C440 4B FF E4 45 */ bl ARStartDMA
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/* 8036F4E0 0036C440 4B FF E4 45 */ bl ARStartDMA
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lbl_8036F4E4:
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lbl_8036F4E4:
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/* 8036F4E4 0036C444 80 6D AB 6C */ lwz r3, lbl_805A972C@sda21(r13)
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/* 8036F4E4 0036C444 80 6D AB 6C */ lwz r3, __ARQRequestPendingLo@sda21(r13)
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/* 8036F4E8 0036C448 80 8D AB 78 */ lwz r4, __ARQChunkSize@sda21(r13)
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/* 8036F4E8 0036C448 80 8D AB 78 */ lwz r4, __ARQChunkSize@sda21(r13)
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/* 8036F4EC 0036C44C 80 03 00 18 */ lwz r0, 0x18(r3)
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/* 8036F4EC 0036C44C 80 03 00 18 */ lwz r0, 0x18(r3)
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/* 8036F4F0 0036C450 7C 04 00 50 */ subf r0, r4, r0
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/* 8036F4F0 0036C450 7C 04 00 50 */ subf r0, r4, r0
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/* 8036F4F4 0036C454 90 03 00 18 */ stw r0, 0x18(r3)
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/* 8036F4F4 0036C454 90 03 00 18 */ stw r0, 0x18(r3)
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/* 8036F4F8 0036C458 80 8D AB 6C */ lwz r4, lbl_805A972C@sda21(r13)
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/* 8036F4F8 0036C458 80 8D AB 6C */ lwz r4, __ARQRequestPendingLo@sda21(r13)
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/* 8036F4FC 0036C45C 80 0D AB 78 */ lwz r0, __ARQChunkSize@sda21(r13)
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/* 8036F4FC 0036C45C 80 0D AB 78 */ lwz r0, __ARQChunkSize@sda21(r13)
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/* 8036F500 0036C460 80 64 00 10 */ lwz r3, 0x10(r4)
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/* 8036F500 0036C460 80 64 00 10 */ lwz r3, 0x10(r4)
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/* 8036F504 0036C464 7C 03 02 14 */ add r0, r3, r0
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/* 8036F504 0036C464 7C 03 02 14 */ add r0, r3, r0
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/* 8036F508 0036C468 90 04 00 10 */ stw r0, 0x10(r4)
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/* 8036F508 0036C468 90 04 00 10 */ stw r0, 0x10(r4)
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/* 8036F50C 0036C46C 80 8D AB 6C */ lwz r4, lbl_805A972C@sda21(r13)
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/* 8036F50C 0036C46C 80 8D AB 6C */ lwz r4, __ARQRequestPendingLo@sda21(r13)
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/* 8036F510 0036C470 80 0D AB 78 */ lwz r0, __ARQChunkSize@sda21(r13)
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/* 8036F510 0036C470 80 0D AB 78 */ lwz r0, __ARQChunkSize@sda21(r13)
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/* 8036F514 0036C474 80 64 00 14 */ lwz r3, 0x14(r4)
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/* 8036F514 0036C474 80 64 00 14 */ lwz r3, 0x14(r4)
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/* 8036F518 0036C478 7C 03 02 14 */ add r0, r3, r0
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/* 8036F518 0036C478 7C 03 02 14 */ add r0, r3, r0
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/* 8036F534 0036C494 7C 08 02 A6 */ mflr r0
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/* 8036F534 0036C494 7C 08 02 A6 */ mflr r0
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/* 8036F538 0036C498 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F538 0036C498 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F53C 0036C49C 94 21 FF F8 */ stwu r1, -8(r1)
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/* 8036F53C 0036C49C 94 21 FF F8 */ stwu r1, -8(r1)
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/* 8036F540 0036C4A0 81 8D AB 70 */ lwz r12, lbl_805A9730@sda21(r13)
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/* 8036F540 0036C4A0 81 8D AB 70 */ lwz r12, __ARQCallbackHi@sda21(r13)
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/* 8036F544 0036C4A4 28 0C 00 00 */ cmplwi r12, 0
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/* 8036F544 0036C4A4 28 0C 00 00 */ cmplwi r12, 0
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/* 8036F548 0036C4A8 41 82 00 20 */ beq lbl_8036F568
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/* 8036F548 0036C4A8 41 82 00 20 */ beq lbl_8036F568
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/* 8036F54C 0036C4AC 80 6D AB 68 */ lwz r3, lbl_805A9728@sda21(r13)
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/* 8036F54C 0036C4AC 80 6D AB 68 */ lwz r3, __ARQRequestPendingHi@sda21(r13)
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/* 8036F550 0036C4B0 7D 88 03 A6 */ mtlr r12
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/* 8036F550 0036C4B0 7D 88 03 A6 */ mtlr r12
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/* 8036F554 0036C4B4 4E 80 00 21 */ blrl
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/* 8036F554 0036C4B4 4E 80 00 21 */ blrl
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/* 8036F558 0036C4B8 38 00 00 00 */ li r0, 0
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/* 8036F558 0036C4B8 38 00 00 00 */ li r0, 0
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/* 8036F55C 0036C4BC 90 0D AB 68 */ stw r0, lbl_805A9728@sda21(r13)
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/* 8036F55C 0036C4BC 90 0D AB 68 */ stw r0, __ARQRequestPendingHi@sda21(r13)
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/* 8036F560 0036C4C0 90 0D AB 70 */ stw r0, lbl_805A9730@sda21(r13)
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/* 8036F560 0036C4C0 90 0D AB 70 */ stw r0, __ARQCallbackHi@sda21(r13)
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/* 8036F564 0036C4C4 48 00 00 28 */ b lbl_8036F58C
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/* 8036F564 0036C4C4 48 00 00 28 */ b lbl_8036F58C
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lbl_8036F568:
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lbl_8036F568:
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/* 8036F568 0036C4C8 81 8D AB 74 */ lwz r12, lbl_805A9734@sda21(r13)
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/* 8036F568 0036C4C8 81 8D AB 74 */ lwz r12, __ARQCallbackLo@sda21(r13)
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/* 8036F56C 0036C4CC 28 0C 00 00 */ cmplwi r12, 0
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/* 8036F56C 0036C4CC 28 0C 00 00 */ cmplwi r12, 0
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/* 8036F570 0036C4D0 41 82 00 1C */ beq lbl_8036F58C
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/* 8036F570 0036C4D0 41 82 00 1C */ beq lbl_8036F58C
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/* 8036F574 0036C4D4 80 6D AB 6C */ lwz r3, lbl_805A972C@sda21(r13)
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/* 8036F574 0036C4D4 80 6D AB 6C */ lwz r3, __ARQRequestPendingLo@sda21(r13)
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/* 8036F578 0036C4D8 7D 88 03 A6 */ mtlr r12
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/* 8036F578 0036C4D8 7D 88 03 A6 */ mtlr r12
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/* 8036F57C 0036C4DC 4E 80 00 21 */ blrl
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/* 8036F57C 0036C4DC 4E 80 00 21 */ blrl
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/* 8036F580 0036C4E0 38 00 00 00 */ li r0, 0
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/* 8036F580 0036C4E0 38 00 00 00 */ li r0, 0
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/* 8036F584 0036C4E4 90 0D AB 6C */ stw r0, lbl_805A972C@sda21(r13)
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/* 8036F584 0036C4E4 90 0D AB 6C */ stw r0, __ARQRequestPendingLo@sda21(r13)
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/* 8036F588 0036C4E8 90 0D AB 74 */ stw r0, lbl_805A9734@sda21(r13)
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/* 8036F588 0036C4E8 90 0D AB 74 */ stw r0, __ARQCallbackLo@sda21(r13)
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lbl_8036F58C:
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lbl_8036F58C:
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/* 8036F58C 0036C4EC 80 CD AB 58 */ lwz r6, lbl_805A9718@sda21(r13)
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/* 8036F58C 0036C4EC 80 CD AB 58 */ lwz r6, __ARQRequestQueueHi@sda21(r13)
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/* 8036F590 0036C4F0 28 06 00 00 */ cmplwi r6, 0
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/* 8036F590 0036C4F0 28 06 00 00 */ cmplwi r6, 0
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/* 8036F594 0036C4F4 41 82 00 4C */ beq lbl_8036F5E0
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/* 8036F594 0036C4F4 41 82 00 4C */ beq lbl_8036F5E0
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/* 8036F598 0036C4F8 80 66 00 08 */ lwz r3, 8(r6)
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/* 8036F598 0036C4F8 80 66 00 08 */ lwz r3, 8(r6)
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@ -171,14 +171,14 @@ lbl_8036F5B8:
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/* 8036F5C0 0036C520 80 C6 00 18 */ lwz r6, 0x18(r6)
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/* 8036F5C0 0036C520 80 C6 00 18 */ lwz r6, 0x18(r6)
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/* 8036F5C4 0036C524 4B FF E3 61 */ bl ARStartDMA
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/* 8036F5C4 0036C524 4B FF E3 61 */ bl ARStartDMA
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lbl_8036F5C8:
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lbl_8036F5C8:
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/* 8036F5C8 0036C528 80 6D AB 58 */ lwz r3, lbl_805A9718@sda21(r13)
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/* 8036F5C8 0036C528 80 6D AB 58 */ lwz r3, __ARQRequestQueueHi@sda21(r13)
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/* 8036F5CC 0036C52C 80 03 00 1C */ lwz r0, 0x1c(r3)
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/* 8036F5CC 0036C52C 80 03 00 1C */ lwz r0, 0x1c(r3)
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/* 8036F5D0 0036C530 90 0D AB 70 */ stw r0, lbl_805A9730@sda21(r13)
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/* 8036F5D0 0036C530 90 0D AB 70 */ stw r0, __ARQCallbackHi@sda21(r13)
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/* 8036F5D4 0036C534 90 6D AB 68 */ stw r3, lbl_805A9728@sda21(r13)
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/* 8036F5D4 0036C534 90 6D AB 68 */ stw r3, __ARQRequestPendingHi@sda21(r13)
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/* 8036F5D8 0036C538 80 03 00 00 */ lwz r0, 0(r3)
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/* 8036F5D8 0036C538 80 03 00 00 */ lwz r0, 0(r3)
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/* 8036F5DC 0036C53C 90 0D AB 58 */ stw r0, lbl_805A9718@sda21(r13)
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/* 8036F5DC 0036C53C 90 0D AB 58 */ stw r0, __ARQRequestQueueHi@sda21(r13)
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lbl_8036F5E0:
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lbl_8036F5E0:
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/* 8036F5E0 0036C540 80 0D AB 68 */ lwz r0, lbl_805A9728@sda21(r13)
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/* 8036F5E0 0036C540 80 0D AB 68 */ lwz r0, __ARQRequestPendingHi@sda21(r13)
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/* 8036F5E4 0036C544 28 00 00 00 */ cmplwi r0, 0
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/* 8036F5E4 0036C544 28 00 00 00 */ cmplwi r0, 0
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/* 8036F5E8 0036C548 40 82 00 08 */ bne lbl_8036F5F0
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/* 8036F5E8 0036C548 40 82 00 08 */ bne lbl_8036F5F0
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/* 8036F5EC 0036C54C 4B FF FE 45 */ bl __ARQServiceQueueLo
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/* 8036F5EC 0036C54C 4B FF FE 45 */ bl __ARQServiceQueueLo
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@ -194,25 +194,25 @@ ARQInit:
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/* 8036F604 0036C564 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F604 0036C564 90 01 00 04 */ stw r0, 4(r1)
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/* 8036F608 0036C568 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 8036F608 0036C568 94 21 FF F0 */ stwu r1, -0x10(r1)
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/* 8036F60C 0036C56C 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 8036F60C 0036C56C 93 E1 00 0C */ stw r31, 0xc(r1)
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/* 8036F610 0036C570 80 0D AB 7C */ lwz r0, lbl_805A973C@sda21(r13)
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/* 8036F610 0036C570 80 0D AB 7C */ lwz r0, __ARQ_init_flag@sda21(r13)
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/* 8036F614 0036C574 2C 00 00 01 */ cmpwi r0, 1
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/* 8036F614 0036C574 2C 00 00 01 */ cmpwi r0, 1
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/* 8036F618 0036C578 41 82 00 44 */ beq lbl_8036F65C
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/* 8036F618 0036C578 41 82 00 44 */ beq lbl_8036F65C
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/* 8036F61C 0036C57C 80 6D 9E B8 */ lwz r3, lbl_805A8A78@sda21(r13)
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/* 8036F61C 0036C57C 80 6D 9E B8 */ lwz r3, lbl_805A8A78@sda21(r13)
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/* 8036F620 0036C580 48 00 EA 19 */ bl OSRegisterVersion
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/* 8036F620 0036C580 48 00 EA 19 */ bl OSRegisterVersion
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/* 8036F624 0036C584 3B E0 00 00 */ li r31, 0
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/* 8036F624 0036C584 3B E0 00 00 */ li r31, 0
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/* 8036F628 0036C588 38 00 10 00 */ li r0, 0x1000
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/* 8036F628 0036C588 38 00 10 00 */ li r0, 0x1000
|
||||||
/* 8036F62C 0036C58C 93 ED AB 60 */ stw r31, lbl_805A9720@sda21(r13)
|
/* 8036F62C 0036C58C 93 ED AB 60 */ stw r31, __ARQRequestQueueLo@sda21(r13)
|
||||||
/* 8036F630 0036C590 3C 60 80 37 */ lis r3, __ARQInterruptServiceRoutine@ha
|
/* 8036F630 0036C590 3C 60 80 37 */ lis r3, __ARQInterruptServiceRoutine@ha
|
||||||
/* 8036F634 0036C594 93 ED AB 58 */ stw r31, lbl_805A9718@sda21(r13)
|
/* 8036F634 0036C594 93 ED AB 58 */ stw r31, __ARQRequestQueueHi@sda21(r13)
|
||||||
/* 8036F638 0036C598 38 63 F5 34 */ addi r3, r3, __ARQInterruptServiceRoutine@l
|
/* 8036F638 0036C598 38 63 F5 34 */ addi r3, r3, __ARQInterruptServiceRoutine@l
|
||||||
/* 8036F63C 0036C59C 90 0D AB 78 */ stw r0, __ARQChunkSize@sda21(r13)
|
/* 8036F63C 0036C59C 90 0D AB 78 */ stw r0, __ARQChunkSize@sda21(r13)
|
||||||
/* 8036F640 0036C5A0 4B FF E2 65 */ bl ARRegisterDMACallback
|
/* 8036F640 0036C5A0 4B FF E2 65 */ bl ARRegisterDMACallback
|
||||||
/* 8036F644 0036C5A4 38 00 00 01 */ li r0, 1
|
/* 8036F644 0036C5A4 38 00 00 01 */ li r0, 1
|
||||||
/* 8036F648 0036C5A8 93 ED AB 68 */ stw r31, lbl_805A9728@sda21(r13)
|
/* 8036F648 0036C5A8 93 ED AB 68 */ stw r31, __ARQRequestPendingHi@sda21(r13)
|
||||||
/* 8036F64C 0036C5AC 93 ED AB 6C */ stw r31, lbl_805A972C@sda21(r13)
|
/* 8036F64C 0036C5AC 93 ED AB 6C */ stw r31, __ARQRequestPendingLo@sda21(r13)
|
||||||
/* 8036F650 0036C5B0 93 ED AB 70 */ stw r31, lbl_805A9730@sda21(r13)
|
/* 8036F650 0036C5B0 93 ED AB 70 */ stw r31, __ARQCallbackHi@sda21(r13)
|
||||||
/* 8036F654 0036C5B4 93 ED AB 74 */ stw r31, lbl_805A9734@sda21(r13)
|
/* 8036F654 0036C5B4 93 ED AB 74 */ stw r31, __ARQCallbackLo@sda21(r13)
|
||||||
/* 8036F658 0036C5B8 90 0D AB 7C */ stw r0, lbl_805A973C@sda21(r13)
|
/* 8036F658 0036C5B8 90 0D AB 7C */ stw r0, __ARQ_init_flag@sda21(r13)
|
||||||
lbl_8036F65C:
|
lbl_8036F65C:
|
||||||
/* 8036F65C 0036C5BC 80 01 00 14 */ lwz r0, 0x14(r1)
|
/* 8036F65C 0036C5BC 80 01 00 14 */ lwz r0, 0x14(r1)
|
||||||
/* 8036F660 0036C5C0 83 E1 00 0C */ lwz r31, 0xc(r1)
|
/* 8036F660 0036C5C0 83 E1 00 0C */ lwz r31, 0xc(r1)
|
||||||
|
@ -255,36 +255,36 @@ lbl_8036F6C8:
|
||||||
/* 8036F6E0 0036C640 40 80 00 08 */ bge lbl_8036F6E8
|
/* 8036F6E0 0036C640 40 80 00 08 */ bge lbl_8036F6E8
|
||||||
/* 8036F6E4 0036C644 48 00 00 48 */ b lbl_8036F72C
|
/* 8036F6E4 0036C644 48 00 00 48 */ b lbl_8036F72C
|
||||||
lbl_8036F6E8:
|
lbl_8036F6E8:
|
||||||
/* 8036F6E8 0036C648 80 0D AB 60 */ lwz r0, lbl_805A9720@sda21(r13)
|
/* 8036F6E8 0036C648 80 0D AB 60 */ lwz r0, __ARQRequestQueueLo@sda21(r13)
|
||||||
/* 8036F6EC 0036C64C 28 00 00 00 */ cmplwi r0, 0
|
/* 8036F6EC 0036C64C 28 00 00 00 */ cmplwi r0, 0
|
||||||
/* 8036F6F0 0036C650 41 82 00 10 */ beq lbl_8036F700
|
/* 8036F6F0 0036C650 41 82 00 10 */ beq lbl_8036F700
|
||||||
/* 8036F6F4 0036C654 80 6D AB 64 */ lwz r3, lbl_805A9724@sda21(r13)
|
/* 8036F6F4 0036C654 80 6D AB 64 */ lwz r3, __ARQRequestTailLo@sda21(r13)
|
||||||
/* 8036F6F8 0036C658 93 A3 00 00 */ stw r29, 0(r3)
|
/* 8036F6F8 0036C658 93 A3 00 00 */ stw r29, 0(r3)
|
||||||
/* 8036F6FC 0036C65C 48 00 00 08 */ b lbl_8036F704
|
/* 8036F6FC 0036C65C 48 00 00 08 */ b lbl_8036F704
|
||||||
lbl_8036F700:
|
lbl_8036F700:
|
||||||
/* 8036F700 0036C660 93 AD AB 60 */ stw r29, lbl_805A9720@sda21(r13)
|
/* 8036F700 0036C660 93 AD AB 60 */ stw r29, __ARQRequestQueueLo@sda21(r13)
|
||||||
lbl_8036F704:
|
lbl_8036F704:
|
||||||
/* 8036F704 0036C664 93 AD AB 64 */ stw r29, lbl_805A9724@sda21(r13)
|
/* 8036F704 0036C664 93 AD AB 64 */ stw r29, __ARQRequestTailLo@sda21(r13)
|
||||||
/* 8036F708 0036C668 48 00 00 24 */ b lbl_8036F72C
|
/* 8036F708 0036C668 48 00 00 24 */ b lbl_8036F72C
|
||||||
lbl_8036F70C:
|
lbl_8036F70C:
|
||||||
/* 8036F70C 0036C66C 80 0D AB 58 */ lwz r0, lbl_805A9718@sda21(r13)
|
/* 8036F70C 0036C66C 80 0D AB 58 */ lwz r0, __ARQRequestQueueHi@sda21(r13)
|
||||||
/* 8036F710 0036C670 28 00 00 00 */ cmplwi r0, 0
|
/* 8036F710 0036C670 28 00 00 00 */ cmplwi r0, 0
|
||||||
/* 8036F714 0036C674 41 82 00 10 */ beq lbl_8036F724
|
/* 8036F714 0036C674 41 82 00 10 */ beq lbl_8036F724
|
||||||
/* 8036F718 0036C678 80 6D AB 5C */ lwz r3, lbl_805A971C@sda21(r13)
|
/* 8036F718 0036C678 80 6D AB 5C */ lwz r3, __ARQRequestTailHi@sda21(r13)
|
||||||
/* 8036F71C 0036C67C 93 A3 00 00 */ stw r29, 0(r3)
|
/* 8036F71C 0036C67C 93 A3 00 00 */ stw r29, 0(r3)
|
||||||
/* 8036F720 0036C680 48 00 00 08 */ b lbl_8036F728
|
/* 8036F720 0036C680 48 00 00 08 */ b lbl_8036F728
|
||||||
lbl_8036F724:
|
lbl_8036F724:
|
||||||
/* 8036F724 0036C684 93 AD AB 58 */ stw r29, lbl_805A9718@sda21(r13)
|
/* 8036F724 0036C684 93 AD AB 58 */ stw r29, __ARQRequestQueueHi@sda21(r13)
|
||||||
lbl_8036F728:
|
lbl_8036F728:
|
||||||
/* 8036F728 0036C688 93 AD AB 5C */ stw r29, lbl_805A971C@sda21(r13)
|
/* 8036F728 0036C688 93 AD AB 5C */ stw r29, __ARQRequestTailHi@sda21(r13)
|
||||||
lbl_8036F72C:
|
lbl_8036F72C:
|
||||||
/* 8036F72C 0036C68C 80 0D AB 68 */ lwz r0, lbl_805A9728@sda21(r13)
|
/* 8036F72C 0036C68C 80 0D AB 68 */ lwz r0, __ARQRequestPendingHi@sda21(r13)
|
||||||
/* 8036F730 0036C690 28 00 00 00 */ cmplwi r0, 0
|
/* 8036F730 0036C690 28 00 00 00 */ cmplwi r0, 0
|
||||||
/* 8036F734 0036C694 40 82 00 74 */ bne lbl_8036F7A8
|
/* 8036F734 0036C694 40 82 00 74 */ bne lbl_8036F7A8
|
||||||
/* 8036F738 0036C698 80 0D AB 6C */ lwz r0, lbl_805A972C@sda21(r13)
|
/* 8036F738 0036C698 80 0D AB 6C */ lwz r0, __ARQRequestPendingLo@sda21(r13)
|
||||||
/* 8036F73C 0036C69C 28 00 00 00 */ cmplwi r0, 0
|
/* 8036F73C 0036C69C 28 00 00 00 */ cmplwi r0, 0
|
||||||
/* 8036F740 0036C6A0 40 82 00 68 */ bne lbl_8036F7A8
|
/* 8036F740 0036C6A0 40 82 00 68 */ bne lbl_8036F7A8
|
||||||
/* 8036F744 0036C6A4 80 CD AB 58 */ lwz r6, lbl_805A9718@sda21(r13)
|
/* 8036F744 0036C6A4 80 CD AB 58 */ lwz r6, __ARQRequestQueueHi@sda21(r13)
|
||||||
/* 8036F748 0036C6A8 28 06 00 00 */ cmplwi r6, 0
|
/* 8036F748 0036C6A8 28 06 00 00 */ cmplwi r6, 0
|
||||||
/* 8036F74C 0036C6AC 41 82 00 4C */ beq lbl_8036F798
|
/* 8036F74C 0036C6AC 41 82 00 4C */ beq lbl_8036F798
|
||||||
/* 8036F750 0036C6B0 80 66 00 08 */ lwz r3, 8(r6)
|
/* 8036F750 0036C6B0 80 66 00 08 */ lwz r3, 8(r6)
|
||||||
|
@ -301,14 +301,14 @@ lbl_8036F770:
|
||||||
/* 8036F778 0036C6D8 80 C6 00 18 */ lwz r6, 0x18(r6)
|
/* 8036F778 0036C6D8 80 C6 00 18 */ lwz r6, 0x18(r6)
|
||||||
/* 8036F77C 0036C6DC 4B FF E1 A9 */ bl ARStartDMA
|
/* 8036F77C 0036C6DC 4B FF E1 A9 */ bl ARStartDMA
|
||||||
lbl_8036F780:
|
lbl_8036F780:
|
||||||
/* 8036F780 0036C6E0 80 6D AB 58 */ lwz r3, lbl_805A9718@sda21(r13)
|
/* 8036F780 0036C6E0 80 6D AB 58 */ lwz r3, __ARQRequestQueueHi@sda21(r13)
|
||||||
/* 8036F784 0036C6E4 80 03 00 1C */ lwz r0, 0x1c(r3)
|
/* 8036F784 0036C6E4 80 03 00 1C */ lwz r0, 0x1c(r3)
|
||||||
/* 8036F788 0036C6E8 90 0D AB 70 */ stw r0, lbl_805A9730@sda21(r13)
|
/* 8036F788 0036C6E8 90 0D AB 70 */ stw r0, __ARQCallbackHi@sda21(r13)
|
||||||
/* 8036F78C 0036C6EC 90 6D AB 68 */ stw r3, lbl_805A9728@sda21(r13)
|
/* 8036F78C 0036C6EC 90 6D AB 68 */ stw r3, __ARQRequestPendingHi@sda21(r13)
|
||||||
/* 8036F790 0036C6F0 80 03 00 00 */ lwz r0, 0(r3)
|
/* 8036F790 0036C6F0 80 03 00 00 */ lwz r0, 0(r3)
|
||||||
/* 8036F794 0036C6F4 90 0D AB 58 */ stw r0, lbl_805A9718@sda21(r13)
|
/* 8036F794 0036C6F4 90 0D AB 58 */ stw r0, __ARQRequestQueueHi@sda21(r13)
|
||||||
lbl_8036F798:
|
lbl_8036F798:
|
||||||
/* 8036F798 0036C6F8 80 0D AB 68 */ lwz r0, lbl_805A9728@sda21(r13)
|
/* 8036F798 0036C6F8 80 0D AB 68 */ lwz r0, __ARQRequestPendingHi@sda21(r13)
|
||||||
/* 8036F79C 0036C6FC 28 00 00 00 */ cmplwi r0, 0
|
/* 8036F79C 0036C6FC 28 00 00 00 */ cmplwi r0, 0
|
||||||
/* 8036F7A0 0036C700 40 82 00 08 */ bne lbl_8036F7A8
|
/* 8036F7A0 0036C700 40 82 00 08 */ bne lbl_8036F7A8
|
||||||
/* 8036F7A4 0036C704 4B FF FC 8D */ bl __ARQServiceQueueLo
|
/* 8036F7A4 0036C704 4B FF FC 8D */ bl __ARQServiceQueueLo
|
||||||
|
|
|
@ -713,7 +713,7 @@ LIBS = [
|
||||||
"host": False,
|
"host": False,
|
||||||
"objects": [
|
"objects": [
|
||||||
["Dolphin/ar/ar", True],
|
["Dolphin/ar/ar", True],
|
||||||
"Dolphin/ar/arq",
|
["Dolphin/ar/arq", True],
|
||||||
],
|
],
|
||||||
},
|
},
|
||||||
{
|
{
|
||||||
|
|
|
@ -9,11 +9,22 @@
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
typedef struct ARQRequest ARQRequest;
|
#include "dolphin/ar.h"
|
||||||
|
|
||||||
|
#define ARQ_DMA_ALIGNMENT 32
|
||||||
|
#define ARQ_CHUNK_SIZE_DEFAULT 4096
|
||||||
|
|
||||||
|
#define ARQ_TYPE_MRAM_TO_ARAM ARAM_DIR_MRAM_TO_ARAM
|
||||||
|
#define ARQ_TYPE_ARAM_TO_MRAM ARAM_DIR_ARAM_TO_MRAM
|
||||||
|
|
||||||
|
#define ARQ_PRIORITY_LOW 0
|
||||||
|
#define ARQ_PRIORITY_HIGH 1
|
||||||
|
|
||||||
typedef void (*ARQCallback)(u32 pointerToARQRequest);
|
typedef void (*ARQCallback)(u32 pointerToARQRequest);
|
||||||
|
|
||||||
struct ARQRequest {
|
typedef struct ARQRequest {
|
||||||
ARQRequest* next;
|
|
||||||
|
struct ARQRequest* next;
|
||||||
u32 owner;
|
u32 owner;
|
||||||
u32 type;
|
u32 type;
|
||||||
u32 priority;
|
u32 priority;
|
||||||
|
@ -21,9 +32,14 @@ struct ARQRequest {
|
||||||
u32 dest;
|
u32 dest;
|
||||||
u32 length;
|
u32 length;
|
||||||
ARQCallback callback;
|
ARQCallback callback;
|
||||||
};
|
|
||||||
|
} ARQRequest;
|
||||||
|
|
||||||
void ARQInit(void);
|
void ARQInit(void);
|
||||||
|
void ARQReset(void);
|
||||||
|
void ARQPostRequest(ARQRequest* task, u32 owner, u32 type, u32 priority, u32 source, u32 dest,
|
||||||
|
u32 length, ARQCallback callback);
|
||||||
|
u32 ARQGetChunkSize(void);
|
||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
}
|
}
|
||||||
|
|
|
@ -0,0 +1,170 @@
|
||||||
|
#include "dolphin/arq.h"
|
||||||
|
#include "dolphin/os.h"
|
||||||
|
|
||||||
|
const char* __ARQVersion = "<< Dolphin SDK - ARQ\trelease build: Sep 5 2002 05:34:29 (0x2301) >>";
|
||||||
|
static ARQRequest* __ARQRequestQueueHi;
|
||||||
|
static ARQRequest* __ARQRequestTailHi;
|
||||||
|
static ARQRequest* __ARQRequestQueueLo;
|
||||||
|
static ARQRequest* __ARQRequestTailLo;
|
||||||
|
static ARQRequest* __ARQRequestPendingHi;
|
||||||
|
static ARQRequest* __ARQRequestPendingLo;
|
||||||
|
static ARQCallback __ARQCallbackHi;
|
||||||
|
static ARQCallback __ARQCallbackLo;
|
||||||
|
static u32 __ARQChunkSize;
|
||||||
|
|
||||||
|
static volatile BOOL __ARQ_init_flag = FALSE;
|
||||||
|
|
||||||
|
void __ARQPopTaskQueueHi(void);
|
||||||
|
void __ARQServiceQueueLo(void);
|
||||||
|
void __ARQCallbackHack(void);
|
||||||
|
void __ARQInterruptServiceRoutine(void);
|
||||||
|
void __ARQInitTempQueue(void);
|
||||||
|
void __ARQPushTempQueue(ARQRequest* task);
|
||||||
|
|
||||||
|
void __ARQPopTaskQueueHi(void) {
|
||||||
|
|
||||||
|
if (__ARQRequestQueueHi) {
|
||||||
|
if (__ARQRequestQueueHi->type == ARQ_TYPE_MRAM_TO_ARAM) {
|
||||||
|
ARStartDMA(__ARQRequestQueueHi->type, __ARQRequestQueueHi->source, __ARQRequestQueueHi->dest,
|
||||||
|
__ARQRequestQueueHi->length);
|
||||||
|
} else {
|
||||||
|
ARStartDMA(__ARQRequestQueueHi->type, __ARQRequestQueueHi->dest, __ARQRequestQueueHi->source,
|
||||||
|
__ARQRequestQueueHi->length);
|
||||||
|
}
|
||||||
|
|
||||||
|
__ARQCallbackHi = __ARQRequestQueueHi->callback;
|
||||||
|
|
||||||
|
__ARQRequestPendingHi = __ARQRequestQueueHi;
|
||||||
|
|
||||||
|
__ARQRequestQueueHi = __ARQRequestQueueHi->next;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void __ARQServiceQueueLo(void) {
|
||||||
|
|
||||||
|
if ((__ARQRequestPendingLo == NULL) && (__ARQRequestQueueLo)) {
|
||||||
|
__ARQRequestPendingLo = __ARQRequestQueueLo;
|
||||||
|
|
||||||
|
__ARQRequestQueueLo = __ARQRequestQueueLo->next;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (__ARQRequestPendingLo) {
|
||||||
|
if (__ARQRequestPendingLo->length <= __ARQChunkSize) {
|
||||||
|
if (__ARQRequestPendingLo->type == ARQ_TYPE_MRAM_TO_ARAM)
|
||||||
|
ARStartDMA(__ARQRequestPendingLo->type, __ARQRequestPendingLo->source,
|
||||||
|
__ARQRequestPendingLo->dest, __ARQRequestPendingLo->length);
|
||||||
|
else
|
||||||
|
ARStartDMA(__ARQRequestPendingLo->type, __ARQRequestPendingLo->dest,
|
||||||
|
__ARQRequestPendingLo->source, __ARQRequestPendingLo->length);
|
||||||
|
|
||||||
|
__ARQCallbackLo = __ARQRequestPendingLo->callback;
|
||||||
|
} else {
|
||||||
|
if (__ARQRequestPendingLo->type == ARQ_TYPE_MRAM_TO_ARAM)
|
||||||
|
ARStartDMA(__ARQRequestPendingLo->type, __ARQRequestPendingLo->source,
|
||||||
|
__ARQRequestPendingLo->dest, __ARQChunkSize);
|
||||||
|
else
|
||||||
|
ARStartDMA(__ARQRequestPendingLo->type, __ARQRequestPendingLo->dest,
|
||||||
|
__ARQRequestPendingLo->source, __ARQChunkSize);
|
||||||
|
}
|
||||||
|
|
||||||
|
__ARQRequestPendingLo->length -= __ARQChunkSize;
|
||||||
|
__ARQRequestPendingLo->source += __ARQChunkSize;
|
||||||
|
__ARQRequestPendingLo->dest += __ARQChunkSize;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
void __ARQCallbackHack(void) { return; }
|
||||||
|
|
||||||
|
void __ARQInterruptServiceRoutine(void) {
|
||||||
|
|
||||||
|
if (__ARQCallbackHi) {
|
||||||
|
(*__ARQCallbackHi)((u32)__ARQRequestPendingHi);
|
||||||
|
__ARQRequestPendingHi = NULL;
|
||||||
|
__ARQCallbackHi = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
else if (__ARQCallbackLo) {
|
||||||
|
(*__ARQCallbackLo)((u32)__ARQRequestPendingLo);
|
||||||
|
__ARQRequestPendingLo = NULL;
|
||||||
|
__ARQCallbackLo = NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
__ARQPopTaskQueueHi();
|
||||||
|
|
||||||
|
if (__ARQRequestPendingHi == NULL)
|
||||||
|
__ARQServiceQueueLo();
|
||||||
|
}
|
||||||
|
|
||||||
|
void ARQInit(void) {
|
||||||
|
|
||||||
|
if (TRUE == __ARQ_init_flag) {
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
|
||||||
|
OSRegisterVersion(__ARQVersion);
|
||||||
|
__ARQRequestQueueHi = __ARQRequestQueueLo = NULL;
|
||||||
|
__ARQChunkSize = ARQ_CHUNK_SIZE_DEFAULT;
|
||||||
|
ARRegisterDMACallback(&__ARQInterruptServiceRoutine);
|
||||||
|
__ARQRequestPendingHi = NULL;
|
||||||
|
__ARQRequestPendingLo = NULL;
|
||||||
|
__ARQCallbackHi = NULL;
|
||||||
|
__ARQCallbackLo = NULL;
|
||||||
|
__ARQ_init_flag = TRUE;
|
||||||
|
}
|
||||||
|
|
||||||
|
void ARQPostRequest(ARQRequest* request, u32 owner, u32 type, u32 priority, u32 source, u32 dest,
|
||||||
|
u32 length, ARQCallback callback) {
|
||||||
|
|
||||||
|
BOOL enabled;
|
||||||
|
|
||||||
|
request->next = NULL;
|
||||||
|
request->owner = owner;
|
||||||
|
request->type = type;
|
||||||
|
request->source = source;
|
||||||
|
request->dest = dest;
|
||||||
|
request->length = length;
|
||||||
|
|
||||||
|
if (callback) {
|
||||||
|
request->callback = callback;
|
||||||
|
} else {
|
||||||
|
request->callback = (ARQCallback)&__ARQCallbackHack;
|
||||||
|
}
|
||||||
|
|
||||||
|
enabled = OSDisableInterrupts();
|
||||||
|
|
||||||
|
switch (priority) {
|
||||||
|
case ARQ_PRIORITY_LOW:
|
||||||
|
|
||||||
|
if (__ARQRequestQueueLo) {
|
||||||
|
__ARQRequestTailLo->next = request;
|
||||||
|
} else {
|
||||||
|
__ARQRequestQueueLo = request;
|
||||||
|
}
|
||||||
|
__ARQRequestTailLo = request;
|
||||||
|
|
||||||
|
break;
|
||||||
|
|
||||||
|
case ARQ_PRIORITY_HIGH:
|
||||||
|
|
||||||
|
if (__ARQRequestQueueHi) {
|
||||||
|
__ARQRequestTailHi->next = request;
|
||||||
|
} else {
|
||||||
|
__ARQRequestQueueHi = request;
|
||||||
|
}
|
||||||
|
|
||||||
|
__ARQRequestTailHi = request;
|
||||||
|
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
|
||||||
|
if ((__ARQRequestPendingHi == NULL) && (__ARQRequestPendingLo == NULL)) {
|
||||||
|
__ARQPopTaskQueueHi();
|
||||||
|
|
||||||
|
if (__ARQRequestPendingHi == NULL) {
|
||||||
|
__ARQServiceQueueLo();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
OSRestoreInterrupts(enabled);
|
||||||
|
}
|
||||||
|
|
||||||
|
u32 ARQGetChunkSize(void) { return __ARQChunkSize; }
|
Loading…
Reference in New Issue