mirror of https://github.com/PrimeDecomp/prime.git
Update macros.inc with SPR names; PPCArch cleanup
Former-commit-id: 102f41c062
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@ -0,0 +1,84 @@
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#ifndef _ASM_TYPES
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#define _ASM_TYPES
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// Special Purpose Registers (SPRs)
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#define XER 1
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#define LR 8
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#define CTR 9
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#define DSISR 18
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#define DAR 19
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#define DEC 22
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#define SDR1 25
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#define SRR0 26
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#define SRR1 27
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#define SPRG0 272
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#define SPRG1 273
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#define SPRG2 274
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#define SPRG3 275
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#define EAR 282
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#define PVR 287
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#define IBAT0U 528
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#define IBAT0L 529
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#define IBAT1U 530
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#define IBAT1L 531
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#define IBAT2U 532
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#define IBAT2L 533
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#define IBAT3U 534
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#define IBAT3L 535
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#define DBAT0U 536
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#define DBAT0L 537
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#define DBAT1U 538
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#define DBAT1L 539
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#define DBAT2U 540
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#define DBAT2L 541
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#define DBAT3U 542
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#define DBAT3L 543
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#define GQR0 912
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#define GQR1 913
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#define GQR2 914
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#define GQR3 915
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#define GQR4 916
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#define GQR5 917
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#define GQR6 918
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#define GQR7 919
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#define HID2 920
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#define WPAR 921
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#define DMA_U 922
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#define DMA_L 923
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#define UMMCR0 936
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#define UPMC1 937
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#define UPMC2 938
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#define USIA 939
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#define UMMCR1 940
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#define UPMC3 941
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#define UPMC4 942
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#define USDA 943
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#define MMCR0 952
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#define PMC1 953
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#define PMC2 954
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#define SIA 955
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#define MMCR1 956
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#define PMC3 957
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#define PMC4 958
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#define SDA 959
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#define HID0 1008
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#define HID1 1009
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#define IABR 1010
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#define DABR 1013
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#define L2CR 1017
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#define ICTC 1019
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#define THRM1 1020
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#define THRM2 1021
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#define THRM3 1022
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// Condition Registers (CRs)
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#define cr0 0
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#define cr1 1
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#define cr2 2
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#define cr3 3
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#define cr4 4
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#define cr5 5
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#define cr6 6
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#define cr7 7
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#endif // _ASM_TYPES
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@ -1,4 +1,4 @@
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# PowerPC Register Constants
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# General Purpose Registers (GPRs)
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.set r0, 0
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.set r1, 1
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.set r2, 2
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@ -31,6 +31,8 @@
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.set r29, 29
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.set r30, 30
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.set r31, 31
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# Floating Point Registers (FPRs)
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.set f0, 0
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.set f1, 1
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.set f2, 2
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@ -63,6 +65,8 @@
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.set f29, 29
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.set f30, 30
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.set f31, 31
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# Graphics Quantization Registers (GQRs)
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.set qr0, 0
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.set qr1, 1
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.set qr2, 2
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@ -71,3 +75,73 @@
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.set qr5, 5
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.set qr6, 6
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.set qr7, 7
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# Special Purpose Registers (SPRs)
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.set XER, 1
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.set LR, 8
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.set CTR, 9
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.set DSISR, 18
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.set DAR, 19
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.set DEC, 22
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.set SDR1, 25
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.set SRR0, 26
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.set SRR1, 27
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.set SPRG0, 272
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.set SPRG1, 273
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.set SPRG2, 274
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.set SPRG3, 275
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.set EAR, 282
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.set PVR, 287
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.set IBAT0U, 528
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.set IBAT0L, 529
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.set IBAT1U, 530
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.set IBAT1L, 531
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.set IBAT2U, 532
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.set IBAT2L, 533
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.set IBAT3U, 534
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.set IBAT3L, 535
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.set DBAT0U, 536
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.set DBAT0L, 537
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.set DBAT1U, 538
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.set DBAT1L, 539
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.set DBAT2U, 540
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.set DBAT2L, 541
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.set DBAT3U, 542
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.set DBAT3L, 543
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.set GQR0, 912
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.set GQR1, 913
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.set GQR2, 914
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.set GQR3, 915
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.set GQR4, 916
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.set GQR5, 917
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.set GQR6, 918
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.set GQR7, 919
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.set HID2, 920
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.set WPAR, 921
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.set DMA_U, 922
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.set DMA_L, 923
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.set UMMCR0, 936
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.set UPMC1, 937
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.set UPMC2, 938
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.set USIA, 939
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.set UMMCR1, 940
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.set UPMC3, 941
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.set UPMC4, 942
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.set USDA, 943
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.set MMCR0, 952
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.set PMC1, 953
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.set PMC2, 954
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.set SIA, 955
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.set MMCR1, 956
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.set PMC3, 957
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.set PMC4, 958
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.set SDA, 959
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.set HID0, 1008
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.set HID1, 1009
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.set IABR, 1010
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.set DABR, 1013
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.set L2CR, 1017
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.set ICTC, 1019
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.set THRM1, 1020
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.set THRM2, 1021
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.set THRM3, 1022
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@ -1,4 +1,5 @@
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#include "types.h"
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#include "asm_types.h"
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// clang-format off
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union FpscrUnion
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@ -422,7 +423,7 @@ void PPCMtfpscr(register u32 newFPSCR)
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asm u32 PPCMfhid2 ( void )
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{
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nofralloc
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mfspr r3, 920
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mfspr r3, HID2
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blr
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}
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@ -434,7 +435,7 @@ asm u32 PPCMfhid2 ( void )
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asm void PPCMthid2 ( register u32 newhid2 )
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{
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nofralloc
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mtspr 920, newhid2
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mtspr HID2, newhid2
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blr
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}
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@ -447,7 +448,7 @@ asm u32 PPCMfwpar(void)
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{
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nofralloc
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sync
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mfspr r3, 921
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mfspr r3, WPAR
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blr
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}
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@ -545,7 +546,7 @@ void PPCDisableSpeculation (void)
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asm void PPCSetFpIEEEMode(void)
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{
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nofralloc
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mtfsb0 29
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mtfsb0 4*cr7+1
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blr
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}
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/*
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asm void PPCSetFpNonIEEEMode (void)
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{
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nofralloc
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mtfsb1 29
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mtfsb1 4*cr7+1
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blr
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}
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// clang-format on
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