mirror of https://github.com/PrimeDecomp/prime.git
4615 lines
231 KiB
ArmAsm
4615 lines
231 KiB
ArmAsm
.include "macros.inc"
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.section .bss
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.global lbl_80479510
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lbl_80479510:
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.skip 0x48
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.section .text, "ax"
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.global TriPointSqrDist__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fPfPf
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TriPointSqrDist__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fPfPf:
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/* 802CFCF4 002CCC54 94 21 FF 20 */ stwu r1, -0xe0(r1)
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/* 802CFCF8 002CCC58 7C 08 02 A6 */ mflr r0
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/* 802CFCFC 002CCC5C 90 01 00 E4 */ stw r0, 0xe4(r1)
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/* 802CFD00 002CCC60 DB E1 00 D0 */ stfd f31, 0xd0(r1)
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/* 802CFD04 002CCC64 F3 E1 00 D8 */ psq_st f31, 216(r1), 0, qr0
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/* 802CFD08 002CCC68 DB C1 00 C0 */ stfd f30, 0xc0(r1)
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/* 802CFD0C 002CCC6C F3 C1 00 C8 */ psq_st f30, 200(r1), 0, qr0
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/* 802CFD10 002CCC70 DB A1 00 B0 */ stfd f29, 0xb0(r1)
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/* 802CFD14 002CCC74 F3 A1 00 B8 */ psq_st f29, 184(r1), 0, qr0
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/* 802CFD18 002CCC78 DB 81 00 A0 */ stfd f28, 0xa0(r1)
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/* 802CFD1C 002CCC7C F3 81 00 A8 */ psq_st f28, 168(r1), 0, qr0
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/* 802CFD20 002CCC80 DB 61 00 90 */ stfd f27, 0x90(r1)
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/* 802CFD24 002CCC84 F3 61 00 98 */ psq_st f27, 152(r1), 0, qr0
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/* 802CFD28 002CCC88 BF 61 00 7C */ stmw r27, 0x7c(r1)
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/* 802CFD2C 002CCC8C 7C 9B 23 78 */ mr r27, r4
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/* 802CFD30 002CCC90 C0 03 00 04 */ lfs f0, 4(r3)
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/* 802CFD34 002CCC94 C0 24 00 04 */ lfs f1, 4(r4)
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/* 802CFD38 002CCC98 7C BC 2B 78 */ mr r28, r5
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/* 802CFD3C 002CCC9C C0 64 00 08 */ lfs f3, 8(r4)
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/* 802CFD40 002CCCA0 7C DD 33 78 */ mr r29, r6
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/* 802CFD44 002CCCA4 C0 43 00 08 */ lfs f2, 8(r3)
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/* 802CFD48 002CCCA8 EC 81 00 28 */ fsubs f4, f1, f0
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/* 802CFD4C 002CCCAC C0 03 00 00 */ lfs f0, 0(r3)
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/* 802CFD50 002CCCB0 7C FE 3B 78 */ mr r30, r7
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/* 802CFD54 002CCCB4 C0 24 00 00 */ lfs f1, 0(r4)
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/* 802CFD58 002CCCB8 EC 43 10 28 */ fsubs f2, f3, f2
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/* 802CFD5C 002CCCBC D0 81 00 24 */ stfs f4, 0x24(r1)
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/* 802CFD60 002CCCC0 EC 01 00 28 */ fsubs f0, f1, f0
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/* 802CFD64 002CCCC4 7D 1F 43 78 */ mr r31, r8
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/* 802CFD68 002CCCC8 D0 41 00 28 */ stfs f2, 0x28(r1)
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/* 802CFD6C 002CCCCC 38 61 00 60 */ addi r3, r1, 0x60
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/* 802CFD70 002CCCD0 38 81 00 20 */ addi r4, r1, 0x20
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/* 802CFD74 002CCCD4 D0 01 00 20 */ stfs f0, 0x20(r1)
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/* 802CFD78 002CCCD8 48 04 48 0D */ bl __ct__9CVector3dFRC9CVector3f
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/* 802CFD7C 002CCCDC C0 3C 00 04 */ lfs f1, 4(r28)
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/* 802CFD80 002CCCE0 38 61 00 48 */ addi r3, r1, 0x48
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/* 802CFD84 002CCCE4 C0 1B 00 04 */ lfs f0, 4(r27)
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/* 802CFD88 002CCCE8 38 81 00 14 */ addi r4, r1, 0x14
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/* 802CFD8C 002CCCEC C0 7C 00 08 */ lfs f3, 8(r28)
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/* 802CFD90 002CCCF0 C0 5B 00 08 */ lfs f2, 8(r27)
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/* 802CFD94 002CCCF4 EC 81 00 28 */ fsubs f4, f1, f0
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/* 802CFD98 002CCCF8 C0 3C 00 00 */ lfs f1, 0(r28)
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/* 802CFD9C 002CCCFC C0 1B 00 00 */ lfs f0, 0(r27)
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/* 802CFDA0 002CCD00 EC 43 10 28 */ fsubs f2, f3, f2
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/* 802CFDA4 002CCD04 D0 81 00 18 */ stfs f4, 0x18(r1)
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/* 802CFDA8 002CCD08 EC 01 00 28 */ fsubs f0, f1, f0
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/* 802CFDAC 002CCD0C D0 41 00 1C */ stfs f2, 0x1c(r1)
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/* 802CFDB0 002CCD10 D0 01 00 14 */ stfs f0, 0x14(r1)
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/* 802CFDB4 002CCD14 48 04 47 D1 */ bl __ct__9CVector3dFRC9CVector3f
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/* 802CFDB8 002CCD18 C0 3D 00 04 */ lfs f1, 4(r29)
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/* 802CFDBC 002CCD1C 38 61 00 30 */ addi r3, r1, 0x30
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/* 802CFDC0 002CCD20 C0 1B 00 04 */ lfs f0, 4(r27)
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/* 802CFDC4 002CCD24 38 81 00 08 */ addi r4, r1, 8
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/* 802CFDC8 002CCD28 C0 7D 00 08 */ lfs f3, 8(r29)
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/* 802CFDCC 002CCD2C C0 5B 00 08 */ lfs f2, 8(r27)
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/* 802CFDD0 002CCD30 EC 81 00 28 */ fsubs f4, f1, f0
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/* 802CFDD4 002CCD34 C0 3D 00 00 */ lfs f1, 0(r29)
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/* 802CFDD8 002CCD38 C0 1B 00 00 */ lfs f0, 0(r27)
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/* 802CFDDC 002CCD3C EC 43 10 28 */ fsubs f2, f3, f2
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/* 802CFDE0 002CCD40 D0 81 00 0C */ stfs f4, 0xc(r1)
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/* 802CFDE4 002CCD44 EC 01 00 28 */ fsubs f0, f1, f0
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/* 802CFDE8 002CCD48 D0 41 00 10 */ stfs f2, 0x10(r1)
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/* 802CFDEC 002CCD4C D0 01 00 08 */ stfs f0, 8(r1)
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/* 802CFDF0 002CCD50 48 04 47 95 */ bl __ct__9CVector3dFRC9CVector3f
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/* 802CFDF4 002CCD54 38 61 00 48 */ addi r3, r1, 0x48
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/* 802CFDF8 002CCD58 48 04 47 29 */ bl MagSquared__9CVector3dCFv
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/* 802CFDFC 002CCD5C FF 60 08 90 */ fmr f27, f1
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/* 802CFE00 002CCD60 38 61 00 30 */ addi r3, r1, 0x30
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/* 802CFE04 002CCD64 48 04 47 1D */ bl MagSquared__9CVector3dCFv
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/* 802CFE08 002CCD68 FF 80 08 90 */ fmr f28, f1
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/* 802CFE0C 002CCD6C 38 61 00 48 */ addi r3, r1, 0x48
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/* 802CFE10 002CCD70 38 81 00 30 */ addi r4, r1, 0x30
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/* 802CFE14 002CCD74 48 04 46 59 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
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/* 802CFE18 002CCD78 FF A0 08 90 */ fmr f29, f1
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/* 802CFE1C 002CCD7C 38 61 00 60 */ addi r3, r1, 0x60
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/* 802CFE20 002CCD80 38 81 00 48 */ addi r4, r1, 0x48
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/* 802CFE24 002CCD84 48 04 46 49 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
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/* 802CFE28 002CCD88 FF C0 08 90 */ fmr f30, f1
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/* 802CFE2C 002CCD8C 38 61 00 60 */ addi r3, r1, 0x60
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/* 802CFE30 002CCD90 38 81 00 30 */ addi r4, r1, 0x30
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/* 802CFE34 002CCD94 48 04 46 39 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
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/* 802CFE38 002CCD98 FF E0 08 90 */ fmr f31, f1
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/* 802CFE3C 002CCD9C 38 61 00 60 */ addi r3, r1, 0x60
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/* 802CFE40 002CCDA0 48 04 46 E1 */ bl MagSquared__9CVector3dCFv
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/* 802CFE44 002CCDA4 FC 7D 07 72 */ fmul f3, f29, f29
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/* 802CFE48 002CCDA8 FC 1C 07 B2 */ fmul f0, f28, f30
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/* 802CFE4C 002CCDAC FC 5B 07 F2 */ fmul f2, f27, f31
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/* 802CFE50 002CCDB0 FC 7B 1F 38 */ fmsub f3, f27, f28, f3
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/* 802CFE54 002CCDB4 FC 1D 07 F8 */ fmsub f0, f29, f31, f0
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/* 802CFE58 002CCDB8 FC 5D 17 B8 */ fmsub f2, f29, f30, f2
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/* 802CFE5C 002CCDBC FC 80 1A 10 */ fabs f4, f3
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/* 802CFE60 002CCDC0 FC 60 10 2A */ fadd f3, f0, f2
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/* 802CFE64 002CCDC4 FC 03 20 40 */ fcmpo cr0, f3, f4
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/* 802CFE68 002CCDC8 4C 40 13 82 */ cror 2, 0, 2
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/* 802CFE6C 002CCDCC 40 82 01 70 */ bne lbl_802CFFDC
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/* 802CFE70 002CCDD0 C8 62 C4 A0 */ lfd f3, lbl_805AE1C0@sda21(r2)
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/* 802CFE74 002CCDD4 FC 00 18 40 */ fcmpo cr0, f0, f3
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/* 802CFE78 002CCDD8 40 80 00 D8 */ bge lbl_802CFF50
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/* 802CFE7C 002CCDDC FC 02 18 40 */ fcmpo cr0, f2, f3
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/* 802CFE80 002CCDE0 40 80 00 88 */ bge lbl_802CFF08
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/* 802CFE84 002CCDE4 FC 1E 18 40 */ fcmpo cr0, f30, f3
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/* 802CFE88 002CCDE8 40 80 00 38 */ bge lbl_802CFEC0
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/* 802CFE8C 002CCDEC FC 00 F0 50 */ fneg f0, f30
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/* 802CFE90 002CCDF0 FC 40 18 90 */ fmr f2, f3
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/* 802CFE94 002CCDF4 FC 00 D8 40 */ fcmpo cr0, f0, f27
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/* 802CFE98 002CCDF8 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFE9C 002CCDFC 40 82 00 18 */ bne lbl_802CFEB4
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/* 802CFEA0 002CCE00 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
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/* 802CFEA4 002CCE04 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
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/* 802CFEA8 002CCE08 FC 63 DF BA */ fmadd f3, f3, f30, f27
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/* 802CFEAC 002CCE0C FC 21 18 2A */ fadd f1, f1, f3
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/* 802CFEB0 002CCE10 48 00 03 44 */ b lbl_802D01F4
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lbl_802CFEB4:
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/* 802CFEB4 002CCE14 FC 00 D8 24 */ fdiv f0, f0, f27
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/* 802CFEB8 002CCE18 FC 3E 08 3A */ fmadd f1, f30, f0, f1
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/* 802CFEBC 002CCE1C 48 00 03 38 */ b lbl_802D01F4
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lbl_802CFEC0:
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/* 802CFEC0 002CCE20 FC 1F 18 40 */ fcmpo cr0, f31, f3
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/* 802CFEC4 002CCE24 FC 00 18 90 */ fmr f0, f3
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/* 802CFEC8 002CCE28 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFECC 002CCE2C 40 82 00 0C */ bne lbl_802CFED8
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/* 802CFED0 002CCE30 FC 40 18 90 */ fmr f2, f3
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/* 802CFED4 002CCE34 48 00 03 20 */ b lbl_802D01F4
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lbl_802CFED8:
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/* 802CFED8 002CCE38 FC 40 F8 50 */ fneg f2, f31
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/* 802CFEDC 002CCE3C FC 02 E0 40 */ fcmpo cr0, f2, f28
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/* 802CFEE0 002CCE40 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFEE4 002CCE44 40 82 00 18 */ bne lbl_802CFEFC
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/* 802CFEE8 002CCE48 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
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/* 802CFEEC 002CCE4C C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
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/* 802CFEF0 002CCE50 FC 63 E7 FA */ fmadd f3, f3, f31, f28
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/* 802CFEF4 002CCE54 FC 21 18 2A */ fadd f1, f1, f3
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/* 802CFEF8 002CCE58 48 00 02 FC */ b lbl_802D01F4
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lbl_802CFEFC:
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/* 802CFEFC 002CCE5C FC 42 E0 24 */ fdiv f2, f2, f28
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/* 802CFF00 002CCE60 FC 3F 08 BA */ fmadd f1, f31, f2, f1
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/* 802CFF04 002CCE64 48 00 02 F0 */ b lbl_802D01F4
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lbl_802CFF08:
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/* 802CFF08 002CCE68 FC 1F 18 40 */ fcmpo cr0, f31, f3
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/* 802CFF0C 002CCE6C FC 00 18 90 */ fmr f0, f3
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/* 802CFF10 002CCE70 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFF14 002CCE74 40 82 00 0C */ bne lbl_802CFF20
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/* 802CFF18 002CCE78 FC 40 18 90 */ fmr f2, f3
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/* 802CFF1C 002CCE7C 48 00 02 D8 */ b lbl_802D01F4
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lbl_802CFF20:
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/* 802CFF20 002CCE80 FC 40 F8 50 */ fneg f2, f31
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/* 802CFF24 002CCE84 FC 02 E0 40 */ fcmpo cr0, f2, f28
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/* 802CFF28 002CCE88 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFF2C 002CCE8C 40 82 00 18 */ bne lbl_802CFF44
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/* 802CFF30 002CCE90 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
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/* 802CFF34 002CCE94 C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
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/* 802CFF38 002CCE98 FC 63 E7 FA */ fmadd f3, f3, f31, f28
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/* 802CFF3C 002CCE9C FC 21 18 2A */ fadd f1, f1, f3
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/* 802CFF40 002CCEA0 48 00 02 B4 */ b lbl_802D01F4
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lbl_802CFF44:
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/* 802CFF44 002CCEA4 FC 42 E0 24 */ fdiv f2, f2, f28
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/* 802CFF48 002CCEA8 FC 3F 08 BA */ fmadd f1, f31, f2, f1
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/* 802CFF4C 002CCEAC 48 00 02 A8 */ b lbl_802D01F4
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lbl_802CFF50:
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/* 802CFF50 002CCEB0 FC 02 18 40 */ fcmpo cr0, f2, f3
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/* 802CFF54 002CCEB4 40 80 00 4C */ bge lbl_802CFFA0
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/* 802CFF58 002CCEB8 FC 1E 18 40 */ fcmpo cr0, f30, f3
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/* 802CFF5C 002CCEBC FC 40 18 90 */ fmr f2, f3
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/* 802CFF60 002CCEC0 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFF64 002CCEC4 40 82 00 0C */ bne lbl_802CFF70
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/* 802CFF68 002CCEC8 FC 00 18 90 */ fmr f0, f3
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/* 802CFF6C 002CCECC 48 00 02 88 */ b lbl_802D01F4
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lbl_802CFF70:
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/* 802CFF70 002CCED0 FC 00 F0 50 */ fneg f0, f30
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/* 802CFF74 002CCED4 FC 00 D8 40 */ fcmpo cr0, f0, f27
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/* 802CFF78 002CCED8 4C 41 13 82 */ cror 2, 1, 2
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/* 802CFF7C 002CCEDC 40 82 00 18 */ bne lbl_802CFF94
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/* 802CFF80 002CCEE0 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
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/* 802CFF84 002CCEE4 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
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/* 802CFF88 002CCEE8 FC 63 DF BA */ fmadd f3, f3, f30, f27
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/* 802CFF8C 002CCEEC FC 21 18 2A */ fadd f1, f1, f3
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/* 802CFF90 002CCEF0 48 00 02 64 */ b lbl_802D01F4
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lbl_802CFF94:
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/* 802CFF94 002CCEF4 FC 00 D8 24 */ fdiv f0, f0, f27
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/* 802CFF98 002CCEF8 FC 3E 08 3A */ fmadd f1, f30, f0, f1
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/* 802CFF9C 002CCEFC 48 00 02 58 */ b lbl_802D01F4
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lbl_802CFFA0:
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/* 802CFFA0 002CCF00 C8 62 C4 A8 */ lfd f3, lbl_805AE1C8@sda21(r2)
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/* 802CFFA4 002CCF04 C8 A2 C4 B0 */ lfd f5, lbl_805AE1D0@sda21(r2)
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/* 802CFFA8 002CCF08 FC 63 20 24 */ fdiv f3, f3, f4
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/* 802CFFAC 002CCF0C FC 42 00 F2 */ fmul f2, f2, f3
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/* 802CFFB0 002CCF10 FC 00 00 F2 */ fmul f0, f0, f3
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/* 802CFFB4 002CCF14 FC 7C 00 B2 */ fmul f3, f28, f2
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/* 802CFFB8 002CCF18 FC 9D 00 B2 */ fmul f4, f29, f2
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/* 802CFFBC 002CCF1C FC 7D 18 3A */ fmadd f3, f29, f0, f3
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/* 802CFFC0 002CCF20 FC 9B 20 3A */ fmadd f4, f27, f0, f4
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/* 802CFFC4 002CCF24 FC 65 1F FA */ fmadd f3, f5, f31, f3
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/* 802CFFC8 002CCF28 FC 85 27 BA */ fmadd f4, f5, f30, f4
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/* 802CFFCC 002CCF2C FC 62 00 F2 */ fmul f3, f2, f3
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/* 802CFFD0 002CCF30 FC 60 19 3A */ fmadd f3, f0, f4, f3
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/* 802CFFD4 002CCF34 FC 21 18 2A */ fadd f1, f1, f3
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/* 802CFFD8 002CCF38 48 00 02 1C */ b lbl_802D01F4
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lbl_802CFFDC:
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/* 802CFFDC 002CCF3C C8 82 C4 A0 */ lfd f4, lbl_805AE1C0@sda21(r2)
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/* 802CFFE0 002CCF40 FC 00 20 40 */ fcmpo cr0, f0, f4
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/* 802CFFE4 002CCF44 40 80 00 C0 */ bge lbl_802D00A4
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/* 802CFFE8 002CCF48 FC 1D F0 2A */ fadd f0, f29, f30
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/* 802CFFEC 002CCF4C FC 5C F8 2A */ fadd f2, f28, f31
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/* 802CFFF0 002CCF50 FC 02 00 40 */ fcmpo cr0, f2, f0
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/* 802CFFF4 002CCF54 40 81 00 68 */ ble lbl_802D005C
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/* 802CFFF8 002CCF58 C8 A2 C4 B0 */ lfd f5, lbl_805AE1D0@sda21(r2)
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/* 802CFFFC 002CCF5C FC 42 00 28 */ fsub f2, f2, f0
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/* 802D0000 002CCF60 FC 05 DF 7C */ fnmsub f0, f5, f29, f27
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/* 802D0004 002CCF64 FC 1C 00 2A */ fadd f0, f28, f0
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/* 802D0008 002CCF68 FC 02 00 40 */ fcmpo cr0, f2, f0
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/* 802D000C 002CCF6C 4C 41 13 82 */ cror 2, 1, 2
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/* 802D0010 002CCF70 40 82 00 18 */ bne lbl_802D0028
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/* 802D0014 002CCF74 FC 65 DF BA */ fmadd f3, f5, f30, f27
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/* 802D0018 002CCF78 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
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/* 802D001C 002CCF7C FC 40 20 90 */ fmr f2, f4
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/* 802D0020 002CCF80 FC 21 18 2A */ fadd f1, f1, f3
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/* 802D0024 002CCF84 48 00 01 D0 */ b lbl_802D01F4
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lbl_802D0028:
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/* 802D0028 002CCF88 FC 02 00 24 */ fdiv f0, f2, f0
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/* 802D002C 002CCF8C C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
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/* 802D0030 002CCF90 FC 42 00 28 */ fsub f2, f2, f0
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/* 802D0034 002CCF94 FC 7C 00 B2 */ fmul f3, f28, f2
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/* 802D0038 002CCF98 FC 9D 00 B2 */ fmul f4, f29, f2
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/* 802D003C 002CCF9C FC 7D 18 3A */ fmadd f3, f29, f0, f3
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/* 802D0040 002CCFA0 FC 9B 20 3A */ fmadd f4, f27, f0, f4
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/* 802D0044 002CCFA4 FC 65 1F FA */ fmadd f3, f5, f31, f3
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/* 802D0048 002CCFA8 FC 85 27 BA */ fmadd f4, f5, f30, f4
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/* 802D004C 002CCFAC FC 62 00 F2 */ fmul f3, f2, f3
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/* 802D0050 002CCFB0 FC 60 19 3A */ fmadd f3, f0, f4, f3
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/* 802D0054 002CCFB4 FC 21 18 2A */ fadd f1, f1, f3
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/* 802D0058 002CCFB8 48 00 01 9C */ b lbl_802D01F4
|
|
lbl_802D005C:
|
|
/* 802D005C 002CCFBC FC 02 20 40 */ fcmpo cr0, f2, f4
|
|
/* 802D0060 002CCFC0 FC 00 20 90 */ fmr f0, f4
|
|
/* 802D0064 002CCFC4 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D0068 002CCFC8 40 82 00 18 */ bne lbl_802D0080
|
|
/* 802D006C 002CCFCC C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
|
|
/* 802D0070 002CCFD0 C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
|
|
/* 802D0074 002CCFD4 FC 63 E7 FA */ fmadd f3, f3, f31, f28
|
|
/* 802D0078 002CCFD8 FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D007C 002CCFDC 48 00 01 78 */ b lbl_802D01F4
|
|
lbl_802D0080:
|
|
/* 802D0080 002CCFE0 FC 1F 20 40 */ fcmpo cr0, f31, f4
|
|
/* 802D0084 002CCFE4 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D0088 002CCFE8 40 82 00 0C */ bne lbl_802D0094
|
|
/* 802D008C 002CCFEC FC 40 20 90 */ fmr f2, f4
|
|
/* 802D0090 002CCFF0 48 00 01 64 */ b lbl_802D01F4
|
|
lbl_802D0094:
|
|
/* 802D0094 002CCFF4 FC 40 F8 50 */ fneg f2, f31
|
|
/* 802D0098 002CCFF8 FC 42 E0 24 */ fdiv f2, f2, f28
|
|
/* 802D009C 002CCFFC FC 3F 08 BA */ fmadd f1, f31, f2, f1
|
|
/* 802D00A0 002CD000 48 00 01 54 */ b lbl_802D01F4
|
|
lbl_802D00A4:
|
|
/* 802D00A4 002CD004 FC 02 20 40 */ fcmpo cr0, f2, f4
|
|
/* 802D00A8 002CD008 40 80 00 C0 */ bge lbl_802D0168
|
|
/* 802D00AC 002CD00C FC 1D F8 2A */ fadd f0, f29, f31
|
|
/* 802D00B0 002CD010 FC 5B F0 2A */ fadd f2, f27, f30
|
|
/* 802D00B4 002CD014 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D00B8 002CD018 40 81 00 68 */ ble lbl_802D0120
|
|
/* 802D00BC 002CD01C C8 A2 C4 B0 */ lfd f5, lbl_805AE1D0@sda21(r2)
|
|
/* 802D00C0 002CD020 FC 42 00 28 */ fsub f2, f2, f0
|
|
/* 802D00C4 002CD024 FC 05 DF 7C */ fnmsub f0, f5, f29, f27
|
|
/* 802D00C8 002CD028 FC 1C 00 2A */ fadd f0, f28, f0
|
|
/* 802D00CC 002CD02C FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D00D0 002CD030 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D00D4 002CD034 40 82 00 18 */ bne lbl_802D00EC
|
|
/* 802D00D8 002CD038 FC 65 E7 FA */ fmadd f3, f5, f31, f28
|
|
/* 802D00DC 002CD03C C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
|
|
/* 802D00E0 002CD040 FC 00 20 90 */ fmr f0, f4
|
|
/* 802D00E4 002CD044 FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D00E8 002CD048 48 00 01 0C */ b lbl_802D01F4
|
|
lbl_802D00EC:
|
|
/* 802D00EC 002CD04C FC 42 00 24 */ fdiv f2, f2, f0
|
|
/* 802D00F0 002CD050 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
|
|
/* 802D00F4 002CD054 FC 7C 00 B2 */ fmul f3, f28, f2
|
|
/* 802D00F8 002CD058 FC 00 10 28 */ fsub f0, f0, f2
|
|
/* 802D00FC 002CD05C FC 9D 00 B2 */ fmul f4, f29, f2
|
|
/* 802D0100 002CD060 FC 7D 18 3A */ fmadd f3, f29, f0, f3
|
|
/* 802D0104 002CD064 FC 9B 20 3A */ fmadd f4, f27, f0, f4
|
|
/* 802D0108 002CD068 FC 65 1F FA */ fmadd f3, f5, f31, f3
|
|
/* 802D010C 002CD06C FC 85 27 BA */ fmadd f4, f5, f30, f4
|
|
/* 802D0110 002CD070 FC 62 00 F2 */ fmul f3, f2, f3
|
|
/* 802D0114 002CD074 FC 60 19 3A */ fmadd f3, f0, f4, f3
|
|
/* 802D0118 002CD078 FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D011C 002CD07C 48 00 00 D8 */ b lbl_802D01F4
|
|
lbl_802D0120:
|
|
/* 802D0120 002CD080 FC 02 20 40 */ fcmpo cr0, f2, f4
|
|
/* 802D0124 002CD084 FC 40 20 90 */ fmr f2, f4
|
|
/* 802D0128 002CD088 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D012C 002CD08C 40 82 00 18 */ bne lbl_802D0144
|
|
/* 802D0130 002CD090 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
|
|
/* 802D0134 002CD094 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
|
|
/* 802D0138 002CD098 FC 63 DF BA */ fmadd f3, f3, f30, f27
|
|
/* 802D013C 002CD09C FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D0140 002CD0A0 48 00 00 B4 */ b lbl_802D01F4
|
|
lbl_802D0144:
|
|
/* 802D0144 002CD0A4 FC 1E 20 40 */ fcmpo cr0, f30, f4
|
|
/* 802D0148 002CD0A8 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D014C 002CD0AC 40 82 00 0C */ bne lbl_802D0158
|
|
/* 802D0150 002CD0B0 FC 00 20 90 */ fmr f0, f4
|
|
/* 802D0154 002CD0B4 48 00 00 A0 */ b lbl_802D01F4
|
|
lbl_802D0158:
|
|
/* 802D0158 002CD0B8 FC 00 F0 50 */ fneg f0, f30
|
|
/* 802D015C 002CD0BC FC 00 D8 24 */ fdiv f0, f0, f27
|
|
/* 802D0160 002CD0C0 FC 3E 08 3A */ fmadd f1, f30, f0, f1
|
|
/* 802D0164 002CD0C4 48 00 00 90 */ b lbl_802D01F4
|
|
lbl_802D0168:
|
|
/* 802D0168 002CD0C8 FC 1C F8 2A */ fadd f0, f28, f31
|
|
/* 802D016C 002CD0CC FC 00 E8 28 */ fsub f0, f0, f29
|
|
/* 802D0170 002CD0D0 FC 40 F0 28 */ fsub f2, f0, f30
|
|
/* 802D0174 002CD0D4 FC 02 20 40 */ fcmpo cr0, f2, f4
|
|
/* 802D0178 002CD0D8 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D017C 002CD0DC 40 82 00 1C */ bne lbl_802D0198
|
|
/* 802D0180 002CD0E0 C8 62 C4 B0 */ lfd f3, lbl_805AE1D0@sda21(r2)
|
|
/* 802D0184 002CD0E4 FC 00 20 90 */ fmr f0, f4
|
|
/* 802D0188 002CD0E8 C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
|
|
/* 802D018C 002CD0EC FC 63 E7 FA */ fmadd f3, f3, f31, f28
|
|
/* 802D0190 002CD0F0 FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D0194 002CD0F4 48 00 00 60 */ b lbl_802D01F4
|
|
lbl_802D0198:
|
|
/* 802D0198 002CD0F8 C8 A2 C4 B0 */ lfd f5, lbl_805AE1D0@sda21(r2)
|
|
/* 802D019C 002CD0FC FC 05 DF 7C */ fnmsub f0, f5, f29, f27
|
|
/* 802D01A0 002CD100 FC 1C 00 2A */ fadd f0, f28, f0
|
|
/* 802D01A4 002CD104 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D01A8 002CD108 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D01AC 002CD10C 40 82 00 18 */ bne lbl_802D01C4
|
|
/* 802D01B0 002CD110 FC 65 DF BA */ fmadd f3, f5, f30, f27
|
|
/* 802D01B4 002CD114 C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
|
|
/* 802D01B8 002CD118 FC 40 20 90 */ fmr f2, f4
|
|
/* 802D01BC 002CD11C FC 21 18 2A */ fadd f1, f1, f3
|
|
/* 802D01C0 002CD120 48 00 00 34 */ b lbl_802D01F4
|
|
lbl_802D01C4:
|
|
/* 802D01C4 002CD124 FC 02 00 24 */ fdiv f0, f2, f0
|
|
/* 802D01C8 002CD128 C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
|
|
/* 802D01CC 002CD12C FC 42 00 28 */ fsub f2, f2, f0
|
|
/* 802D01D0 002CD130 FC 7C 00 B2 */ fmul f3, f28, f2
|
|
/* 802D01D4 002CD134 FC 9D 00 B2 */ fmul f4, f29, f2
|
|
/* 802D01D8 002CD138 FC 7D 18 3A */ fmadd f3, f29, f0, f3
|
|
/* 802D01DC 002CD13C FC 9B 20 3A */ fmadd f4, f27, f0, f4
|
|
/* 802D01E0 002CD140 FC 65 1F FA */ fmadd f3, f5, f31, f3
|
|
/* 802D01E4 002CD144 FC 85 27 BA */ fmadd f4, f5, f30, f4
|
|
/* 802D01E8 002CD148 FC 62 00 F2 */ fmul f3, f2, f3
|
|
/* 802D01EC 002CD14C FC 60 19 3A */ fmadd f3, f0, f4, f3
|
|
/* 802D01F0 002CD150 FC 21 18 2A */ fadd f1, f1, f3
|
|
lbl_802D01F4:
|
|
/* 802D01F4 002CD154 28 1E 00 00 */ cmplwi r30, 0
|
|
/* 802D01F8 002CD158 41 82 00 0C */ beq lbl_802D0204
|
|
/* 802D01FC 002CD15C FC 40 10 18 */ frsp f2, f2
|
|
/* 802D0200 002CD160 D0 5E 00 00 */ stfs f2, 0(r30)
|
|
lbl_802D0204:
|
|
/* 802D0204 002CD164 28 1F 00 00 */ cmplwi r31, 0
|
|
/* 802D0208 002CD168 41 82 00 0C */ beq lbl_802D0214
|
|
/* 802D020C 002CD16C FC 00 00 18 */ frsp f0, f0
|
|
/* 802D0210 002CD170 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
lbl_802D0214:
|
|
/* 802D0214 002CD174 E3 E1 00 D8 */ psq_l f31, 216(r1), 0, qr0
|
|
/* 802D0218 002CD178 CB E1 00 D0 */ lfd f31, 0xd0(r1)
|
|
/* 802D021C 002CD17C E3 C1 00 C8 */ psq_l f30, 200(r1), 0, qr0
|
|
/* 802D0220 002CD180 CB C1 00 C0 */ lfd f30, 0xc0(r1)
|
|
/* 802D0224 002CD184 E3 A1 00 B8 */ psq_l f29, 184(r1), 0, qr0
|
|
/* 802D0228 002CD188 CB A1 00 B0 */ lfd f29, 0xb0(r1)
|
|
/* 802D022C 002CD18C E3 81 00 A8 */ psq_l f28, 168(r1), 0, qr0
|
|
/* 802D0230 002CD190 CB 81 00 A0 */ lfd f28, 0xa0(r1)
|
|
/* 802D0234 002CD194 E3 61 00 98 */ psq_l f27, 152(r1), 0, qr0
|
|
/* 802D0238 002CD198 CB 61 00 90 */ lfd f27, 0x90(r1)
|
|
/* 802D023C 002CD19C BB 61 00 7C */ lmw r27, 0x7c(r1)
|
|
/* 802D0240 002CD1A0 80 01 00 E4 */ lwz r0, 0xe4(r1)
|
|
/* 802D0244 002CD1A4 7C 08 03 A6 */ mtlr r0
|
|
/* 802D0248 002CD1A8 38 21 00 E0 */ addi r1, r1, 0xe0
|
|
/* 802D024C 002CD1AC 4E 80 00 20 */ blr
|
|
|
|
.global TriSphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRC9CVector3fR9CVector3fR9CVector3f
|
|
TriSphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRC9CVector3fR9CVector3fR9CVector3f:
|
|
/* 802D0250 002CD1B0 94 21 FF 60 */ stwu r1, -0xa0(r1)
|
|
/* 802D0254 002CD1B4 7C 08 02 A6 */ mflr r0
|
|
/* 802D0258 002CD1B8 90 01 00 A4 */ stw r0, 0xa4(r1)
|
|
/* 802D025C 002CD1BC DB E1 00 90 */ stfd f31, 0x90(r1)
|
|
/* 802D0260 002CD1C0 F3 E1 00 98 */ psq_st f31, 152(r1), 0, qr0
|
|
/* 802D0264 002CD1C4 BF 41 00 78 */ stmw r26, 0x78(r1)
|
|
/* 802D0268 002CD1C8 7C FE 3B 78 */ mr r30, r7
|
|
/* 802D026C 002CD1CC 7D 1F 43 78 */ mr r31, r8
|
|
/* 802D0270 002CD1D0 7C 7A 1B 78 */ mr r26, r3
|
|
/* 802D0274 002CD1D4 7C 9B 23 78 */ mr r27, r4
|
|
/* 802D0278 002CD1D8 7C BC 2B 78 */ mr r28, r5
|
|
/* 802D027C 002CD1DC 7C DD 33 78 */ mr r29, r6
|
|
/* 802D0280 002CD1E0 38 E1 00 0C */ addi r7, r1, 0xc
|
|
/* 802D0284 002CD1E4 39 01 00 08 */ addi r8, r1, 8
|
|
/* 802D0288 002CD1E8 4B FF FA 6D */ bl TriPointSqrDist__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fPfPf
|
|
/* 802D028C 002CD1EC C0 1A 00 0C */ lfs f0, 0xc(r26)
|
|
/* 802D0290 002CD1F0 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D0294 002CD1F4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0298 002CD1F8 40 81 00 0C */ ble lbl_802D02A4
|
|
/* 802D029C 002CD1FC 38 60 00 00 */ li r3, 0
|
|
/* 802D02A0 002CD200 48 00 01 84 */ b lbl_802D0424
|
|
lbl_802D02A4:
|
|
/* 802D02A4 002CD204 C0 41 00 0C */ lfs f2, 0xc(r1)
|
|
/* 802D02A8 002CD208 7F A4 EB 78 */ mr r4, r29
|
|
/* 802D02AC 002CD20C C0 61 00 08 */ lfs f3, 8(r1)
|
|
/* 802D02B0 002CD210 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D02B4 002CD214 C0 22 C4 BC */ lfs f1, lbl_805AE1DC@sda21(r2)
|
|
/* 802D02B8 002CD218 7F 66 DB 78 */ mr r6, r27
|
|
/* 802D02BC 002CD21C EC 02 18 2A */ fadds f0, f2, f3
|
|
/* 802D02C0 002CD220 D0 41 00 58 */ stfs f2, 0x58(r1)
|
|
/* 802D02C4 002CD224 38 61 00 64 */ addi r3, r1, 0x64
|
|
/* 802D02C8 002CD228 38 E1 00 58 */ addi r7, r1, 0x58
|
|
/* 802D02CC 002CD22C D0 61 00 5C */ stfs f3, 0x5c(r1)
|
|
/* 802D02D0 002CD230 EF E1 00 28 */ fsubs f31, f1, f0
|
|
/* 802D02D4 002CD234 D3 E1 00 60 */ stfs f31, 0x60(r1)
|
|
/* 802D02D8 002CD238 48 04 4B C5 */ bl BaryToWorld__5CMathFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3f
|
|
/* 802D02DC 002CD23C C0 01 00 64 */ lfs f0, 0x64(r1)
|
|
/* 802D02E0 002CD240 C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D02E4 002CD244 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D02E8 002CD248 C0 01 00 68 */ lfs f0, 0x68(r1)
|
|
/* 802D02EC 002CD24C D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D02F0 002CD250 C0 01 00 6C */ lfs f0, 0x6c(r1)
|
|
/* 802D02F4 002CD254 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D02F8 002CD258 C0 41 00 0C */ lfs f2, 0xc(r1)
|
|
/* 802D02FC 002CD25C FC 01 10 00 */ fcmpu cr0, f1, f2
|
|
/* 802D0300 002CD260 41 82 00 34 */ beq lbl_802D0334
|
|
/* 802D0304 002CD264 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
/* 802D0308 002CD268 FC 00 10 00 */ fcmpu cr0, f0, f2
|
|
/* 802D030C 002CD26C 41 82 00 28 */ beq lbl_802D0334
|
|
/* 802D0310 002CD270 C0 41 00 08 */ lfs f2, 8(r1)
|
|
/* 802D0314 002CD274 FC 01 10 00 */ fcmpu cr0, f1, f2
|
|
/* 802D0318 002CD278 41 82 00 1C */ beq lbl_802D0334
|
|
/* 802D031C 002CD27C FC 00 10 00 */ fcmpu cr0, f0, f2
|
|
/* 802D0320 002CD280 41 82 00 14 */ beq lbl_802D0334
|
|
/* 802D0324 002CD284 FC 01 F8 00 */ fcmpu cr0, f1, f31
|
|
/* 802D0328 002CD288 41 82 00 0C */ beq lbl_802D0334
|
|
/* 802D032C 002CD28C FC 00 F8 00 */ fcmpu cr0, f0, f31
|
|
/* 802D0330 002CD290 40 82 00 54 */ bne lbl_802D0384
|
|
lbl_802D0334:
|
|
/* 802D0334 002CD294 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D0338 002CD298 7F C5 F3 78 */ mr r5, r30
|
|
/* 802D033C 002CD29C 38 61 00 40 */ addi r3, r1, 0x40
|
|
/* 802D0340 002CD2A0 48 06 6E 49 */ bl GetSurfaceNormal__7CSphereCFRC9CVector3f
|
|
/* 802D0344 002CD2A4 C0 01 00 40 */ lfs f0, 0x40(r1)
|
|
/* 802D0348 002CD2A8 C0 21 00 44 */ lfs f1, 0x44(r1)
|
|
/* 802D034C 002CD2AC FC 00 00 50 */ fneg f0, f0
|
|
/* 802D0350 002CD2B0 C0 41 00 48 */ lfs f2, 0x48(r1)
|
|
/* 802D0354 002CD2B4 FC 60 08 50 */ fneg f3, f1
|
|
/* 802D0358 002CD2B8 FC 80 10 50 */ fneg f4, f2
|
|
/* 802D035C 002CD2BC FC 40 00 18 */ frsp f2, f0
|
|
/* 802D0360 002CD2C0 D0 01 00 4C */ stfs f0, 0x4c(r1)
|
|
/* 802D0364 002CD2C4 FC 20 18 18 */ frsp f1, f3
|
|
/* 802D0368 002CD2C8 FC 00 20 18 */ frsp f0, f4
|
|
/* 802D036C 002CD2CC D0 61 00 50 */ stfs f3, 0x50(r1)
|
|
/* 802D0370 002CD2D0 D0 5F 00 00 */ stfs f2, 0(r31)
|
|
/* 802D0374 002CD2D4 D0 3F 00 04 */ stfs f1, 4(r31)
|
|
/* 802D0378 002CD2D8 D0 81 00 54 */ stfs f4, 0x54(r1)
|
|
/* 802D037C 002CD2DC D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D0380 002CD2E0 48 00 00 A0 */ b lbl_802D0420
|
|
lbl_802D0384:
|
|
/* 802D0384 002CD2E4 C0 3D 00 00 */ lfs f1, 0(r29)
|
|
/* 802D0388 002CD2E8 38 61 00 34 */ addi r3, r1, 0x34
|
|
/* 802D038C 002CD2EC C0 5B 00 00 */ lfs f2, 0(r27)
|
|
/* 802D0390 002CD2F0 38 81 00 28 */ addi r4, r1, 0x28
|
|
/* 802D0394 002CD2F4 C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D0398 002CD2F8 ED 01 10 28 */ fsubs f8, f1, f2
|
|
/* 802D039C 002CD2FC C0 3D 00 04 */ lfs f1, 4(r29)
|
|
/* 802D03A0 002CD300 C0 9B 00 04 */ lfs f4, 4(r27)
|
|
/* 802D03A4 002CD304 EC 60 10 28 */ fsubs f3, f0, f2
|
|
/* 802D03A8 002CD308 C0 1C 00 04 */ lfs f0, 4(r28)
|
|
/* 802D03AC 002CD30C EC E1 20 28 */ fsubs f7, f1, f4
|
|
/* 802D03B0 002CD310 EC A0 20 28 */ fsubs f5, f0, f4
|
|
/* 802D03B4 002CD314 C0 3D 00 08 */ lfs f1, 8(r29)
|
|
/* 802D03B8 002CD318 C0 5B 00 08 */ lfs f2, 8(r27)
|
|
/* 802D03BC 002CD31C C0 1C 00 08 */ lfs f0, 8(r28)
|
|
/* 802D03C0 002CD320 EC C1 10 28 */ fsubs f6, f1, f2
|
|
/* 802D03C4 002CD324 D1 01 00 10 */ stfs f8, 0x10(r1)
|
|
/* 802D03C8 002CD328 EC 80 10 28 */ fsubs f4, f0, f2
|
|
/* 802D03CC 002CD32C EC 08 01 72 */ fmuls f0, f8, f5
|
|
/* 802D03D0 002CD330 D0 E1 00 14 */ stfs f7, 0x14(r1)
|
|
/* 802D03D4 002CD334 EC 26 00 F2 */ fmuls f1, f6, f3
|
|
/* 802D03D8 002CD338 EC 47 01 32 */ fmuls f2, f7, f4
|
|
/* 802D03DC 002CD33C D0 C1 00 18 */ stfs f6, 0x18(r1)
|
|
/* 802D03E0 002CD340 EC 03 01 F8 */ fmsubs f0, f3, f7, f0
|
|
/* 802D03E4 002CD344 EC 24 0A 38 */ fmsubs f1, f4, f8, f1
|
|
/* 802D03E8 002CD348 D0 61 00 1C */ stfs f3, 0x1c(r1)
|
|
/* 802D03EC 002CD34C EC 45 11 B8 */ fmsubs f2, f5, f6, f2
|
|
/* 802D03F0 002CD350 D0 A1 00 20 */ stfs f5, 0x20(r1)
|
|
/* 802D03F4 002CD354 D0 81 00 24 */ stfs f4, 0x24(r1)
|
|
/* 802D03F8 002CD358 D0 41 00 28 */ stfs f2, 0x28(r1)
|
|
/* 802D03FC 002CD35C D0 21 00 2C */ stfs f1, 0x2c(r1)
|
|
/* 802D0400 002CD360 D0 01 00 30 */ stfs f0, 0x30(r1)
|
|
/* 802D0404 002CD364 48 04 44 4D */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D0408 002CD368 C0 01 00 34 */ lfs f0, 0x34(r1)
|
|
/* 802D040C 002CD36C D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D0410 002CD370 C0 01 00 38 */ lfs f0, 0x38(r1)
|
|
/* 802D0414 002CD374 D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D0418 002CD378 C0 01 00 3C */ lfs f0, 0x3c(r1)
|
|
/* 802D041C 002CD37C D0 1F 00 08 */ stfs f0, 8(r31)
|
|
lbl_802D0420:
|
|
/* 802D0420 002CD380 38 60 00 01 */ li r3, 1
|
|
lbl_802D0424:
|
|
/* 802D0424 002CD384 E3 E1 00 98 */ psq_l f31, 152(r1), 0, qr0
|
|
/* 802D0428 002CD388 CB E1 00 90 */ lfd f31, 0x90(r1)
|
|
/* 802D042C 002CD38C BB 41 00 78 */ lmw r26, 0x78(r1)
|
|
/* 802D0430 002CD390 80 01 00 A4 */ lwz r0, 0xa4(r1)
|
|
/* 802D0434 002CD394 7C 08 03 A6 */ mtlr r0
|
|
/* 802D0438 002CD398 38 21 00 A0 */ addi r1, r1, 0xa0
|
|
/* 802D043C 002CD39C 4E 80 00 20 */ blr
|
|
|
|
.global TriSphereOverlap__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRC9CVector3f
|
|
TriSphereOverlap__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRC9CVector3f:
|
|
/* 802D0440 002CD3A0 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
/* 802D0444 002CD3A4 7C 08 02 A6 */ mflr r0
|
|
/* 802D0448 002CD3A8 38 E0 00 00 */ li r7, 0
|
|
/* 802D044C 002CD3AC 39 00 00 00 */ li r8, 0
|
|
/* 802D0450 002CD3B0 90 01 00 14 */ stw r0, 0x14(r1)
|
|
/* 802D0454 002CD3B4 93 E1 00 0C */ stw r31, 0xc(r1)
|
|
/* 802D0458 002CD3B8 7C 7F 1B 78 */ mr r31, r3
|
|
/* 802D045C 002CD3BC 4B FF F8 99 */ bl TriPointSqrDist__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fPfPf
|
|
/* 802D0460 002CD3C0 C0 1F 00 0C */ lfs f0, 0xc(r31)
|
|
/* 802D0464 002CD3C4 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D0468 002CD3C8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D046C 002CD3CC 7C 00 00 26 */ mfcr r0
|
|
/* 802D0470 002CD3D0 83 E1 00 0C */ lwz r31, 0xc(r1)
|
|
/* 802D0474 002CD3D4 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D0478 002CD3D8 7C 00 00 34 */ cntlzw r0, r0
|
|
/* 802D047C 002CD3DC 54 03 D9 7E */ srwi r3, r0, 5
|
|
/* 802D0480 002CD3E0 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
/* 802D0484 002CD3E4 7C 08 03 A6 */ mtlr r0
|
|
/* 802D0488 002CD3E8 38 21 00 10 */ addi r1, r1, 0x10
|
|
/* 802D048C 002CD3EC 4E 80 00 20 */ blr
|
|
|
|
.global MovingSphereAABox__13CollisionUtilFRC7CSphereRC6CAABoxRC9CVector3fRdR9CVector3fR9CVector3f
|
|
MovingSphereAABox__13CollisionUtilFRC7CSphereRC6CAABoxRC9CVector3fRdR9CVector3fR9CVector3f:
|
|
/* 802D0490 002CD3F0 94 21 FE 40 */ stwu r1, -0x1c0(r1)
|
|
/* 802D0494 002CD3F4 7C 08 02 A6 */ mflr r0
|
|
/* 802D0498 002CD3F8 90 01 01 C4 */ stw r0, 0x1c4(r1)
|
|
/* 802D049C 002CD3FC BE C1 01 98 */ stmw r22, 0x198(r1)
|
|
/* 802D04A0 002CD400 7C 9B 23 78 */ mr r27, r4
|
|
/* 802D04A4 002CD404 7C BC 2B 78 */ mr r28, r5
|
|
/* 802D04A8 002CD408 7C 7A 1B 78 */ mr r26, r3
|
|
/* 802D04AC 002CD40C 3B 1B 00 0C */ addi r24, r27, 0xc
|
|
/* 802D04B0 002CD410 7C DD 33 78 */ mr r29, r6
|
|
/* 802D04B4 002CD414 7C FE 3B 78 */ mr r30, r7
|
|
/* 802D04B8 002CD418 7D 1F 43 78 */ mr r31, r8
|
|
/* 802D04BC 002CD41C 38 A1 01 5C */ addi r5, r1, 0x15c
|
|
/* 802D04C0 002CD420 C0 C3 00 0C */ lfs f6, 0xc(r3)
|
|
/* 802D04C4 002CD424 38 61 01 74 */ addi r3, r1, 0x174
|
|
/* 802D04C8 002CD428 C0 44 00 10 */ lfs f2, 0x10(r4)
|
|
/* 802D04CC 002CD42C C0 24 00 14 */ lfs f1, 0x14(r4)
|
|
/* 802D04D0 002CD430 EC A2 30 2A */ fadds f5, f2, f6
|
|
/* 802D04D4 002CD434 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D04D8 002CD438 EC 81 30 2A */ fadds f4, f1, f6
|
|
/* 802D04DC 002CD43C C0 44 00 04 */ lfs f2, 4(r4)
|
|
/* 802D04E0 002CD440 EC 60 30 2A */ fadds f3, f0, f6
|
|
/* 802D04E4 002CD444 C0 24 00 08 */ lfs f1, 8(r4)
|
|
/* 802D04E8 002CD448 C0 04 00 00 */ lfs f0, 0(r4)
|
|
/* 802D04EC 002CD44C EC 42 30 28 */ fsubs f2, f2, f6
|
|
/* 802D04F0 002CD450 EC 21 30 28 */ fsubs f1, f1, f6
|
|
/* 802D04F4 002CD454 D0 A1 01 60 */ stfs f5, 0x160(r1)
|
|
/* 802D04F8 002CD458 EC 00 30 28 */ fsubs f0, f0, f6
|
|
/* 802D04FC 002CD45C 38 81 01 68 */ addi r4, r1, 0x168
|
|
/* 802D0500 002CD460 D0 61 01 5C */ stfs f3, 0x15c(r1)
|
|
/* 802D0504 002CD464 D0 81 01 64 */ stfs f4, 0x164(r1)
|
|
/* 802D0508 002CD468 D0 01 01 68 */ stfs f0, 0x168(r1)
|
|
/* 802D050C 002CD46C D0 41 01 6C */ stfs f2, 0x16c(r1)
|
|
/* 802D0510 002CD470 D0 21 01 70 */ stfs f1, 0x170(r1)
|
|
/* 802D0514 002CD474 48 06 7F F5 */ bl __ct__6CAABoxFRC9CVector3fRC9CVector3f
|
|
/* 802D0518 002CD478 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D051C 002CD47C 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D0520 002CD480 38 61 01 74 */ addi r3, r1, 0x174
|
|
/* 802D0524 002CD484 38 C1 00 24 */ addi r6, r1, 0x24
|
|
/* 802D0528 002CD488 38 E1 00 20 */ addi r7, r1, 0x20
|
|
/* 802D052C 002CD48C 39 01 00 1C */ addi r8, r1, 0x1c
|
|
/* 802D0530 002CD490 39 21 00 08 */ addi r9, r1, 8
|
|
/* 802D0534 002CD494 48 00 16 75 */ bl BoxLineTest__13CollisionUtilFRC6CAABoxRC9CVector3fRC9CVector3fRfRfRiRb
|
|
/* 802D0538 002CD498 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D053C 002CD49C 40 82 00 0C */ bne lbl_802D0548
|
|
/* 802D0540 002CD4A0 38 60 00 00 */ li r3, 0
|
|
/* 802D0544 002CD4A4 48 00 0D D4 */ b lbl_802D1318
|
|
lbl_802D0548:
|
|
/* 802D0548 002CD4A8 C0 C1 00 24 */ lfs f6, 0x24(r1)
|
|
/* 802D054C 002CD4AC 3C 60 55 55 */ lis r3, 0x55555556@ha
|
|
/* 802D0550 002CD4B0 C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D0554 002CD4B4 38 83 55 56 */ addi r4, r3, 0x55555556@l
|
|
/* 802D0558 002CD4B8 C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D055C 002CD4BC EC 06 00 32 */ fmuls f0, f6, f0
|
|
/* 802D0560 002CD4C0 C0 3A 00 00 */ lfs f1, 0(r26)
|
|
/* 802D0564 002CD4C4 C0 5C 00 08 */ lfs f2, 8(r28)
|
|
/* 802D0568 002CD4C8 EC 86 00 F2 */ fmuls f4, f6, f3
|
|
/* 802D056C 002CD4CC C0 BA 00 04 */ lfs f5, 4(r26)
|
|
/* 802D0570 002CD4D0 EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D0574 002CD4D4 C0 7A 00 08 */ lfs f3, 8(r26)
|
|
/* 802D0578 002CD4D8 EC 26 00 B2 */ fmuls f1, f6, f2
|
|
/* 802D057C 002CD4DC EC 45 20 2A */ fadds f2, f5, f4
|
|
/* 802D0580 002CD4E0 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0584 002CD4E4 EC 03 08 2A */ fadds f0, f3, f1
|
|
/* 802D0588 002CD4E8 D0 5E 00 04 */ stfs f2, 4(r30)
|
|
/* 802D058C 002CD4EC D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0590 002CD4F0 80 61 00 1C */ lwz r3, 0x1c(r1)
|
|
/* 802D0594 002CD4F4 38 E3 00 01 */ addi r7, r3, 1
|
|
/* 802D0598 002CD4F8 38 C3 00 02 */ addi r6, r3, 2
|
|
/* 802D059C 002CD4FC 7C A4 38 96 */ mulhw r5, r4, r7
|
|
/* 802D05A0 002CD500 54 A0 0F FE */ srwi r0, r5, 0x1f
|
|
/* 802D05A4 002CD504 7C 05 02 14 */ add r0, r5, r0
|
|
/* 802D05A8 002CD508 1C 00 00 03 */ mulli r0, r0, 3
|
|
/* 802D05AC 002CD50C 7C A4 30 96 */ mulhw r5, r4, r6
|
|
/* 802D05B0 002CD510 7C 00 38 50 */ subf r0, r0, r7
|
|
/* 802D05B4 002CD514 54 07 10 3A */ slwi r7, r0, 2
|
|
/* 802D05B8 002CD518 7C 3E 3C 2E */ lfsx f1, r30, r7
|
|
/* 802D05BC 002CD51C 54 A4 0F FE */ srwi r4, r5, 0x1f
|
|
/* 802D05C0 002CD520 7C 1B 3C 2E */ lfsx f0, r27, r7
|
|
/* 802D05C4 002CD524 7C 85 22 14 */ add r4, r5, r4
|
|
/* 802D05C8 002CD528 1C 84 00 03 */ mulli r4, r4, 3
|
|
/* 802D05CC 002CD52C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D05D0 002CD530 7C A4 30 50 */ subf r5, r4, r6
|
|
/* 802D05D4 002CD534 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D05D8 002CD538 7C 80 00 26 */ mfcr r4
|
|
/* 802D05DC 002CD53C 7C 18 3C 2E */ lfsx f0, r24, r7
|
|
/* 802D05E0 002CD540 54 86 1F FE */ rlwinm r6, r4, 3, 0x1f, 0x1f
|
|
/* 802D05E4 002CD544 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D05E8 002CD548 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D05EC 002CD54C 7C 80 00 26 */ mfcr r4
|
|
/* 802D05F0 002CD550 54 A7 10 3A */ slwi r7, r5, 2
|
|
/* 802D05F4 002CD554 7C 3E 3C 2E */ lfsx f1, r30, r7
|
|
/* 802D05F8 002CD558 54 88 1F FE */ rlwinm r8, r4, 3, 0x1f, 0x1f
|
|
/* 802D05FC 002CD55C 7C 1B 3C 2E */ lfsx f0, r27, r7
|
|
/* 802D0600 002CD560 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0604 002CD564 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D0608 002CD568 7C 80 00 26 */ mfcr r4
|
|
/* 802D060C 002CD56C 7C 18 3C 2E */ lfsx f0, r24, r7
|
|
/* 802D0610 002CD570 54 87 1F FE */ rlwinm r7, r4, 3, 0x1f, 0x1f
|
|
/* 802D0614 002CD574 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0618 002CD578 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D061C 002CD57C 7C 80 00 26 */ mfcr r4
|
|
/* 802D0620 002CD580 28 06 00 00 */ cmplwi r6, 0
|
|
/* 802D0624 002CD584 54 84 1F FE */ rlwinm r4, r4, 3, 0x1f, 0x1f
|
|
/* 802D0628 002CD588 39 20 00 00 */ li r9, 0
|
|
/* 802D062C 002CD58C 41 82 00 10 */ beq lbl_802D063C
|
|
/* 802D0630 002CD590 28 08 00 00 */ cmplwi r8, 0
|
|
/* 802D0634 002CD594 41 82 00 08 */ beq lbl_802D063C
|
|
/* 802D0638 002CD598 39 20 00 01 */ li r9, 1
|
|
lbl_802D063C:
|
|
/* 802D063C 002CD59C 28 07 00 00 */ cmplwi r7, 0
|
|
/* 802D0640 002CD5A0 39 00 00 00 */ li r8, 0
|
|
/* 802D0644 002CD5A4 41 82 00 10 */ beq lbl_802D0654
|
|
/* 802D0648 002CD5A8 28 04 00 00 */ cmplwi r4, 0
|
|
/* 802D064C 002CD5AC 41 82 00 08 */ beq lbl_802D0654
|
|
/* 802D0650 002CD5B0 39 00 00 01 */ li r8, 1
|
|
lbl_802D0654:
|
|
/* 802D0654 002CD5B4 55 24 06 3F */ clrlwi. r4, r9, 0x18
|
|
/* 802D0658 002CD5B8 41 82 00 A0 */ beq lbl_802D06F8
|
|
/* 802D065C 002CD5BC 55 04 06 3F */ clrlwi. r4, r8, 0x18
|
|
/* 802D0660 002CD5C0 41 82 00 98 */ beq lbl_802D06F8
|
|
/* 802D0664 002CD5C4 C0 21 00 24 */ lfs f1, 0x24(r1)
|
|
/* 802D0668 002CD5C8 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D066C 002CD5CC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0670 002CD5D0 41 80 00 10 */ blt lbl_802D0680
|
|
/* 802D0674 002CD5D4 C8 1D 00 00 */ lfd f0, 0(r29)
|
|
/* 802D0678 002CD5D8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D067C 002CD5DC 40 81 00 0C */ ble lbl_802D0688
|
|
lbl_802D0680:
|
|
/* 802D0680 002CD5E0 38 60 00 00 */ li r3, 0
|
|
/* 802D0684 002CD5E4 48 00 0C 94 */ b lbl_802D1318
|
|
lbl_802D0688:
|
|
/* 802D0688 002CD5E8 88 01 00 08 */ lbz r0, 8(r1)
|
|
/* 802D068C 002CD5EC 28 00 00 00 */ cmplwi r0, 0
|
|
/* 802D0690 002CD5F0 41 82 00 0C */ beq lbl_802D069C
|
|
/* 802D0694 002CD5F4 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
/* 802D0698 002CD5F8 48 00 00 08 */ b lbl_802D06A0
|
|
lbl_802D069C:
|
|
/* 802D069C 002CD5FC C0 02 C4 C0 */ lfs f0, lbl_805AE1E0@sda21(r2)
|
|
lbl_802D06A0:
|
|
/* 802D06A0 002CD600 54 60 10 3A */ slwi r0, r3, 2
|
|
/* 802D06A4 002CD604 38 60 00 01 */ li r3, 1
|
|
/* 802D06A8 002CD608 7C 1F 05 2E */ stfsx f0, r31, r0
|
|
/* 802D06AC 002CD60C C0 01 00 24 */ lfs f0, 0x24(r1)
|
|
/* 802D06B0 002CD610 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D06B4 002CD614 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D06B8 002CD618 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D06BC 002CD61C C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D06C0 002CD620 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D06C4 002CD624 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D06C8 002CD628 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D06CC 002CD62C EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D06D0 002CD630 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D06D4 002CD634 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D06D8 002CD638 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D06DC 002CD63C C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D06E0 002CD640 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D06E4 002CD644 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D06E8 002CD648 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D06EC 002CD64C EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D06F0 002CD650 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D06F4 002CD654 48 00 0C 24 */ b lbl_802D1318
|
|
lbl_802D06F8:
|
|
/* 802D06F8 002CD658 55 24 06 3F */ clrlwi. r4, r9, 0x18
|
|
/* 802D06FC 002CD65C 40 82 08 48 */ bne lbl_802D0F44
|
|
/* 802D0700 002CD660 55 04 06 3F */ clrlwi. r4, r8, 0x18
|
|
/* 802D0704 002CD664 40 82 08 40 */ bne lbl_802D0F44
|
|
/* 802D0708 002CD668 39 20 00 01 */ li r9, 1
|
|
/* 802D070C 002CD66C 89 01 00 08 */ lbz r8, 8(r1)
|
|
/* 802D0710 002CD670 7D 23 18 30 */ slw r3, r9, r3
|
|
/* 802D0714 002CD674 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D0718 002CD678 7D 20 00 30 */ slw r0, r9, r0
|
|
/* 802D071C 002CD67C 7D 29 28 30 */ slw r9, r9, r5
|
|
/* 802D0720 002CD680 7C A3 41 D6 */ mullw r5, r3, r8
|
|
/* 802D0724 002CD684 38 61 01 50 */ addi r3, r1, 0x150
|
|
/* 802D0728 002CD688 7C 00 31 D6 */ mullw r0, r0, r6
|
|
/* 802D072C 002CD68C 7C C9 39 D6 */ mullw r6, r9, r7
|
|
/* 802D0730 002CD690 7C A0 03 78 */ or r0, r5, r0
|
|
/* 802D0734 002CD694 7C D7 03 78 */ or r23, r6, r0
|
|
/* 802D0738 002CD698 7E E5 BB 78 */ mr r5, r23
|
|
/* 802D073C 002CD69C 48 06 6E 75 */ bl GetPoint__6CAABoxCFi
|
|
/* 802D0740 002CD6A0 C8 3D 00 00 */ lfd f1, 0(r29)
|
|
/* 802D0744 002CD6A4 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D0748 002CD6A8 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D074C 002CD6AC 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D0750 002CD6B0 C0 61 01 50 */ lfs f3, 0x150(r1)
|
|
/* 802D0754 002CD6B4 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D0758 002CD6B8 C0 41 01 54 */ lfs f2, 0x154(r1)
|
|
/* 802D075C 002CD6BC 7F C7 F3 78 */ mr r7, r30
|
|
/* 802D0760 002CD6C0 C0 01 01 58 */ lfs f0, 0x158(r1)
|
|
/* 802D0764 002CD6C4 38 61 01 40 */ addi r3, r1, 0x140
|
|
/* 802D0768 002CD6C8 D0 61 01 40 */ stfs f3, 0x140(r1)
|
|
/* 802D076C 002CD6CC 38 C1 00 18 */ addi r6, r1, 0x18
|
|
/* 802D0770 002CD6D0 D0 41 01 44 */ stfs f2, 0x144(r1)
|
|
/* 802D0774 002CD6D4 D0 01 01 48 */ stfs f0, 0x148(r1)
|
|
/* 802D0778 002CD6D8 D0 81 01 4C */ stfs f4, 0x14c(r1)
|
|
/* 802D077C 002CD6DC 48 00 33 8D */ bl RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
/* 802D0780 002CD6E0 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D0784 002CD6E4 41 82 05 48 */ beq lbl_802D0CCC
|
|
/* 802D0788 002CD6E8 38 00 00 00 */ li r0, 0
|
|
/* 802D078C 002CD6EC 38 60 00 01 */ li r3, 1
|
|
/* 802D0790 002CD6F0 7C 60 00 30 */ slw r0, r3, r0
|
|
/* 802D0794 002CD6F4 3B 20 FF FF */ li r25, -1
|
|
/* 802D0798 002CD6F8 7E E0 00 39 */ and. r0, r23, r0
|
|
/* 802D079C 002CD6FC 41 82 00 1C */ beq lbl_802D07B8
|
|
/* 802D07A0 002CD700 C0 21 01 50 */ lfs f1, 0x150(r1)
|
|
/* 802D07A4 002CD704 C0 1E 00 00 */ lfs f0, 0(r30)
|
|
/* 802D07A8 002CD708 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D07AC 002CD70C 7C 00 00 26 */ mfcr r0
|
|
/* 802D07B0 002CD710 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D07B4 002CD714 48 00 00 18 */ b lbl_802D07CC
|
|
lbl_802D07B8:
|
|
/* 802D07B8 002CD718 C0 21 01 50 */ lfs f1, 0x150(r1)
|
|
/* 802D07BC 002CD71C C0 1E 00 00 */ lfs f0, 0(r30)
|
|
/* 802D07C0 002CD720 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D07C4 002CD724 7C 00 00 26 */ mfcr r0
|
|
/* 802D07C8 002CD728 54 00 0F FE */ srwi r0, r0, 0x1f
|
|
lbl_802D07CC:
|
|
/* 802D07CC 002CD72C 54 00 06 3F */ clrlwi. r0, r0, 0x18
|
|
/* 802D07D0 002CD730 41 82 00 0C */ beq lbl_802D07DC
|
|
/* 802D07D4 002CD734 3B 20 00 00 */ li r25, 0
|
|
/* 802D07D8 002CD738 48 00 00 98 */ b lbl_802D0870
|
|
lbl_802D07DC:
|
|
/* 802D07DC 002CD73C 38 00 00 01 */ li r0, 1
|
|
/* 802D07E0 002CD740 7C 60 00 30 */ slw r0, r3, r0
|
|
/* 802D07E4 002CD744 7E E0 00 39 */ and. r0, r23, r0
|
|
/* 802D07E8 002CD748 41 82 00 1C */ beq lbl_802D0804
|
|
/* 802D07EC 002CD74C C0 21 01 54 */ lfs f1, 0x154(r1)
|
|
/* 802D07F0 002CD750 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D07F4 002CD754 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D07F8 002CD758 7C 00 00 26 */ mfcr r0
|
|
/* 802D07FC 002CD75C 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D0800 002CD760 48 00 00 18 */ b lbl_802D0818
|
|
lbl_802D0804:
|
|
/* 802D0804 002CD764 C0 21 01 54 */ lfs f1, 0x154(r1)
|
|
/* 802D0808 002CD768 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D080C 002CD76C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0810 002CD770 7C 00 00 26 */ mfcr r0
|
|
/* 802D0814 002CD774 54 00 0F FE */ srwi r0, r0, 0x1f
|
|
lbl_802D0818:
|
|
/* 802D0818 002CD778 54 00 06 3F */ clrlwi. r0, r0, 0x18
|
|
/* 802D081C 002CD77C 41 82 00 0C */ beq lbl_802D0828
|
|
/* 802D0820 002CD780 3B 20 00 01 */ li r25, 1
|
|
/* 802D0824 002CD784 48 00 00 4C */ b lbl_802D0870
|
|
lbl_802D0828:
|
|
/* 802D0828 002CD788 38 00 00 02 */ li r0, 2
|
|
/* 802D082C 002CD78C 7C 60 00 30 */ slw r0, r3, r0
|
|
/* 802D0830 002CD790 7E E0 00 39 */ and. r0, r23, r0
|
|
/* 802D0834 002CD794 41 82 00 1C */ beq lbl_802D0850
|
|
/* 802D0838 002CD798 C0 21 01 58 */ lfs f1, 0x158(r1)
|
|
/* 802D083C 002CD79C C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0840 002CD7A0 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0844 002CD7A4 7C 00 00 26 */ mfcr r0
|
|
/* 802D0848 002CD7A8 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D084C 002CD7AC 48 00 00 18 */ b lbl_802D0864
|
|
lbl_802D0850:
|
|
/* 802D0850 002CD7B0 C0 21 01 58 */ lfs f1, 0x158(r1)
|
|
/* 802D0854 002CD7B4 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0858 002CD7B8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D085C 002CD7BC 7C 00 00 26 */ mfcr r0
|
|
/* 802D0860 002CD7C0 54 00 0F FE */ srwi r0, r0, 0x1f
|
|
lbl_802D0864:
|
|
/* 802D0864 002CD7C4 54 00 06 3F */ clrlwi. r0, r0, 0x18
|
|
/* 802D0868 002CD7C8 41 82 00 08 */ beq lbl_802D0870
|
|
/* 802D086C 002CD7CC 3B 20 00 02 */ li r25, 2
|
|
lbl_802D0870:
|
|
/* 802D0870 002CD7D0 2C 19 FF FF */ cmpwi r25, -1
|
|
/* 802D0874 002CD7D4 40 82 00 A8 */ bne lbl_802D091C
|
|
/* 802D0878 002CD7D8 C0 01 00 18 */ lfs f0, 0x18(r1)
|
|
/* 802D087C 002CD7DC 38 61 01 34 */ addi r3, r1, 0x134
|
|
/* 802D0880 002CD7E0 38 81 01 28 */ addi r4, r1, 0x128
|
|
/* 802D0884 002CD7E4 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D0888 002CD7E8 C0 3E 00 04 */ lfs f1, 4(r30)
|
|
/* 802D088C 002CD7EC C0 01 01 54 */ lfs f0, 0x154(r1)
|
|
/* 802D0890 002CD7F0 C0 7E 00 08 */ lfs f3, 8(r30)
|
|
/* 802D0894 002CD7F4 C0 41 01 58 */ lfs f2, 0x158(r1)
|
|
/* 802D0898 002CD7F8 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D089C 002CD7FC C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D08A0 002CD800 C0 01 01 50 */ lfs f0, 0x150(r1)
|
|
/* 802D08A4 002CD804 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D08A8 002CD808 D0 81 01 2C */ stfs f4, 0x12c(r1)
|
|
/* 802D08AC 002CD80C EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D08B0 002CD810 D0 41 01 30 */ stfs f2, 0x130(r1)
|
|
/* 802D08B4 002CD814 D0 01 01 28 */ stfs f0, 0x128(r1)
|
|
/* 802D08B8 002CD818 48 04 3F 99 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D08BC 002CD81C C0 01 01 34 */ lfs f0, 0x134(r1)
|
|
/* 802D08C0 002CD820 38 60 00 01 */ li r3, 1
|
|
/* 802D08C4 002CD824 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D08C8 002CD828 C0 01 01 38 */ lfs f0, 0x138(r1)
|
|
/* 802D08CC 002CD82C D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D08D0 002CD830 C0 01 01 3C */ lfs f0, 0x13c(r1)
|
|
/* 802D08D4 002CD834 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D08D8 002CD838 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D08DC 002CD83C C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D08E0 002CD840 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D08E4 002CD844 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D08E8 002CD848 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D08EC 002CD84C C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D08F0 002CD850 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D08F4 002CD854 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D08F8 002CD858 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D08FC 002CD85C D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0900 002CD860 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D0904 002CD864 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D0908 002CD868 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D090C 002CD86C C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0910 002CD870 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D0914 002CD874 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0918 002CD878 48 00 0A 00 */ b lbl_802D1318
|
|
lbl_802D091C:
|
|
/* 802D091C 002CD87C 3C 60 55 55 */ lis r3, 0x55555556@ha
|
|
/* 802D0920 002CD880 C0 7A 00 0C */ lfs f3, 0xc(r26)
|
|
/* 802D0924 002CD884 39 59 00 01 */ addi r10, r25, 1
|
|
/* 802D0928 002CD888 38 F9 00 02 */ addi r7, r25, 2
|
|
/* 802D092C 002CD88C 38 03 55 56 */ addi r0, r3, 0x55555556@l
|
|
/* 802D0930 002CD890 C0 41 01 50 */ lfs f2, 0x150(r1)
|
|
/* 802D0934 002CD894 7D 00 50 96 */ mulhw r8, r0, r10
|
|
/* 802D0938 002CD898 C0 21 01 54 */ lfs f1, 0x154(r1)
|
|
/* 802D093C 002CD89C C0 01 01 58 */ lfs f0, 0x158(r1)
|
|
/* 802D0940 002CD8A0 7F 43 D3 78 */ mr r3, r26
|
|
/* 802D0944 002CD8A4 D0 41 01 18 */ stfs f2, 0x118(r1)
|
|
/* 802D0948 002CD8A8 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D094C 002CD8AC 7C C0 38 96 */ mulhw r6, r0, r7
|
|
/* 802D0950 002CD8B0 55 00 0F FE */ srwi r0, r8, 0x1f
|
|
/* 802D0954 002CD8B4 D0 21 01 1C */ stfs f1, 0x11c(r1)
|
|
/* 802D0958 002CD8B8 38 A1 01 18 */ addi r5, r1, 0x118
|
|
/* 802D095C 002CD8BC 7D 28 02 14 */ add r9, r8, r0
|
|
/* 802D0960 002CD8C0 D0 01 01 20 */ stfs f0, 0x120(r1)
|
|
/* 802D0964 002CD8C4 54 C0 0F FE */ srwi r0, r6, 0x1f
|
|
/* 802D0968 002CD8C8 D0 61 01 24 */ stfs f3, 0x124(r1)
|
|
/* 802D096C 002CD8CC 7C 06 02 14 */ add r0, r6, r0
|
|
/* 802D0970 002CD8D0 39 01 00 14 */ addi r8, r1, 0x14
|
|
/* 802D0974 002CD8D4 1C C9 00 03 */ mulli r6, r9, 3
|
|
/* 802D0978 002CD8D8 1C 00 00 03 */ mulli r0, r0, 3
|
|
/* 802D097C 002CD8DC 7C C6 50 50 */ subf r6, r6, r10
|
|
/* 802D0980 002CD8E0 7C E0 38 50 */ subf r7, r0, r7
|
|
/* 802D0984 002CD8E4 48 00 09 A9 */ bl LineCircleIntersection2d__13CollisionUtilFRC9CVector3fRC9CVector3fRC7CSphereiiRf
|
|
/* 802D0988 002CD8E8 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D098C 002CD8EC 41 82 05 B0 */ beq lbl_802D0F3C
|
|
/* 802D0990 002CD8F0 C0 E1 00 14 */ lfs f7, 0x14(r1)
|
|
/* 802D0994 002CD8F4 C0 C2 C4 B8 */ lfs f6, lbl_805AE1D8@sda21(r2)
|
|
/* 802D0998 002CD8F8 FC 07 30 40 */ fcmpo cr0, f7, f6
|
|
/* 802D099C 002CD8FC 40 81 05 A0 */ ble lbl_802D0F3C
|
|
/* 802D09A0 002CD900 C8 1D 00 00 */ lfd f0, 0(r29)
|
|
/* 802D09A4 002CD904 FC 07 00 40 */ fcmpo cr0, f7, f0
|
|
/* 802D09A8 002CD908 40 80 05 94 */ bge lbl_802D0F3C
|
|
/* 802D09AC 002CD90C C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D09B0 002CD910 57 20 10 3A */ slwi r0, r25, 2
|
|
/* 802D09B4 002CD914 C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D09B8 002CD918 EC 07 00 32 */ fmuls f0, f7, f0
|
|
/* 802D09BC 002CD91C C0 3A 00 00 */ lfs f1, 0(r26)
|
|
/* 802D09C0 002CD920 C0 5C 00 08 */ lfs f2, 8(r28)
|
|
/* 802D09C4 002CD924 EC 87 00 F2 */ fmuls f4, f7, f3
|
|
/* 802D09C8 002CD928 C0 BA 00 04 */ lfs f5, 4(r26)
|
|
/* 802D09CC 002CD92C EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D09D0 002CD930 C0 7A 00 08 */ lfs f3, 8(r26)
|
|
/* 802D09D4 002CD934 EC 27 00 B2 */ fmuls f1, f7, f2
|
|
/* 802D09D8 002CD938 EC 45 20 2A */ fadds f2, f5, f4
|
|
/* 802D09DC 002CD93C D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D09E0 002CD940 EC 03 08 2A */ fadds f0, f3, f1
|
|
/* 802D09E4 002CD944 D0 5E 00 04 */ stfs f2, 4(r30)
|
|
/* 802D09E8 002CD948 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D09EC 002CD94C 7C 3E 04 2E */ lfsx f1, r30, r0
|
|
/* 802D09F0 002CD950 7C 18 04 2E */ lfsx f0, r24, r0
|
|
/* 802D09F4 002CD954 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D09F8 002CD958 40 81 01 20 */ ble lbl_802D0B18
|
|
/* 802D09FC 002CD95C 38 00 00 01 */ li r0, 1
|
|
/* 802D0A00 002CD960 7C 05 C8 30 */ slw r5, r0, r25
|
|
/* 802D0A04 002CD964 7E E0 28 39 */ and. r0, r23, r5
|
|
/* 802D0A08 002CD968 41 82 00 0C */ beq lbl_802D0A14
|
|
/* 802D0A0C 002CD96C 38 60 00 00 */ li r3, 0
|
|
/* 802D0A10 002CD970 48 00 09 08 */ b lbl_802D1318
|
|
lbl_802D0A14:
|
|
/* 802D0A14 002CD974 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D0A18 002CD978 38 61 01 0C */ addi r3, r1, 0x10c
|
|
/* 802D0A1C 002CD97C 7E E5 2B 78 */ or r5, r23, r5
|
|
/* 802D0A20 002CD980 48 06 6B 91 */ bl GetPoint__6CAABoxCFi
|
|
/* 802D0A24 002CD984 C8 3D 00 00 */ lfd f1, 0(r29)
|
|
/* 802D0A28 002CD988 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D0A2C 002CD98C C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0A30 002CD990 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D0A34 002CD994 C0 61 01 0C */ lfs f3, 0x10c(r1)
|
|
/* 802D0A38 002CD998 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D0A3C 002CD99C C0 41 01 10 */ lfs f2, 0x110(r1)
|
|
/* 802D0A40 002CD9A0 7F C7 F3 78 */ mr r7, r30
|
|
/* 802D0A44 002CD9A4 C0 01 01 14 */ lfs f0, 0x114(r1)
|
|
/* 802D0A48 002CD9A8 38 61 00 FC */ addi r3, r1, 0xfc
|
|
/* 802D0A4C 002CD9AC D0 61 00 FC */ stfs f3, 0xfc(r1)
|
|
/* 802D0A50 002CD9B0 38 C1 00 14 */ addi r6, r1, 0x14
|
|
/* 802D0A54 002CD9B4 D0 41 01 00 */ stfs f2, 0x100(r1)
|
|
/* 802D0A58 002CD9B8 D0 01 01 04 */ stfs f0, 0x104(r1)
|
|
/* 802D0A5C 002CD9BC D0 81 01 08 */ stfs f4, 0x108(r1)
|
|
/* 802D0A60 002CD9C0 48 00 30 A9 */ bl RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
/* 802D0A64 002CD9C4 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D0A68 002CD9C8 41 82 00 A8 */ beq lbl_802D0B10
|
|
/* 802D0A6C 002CD9CC C0 01 00 14 */ lfs f0, 0x14(r1)
|
|
/* 802D0A70 002CD9D0 38 61 00 F0 */ addi r3, r1, 0xf0
|
|
/* 802D0A74 002CD9D4 38 81 00 E4 */ addi r4, r1, 0xe4
|
|
/* 802D0A78 002CD9D8 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D0A7C 002CD9DC C0 3E 00 04 */ lfs f1, 4(r30)
|
|
/* 802D0A80 002CD9E0 C0 01 01 10 */ lfs f0, 0x110(r1)
|
|
/* 802D0A84 002CD9E4 C0 7E 00 08 */ lfs f3, 8(r30)
|
|
/* 802D0A88 002CD9E8 C0 41 01 14 */ lfs f2, 0x114(r1)
|
|
/* 802D0A8C 002CD9EC EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D0A90 002CD9F0 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0A94 002CD9F4 C0 01 01 0C */ lfs f0, 0x10c(r1)
|
|
/* 802D0A98 002CD9F8 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D0A9C 002CD9FC D0 81 00 E8 */ stfs f4, 0xe8(r1)
|
|
/* 802D0AA0 002CDA00 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0AA4 002CDA04 D0 41 00 EC */ stfs f2, 0xec(r1)
|
|
/* 802D0AA8 002CDA08 D0 01 00 E4 */ stfs f0, 0xe4(r1)
|
|
/* 802D0AAC 002CDA0C 48 04 3D A5 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D0AB0 002CDA10 C0 01 00 F0 */ lfs f0, 0xf0(r1)
|
|
/* 802D0AB4 002CDA14 38 60 00 01 */ li r3, 1
|
|
/* 802D0AB8 002CDA18 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D0ABC 002CDA1C C0 01 00 F4 */ lfs f0, 0xf4(r1)
|
|
/* 802D0AC0 002CDA20 D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D0AC4 002CDA24 C0 01 00 F8 */ lfs f0, 0xf8(r1)
|
|
/* 802D0AC8 002CDA28 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D0ACC 002CDA2C C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0AD0 002CDA30 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D0AD4 002CDA34 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D0AD8 002CDA38 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D0ADC 002CDA3C C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0AE0 002CDA40 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D0AE4 002CDA44 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D0AE8 002CDA48 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0AEC 002CDA4C EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D0AF0 002CDA50 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0AF4 002CDA54 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D0AF8 002CDA58 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D0AFC 002CDA5C D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D0B00 002CDA60 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0B04 002CDA64 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D0B08 002CDA68 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0B0C 002CDA6C 48 00 08 0C */ b lbl_802D1318
|
|
lbl_802D0B10:
|
|
/* 802D0B10 002CDA70 38 60 00 00 */ li r3, 0
|
|
/* 802D0B14 002CDA74 48 00 08 04 */ b lbl_802D1318
|
|
lbl_802D0B18:
|
|
/* 802D0B18 002CDA78 7C 1B 04 2E */ lfsx f0, r27, r0
|
|
/* 802D0B1C 002CDA7C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0B20 002CDA80 40 80 01 20 */ bge lbl_802D0C40
|
|
/* 802D0B24 002CDA84 38 00 00 01 */ li r0, 1
|
|
/* 802D0B28 002CDA88 7C 05 C8 30 */ slw r5, r0, r25
|
|
/* 802D0B2C 002CDA8C 7E E0 28 39 */ and. r0, r23, r5
|
|
/* 802D0B30 002CDA90 40 82 00 0C */ bne lbl_802D0B3C
|
|
/* 802D0B34 002CDA94 38 60 00 00 */ li r3, 0
|
|
/* 802D0B38 002CDA98 48 00 07 E0 */ b lbl_802D1318
|
|
lbl_802D0B3C:
|
|
/* 802D0B3C 002CDA9C 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D0B40 002CDAA0 38 61 00 D8 */ addi r3, r1, 0xd8
|
|
/* 802D0B44 002CDAA4 7E E5 2A 78 */ xor r5, r23, r5
|
|
/* 802D0B48 002CDAA8 48 06 6A 69 */ bl GetPoint__6CAABoxCFi
|
|
/* 802D0B4C 002CDAAC C8 3D 00 00 */ lfd f1, 0(r29)
|
|
/* 802D0B50 002CDAB0 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D0B54 002CDAB4 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0B58 002CDAB8 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D0B5C 002CDABC C0 61 00 D8 */ lfs f3, 0xd8(r1)
|
|
/* 802D0B60 002CDAC0 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D0B64 002CDAC4 C0 41 00 DC */ lfs f2, 0xdc(r1)
|
|
/* 802D0B68 002CDAC8 7F C7 F3 78 */ mr r7, r30
|
|
/* 802D0B6C 002CDACC C0 01 00 E0 */ lfs f0, 0xe0(r1)
|
|
/* 802D0B70 002CDAD0 38 61 00 C8 */ addi r3, r1, 0xc8
|
|
/* 802D0B74 002CDAD4 D0 61 00 C8 */ stfs f3, 0xc8(r1)
|
|
/* 802D0B78 002CDAD8 38 C1 00 14 */ addi r6, r1, 0x14
|
|
/* 802D0B7C 002CDADC D0 41 00 CC */ stfs f2, 0xcc(r1)
|
|
/* 802D0B80 002CDAE0 D0 01 00 D0 */ stfs f0, 0xd0(r1)
|
|
/* 802D0B84 002CDAE4 D0 81 00 D4 */ stfs f4, 0xd4(r1)
|
|
/* 802D0B88 002CDAE8 48 00 2F 81 */ bl RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
/* 802D0B8C 002CDAEC 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D0B90 002CDAF0 41 82 00 A8 */ beq lbl_802D0C38
|
|
/* 802D0B94 002CDAF4 C0 01 00 14 */ lfs f0, 0x14(r1)
|
|
/* 802D0B98 002CDAF8 38 61 00 BC */ addi r3, r1, 0xbc
|
|
/* 802D0B9C 002CDAFC 38 81 00 B0 */ addi r4, r1, 0xb0
|
|
/* 802D0BA0 002CDB00 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D0BA4 002CDB04 C0 3E 00 04 */ lfs f1, 4(r30)
|
|
/* 802D0BA8 002CDB08 C0 01 00 DC */ lfs f0, 0xdc(r1)
|
|
/* 802D0BAC 002CDB0C C0 7E 00 08 */ lfs f3, 8(r30)
|
|
/* 802D0BB0 002CDB10 C0 41 00 E0 */ lfs f2, 0xe0(r1)
|
|
/* 802D0BB4 002CDB14 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D0BB8 002CDB18 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0BBC 002CDB1C C0 01 00 D8 */ lfs f0, 0xd8(r1)
|
|
/* 802D0BC0 002CDB20 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D0BC4 002CDB24 D0 81 00 B4 */ stfs f4, 0xb4(r1)
|
|
/* 802D0BC8 002CDB28 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0BCC 002CDB2C D0 41 00 B8 */ stfs f2, 0xb8(r1)
|
|
/* 802D0BD0 002CDB30 D0 01 00 B0 */ stfs f0, 0xb0(r1)
|
|
/* 802D0BD4 002CDB34 48 04 3C 7D */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D0BD8 002CDB38 C0 01 00 BC */ lfs f0, 0xbc(r1)
|
|
/* 802D0BDC 002CDB3C 38 60 00 01 */ li r3, 1
|
|
/* 802D0BE0 002CDB40 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D0BE4 002CDB44 C0 01 00 C0 */ lfs f0, 0xc0(r1)
|
|
/* 802D0BE8 002CDB48 D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D0BEC 002CDB4C C0 01 00 C4 */ lfs f0, 0xc4(r1)
|
|
/* 802D0BF0 002CDB50 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D0BF4 002CDB54 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0BF8 002CDB58 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D0BFC 002CDB5C C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D0C00 002CDB60 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D0C04 002CDB64 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0C08 002CDB68 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D0C0C 002CDB6C EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D0C10 002CDB70 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0C14 002CDB74 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D0C18 002CDB78 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0C1C 002CDB7C C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D0C20 002CDB80 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D0C24 002CDB84 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D0C28 002CDB88 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0C2C 002CDB8C EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D0C30 002CDB90 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0C34 002CDB94 48 00 06 E4 */ b lbl_802D1318
|
|
lbl_802D0C38:
|
|
/* 802D0C38 002CDB98 38 60 00 00 */ li r3, 0
|
|
/* 802D0C3C 002CDB9C 48 00 06 DC */ b lbl_802D1318
|
|
lbl_802D0C40:
|
|
/* 802D0C40 002CDBA0 C0 01 00 14 */ lfs f0, 0x14(r1)
|
|
/* 802D0C44 002CDBA4 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D0C48 002CDBA8 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D0C4C 002CDBAC C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0C50 002CDBB0 C0 01 01 50 */ lfs f0, 0x150(r1)
|
|
/* 802D0C54 002CDBB4 C0 9E 00 04 */ lfs f4, 4(r30)
|
|
/* 802D0C58 002CDBB8 C0 61 01 54 */ lfs f3, 0x154(r1)
|
|
/* 802D0C5C 002CDBBC EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0C60 002CDBC0 C0 5E 00 08 */ lfs f2, 8(r30)
|
|
/* 802D0C64 002CDBC4 C0 21 01 58 */ lfs f1, 0x158(r1)
|
|
/* 802D0C68 002CDBC8 EC 64 18 28 */ fsubs f3, f4, f3
|
|
/* 802D0C6C 002CDBCC D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D0C70 002CDBD0 EC 02 08 28 */ fsubs f0, f2, f1
|
|
/* 802D0C74 002CDBD4 D0 7F 00 04 */ stfs f3, 4(r31)
|
|
/* 802D0C78 002CDBD8 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D0C7C 002CDBDC 7C DF 05 2E */ stfsx f6, r31, r0
|
|
/* 802D0C80 002CDBE0 48 04 3C 79 */ bl Normalize__9CVector3fFv
|
|
/* 802D0C84 002CDBE4 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0C88 002CDBE8 38 60 00 01 */ li r3, 1
|
|
/* 802D0C8C 002CDBEC C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D0C90 002CDBF0 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D0C94 002CDBF4 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D0C98 002CDBF8 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0C9C 002CDBFC C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D0CA0 002CDC00 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D0CA4 002CDC04 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0CA8 002CDC08 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D0CAC 002CDC0C D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0CB0 002CDC10 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D0CB4 002CDC14 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D0CB8 002CDC18 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D0CBC 002CDC1C C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0CC0 002CDC20 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D0CC4 002CDC24 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0CC8 002CDC28 48 00 06 50 */ b lbl_802D1318
|
|
lbl_802D0CCC:
|
|
/* 802D0CCC 002CDC2C 38 00 00 03 */ li r0, 3
|
|
/* 802D0CD0 002CDC30 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D0CD4 002CDC34 7F 05 C3 78 */ mr r5, r24
|
|
/* 802D0CD8 002CDC38 7F 66 DB 78 */ mr r6, r27
|
|
/* 802D0CDC 002CDC3C 7F 47 D3 78 */ mr r7, r26
|
|
/* 802D0CE0 002CDC40 C0 A2 C4 C4 */ lfs f5, lbl_805AE1E4@sda21(r2)
|
|
/* 802D0CE4 002CDC44 C0 82 C4 C8 */ lfs f4, lbl_805AE1E8@sda21(r2)
|
|
/* 802D0CE8 002CDC48 3B 20 00 00 */ li r25, 0
|
|
/* 802D0CEC 002CDC4C 39 00 00 00 */ li r8, 0
|
|
/* 802D0CF0 002CDC50 39 20 00 00 */ li r9, 0
|
|
/* 802D0CF4 002CDC54 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D0CF8:
|
|
/* 802D0CF8 002CDC58 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D0CFC 002CDC5C FC 00 0A 10 */ fabs f0, f1
|
|
/* 802D0D00 002CDC60 FC 00 00 18 */ frsp f0, f0
|
|
/* 802D0D04 002CDC64 FC 00 20 40 */ fcmpo cr0, f0, f4
|
|
/* 802D0D08 002CDC68 41 80 00 84 */ blt lbl_802D0D8C
|
|
/* 802D0D0C 002CDC6C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D0D10 002CDC70 38 00 00 01 */ li r0, 1
|
|
/* 802D0D14 002CDC74 7C 00 48 30 */ slw r0, r0, r9
|
|
/* 802D0D18 002CDC78 7E E3 00 38 */ and r3, r23, r0
|
|
/* 802D0D1C 002CDC7C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0D20 002CDC80 7C 03 00 D0 */ neg r0, r3
|
|
/* 802D0D24 002CDC84 7C 00 1B 78 */ or r0, r0, r3
|
|
/* 802D0D28 002CDC88 54 03 0F FE */ srwi r3, r0, 0x1f
|
|
/* 802D0D2C 002CDC8C 7C 00 00 26 */ mfcr r0
|
|
/* 802D0D30 002CDC90 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D0D34 002CDC94 7C 03 00 40 */ cmplw r3, r0
|
|
/* 802D0D38 002CDC98 41 82 00 54 */ beq lbl_802D0D8C
|
|
/* 802D0D3C 002CDC9C C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
/* 802D0D40 002CDCA0 28 03 00 00 */ cmplwi r3, 0
|
|
/* 802D0D44 002CDCA4 39 08 00 01 */ addi r8, r8, 1
|
|
/* 802D0D48 002CDCA8 EC 60 08 24 */ fdivs f3, f0, f1
|
|
/* 802D0D4C 002CDCAC 41 82 00 0C */ beq lbl_802D0D58
|
|
/* 802D0D50 002CDCB0 C0 45 00 00 */ lfs f2, 0(r5)
|
|
/* 802D0D54 002CDCB4 48 00 00 08 */ b lbl_802D0D5C
|
|
lbl_802D0D58:
|
|
/* 802D0D58 002CDCB8 C0 46 00 00 */ lfs f2, 0(r6)
|
|
lbl_802D0D5C:
|
|
/* 802D0D5C 002CDCBC C0 27 00 00 */ lfs f1, 0(r7)
|
|
/* 802D0D60 002CDCC0 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D0D64 002CDCC4 EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D0D68 002CDCC8 EC 23 00 72 */ fmuls f1, f3, f1
|
|
/* 802D0D6C 002CDCCC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0D70 002CDCD0 40 80 00 0C */ bge lbl_802D0D7C
|
|
/* 802D0D74 002CDCD4 38 60 00 00 */ li r3, 0
|
|
/* 802D0D78 002CDCD8 48 00 05 A0 */ b lbl_802D1318
|
|
lbl_802D0D7C:
|
|
/* 802D0D7C 002CDCDC FC 01 28 40 */ fcmpo cr0, f1, f5
|
|
/* 802D0D80 002CDCE0 40 80 00 0C */ bge lbl_802D0D8C
|
|
/* 802D0D84 002CDCE4 FC A0 08 90 */ fmr f5, f1
|
|
/* 802D0D88 002CDCE8 7D 39 4B 78 */ mr r25, r9
|
|
lbl_802D0D8C:
|
|
/* 802D0D8C 002CDCEC 38 84 00 04 */ addi r4, r4, 4
|
|
/* 802D0D90 002CDCF0 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 802D0D94 002CDCF4 38 C6 00 04 */ addi r6, r6, 4
|
|
/* 802D0D98 002CDCF8 38 E7 00 04 */ addi r7, r7, 4
|
|
/* 802D0D9C 002CDCFC 39 29 00 01 */ addi r9, r9, 1
|
|
/* 802D0DA0 002CDD00 42 00 FF 58 */ bdnz lbl_802D0CF8
|
|
/* 802D0DA4 002CDD04 2C 08 00 02 */ cmpwi r8, 2
|
|
/* 802D0DA8 002CDD08 40 80 00 0C */ bge lbl_802D0DB4
|
|
/* 802D0DAC 002CDD0C 38 60 00 00 */ li r3, 0
|
|
/* 802D0DB0 002CDD10 48 00 05 68 */ b lbl_802D1318
|
|
lbl_802D0DB4:
|
|
/* 802D0DB4 002CDD14 3C 60 55 55 */ lis r3, 0x55555556@ha
|
|
/* 802D0DB8 002CDD18 C0 7A 00 0C */ lfs f3, 0xc(r26)
|
|
/* 802D0DBC 002CDD1C 39 59 00 01 */ addi r10, r25, 1
|
|
/* 802D0DC0 002CDD20 38 F9 00 02 */ addi r7, r25, 2
|
|
/* 802D0DC4 002CDD24 38 03 55 56 */ addi r0, r3, 0x55555556@l
|
|
/* 802D0DC8 002CDD28 C0 41 01 50 */ lfs f2, 0x150(r1)
|
|
/* 802D0DCC 002CDD2C 7D 00 50 96 */ mulhw r8, r0, r10
|
|
/* 802D0DD0 002CDD30 C0 21 01 54 */ lfs f1, 0x154(r1)
|
|
/* 802D0DD4 002CDD34 C0 01 01 58 */ lfs f0, 0x158(r1)
|
|
/* 802D0DD8 002CDD38 7F 43 D3 78 */ mr r3, r26
|
|
/* 802D0DDC 002CDD3C D0 41 00 A0 */ stfs f2, 0xa0(r1)
|
|
/* 802D0DE0 002CDD40 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D0DE4 002CDD44 7C C0 38 96 */ mulhw r6, r0, r7
|
|
/* 802D0DE8 002CDD48 55 00 0F FE */ srwi r0, r8, 0x1f
|
|
/* 802D0DEC 002CDD4C D0 21 00 A4 */ stfs f1, 0xa4(r1)
|
|
/* 802D0DF0 002CDD50 38 A1 00 A0 */ addi r5, r1, 0xa0
|
|
/* 802D0DF4 002CDD54 7D 28 02 14 */ add r9, r8, r0
|
|
/* 802D0DF8 002CDD58 D0 01 00 A8 */ stfs f0, 0xa8(r1)
|
|
/* 802D0DFC 002CDD5C 54 C0 0F FE */ srwi r0, r6, 0x1f
|
|
/* 802D0E00 002CDD60 D0 61 00 AC */ stfs f3, 0xac(r1)
|
|
/* 802D0E04 002CDD64 7C 06 02 14 */ add r0, r6, r0
|
|
/* 802D0E08 002CDD68 39 01 00 10 */ addi r8, r1, 0x10
|
|
/* 802D0E0C 002CDD6C 1C C9 00 03 */ mulli r6, r9, 3
|
|
/* 802D0E10 002CDD70 1C 00 00 03 */ mulli r0, r0, 3
|
|
/* 802D0E14 002CDD74 7C C6 50 50 */ subf r6, r6, r10
|
|
/* 802D0E18 002CDD78 7C E0 38 50 */ subf r7, r0, r7
|
|
/* 802D0E1C 002CDD7C 48 00 05 11 */ bl LineCircleIntersection2d__13CollisionUtilFRC9CVector3fRC9CVector3fRC7CSphereiiRf
|
|
/* 802D0E20 002CDD80 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D0E24 002CDD84 41 82 01 18 */ beq lbl_802D0F3C
|
|
/* 802D0E28 002CDD88 C0 E1 00 10 */ lfs f7, 0x10(r1)
|
|
/* 802D0E2C 002CDD8C C0 C2 C4 B8 */ lfs f6, lbl_805AE1D8@sda21(r2)
|
|
/* 802D0E30 002CDD90 FC 07 30 40 */ fcmpo cr0, f7, f6
|
|
/* 802D0E34 002CDD94 40 81 01 08 */ ble lbl_802D0F3C
|
|
/* 802D0E38 002CDD98 C8 1D 00 00 */ lfd f0, 0(r29)
|
|
/* 802D0E3C 002CDD9C FC 07 00 40 */ fcmpo cr0, f7, f0
|
|
/* 802D0E40 002CDDA0 40 80 00 FC */ bge lbl_802D0F3C
|
|
/* 802D0E44 002CDDA4 C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D0E48 002CDDA8 57 20 10 3A */ slwi r0, r25, 2
|
|
/* 802D0E4C 002CDDAC C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D0E50 002CDDB0 EC 07 00 32 */ fmuls f0, f7, f0
|
|
/* 802D0E54 002CDDB4 C0 3A 00 00 */ lfs f1, 0(r26)
|
|
/* 802D0E58 002CDDB8 C0 5C 00 08 */ lfs f2, 8(r28)
|
|
/* 802D0E5C 002CDDBC EC 87 00 F2 */ fmuls f4, f7, f3
|
|
/* 802D0E60 002CDDC0 C0 BA 00 04 */ lfs f5, 4(r26)
|
|
/* 802D0E64 002CDDC4 EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D0E68 002CDDC8 C0 7A 00 08 */ lfs f3, 8(r26)
|
|
/* 802D0E6C 002CDDCC EC 27 00 B2 */ fmuls f1, f7, f2
|
|
/* 802D0E70 002CDDD0 EC 45 20 2A */ fadds f2, f5, f4
|
|
/* 802D0E74 002CDDD4 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0E78 002CDDD8 EC 03 08 2A */ fadds f0, f3, f1
|
|
/* 802D0E7C 002CDDDC D0 5E 00 04 */ stfs f2, 4(r30)
|
|
/* 802D0E80 002CDDE0 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0E84 002CDDE4 7C 3E 04 2E */ lfsx f1, r30, r0
|
|
/* 802D0E88 002CDDE8 7C 18 04 2E */ lfsx f0, r24, r0
|
|
/* 802D0E8C 002CDDEC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0E90 002CDDF0 40 81 00 0C */ ble lbl_802D0E9C
|
|
/* 802D0E94 002CDDF4 38 60 00 00 */ li r3, 0
|
|
/* 802D0E98 002CDDF8 48 00 04 80 */ b lbl_802D1318
|
|
lbl_802D0E9C:
|
|
/* 802D0E9C 002CDDFC 7C 1B 04 2E */ lfsx f0, r27, r0
|
|
/* 802D0EA0 002CDE00 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D0EA4 002CDE04 40 80 00 0C */ bge lbl_802D0EB0
|
|
/* 802D0EA8 002CDE08 38 60 00 00 */ li r3, 0
|
|
/* 802D0EAC 002CDE0C 48 00 04 6C */ b lbl_802D1318
|
|
lbl_802D0EB0:
|
|
/* 802D0EB0 002CDE10 C0 01 00 10 */ lfs f0, 0x10(r1)
|
|
/* 802D0EB4 002CDE14 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D0EB8 002CDE18 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D0EBC 002CDE1C C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0EC0 002CDE20 C0 01 01 50 */ lfs f0, 0x150(r1)
|
|
/* 802D0EC4 002CDE24 C0 9E 00 04 */ lfs f4, 4(r30)
|
|
/* 802D0EC8 002CDE28 C0 61 01 54 */ lfs f3, 0x154(r1)
|
|
/* 802D0ECC 002CDE2C EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0ED0 002CDE30 C0 5E 00 08 */ lfs f2, 8(r30)
|
|
/* 802D0ED4 002CDE34 C0 21 01 58 */ lfs f1, 0x158(r1)
|
|
/* 802D0ED8 002CDE38 EC 64 18 28 */ fsubs f3, f4, f3
|
|
/* 802D0EDC 002CDE3C D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D0EE0 002CDE40 EC 02 08 28 */ fsubs f0, f2, f1
|
|
/* 802D0EE4 002CDE44 D0 7F 00 04 */ stfs f3, 4(r31)
|
|
/* 802D0EE8 002CDE48 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D0EEC 002CDE4C 7C DF 05 2E */ stfsx f6, r31, r0
|
|
/* 802D0EF0 002CDE50 48 04 3A 09 */ bl Normalize__9CVector3fFv
|
|
/* 802D0EF4 002CDE54 C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D0EF8 002CDE58 38 60 00 01 */ li r3, 1
|
|
/* 802D0EFC 002CDE5C C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D0F00 002CDE60 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D0F04 002CDE64 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D0F08 002CDE68 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D0F0C 002CDE6C C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D0F10 002CDE70 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D0F14 002CDE74 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D0F18 002CDE78 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D0F1C 002CDE7C D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D0F20 002CDE80 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D0F24 002CDE84 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D0F28 002CDE88 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D0F2C 002CDE8C C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D0F30 002CDE90 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D0F34 002CDE94 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D0F38 002CDE98 48 00 03 E0 */ b lbl_802D1318
|
|
lbl_802D0F3C:
|
|
/* 802D0F3C 002CDE9C 38 60 00 00 */ li r3, 0
|
|
/* 802D0F40 002CDEA0 48 00 03 D8 */ b lbl_802D1318
|
|
lbl_802D0F44:
|
|
/* 802D0F44 002CDEA4 55 24 06 3F */ clrlwi. r4, r9, 0x18
|
|
/* 802D0F48 002CDEA8 7C 17 03 78 */ mr r23, r0
|
|
/* 802D0F4C 002CDEAC 41 82 00 08 */ beq lbl_802D0F54
|
|
/* 802D0F50 002CDEB0 7C B7 2B 78 */ mr r23, r5
|
|
lbl_802D0F54:
|
|
/* 802D0F54 002CDEB4 55 24 06 3F */ clrlwi. r4, r9, 0x18
|
|
/* 802D0F58 002CDEB8 39 00 00 01 */ li r8, 1
|
|
/* 802D0F5C 002CDEBC 7C C4 33 78 */ mr r4, r6
|
|
/* 802D0F60 002CDEC0 7D 08 B8 30 */ slw r8, r8, r23
|
|
/* 802D0F64 002CDEC4 41 82 00 08 */ beq lbl_802D0F6C
|
|
/* 802D0F68 002CDEC8 7C E4 3B 78 */ mr r4, r7
|
|
lbl_802D0F6C:
|
|
/* 802D0F6C 002CDECC 54 86 06 3E */ clrlwi r6, r4, 0x18
|
|
/* 802D0F70 002CDED0 55 24 06 3F */ clrlwi. r4, r9, 0x18
|
|
/* 802D0F74 002CDED4 7C C8 31 D6 */ mullw r6, r8, r6
|
|
/* 802D0F78 002CDED8 7C B9 2B 78 */ mr r25, r5
|
|
/* 802D0F7C 002CDEDC 41 82 00 08 */ beq lbl_802D0F84
|
|
/* 802D0F80 002CDEE0 7C 19 03 78 */ mr r25, r0
|
|
lbl_802D0F84:
|
|
/* 802D0F84 002CDEE4 38 80 00 01 */ li r4, 1
|
|
/* 802D0F88 002CDEE8 88 01 00 08 */ lbz r0, 8(r1)
|
|
/* 802D0F8C 002CDEEC 7C 83 18 30 */ slw r3, r4, r3
|
|
/* 802D0F90 002CDEF0 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D0F94 002CDEF4 7C 03 01 D6 */ mullw r0, r3, r0
|
|
/* 802D0F98 002CDEF8 38 61 00 94 */ addi r3, r1, 0x94
|
|
/* 802D0F9C 002CDEFC 7C D6 03 78 */ or r22, r6, r0
|
|
/* 802D0FA0 002CDF00 7E C5 B3 78 */ mr r5, r22
|
|
/* 802D0FA4 002CDF04 48 06 66 0D */ bl GetPoint__6CAABoxCFi
|
|
/* 802D0FA8 002CDF08 C0 7A 00 0C */ lfs f3, 0xc(r26)
|
|
/* 802D0FAC 002CDF0C 7F 43 D3 78 */ mr r3, r26
|
|
/* 802D0FB0 002CDF10 C0 41 00 94 */ lfs f2, 0x94(r1)
|
|
/* 802D0FB4 002CDF14 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D0FB8 002CDF18 C0 21 00 98 */ lfs f1, 0x98(r1)
|
|
/* 802D0FBC 002CDF1C 7E E7 BB 78 */ mr r7, r23
|
|
/* 802D0FC0 002CDF20 C0 01 00 9C */ lfs f0, 0x9c(r1)
|
|
/* 802D0FC4 002CDF24 38 A1 00 84 */ addi r5, r1, 0x84
|
|
/* 802D0FC8 002CDF28 D0 41 00 84 */ stfs f2, 0x84(r1)
|
|
/* 802D0FCC 002CDF2C 39 01 00 0C */ addi r8, r1, 0xc
|
|
/* 802D0FD0 002CDF30 80 C1 00 1C */ lwz r6, 0x1c(r1)
|
|
/* 802D0FD4 002CDF34 D0 21 00 88 */ stfs f1, 0x88(r1)
|
|
/* 802D0FD8 002CDF38 D0 01 00 8C */ stfs f0, 0x8c(r1)
|
|
/* 802D0FDC 002CDF3C D0 61 00 90 */ stfs f3, 0x90(r1)
|
|
/* 802D0FE0 002CDF40 48 00 03 4D */ bl LineCircleIntersection2d__13CollisionUtilFRC9CVector3fRC9CVector3fRC7CSphereiiRf
|
|
/* 802D0FE4 002CDF44 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D0FE8 002CDF48 41 82 03 2C */ beq lbl_802D1314
|
|
/* 802D0FEC 002CDF4C C0 E1 00 0C */ lfs f7, 0xc(r1)
|
|
/* 802D0FF0 002CDF50 C0 C2 C4 B8 */ lfs f6, lbl_805AE1D8@sda21(r2)
|
|
/* 802D0FF4 002CDF54 FC 07 30 40 */ fcmpo cr0, f7, f6
|
|
/* 802D0FF8 002CDF58 40 81 03 1C */ ble lbl_802D1314
|
|
/* 802D0FFC 002CDF5C C8 1D 00 00 */ lfd f0, 0(r29)
|
|
/* 802D1000 002CDF60 FC 07 00 40 */ fcmpo cr0, f7, f0
|
|
/* 802D1004 002CDF64 40 80 03 10 */ bge lbl_802D1314
|
|
/* 802D1008 002CDF68 C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D100C 002CDF6C 57 37 10 3A */ slwi r23, r25, 2
|
|
/* 802D1010 002CDF70 C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D1014 002CDF74 EC 07 00 32 */ fmuls f0, f7, f0
|
|
/* 802D1018 002CDF78 C0 3A 00 00 */ lfs f1, 0(r26)
|
|
/* 802D101C 002CDF7C C0 5C 00 08 */ lfs f2, 8(r28)
|
|
/* 802D1020 002CDF80 EC 87 00 F2 */ fmuls f4, f7, f3
|
|
/* 802D1024 002CDF84 C0 BA 00 04 */ lfs f5, 4(r26)
|
|
/* 802D1028 002CDF88 EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D102C 002CDF8C C0 7A 00 08 */ lfs f3, 8(r26)
|
|
/* 802D1030 002CDF90 EC 27 00 B2 */ fmuls f1, f7, f2
|
|
/* 802D1034 002CDF94 EC 45 20 2A */ fadds f2, f5, f4
|
|
/* 802D1038 002CDF98 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D103C 002CDF9C EC 03 08 2A */ fadds f0, f3, f1
|
|
/* 802D1040 002CDFA0 D0 5E 00 04 */ stfs f2, 4(r30)
|
|
/* 802D1044 002CDFA4 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D1048 002CDFA8 7C 3E BC 2E */ lfsx f1, r30, r23
|
|
/* 802D104C 002CDFAC 7C 18 BC 2E */ lfsx f0, r24, r23
|
|
/* 802D1050 002CDFB0 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1054 002CDFB4 40 81 01 24 */ ble lbl_802D1178
|
|
/* 802D1058 002CDFB8 38 00 00 01 */ li r0, 1
|
|
/* 802D105C 002CDFBC 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D1060 002CDFC0 7C 00 C8 30 */ slw r0, r0, r25
|
|
/* 802D1064 002CDFC4 38 61 00 78 */ addi r3, r1, 0x78
|
|
/* 802D1068 002CDFC8 7E C5 03 78 */ or r5, r22, r0
|
|
/* 802D106C 002CDFCC 48 06 65 45 */ bl GetPoint__6CAABoxCFi
|
|
/* 802D1070 002CDFD0 38 61 01 80 */ addi r3, r1, 0x180
|
|
/* 802D1074 002CDFD4 7C 3E BC 2E */ lfsx f1, r30, r23
|
|
/* 802D1078 002CDFD8 7C 03 BC 2E */ lfsx f0, r3, r23
|
|
/* 802D107C 002CDFDC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1080 002CDFE0 40 80 00 F0 */ bge lbl_802D1170
|
|
/* 802D1084 002CDFE4 C8 3D 00 00 */ lfd f1, 0(r29)
|
|
/* 802D1088 002CDFE8 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D108C 002CDFEC C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D1090 002CDFF0 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D1094 002CDFF4 C0 61 00 78 */ lfs f3, 0x78(r1)
|
|
/* 802D1098 002CDFF8 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D109C 002CDFFC C0 41 00 7C */ lfs f2, 0x7c(r1)
|
|
/* 802D10A0 002CE000 7F C7 F3 78 */ mr r7, r30
|
|
/* 802D10A4 002CE004 C0 01 00 80 */ lfs f0, 0x80(r1)
|
|
/* 802D10A8 002CE008 38 61 00 68 */ addi r3, r1, 0x68
|
|
/* 802D10AC 002CE00C D0 61 00 68 */ stfs f3, 0x68(r1)
|
|
/* 802D10B0 002CE010 38 C1 00 0C */ addi r6, r1, 0xc
|
|
/* 802D10B4 002CE014 D0 41 00 6C */ stfs f2, 0x6c(r1)
|
|
/* 802D10B8 002CE018 D0 01 00 70 */ stfs f0, 0x70(r1)
|
|
/* 802D10BC 002CE01C D0 81 00 74 */ stfs f4, 0x74(r1)
|
|
/* 802D10C0 002CE020 48 00 2A 49 */ bl RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
/* 802D10C4 002CE024 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D10C8 002CE028 41 82 00 A8 */ beq lbl_802D1170
|
|
/* 802D10CC 002CE02C C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 802D10D0 002CE030 38 61 00 5C */ addi r3, r1, 0x5c
|
|
/* 802D10D4 002CE034 38 81 00 50 */ addi r4, r1, 0x50
|
|
/* 802D10D8 002CE038 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D10DC 002CE03C C0 3E 00 04 */ lfs f1, 4(r30)
|
|
/* 802D10E0 002CE040 C0 01 00 7C */ lfs f0, 0x7c(r1)
|
|
/* 802D10E4 002CE044 C0 7E 00 08 */ lfs f3, 8(r30)
|
|
/* 802D10E8 002CE048 C0 41 00 80 */ lfs f2, 0x80(r1)
|
|
/* 802D10EC 002CE04C EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D10F0 002CE050 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D10F4 002CE054 C0 01 00 78 */ lfs f0, 0x78(r1)
|
|
/* 802D10F8 002CE058 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D10FC 002CE05C D0 81 00 54 */ stfs f4, 0x54(r1)
|
|
/* 802D1100 002CE060 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D1104 002CE064 D0 41 00 58 */ stfs f2, 0x58(r1)
|
|
/* 802D1108 002CE068 D0 01 00 50 */ stfs f0, 0x50(r1)
|
|
/* 802D110C 002CE06C 48 04 37 45 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D1110 002CE070 C0 01 00 5C */ lfs f0, 0x5c(r1)
|
|
/* 802D1114 002CE074 38 60 00 01 */ li r3, 1
|
|
/* 802D1118 002CE078 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D111C 002CE07C C0 01 00 60 */ lfs f0, 0x60(r1)
|
|
/* 802D1120 002CE080 D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D1124 002CE084 C0 01 00 64 */ lfs f0, 0x64(r1)
|
|
/* 802D1128 002CE088 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D112C 002CE08C C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D1130 002CE090 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D1134 002CE094 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D1138 002CE098 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D113C 002CE09C C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D1140 002CE0A0 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D1144 002CE0A4 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D1148 002CE0A8 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D114C 002CE0AC EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D1150 002CE0B0 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D1154 002CE0B4 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D1158 002CE0B8 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D115C 002CE0BC D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D1160 002CE0C0 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D1164 002CE0C4 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D1168 002CE0C8 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D116C 002CE0CC 48 00 01 AC */ b lbl_802D1318
|
|
lbl_802D1170:
|
|
/* 802D1170 002CE0D0 38 60 00 00 */ li r3, 0
|
|
/* 802D1174 002CE0D4 48 00 01 A4 */ b lbl_802D1318
|
|
lbl_802D1178:
|
|
/* 802D1178 002CE0D8 7C 1B BC 2E */ lfsx f0, r27, r23
|
|
/* 802D117C 002CE0DC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1180 002CE0E0 40 80 01 08 */ bge lbl_802D1288
|
|
/* 802D1184 002CE0E4 38 61 01 74 */ addi r3, r1, 0x174
|
|
/* 802D1188 002CE0E8 7C 03 BC 2E */ lfsx f0, r3, r23
|
|
/* 802D118C 002CE0EC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1190 002CE0F0 40 81 00 F0 */ ble lbl_802D1280
|
|
/* 802D1194 002CE0F4 C8 3D 00 00 */ lfd f1, 0(r29)
|
|
/* 802D1198 002CE0F8 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D119C 002CE0FC C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D11A0 002CE100 7F 85 E3 78 */ mr r5, r28
|
|
/* 802D11A4 002CE104 C0 61 00 94 */ lfs f3, 0x94(r1)
|
|
/* 802D11A8 002CE108 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D11AC 002CE10C C0 41 00 98 */ lfs f2, 0x98(r1)
|
|
/* 802D11B0 002CE110 7F C7 F3 78 */ mr r7, r30
|
|
/* 802D11B4 002CE114 C0 01 00 9C */ lfs f0, 0x9c(r1)
|
|
/* 802D11B8 002CE118 38 61 00 40 */ addi r3, r1, 0x40
|
|
/* 802D11BC 002CE11C D0 61 00 40 */ stfs f3, 0x40(r1)
|
|
/* 802D11C0 002CE120 38 C1 00 0C */ addi r6, r1, 0xc
|
|
/* 802D11C4 002CE124 D0 41 00 44 */ stfs f2, 0x44(r1)
|
|
/* 802D11C8 002CE128 D0 01 00 48 */ stfs f0, 0x48(r1)
|
|
/* 802D11CC 002CE12C D0 81 00 4C */ stfs f4, 0x4c(r1)
|
|
/* 802D11D0 002CE130 48 00 29 39 */ bl RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
/* 802D11D4 002CE134 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D11D8 002CE138 41 82 00 A8 */ beq lbl_802D1280
|
|
/* 802D11DC 002CE13C C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 802D11E0 002CE140 38 61 00 34 */ addi r3, r1, 0x34
|
|
/* 802D11E4 002CE144 38 81 00 28 */ addi r4, r1, 0x28
|
|
/* 802D11E8 002CE148 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D11EC 002CE14C C0 3E 00 04 */ lfs f1, 4(r30)
|
|
/* 802D11F0 002CE150 C0 01 00 98 */ lfs f0, 0x98(r1)
|
|
/* 802D11F4 002CE154 C0 7E 00 08 */ lfs f3, 8(r30)
|
|
/* 802D11F8 002CE158 C0 41 00 9C */ lfs f2, 0x9c(r1)
|
|
/* 802D11FC 002CE15C EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D1200 002CE160 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D1204 002CE164 C0 01 00 94 */ lfs f0, 0x94(r1)
|
|
/* 802D1208 002CE168 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D120C 002CE16C D0 81 00 2C */ stfs f4, 0x2c(r1)
|
|
/* 802D1210 002CE170 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D1214 002CE174 D0 41 00 30 */ stfs f2, 0x30(r1)
|
|
/* 802D1218 002CE178 D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D121C 002CE17C 48 04 36 35 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D1220 002CE180 C0 01 00 34 */ lfs f0, 0x34(r1)
|
|
/* 802D1224 002CE184 38 60 00 01 */ li r3, 1
|
|
/* 802D1228 002CE188 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D122C 002CE18C C0 01 00 38 */ lfs f0, 0x38(r1)
|
|
/* 802D1230 002CE190 D0 1F 00 04 */ stfs f0, 4(r31)
|
|
/* 802D1234 002CE194 C0 01 00 3C */ lfs f0, 0x3c(r1)
|
|
/* 802D1238 002CE198 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D123C 002CE19C C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D1240 002CE1A0 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D1244 002CE1A4 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D1248 002CE1A8 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D124C 002CE1AC C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D1250 002CE1B0 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D1254 002CE1B4 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D1258 002CE1B8 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D125C 002CE1BC EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D1260 002CE1C0 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D1264 002CE1C4 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D1268 002CE1C8 EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D126C 002CE1CC D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D1270 002CE1D0 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D1274 002CE1D4 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D1278 002CE1D8 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D127C 002CE1DC 48 00 00 9C */ b lbl_802D1318
|
|
lbl_802D1280:
|
|
/* 802D1280 002CE1E0 38 60 00 00 */ li r3, 0
|
|
/* 802D1284 002CE1E4 48 00 00 94 */ b lbl_802D1318
|
|
lbl_802D1288:
|
|
/* 802D1288 002CE1E8 C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 802D128C 002CE1EC 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D1290 002CE1F0 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D1294 002CE1F4 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D1298 002CE1F8 C0 01 00 94 */ lfs f0, 0x94(r1)
|
|
/* 802D129C 002CE1FC C0 9E 00 04 */ lfs f4, 4(r30)
|
|
/* 802D12A0 002CE200 C0 61 00 98 */ lfs f3, 0x98(r1)
|
|
/* 802D12A4 002CE204 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D12A8 002CE208 C0 5E 00 08 */ lfs f2, 8(r30)
|
|
/* 802D12AC 002CE20C C0 21 00 9C */ lfs f1, 0x9c(r1)
|
|
/* 802D12B0 002CE210 EC 64 18 28 */ fsubs f3, f4, f3
|
|
/* 802D12B4 002CE214 D0 1F 00 00 */ stfs f0, 0(r31)
|
|
/* 802D12B8 002CE218 EC 02 08 28 */ fsubs f0, f2, f1
|
|
/* 802D12BC 002CE21C D0 7F 00 04 */ stfs f3, 4(r31)
|
|
/* 802D12C0 002CE220 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D12C4 002CE224 7C DF BD 2E */ stfsx f6, r31, r23
|
|
/* 802D12C8 002CE228 48 04 36 31 */ bl Normalize__9CVector3fFv
|
|
/* 802D12CC 002CE22C C0 9A 00 0C */ lfs f4, 0xc(r26)
|
|
/* 802D12D0 002CE230 38 60 00 01 */ li r3, 1
|
|
/* 802D12D4 002CE234 C0 1F 00 00 */ lfs f0, 0(r31)
|
|
/* 802D12D8 002CE238 C0 7F 00 04 */ lfs f3, 4(r31)
|
|
/* 802D12DC 002CE23C EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D12E0 002CE240 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D12E4 002CE244 C0 5F 00 08 */ lfs f2, 8(r31)
|
|
/* 802D12E8 002CE248 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D12EC 002CE24C EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D12F0 002CE250 EC 24 00 B2 */ fmuls f1, f4, f2
|
|
/* 802D12F4 002CE254 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D12F8 002CE258 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D12FC 002CE25C EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D1300 002CE260 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D1304 002CE264 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D1308 002CE268 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D130C 002CE26C D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D1310 002CE270 48 00 00 08 */ b lbl_802D1318
|
|
lbl_802D1314:
|
|
/* 802D1314 002CE274 38 60 00 00 */ li r3, 0
|
|
lbl_802D1318:
|
|
/* 802D1318 002CE278 BA C1 01 98 */ lmw r22, 0x198(r1)
|
|
/* 802D131C 002CE27C 80 01 01 C4 */ lwz r0, 0x1c4(r1)
|
|
/* 802D1320 002CE280 7C 08 03 A6 */ mtlr r0
|
|
/* 802D1324 002CE284 38 21 01 C0 */ addi r1, r1, 0x1c0
|
|
/* 802D1328 002CE288 4E 80 00 20 */ blr
|
|
|
|
.global LineCircleIntersection2d__13CollisionUtilFRC9CVector3fRC9CVector3fRC7CSphereiiRf
|
|
LineCircleIntersection2d__13CollisionUtilFRC9CVector3fRC9CVector3fRC7CSphereiiRf:
|
|
/* 802D132C 002CE28C 94 21 FF 60 */ stwu r1, -0xa0(r1)
|
|
/* 802D1330 002CE290 7C 08 02 A6 */ mflr r0
|
|
/* 802D1334 002CE294 90 01 00 A4 */ stw r0, 0xa4(r1)
|
|
/* 802D1338 002CE298 DB E1 00 90 */ stfd f31, 0x90(r1)
|
|
/* 802D133C 002CE29C F3 E1 00 98 */ psq_st f31, 152(r1), 0, qr0
|
|
/* 802D1340 002CE2A0 DB C1 00 80 */ stfd f30, 0x80(r1)
|
|
/* 802D1344 002CE2A4 F3 C1 00 88 */ psq_st f30, 136(r1), 0, qr0
|
|
/* 802D1348 002CE2A8 DB A1 00 70 */ stfd f29, 0x70(r1)
|
|
/* 802D134C 002CE2AC F3 A1 00 78 */ psq_st f29, 120(r1), 0, qr0
|
|
/* 802D1350 002CE2B0 DB 81 00 60 */ stfd f28, 0x60(r1)
|
|
/* 802D1354 002CE2B4 F3 81 00 68 */ psq_st f28, 104(r1), 0, qr0
|
|
/* 802D1358 002CE2B8 BF 61 00 4C */ stmw r27, 0x4c(r1)
|
|
/* 802D135C 002CE2BC 7C BC 2B 78 */ mr r28, r5
|
|
/* 802D1360 002CE2C0 C0 03 00 04 */ lfs f0, 4(r3)
|
|
/* 802D1364 002CE2C4 C0 25 00 04 */ lfs f1, 4(r5)
|
|
/* 802D1368 002CE2C8 54 FF 10 3A */ slwi r31, r7, 2
|
|
/* 802D136C 002CE2CC C0 65 00 08 */ lfs f3, 8(r5)
|
|
/* 802D1370 002CE2D0 38 A1 00 34 */ addi r5, r1, 0x34
|
|
/* 802D1374 002CE2D4 C0 43 00 08 */ lfs f2, 8(r3)
|
|
/* 802D1378 002CE2D8 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D137C 002CE2DC C0 03 00 00 */ lfs f0, 0(r3)
|
|
/* 802D1380 002CE2E0 54 DE 10 3A */ slwi r30, r6, 2
|
|
/* 802D1384 002CE2E4 C0 3C 00 00 */ lfs f1, 0(r28)
|
|
/* 802D1388 002CE2E8 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D138C 002CE2EC D0 81 00 38 */ stfs f4, 0x38(r1)
|
|
/* 802D1390 002CE2F0 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D1394 002CE2F4 7C 9B 23 78 */ mr r27, r4
|
|
/* 802D1398 002CE2F8 D0 41 00 3C */ stfs f2, 0x3c(r1)
|
|
/* 802D139C 002CE2FC 7D 1D 43 78 */ mr r29, r8
|
|
/* 802D13A0 002CE300 38 61 00 2C */ addi r3, r1, 0x2c
|
|
/* 802D13A4 002CE304 D0 01 00 34 */ stfs f0, 0x34(r1)
|
|
/* 802D13A8 002CE308 7C 25 F4 2E */ lfsx f1, r5, r30
|
|
/* 802D13AC 002CE30C 7C 45 FC 2E */ lfsx f2, r5, r31
|
|
/* 802D13B0 002CE310 48 04 2E 51 */ bl __ct__9CVector2fFff
|
|
/* 802D13B4 002CE314 7C 3B F4 2E */ lfsx f1, r27, r30
|
|
/* 802D13B8 002CE318 38 61 00 24 */ addi r3, r1, 0x24
|
|
/* 802D13BC 002CE31C 7C 5B FC 2E */ lfsx f2, r27, r31
|
|
/* 802D13C0 002CE320 48 04 2E 41 */ bl __ct__9CVector2fFff
|
|
/* 802D13C4 002CE324 38 61 00 24 */ addi r3, r1, 0x24
|
|
/* 802D13C8 002CE328 48 04 2D 2D */ bl Magnitude__9CVector2fCFv
|
|
/* 802D13CC 002CE32C FC 40 08 18 */ frsp f2, f1
|
|
/* 802D13D0 002CE330 C0 02 C4 C8 */ lfs f0, lbl_805AE1E8@sda21(r2)
|
|
/* 802D13D4 002CE334 D0 21 00 08 */ stfs f1, 8(r1)
|
|
/* 802D13D8 002CE338 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D13DC 002CE33C 40 80 00 0C */ bge lbl_802D13E8
|
|
/* 802D13E0 002CE340 38 60 00 00 */ li r3, 0
|
|
/* 802D13E4 002CE344 48 00 00 C8 */ b lbl_802D14AC
|
|
lbl_802D13E8:
|
|
/* 802D13E8 002CE348 7C 3B F4 2E */ lfsx f1, r27, r30
|
|
/* 802D13EC 002CE34C 38 61 00 0C */ addi r3, r1, 0xc
|
|
/* 802D13F0 002CE350 7C 5B FC 2E */ lfsx f2, r27, r31
|
|
/* 802D13F4 002CE354 48 04 2E 0D */ bl __ct__9CVector2fFff
|
|
/* 802D13F8 002CE358 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D13FC 002CE35C 38 61 00 14 */ addi r3, r1, 0x14
|
|
/* 802D1400 002CE360 38 A1 00 08 */ addi r5, r1, 8
|
|
/* 802D1404 002CE364 48 04 2A 61 */ bl __dv__FRC9CVector2fRCf
|
|
/* 802D1408 002CE368 C0 21 00 14 */ lfs f1, 0x14(r1)
|
|
/* 802D140C 002CE36C 38 61 00 2C */ addi r3, r1, 0x2c
|
|
/* 802D1410 002CE370 C0 01 00 18 */ lfs f0, 0x18(r1)
|
|
/* 802D1414 002CE374 38 81 00 1C */ addi r4, r1, 0x1c
|
|
/* 802D1418 002CE378 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
/* 802D141C 002CE37C D0 01 00 20 */ stfs f0, 0x20(r1)
|
|
/* 802D1420 002CE380 48 04 2B 89 */ bl Dot__9CVector2fFRC9CVector2fRC9CVector2f
|
|
/* 802D1424 002CE384 FF C0 08 90 */ fmr f30, f1
|
|
/* 802D1428 002CE388 38 61 00 2C */ addi r3, r1, 0x2c
|
|
/* 802D142C 002CE38C 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D1430 002CE390 EF BE 07 B2 */ fmuls f29, f30, f30
|
|
/* 802D1434 002CE394 48 04 2B 75 */ bl Dot__9CVector2fFRC9CVector2fRC9CVector2f
|
|
/* 802D1438 002CE398 C0 5C 00 0C */ lfs f2, 0xc(r28)
|
|
/* 802D143C 002CE39C FF E0 08 90 */ fmr f31, f1
|
|
/* 802D1440 002CE3A0 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1444 002CE3A4 EF 82 00 B2 */ fmuls f28, f2, f2
|
|
/* 802D1448 002CE3A8 FC 1E 00 40 */ fcmpo cr0, f30, f0
|
|
/* 802D144C 002CE3AC 40 80 00 14 */ bge lbl_802D1460
|
|
/* 802D1450 002CE3B0 FC 1F E0 40 */ fcmpo cr0, f31, f28
|
|
/* 802D1454 002CE3B4 40 81 00 0C */ ble lbl_802D1460
|
|
/* 802D1458 002CE3B8 38 60 00 00 */ li r3, 0
|
|
/* 802D145C 002CE3BC 48 00 00 50 */ b lbl_802D14AC
|
|
lbl_802D1460:
|
|
/* 802D1460 002CE3C0 EC 3F E8 28 */ fsubs f1, f31, f29
|
|
/* 802D1464 002CE3C4 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1468 002CE3C8 EC 3C 08 28 */ fsubs f1, f28, f1
|
|
/* 802D146C 002CE3CC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1470 002CE3D0 40 80 00 0C */ bge lbl_802D147C
|
|
/* 802D1474 002CE3D4 38 60 00 00 */ li r3, 0
|
|
/* 802D1478 002CE3D8 48 00 00 34 */ b lbl_802D14AC
|
|
lbl_802D147C:
|
|
/* 802D147C 002CE3DC 48 04 40 85 */ bl SqrtF__5CMathFf
|
|
/* 802D1480 002CE3E0 FC 1F E0 40 */ fcmpo cr0, f31, f28
|
|
/* 802D1484 002CE3E4 40 81 00 0C */ ble lbl_802D1490
|
|
/* 802D1488 002CE3E8 EC 1E 08 28 */ fsubs f0, f30, f1
|
|
/* 802D148C 002CE3EC 48 00 00 08 */ b lbl_802D1494
|
|
lbl_802D1490:
|
|
/* 802D1490 002CE3F0 EC 1E 08 2A */ fadds f0, f30, f1
|
|
lbl_802D1494:
|
|
/* 802D1494 002CE3F4 D0 1D 00 00 */ stfs f0, 0(r29)
|
|
/* 802D1498 002CE3F8 38 60 00 01 */ li r3, 1
|
|
/* 802D149C 002CE3FC C0 01 00 08 */ lfs f0, 8(r1)
|
|
/* 802D14A0 002CE400 C0 3D 00 00 */ lfs f1, 0(r29)
|
|
/* 802D14A4 002CE404 EC 01 00 24 */ fdivs f0, f1, f0
|
|
/* 802D14A8 002CE408 D0 1D 00 00 */ stfs f0, 0(r29)
|
|
lbl_802D14AC:
|
|
/* 802D14AC 002CE40C E3 E1 00 98 */ psq_l f31, 152(r1), 0, qr0
|
|
/* 802D14B0 002CE410 CB E1 00 90 */ lfd f31, 0x90(r1)
|
|
/* 802D14B4 002CE414 E3 C1 00 88 */ psq_l f30, 136(r1), 0, qr0
|
|
/* 802D14B8 002CE418 CB C1 00 80 */ lfd f30, 0x80(r1)
|
|
/* 802D14BC 002CE41C E3 A1 00 78 */ psq_l f29, 120(r1), 0, qr0
|
|
/* 802D14C0 002CE420 CB A1 00 70 */ lfd f29, 0x70(r1)
|
|
/* 802D14C4 002CE424 E3 81 00 68 */ psq_l f28, 104(r1), 0, qr0
|
|
/* 802D14C8 002CE428 CB 81 00 60 */ lfd f28, 0x60(r1)
|
|
/* 802D14CC 002CE42C BB 61 00 4C */ lmw r27, 0x4c(r1)
|
|
/* 802D14D0 002CE430 80 01 00 A4 */ lwz r0, 0xa4(r1)
|
|
/* 802D14D4 002CE434 7C 08 03 A6 */ mtlr r0
|
|
/* 802D14D8 002CE438 38 21 00 A0 */ addi r1, r1, 0xa0
|
|
/* 802D14DC 002CE43C 4E 80 00 20 */ blr
|
|
|
|
.global TriBoxOverlap__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3f
|
|
TriBoxOverlap__13CollisionUtilFRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3fRC9CVector3f:
|
|
/* 802D14E0 002CE440 94 21 FE F0 */ stwu r1, -0x110(r1)
|
|
/* 802D14E4 002CE444 DB E1 01 00 */ stfd f31, 0x100(r1)
|
|
/* 802D14E8 002CE448 F3 E1 01 08 */ psq_st f31, 264(r1), 0, qr0
|
|
/* 802D14EC 002CE44C DB C1 00 F0 */ stfd f30, 0xf0(r1)
|
|
/* 802D14F0 002CE450 F3 C1 00 F8 */ psq_st f30, 248(r1), 0, qr0
|
|
/* 802D14F4 002CE454 DB A1 00 E0 */ stfd f29, 0xe0(r1)
|
|
/* 802D14F8 002CE458 F3 A1 00 E8 */ psq_st f29, 232(r1), 0, qr0
|
|
/* 802D14FC 002CE45C DB 81 00 D0 */ stfd f28, 0xd0(r1)
|
|
/* 802D1500 002CE460 F3 81 00 D8 */ psq_st f28, 216(r1), 0, qr0
|
|
/* 802D1504 002CE464 DB 61 00 C0 */ stfd f27, 0xc0(r1)
|
|
/* 802D1508 002CE468 F3 61 00 C8 */ psq_st f27, 200(r1), 0, qr0
|
|
/* 802D150C 002CE46C DB 41 00 B0 */ stfd f26, 0xb0(r1)
|
|
/* 802D1510 002CE470 F3 41 00 B8 */ psq_st f26, 184(r1), 0, qr0
|
|
/* 802D1514 002CE474 DB 21 00 A0 */ stfd f25, 0xa0(r1)
|
|
/* 802D1518 002CE478 F3 21 00 A8 */ psq_st f25, 168(r1), 0, qr0
|
|
/* 802D151C 002CE47C DB 01 00 90 */ stfd f24, 0x90(r1)
|
|
/* 802D1520 002CE480 F3 01 00 98 */ psq_st f24, 152(r1), 0, qr0
|
|
/* 802D1524 002CE484 DA E1 00 80 */ stfd f23, 0x80(r1)
|
|
/* 802D1528 002CE488 F2 E1 00 88 */ psq_st f23, 136(r1), 0, qr0
|
|
/* 802D152C 002CE48C DA C1 00 70 */ stfd f22, 0x70(r1)
|
|
/* 802D1530 002CE490 F2 C1 00 78 */ psq_st f22, 120(r1), 0, qr0
|
|
/* 802D1534 002CE494 DA A1 00 60 */ stfd f21, 0x60(r1)
|
|
/* 802D1538 002CE498 F2 A1 00 68 */ psq_st f21, 104(r1), 0, qr0
|
|
/* 802D153C 002CE49C DA 81 00 50 */ stfd f20, 0x50(r1)
|
|
/* 802D1540 002CE4A0 F2 81 00 58 */ psq_st f20, 88(r1), 0, qr0
|
|
/* 802D1544 002CE4A4 DA 61 00 40 */ stfd f19, 0x40(r1)
|
|
/* 802D1548 002CE4A8 F2 61 00 48 */ psq_st f19, 72(r1), 0, qr0
|
|
/* 802D154C 002CE4AC DA 41 00 30 */ stfd f18, 0x30(r1)
|
|
/* 802D1550 002CE4B0 F2 41 00 38 */ psq_st f18, 56(r1), 0, qr0
|
|
/* 802D1554 002CE4B4 C0 25 00 04 */ lfs f1, 4(r5)
|
|
/* 802D1558 002CE4B8 C0 A3 00 04 */ lfs f5, 4(r3)
|
|
/* 802D155C 002CE4BC C0 06 00 04 */ lfs f0, 4(r6)
|
|
/* 802D1560 002CE4C0 EC 61 28 28 */ fsubs f3, f1, f5
|
|
/* 802D1564 002CE4C4 C0 45 00 00 */ lfs f2, 0(r5)
|
|
/* 802D1568 002CE4C8 EC C0 28 28 */ fsubs f6, f0, f5
|
|
/* 802D156C 002CE4CC C1 03 00 00 */ lfs f8, 0(r3)
|
|
/* 802D1570 002CE4D0 C0 26 00 00 */ lfs f1, 0(r6)
|
|
/* 802D1574 002CE4D4 C0 07 00 04 */ lfs f0, 4(r7)
|
|
/* 802D1578 002CE4D8 ED 86 18 28 */ fsubs f12, f6, f3
|
|
/* 802D157C 002CE4DC C0 85 00 08 */ lfs f4, 8(r5)
|
|
/* 802D1580 002CE4E0 ED 20 28 28 */ fsubs f9, f0, f5
|
|
/* 802D1584 002CE4E4 C1 63 00 08 */ lfs f11, 8(r3)
|
|
/* 802D1588 002CE4E8 C0 E6 00 08 */ lfs f7, 8(r6)
|
|
/* 802D158C 002CE4EC EC 42 40 28 */ fsubs f2, f2, f8
|
|
/* 802D1590 002CE4F0 C0 07 00 08 */ lfs f0, 8(r7)
|
|
/* 802D1594 002CE4F4 EC 84 58 28 */ fsubs f4, f4, f11
|
|
/* 802D1598 002CE4F8 EC A1 40 28 */ fsubs f5, f1, f8
|
|
/* 802D159C 002CE4FC C0 27 00 00 */ lfs f1, 0(r7)
|
|
/* 802D15A0 002CE500 ED 40 58 28 */ fsubs f10, f0, f11
|
|
/* 802D15A4 002CE504 EC E7 58 28 */ fsubs f7, f7, f11
|
|
/* 802D15A8 002CE508 ED 01 40 28 */ fsubs f8, f1, f8
|
|
/* 802D15AC 002CE50C ED 65 10 28 */ fsubs f11, f5, f2
|
|
/* 802D15B0 002CE510 ED A7 20 28 */ fsubs f13, f7, f4
|
|
/* 802D15B4 002CE514 EC 2C 01 32 */ fmuls f1, f12, f4
|
|
/* 802D15B8 002CE518 EC 0C 02 B2 */ fmuls f0, f12, f10
|
|
/* 802D15BC 002CE51C FE E0 5A 10 */ fabs f23, f11
|
|
/* 802D15C0 002CE520 FF 20 62 10 */ fabs f25, f12
|
|
/* 802D15C4 002CE524 FE C0 6A 10 */ fabs f22, f13
|
|
/* 802D15C8 002CE528 EC 2D 08 F8 */ fmsubs f1, f13, f3, f1
|
|
/* 802D15CC 002CE52C EC 0D 02 78 */ fmsubs f0, f13, f9, f0
|
|
/* 802D15D0 002CE530 EF E8 28 28 */ fsubs f31, f8, f5
|
|
/* 802D15D4 002CE534 EF C9 30 28 */ fsubs f30, f9, f6
|
|
/* 802D15D8 002CE538 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D15DC 002CE53C EF AA 38 28 */ fsubs f29, f10, f7
|
|
/* 802D15E0 002CE540 EF 82 40 28 */ fsubs f28, f2, f8
|
|
/* 802D15E4 002CE544 EF 63 48 28 */ fsubs f27, f3, f9
|
|
/* 802D15E8 002CE548 EF 44 50 28 */ fsubs f26, f4, f10
|
|
/* 802D15EC 002CE54C FF 00 B8 18 */ frsp f24, f23
|
|
/* 802D15F0 002CE550 FF 20 C8 18 */ frsp f25, f25
|
|
/* 802D15F4 002CE554 FE C0 B0 18 */ frsp f22, f22
|
|
/* 802D15F8 002CE558 40 80 00 10 */ bge lbl_802D1608
|
|
/* 802D15FC 002CE55C FE 40 08 90 */ fmr f18, f1
|
|
/* 802D1600 002CE560 FE 60 00 90 */ fmr f19, f0
|
|
/* 802D1604 002CE564 48 00 00 0C */ b lbl_802D1610
|
|
lbl_802D1608:
|
|
/* 802D1608 002CE568 FE 40 00 90 */ fmr f18, f0
|
|
/* 802D160C 002CE56C FE 60 08 90 */ fmr f19, f1
|
|
lbl_802D1610:
|
|
/* 802D1610 002CE570 C2 84 00 08 */ lfs f20, 8(r4)
|
|
/* 802D1614 002CE574 C0 04 00 04 */ lfs f0, 4(r4)
|
|
/* 802D1618 002CE578 EC 39 05 32 */ fmuls f1, f25, f20
|
|
/* 802D161C 002CE57C EC 36 08 3A */ fmadds f1, f22, f0, f1
|
|
/* 802D1620 002CE580 FC 12 08 40 */ fcmpo cr0, f18, f1
|
|
/* 802D1624 002CE584 41 81 00 10 */ bgt lbl_802D1634
|
|
/* 802D1628 002CE588 FC 20 08 50 */ fneg f1, f1
|
|
/* 802D162C 002CE58C FC 13 08 40 */ fcmpo cr0, f19, f1
|
|
/* 802D1630 002CE590 40 80 00 0C */ bge lbl_802D163C
|
|
lbl_802D1634:
|
|
/* 802D1634 002CE594 38 60 00 00 */ li r3, 0
|
|
/* 802D1638 002CE598 48 00 04 F8 */ b lbl_802D1B30
|
|
lbl_802D163C:
|
|
/* 802D163C 002CE59C FE A0 68 50 */ fneg f21, f13
|
|
/* 802D1640 002CE5A0 EE EB 01 32 */ fmuls f23, f11, f4
|
|
/* 802D1644 002CE5A4 EC 2B 02 B2 */ fmuls f1, f11, f10
|
|
/* 802D1648 002CE5A8 EE F5 B8 BA */ fmadds f23, f21, f2, f23
|
|
/* 802D164C 002CE5AC EE 55 0A 3A */ fmadds f18, f21, f8, f1
|
|
/* 802D1650 002CE5B0 FC 17 90 40 */ fcmpo cr0, f23, f18
|
|
/* 802D1654 002CE5B4 40 80 00 0C */ bge lbl_802D1660
|
|
/* 802D1658 002CE5B8 FE 60 B8 90 */ fmr f19, f23
|
|
/* 802D165C 002CE5BC 48 00 00 0C */ b lbl_802D1668
|
|
lbl_802D1660:
|
|
/* 802D1660 002CE5C0 FE 60 90 90 */ fmr f19, f18
|
|
/* 802D1664 002CE5C4 FE 40 B8 90 */ fmr f18, f23
|
|
lbl_802D1668:
|
|
/* 802D1668 002CE5C8 EC 38 05 32 */ fmuls f1, f24, f20
|
|
/* 802D166C 002CE5CC C2 84 00 00 */ lfs f20, 0(r4)
|
|
/* 802D1670 002CE5D0 EC 36 0D 3A */ fmadds f1, f22, f20, f1
|
|
/* 802D1674 002CE5D4 FC 13 08 40 */ fcmpo cr0, f19, f1
|
|
/* 802D1678 002CE5D8 41 81 00 10 */ bgt lbl_802D1688
|
|
/* 802D167C 002CE5DC FC 20 08 50 */ fneg f1, f1
|
|
/* 802D1680 002CE5E0 FC 12 08 40 */ fcmpo cr0, f18, f1
|
|
/* 802D1684 002CE5E4 40 80 00 0C */ bge lbl_802D1690
|
|
lbl_802D1688:
|
|
/* 802D1688 002CE5E8 38 60 00 00 */ li r3, 0
|
|
/* 802D168C 002CE5EC 48 00 04 A4 */ b lbl_802D1B30
|
|
lbl_802D1690:
|
|
/* 802D1690 002CE5F0 EE EB 01 B2 */ fmuls f23, f11, f6
|
|
/* 802D1694 002CE5F4 EC 2B 02 72 */ fmuls f1, f11, f9
|
|
/* 802D1698 002CE5F8 EE 6C B9 78 */ fmsubs f19, f12, f5, f23
|
|
/* 802D169C 002CE5FC EE 4C 0A 38 */ fmsubs f18, f12, f8, f1
|
|
/* 802D16A0 002CE600 FC 12 98 40 */ fcmpo cr0, f18, f19
|
|
/* 802D16A4 002CE604 40 80 00 10 */ bge lbl_802D16B4
|
|
/* 802D16A8 002CE608 FC 20 90 90 */ fmr f1, f18
|
|
/* 802D16AC 002CE60C FE 40 98 90 */ fmr f18, f19
|
|
/* 802D16B0 002CE610 48 00 00 08 */ b lbl_802D16B8
|
|
lbl_802D16B4:
|
|
/* 802D16B4 002CE614 FC 20 98 90 */ fmr f1, f19
|
|
lbl_802D16B8:
|
|
/* 802D16B8 002CE618 EC 18 00 32 */ fmuls f0, f24, f0
|
|
/* 802D16BC 002CE61C EC 19 05 3A */ fmadds f0, f25, f20, f0
|
|
/* 802D16C0 002CE620 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D16C4 002CE624 41 81 00 10 */ bgt lbl_802D16D4
|
|
/* 802D16C8 002CE628 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D16CC 002CE62C FC 12 00 40 */ fcmpo cr0, f18, f0
|
|
/* 802D16D0 002CE630 40 80 00 0C */ bge lbl_802D16DC
|
|
lbl_802D16D4:
|
|
/* 802D16D4 002CE634 38 60 00 00 */ li r3, 0
|
|
/* 802D16D8 002CE638 48 00 04 58 */ b lbl_802D1B30
|
|
lbl_802D16DC:
|
|
/* 802D16DC 002CE63C EC 3E 01 32 */ fmuls f1, f30, f4
|
|
/* 802D16E0 002CE640 EC 1E 02 B2 */ fmuls f0, f30, f10
|
|
/* 802D16E4 002CE644 FE C0 FA 10 */ fabs f22, f31
|
|
/* 802D16E8 002CE648 FE E0 F2 10 */ fabs f23, f30
|
|
/* 802D16EC 002CE64C FF 00 EA 10 */ fabs f24, f29
|
|
/* 802D16F0 002CE650 EC 3D 08 F8 */ fmsubs f1, f29, f3, f1
|
|
/* 802D16F4 002CE654 EE 5D 02 78 */ fmsubs f18, f29, f9, f0
|
|
/* 802D16F8 002CE658 FE C0 B0 18 */ frsp f22, f22
|
|
/* 802D16FC 002CE65C FC 00 B8 18 */ frsp f0, f23
|
|
/* 802D1700 002CE660 FC 01 90 40 */ fcmpo cr0, f1, f18
|
|
/* 802D1704 002CE664 FF 20 C0 18 */ frsp f25, f24
|
|
/* 802D1708 002CE668 40 80 00 0C */ bge lbl_802D1714
|
|
/* 802D170C 002CE66C FE 60 08 90 */ fmr f19, f1
|
|
/* 802D1710 002CE670 48 00 00 0C */ b lbl_802D171C
|
|
lbl_802D1714:
|
|
/* 802D1714 002CE674 FE 60 90 90 */ fmr f19, f18
|
|
/* 802D1718 002CE678 FE 40 08 90 */ fmr f18, f1
|
|
lbl_802D171C:
|
|
/* 802D171C 002CE67C C2 A4 00 08 */ lfs f21, 8(r4)
|
|
/* 802D1720 002CE680 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D1724 002CE684 EE E0 05 72 */ fmuls f23, f0, f21
|
|
/* 802D1728 002CE688 EE 99 B8 7A */ fmadds f20, f25, f1, f23
|
|
/* 802D172C 002CE68C FC 13 A0 40 */ fcmpo cr0, f19, f20
|
|
/* 802D1730 002CE690 41 81 00 10 */ bgt lbl_802D1740
|
|
/* 802D1734 002CE694 FE E0 A0 50 */ fneg f23, f20
|
|
/* 802D1738 002CE698 FC 12 B8 40 */ fcmpo cr0, f18, f23
|
|
/* 802D173C 002CE69C 40 80 00 0C */ bge lbl_802D1748
|
|
lbl_802D1740:
|
|
/* 802D1740 002CE6A0 38 60 00 00 */ li r3, 0
|
|
/* 802D1744 002CE6A4 48 00 03 EC */ b lbl_802D1B30
|
|
lbl_802D1748:
|
|
/* 802D1748 002CE6A8 FE 80 E8 50 */ fneg f20, f29
|
|
/* 802D174C 002CE6AC EF 1F 01 32 */ fmuls f24, f31, f4
|
|
/* 802D1750 002CE6B0 EE FF 02 B2 */ fmuls f23, f31, f10
|
|
/* 802D1754 002CE6B4 EF 14 C0 BA */ fmadds f24, f20, f2, f24
|
|
/* 802D1758 002CE6B8 EE 54 BA 3A */ fmadds f18, f20, f8, f23
|
|
/* 802D175C 002CE6BC FC 18 90 40 */ fcmpo cr0, f24, f18
|
|
/* 802D1760 002CE6C0 40 80 00 0C */ bge lbl_802D176C
|
|
/* 802D1764 002CE6C4 FE 60 C0 90 */ fmr f19, f24
|
|
/* 802D1768 002CE6C8 48 00 00 0C */ b lbl_802D1774
|
|
lbl_802D176C:
|
|
/* 802D176C 002CE6CC FE 60 90 90 */ fmr f19, f18
|
|
/* 802D1770 002CE6D0 FE 40 C0 90 */ fmr f18, f24
|
|
lbl_802D1774:
|
|
/* 802D1774 002CE6D4 EE F6 05 72 */ fmuls f23, f22, f21
|
|
/* 802D1778 002CE6D8 C2 84 00 00 */ lfs f20, 0(r4)
|
|
/* 802D177C 002CE6DC EE B9 BD 3A */ fmadds f21, f25, f20, f23
|
|
/* 802D1780 002CE6E0 FC 13 A8 40 */ fcmpo cr0, f19, f21
|
|
/* 802D1784 002CE6E4 41 81 00 10 */ bgt lbl_802D1794
|
|
/* 802D1788 002CE6E8 FE E0 A8 50 */ fneg f23, f21
|
|
/* 802D178C 002CE6EC FC 12 B8 40 */ fcmpo cr0, f18, f23
|
|
/* 802D1790 002CE6F0 40 80 00 0C */ bge lbl_802D179C
|
|
lbl_802D1794:
|
|
/* 802D1794 002CE6F4 38 60 00 00 */ li r3, 0
|
|
/* 802D1798 002CE6F8 48 00 03 98 */ b lbl_802D1B30
|
|
lbl_802D179C:
|
|
/* 802D179C 002CE6FC EF 1F 00 F2 */ fmuls f24, f31, f3
|
|
/* 802D17A0 002CE700 EE FF 01 B2 */ fmuls f23, f31, f6
|
|
/* 802D17A4 002CE704 EE BE C0 B8 */ fmsubs f21, f30, f2, f24
|
|
/* 802D17A8 002CE708 EE 5E B9 78 */ fmsubs f18, f30, f5, f23
|
|
/* 802D17AC 002CE70C FC 15 90 40 */ fcmpo cr0, f21, f18
|
|
/* 802D17B0 002CE710 40 80 00 0C */ bge lbl_802D17BC
|
|
/* 802D17B4 002CE714 FE E0 A8 90 */ fmr f23, f21
|
|
/* 802D17B8 002CE718 48 00 00 0C */ b lbl_802D17C4
|
|
lbl_802D17BC:
|
|
/* 802D17BC 002CE71C FE E0 90 90 */ fmr f23, f18
|
|
/* 802D17C0 002CE720 FE 40 A8 90 */ fmr f18, f21
|
|
lbl_802D17C4:
|
|
/* 802D17C4 002CE724 EC 36 00 72 */ fmuls f1, f22, f1
|
|
/* 802D17C8 002CE728 EC 00 0D 3A */ fmadds f0, f0, f20, f1
|
|
/* 802D17CC 002CE72C FC 17 00 40 */ fcmpo cr0, f23, f0
|
|
/* 802D17D0 002CE730 41 81 00 10 */ bgt lbl_802D17E0
|
|
/* 802D17D4 002CE734 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D17D8 002CE738 FC 12 00 40 */ fcmpo cr0, f18, f0
|
|
/* 802D17DC 002CE73C 40 80 00 0C */ bge lbl_802D17E8
|
|
lbl_802D17E0:
|
|
/* 802D17E0 002CE740 38 60 00 00 */ li r3, 0
|
|
/* 802D17E4 002CE744 48 00 03 4C */ b lbl_802D1B30
|
|
lbl_802D17E8:
|
|
/* 802D17E8 002CE748 EC 3B 01 32 */ fmuls f1, f27, f4
|
|
/* 802D17EC 002CE74C EC 1B 01 F2 */ fmuls f0, f27, f7
|
|
/* 802D17F0 002CE750 FE C0 E2 10 */ fabs f22, f28
|
|
/* 802D17F4 002CE754 FE E0 DA 10 */ fabs f23, f27
|
|
/* 802D17F8 002CE758 FF 00 D2 10 */ fabs f24, f26
|
|
/* 802D17FC 002CE75C EE 9A 08 F8 */ fmsubs f20, f26, f3, f1
|
|
/* 802D1800 002CE760 EE 7A 01 B8 */ fmsubs f19, f26, f6, f0
|
|
/* 802D1804 002CE764 FC 00 B0 18 */ frsp f0, f22
|
|
/* 802D1808 002CE768 FC 20 B8 18 */ frsp f1, f23
|
|
/* 802D180C 002CE76C FC 14 98 40 */ fcmpo cr0, f20, f19
|
|
/* 802D1810 002CE770 FE C0 C0 18 */ frsp f22, f24
|
|
/* 802D1814 002CE774 40 80 00 0C */ bge lbl_802D1820
|
|
/* 802D1818 002CE778 FE A0 A0 90 */ fmr f21, f20
|
|
/* 802D181C 002CE77C 48 00 00 0C */ b lbl_802D1828
|
|
lbl_802D1820:
|
|
/* 802D1820 002CE780 FE A0 98 90 */ fmr f21, f19
|
|
/* 802D1824 002CE784 FE 60 A0 90 */ fmr f19, f20
|
|
lbl_802D1828:
|
|
/* 802D1828 002CE788 C3 24 00 08 */ lfs f25, 8(r4)
|
|
/* 802D182C 002CE78C C3 04 00 04 */ lfs f24, 4(r4)
|
|
/* 802D1830 002CE790 EE E1 06 72 */ fmuls f23, f1, f25
|
|
/* 802D1834 002CE794 EE 56 BE 3A */ fmadds f18, f22, f24, f23
|
|
/* 802D1838 002CE798 FC 15 90 40 */ fcmpo cr0, f21, f18
|
|
/* 802D183C 002CE79C 41 81 00 10 */ bgt lbl_802D184C
|
|
/* 802D1840 002CE7A0 FE E0 90 50 */ fneg f23, f18
|
|
/* 802D1844 002CE7A4 FC 13 B8 40 */ fcmpo cr0, f19, f23
|
|
/* 802D1848 002CE7A8 40 80 00 0C */ bge lbl_802D1854
|
|
lbl_802D184C:
|
|
/* 802D184C 002CE7AC 38 60 00 00 */ li r3, 0
|
|
/* 802D1850 002CE7B0 48 00 02 E0 */ b lbl_802D1B30
|
|
lbl_802D1854:
|
|
/* 802D1854 002CE7B4 FE 80 D0 50 */ fneg f20, f26
|
|
/* 802D1858 002CE7B8 EF 5C 01 32 */ fmuls f26, f28, f4
|
|
/* 802D185C 002CE7BC EE FC 01 F2 */ fmuls f23, f28, f7
|
|
/* 802D1860 002CE7C0 EE B4 D0 BA */ fmadds f21, f20, f2, f26
|
|
/* 802D1864 002CE7C4 EE 74 B9 7A */ fmadds f19, f20, f5, f23
|
|
/* 802D1868 002CE7C8 FC 15 98 40 */ fcmpo cr0, f21, f19
|
|
/* 802D186C 002CE7CC 40 80 00 0C */ bge lbl_802D1878
|
|
/* 802D1870 002CE7D0 FF 40 A8 90 */ fmr f26, f21
|
|
/* 802D1874 002CE7D4 48 00 00 0C */ b lbl_802D1880
|
|
lbl_802D1878:
|
|
/* 802D1878 002CE7D8 FF 40 98 90 */ fmr f26, f19
|
|
/* 802D187C 002CE7DC FE 60 A8 90 */ fmr f19, f21
|
|
lbl_802D1880:
|
|
/* 802D1880 002CE7E0 EE E0 06 72 */ fmuls f23, f0, f25
|
|
/* 802D1884 002CE7E4 C2 84 00 00 */ lfs f20, 0(r4)
|
|
/* 802D1888 002CE7E8 EE 56 BD 3A */ fmadds f18, f22, f20, f23
|
|
/* 802D188C 002CE7EC FC 1A 90 40 */ fcmpo cr0, f26, f18
|
|
/* 802D1890 002CE7F0 41 81 00 10 */ bgt lbl_802D18A0
|
|
/* 802D1894 002CE7F4 FE E0 90 50 */ fneg f23, f18
|
|
/* 802D1898 002CE7F8 FC 13 B8 40 */ fcmpo cr0, f19, f23
|
|
/* 802D189C 002CE7FC 40 80 00 0C */ bge lbl_802D18A8
|
|
lbl_802D18A0:
|
|
/* 802D18A0 002CE800 38 60 00 00 */ li r3, 0
|
|
/* 802D18A4 002CE804 48 00 02 8C */ b lbl_802D1B30
|
|
lbl_802D18A8:
|
|
/* 802D18A8 002CE808 EE FC 01 B2 */ fmuls f23, f28, f6
|
|
/* 802D18AC 002CE80C EF 5C 02 72 */ fmuls f26, f28, f9
|
|
/* 802D18B0 002CE810 EE 5B B9 78 */ fmsubs f18, f27, f5, f23
|
|
/* 802D18B4 002CE814 EE BB D2 38 */ fmsubs f21, f27, f8, f26
|
|
/* 802D18B8 002CE818 FC 15 90 40 */ fcmpo cr0, f21, f18
|
|
/* 802D18BC 002CE81C 40 80 00 0C */ bge lbl_802D18C8
|
|
/* 802D18C0 002CE820 FE C0 A8 90 */ fmr f22, f21
|
|
/* 802D18C4 002CE824 48 00 00 0C */ b lbl_802D18D0
|
|
lbl_802D18C8:
|
|
/* 802D18C8 002CE828 FE C0 90 90 */ fmr f22, f18
|
|
/* 802D18CC 002CE82C FE 40 A8 90 */ fmr f18, f21
|
|
lbl_802D18D0:
|
|
/* 802D18D0 002CE830 EC 00 06 32 */ fmuls f0, f0, f24
|
|
/* 802D18D4 002CE834 EC 01 05 3A */ fmadds f0, f1, f20, f0
|
|
/* 802D18D8 002CE838 FC 16 00 40 */ fcmpo cr0, f22, f0
|
|
/* 802D18DC 002CE83C 41 81 00 10 */ bgt lbl_802D18EC
|
|
/* 802D18E0 002CE840 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D18E4 002CE844 FC 12 00 40 */ fcmpo cr0, f18, f0
|
|
/* 802D18E8 002CE848 40 80 00 0C */ bge lbl_802D18F4
|
|
lbl_802D18EC:
|
|
/* 802D18EC 002CE84C 38 60 00 00 */ li r3, 0
|
|
/* 802D18F0 002CE850 48 00 02 40 */ b lbl_802D1B30
|
|
lbl_802D18F4:
|
|
/* 802D18F4 002CE854 FC 20 10 90 */ fmr f1, f2
|
|
/* 802D18F8 002CE858 FC 00 10 90 */ fmr f0, f2
|
|
/* 802D18FC 002CE85C FC 05 10 40 */ fcmpo cr0, f5, f2
|
|
/* 802D1900 002CE860 40 80 00 08 */ bge lbl_802D1908
|
|
/* 802D1904 002CE864 FC 00 28 90 */ fmr f0, f5
|
|
lbl_802D1908:
|
|
/* 802D1908 002CE868 FC 05 10 40 */ fcmpo cr0, f5, f2
|
|
/* 802D190C 002CE86C 40 81 00 08 */ ble lbl_802D1914
|
|
/* 802D1910 002CE870 FC 20 28 90 */ fmr f1, f5
|
|
lbl_802D1914:
|
|
/* 802D1914 002CE874 FC 08 00 40 */ fcmpo cr0, f8, f0
|
|
/* 802D1918 002CE878 40 80 00 08 */ bge lbl_802D1920
|
|
/* 802D191C 002CE87C FC 00 40 90 */ fmr f0, f8
|
|
lbl_802D1920:
|
|
/* 802D1920 002CE880 FC 08 08 40 */ fcmpo cr0, f8, f1
|
|
/* 802D1924 002CE884 40 81 00 08 */ ble lbl_802D192C
|
|
/* 802D1928 002CE888 FC 20 40 90 */ fmr f1, f8
|
|
lbl_802D192C:
|
|
/* 802D192C 002CE88C FC 00 A0 40 */ fcmpo cr0, f0, f20
|
|
/* 802D1930 002CE890 41 81 00 10 */ bgt lbl_802D1940
|
|
/* 802D1934 002CE894 FC 00 A0 50 */ fneg f0, f20
|
|
/* 802D1938 002CE898 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D193C 002CE89C 40 80 00 0C */ bge lbl_802D1948
|
|
lbl_802D1940:
|
|
/* 802D1940 002CE8A0 38 60 00 00 */ li r3, 0
|
|
/* 802D1944 002CE8A4 48 00 01 EC */ b lbl_802D1B30
|
|
lbl_802D1948:
|
|
/* 802D1948 002CE8A8 FC 20 18 90 */ fmr f1, f3
|
|
/* 802D194C 002CE8AC FC 00 18 90 */ fmr f0, f3
|
|
/* 802D1950 002CE8B0 FC 06 18 40 */ fcmpo cr0, f6, f3
|
|
/* 802D1954 002CE8B4 40 80 00 08 */ bge lbl_802D195C
|
|
/* 802D1958 002CE8B8 FC 00 30 90 */ fmr f0, f6
|
|
lbl_802D195C:
|
|
/* 802D195C 002CE8BC FC 06 18 40 */ fcmpo cr0, f6, f3
|
|
/* 802D1960 002CE8C0 40 81 00 08 */ ble lbl_802D1968
|
|
/* 802D1964 002CE8C4 FC 20 30 90 */ fmr f1, f6
|
|
lbl_802D1968:
|
|
/* 802D1968 002CE8C8 FC 09 00 40 */ fcmpo cr0, f9, f0
|
|
/* 802D196C 002CE8CC 40 80 00 08 */ bge lbl_802D1974
|
|
/* 802D1970 002CE8D0 FC 00 48 90 */ fmr f0, f9
|
|
lbl_802D1974:
|
|
/* 802D1974 002CE8D4 FC 09 08 40 */ fcmpo cr0, f9, f1
|
|
/* 802D1978 002CE8D8 40 81 00 08 */ ble lbl_802D1980
|
|
/* 802D197C 002CE8DC FC 20 48 90 */ fmr f1, f9
|
|
lbl_802D1980:
|
|
/* 802D1980 002CE8E0 FC 00 C0 40 */ fcmpo cr0, f0, f24
|
|
/* 802D1984 002CE8E4 41 81 00 10 */ bgt lbl_802D1994
|
|
/* 802D1988 002CE8E8 FC 00 C0 50 */ fneg f0, f24
|
|
/* 802D198C 002CE8EC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1990 002CE8F0 40 80 00 0C */ bge lbl_802D199C
|
|
lbl_802D1994:
|
|
/* 802D1994 002CE8F4 38 60 00 00 */ li r3, 0
|
|
/* 802D1998 002CE8F8 48 00 01 98 */ b lbl_802D1B30
|
|
lbl_802D199C:
|
|
/* 802D199C 002CE8FC FC 20 20 90 */ fmr f1, f4
|
|
/* 802D19A0 002CE900 FC 00 20 90 */ fmr f0, f4
|
|
/* 802D19A4 002CE904 FC 07 20 40 */ fcmpo cr0, f7, f4
|
|
/* 802D19A8 002CE908 40 80 00 08 */ bge lbl_802D19B0
|
|
/* 802D19AC 002CE90C FC 00 38 90 */ fmr f0, f7
|
|
lbl_802D19B0:
|
|
/* 802D19B0 002CE910 FC 07 20 40 */ fcmpo cr0, f7, f4
|
|
/* 802D19B4 002CE914 40 81 00 08 */ ble lbl_802D19BC
|
|
/* 802D19B8 002CE918 FC 20 38 90 */ fmr f1, f7
|
|
lbl_802D19BC:
|
|
/* 802D19BC 002CE91C FC 0A 00 40 */ fcmpo cr0, f10, f0
|
|
/* 802D19C0 002CE920 40 80 00 08 */ bge lbl_802D19C8
|
|
/* 802D19C4 002CE924 FC 00 50 90 */ fmr f0, f10
|
|
lbl_802D19C8:
|
|
/* 802D19C8 002CE928 FC 0A 08 40 */ fcmpo cr0, f10, f1
|
|
/* 802D19CC 002CE92C 40 81 00 08 */ ble lbl_802D19D4
|
|
/* 802D19D0 002CE930 FC 20 50 90 */ fmr f1, f10
|
|
lbl_802D19D4:
|
|
/* 802D19D4 002CE934 FC 00 C8 40 */ fcmpo cr0, f0, f25
|
|
/* 802D19D8 002CE938 41 81 00 10 */ bgt lbl_802D19E8
|
|
/* 802D19DC 002CE93C FC 00 C8 50 */ fneg f0, f25
|
|
/* 802D19E0 002CE940 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D19E4 002CE944 40 80 00 0C */ bge lbl_802D19F0
|
|
lbl_802D19E8:
|
|
/* 802D19E8 002CE948 38 60 00 00 */ li r3, 0
|
|
/* 802D19EC 002CE94C 48 00 01 44 */ b lbl_802D1B30
|
|
lbl_802D19F0:
|
|
/* 802D19F0 002CE950 EC 2B 07 72 */ fmuls f1, f11, f29
|
|
/* 802D19F4 002CE954 C0 A2 C4 B8 */ lfs f5, lbl_805AE1D8@sda21(r2)
|
|
/* 802D19F8 002CE958 EC CD 07 B2 */ fmuls f6, f13, f30
|
|
/* 802D19FC 002CE95C EC 0C 07 F2 */ fmuls f0, f12, f31
|
|
/* 802D1A00 002CE960 EC ED 0F F8 */ fmsubs f7, f13, f31, f1
|
|
/* 802D1A04 002CE964 ED 0C 37 78 */ fmsubs f8, f12, f29, f6
|
|
/* 802D1A08 002CE968 EC CB 07 B8 */ fmsubs f6, f11, f30, f0
|
|
/* 802D1A0C 002CE96C EC 27 00 F2 */ fmuls f1, f7, f3
|
|
/* 802D1A10 002CE970 D0 E1 00 24 */ stfs f7, 0x24(r1)
|
|
/* 802D1A14 002CE974 FC 00 40 18 */ frsp f0, f8
|
|
/* 802D1A18 002CE978 D1 01 00 20 */ stfs f8, 0x20(r1)
|
|
/* 802D1A1C 002CE97C EC 28 08 BA */ fmadds f1, f8, f2, f1
|
|
/* 802D1A20 002CE980 FC 00 28 40 */ fcmpo cr0, f0, f5
|
|
/* 802D1A24 002CE984 D0 C1 00 28 */ stfs f6, 0x28(r1)
|
|
/* 802D1A28 002CE988 EC E6 09 3E */ fnmadds f7, f6, f4, f1
|
|
/* 802D1A2C 002CE98C 40 81 00 18 */ ble lbl_802D1A44
|
|
/* 802D1A30 002CE990 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D1A34 002CE994 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1A38 002CE998 D0 21 00 14 */ stfs f1, 0x14(r1)
|
|
/* 802D1A3C 002CE99C D0 01 00 08 */ stfs f0, 8(r1)
|
|
/* 802D1A40 002CE9A0 48 00 00 14 */ b lbl_802D1A54
|
|
lbl_802D1A44:
|
|
/* 802D1A44 002CE9A4 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D1A48 002CE9A8 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1A4C 002CE9AC D0 21 00 08 */ stfs f1, 8(r1)
|
|
/* 802D1A50 002CE9B0 D0 01 00 14 */ stfs f0, 0x14(r1)
|
|
lbl_802D1A54:
|
|
/* 802D1A54 002CE9B4 C0 01 00 24 */ lfs f0, 0x24(r1)
|
|
/* 802D1A58 002CE9B8 FC 00 28 40 */ fcmpo cr0, f0, f5
|
|
/* 802D1A5C 002CE9BC 40 81 00 18 */ ble lbl_802D1A74
|
|
/* 802D1A60 002CE9C0 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D1A64 002CE9C4 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1A68 002CE9C8 D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
/* 802D1A6C 002CE9CC D0 01 00 0C */ stfs f0, 0xc(r1)
|
|
/* 802D1A70 002CE9D0 48 00 00 14 */ b lbl_802D1A84
|
|
lbl_802D1A74:
|
|
/* 802D1A74 002CE9D4 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D1A78 002CE9D8 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1A7C 002CE9DC D0 21 00 0C */ stfs f1, 0xc(r1)
|
|
/* 802D1A80 002CE9E0 D0 01 00 18 */ stfs f0, 0x18(r1)
|
|
lbl_802D1A84:
|
|
/* 802D1A84 002CE9E4 C0 01 00 28 */ lfs f0, 0x28(r1)
|
|
/* 802D1A88 002CE9E8 FC 00 28 40 */ fcmpo cr0, f0, f5
|
|
/* 802D1A8C 002CE9EC 40 81 00 18 */ ble lbl_802D1AA4
|
|
/* 802D1A90 002CE9F0 C0 24 00 08 */ lfs f1, 8(r4)
|
|
/* 802D1A94 002CE9F4 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1A98 002CE9F8 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
/* 802D1A9C 002CE9FC D0 01 00 10 */ stfs f0, 0x10(r1)
|
|
/* 802D1AA0 002CEA00 48 00 00 14 */ b lbl_802D1AB4
|
|
lbl_802D1AA4:
|
|
/* 802D1AA4 002CEA04 C0 24 00 08 */ lfs f1, 8(r4)
|
|
/* 802D1AA8 002CEA08 FC 00 08 50 */ fneg f0, f1
|
|
/* 802D1AAC 002CEA0C D0 21 00 10 */ stfs f1, 0x10(r1)
|
|
/* 802D1AB0 002CEA10 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
|
lbl_802D1AB4:
|
|
/* 802D1AB4 002CEA14 C0 81 00 24 */ lfs f4, 0x24(r1)
|
|
/* 802D1AB8 002CEA18 C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 802D1ABC 002CEA1C C0 A1 00 20 */ lfs f5, 0x20(r1)
|
|
/* 802D1AC0 002CEA20 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D1AC4 002CEA24 C0 21 00 08 */ lfs f1, 8(r1)
|
|
/* 802D1AC8 002CEA28 C0 C1 00 28 */ lfs f6, 0x28(r1)
|
|
/* 802D1ACC 002CEA2C C0 41 00 10 */ lfs f2, 0x10(r1)
|
|
/* 802D1AD0 002CEA30 EC 05 00 7A */ fmadds f0, f5, f1, f0
|
|
/* 802D1AD4 002CEA34 C0 62 C4 B8 */ lfs f3, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1AD8 002CEA38 EC 06 00 BA */ fmadds f0, f6, f2, f0
|
|
/* 802D1ADC 002CEA3C EC 07 00 2A */ fadds f0, f7, f0
|
|
/* 802D1AE0 002CEA40 FC 00 18 40 */ fcmpo cr0, f0, f3
|
|
/* 802D1AE4 002CEA44 40 81 00 0C */ ble lbl_802D1AF0
|
|
/* 802D1AE8 002CEA48 38 60 00 00 */ li r3, 0
|
|
/* 802D1AEC 002CEA4C 48 00 00 38 */ b lbl_802D1B24
|
|
lbl_802D1AF0:
|
|
/* 802D1AF0 002CEA50 C0 01 00 18 */ lfs f0, 0x18(r1)
|
|
/* 802D1AF4 002CEA54 C0 21 00 14 */ lfs f1, 0x14(r1)
|
|
/* 802D1AF8 002CEA58 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D1AFC 002CEA5C C0 41 00 1C */ lfs f2, 0x1c(r1)
|
|
/* 802D1B00 002CEA60 EC 05 00 7A */ fmadds f0, f5, f1, f0
|
|
/* 802D1B04 002CEA64 EC 06 00 BA */ fmadds f0, f6, f2, f0
|
|
/* 802D1B08 002CEA68 EC 07 00 2A */ fadds f0, f7, f0
|
|
/* 802D1B0C 002CEA6C FC 00 18 40 */ fcmpo cr0, f0, f3
|
|
/* 802D1B10 002CEA70 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D1B14 002CEA74 40 82 00 0C */ bne lbl_802D1B20
|
|
/* 802D1B18 002CEA78 38 60 00 01 */ li r3, 1
|
|
/* 802D1B1C 002CEA7C 48 00 00 08 */ b lbl_802D1B24
|
|
lbl_802D1B20:
|
|
/* 802D1B20 002CEA80 38 60 00 00 */ li r3, 0
|
|
lbl_802D1B24:
|
|
/* 802D1B24 002CEA84 7C 03 00 D0 */ neg r0, r3
|
|
/* 802D1B28 002CEA88 7C 00 1B 78 */ or r0, r0, r3
|
|
/* 802D1B2C 002CEA8C 54 03 0F FE */ srwi r3, r0, 0x1f
|
|
lbl_802D1B30:
|
|
/* 802D1B30 002CEA90 E3 E1 01 08 */ psq_l f31, 264(r1), 0, qr0
|
|
/* 802D1B34 002CEA94 CB E1 01 00 */ lfd f31, 0x100(r1)
|
|
/* 802D1B38 002CEA98 E3 C1 00 F8 */ psq_l f30, 248(r1), 0, qr0
|
|
/* 802D1B3C 002CEA9C CB C1 00 F0 */ lfd f30, 0xf0(r1)
|
|
/* 802D1B40 002CEAA0 E3 A1 00 E8 */ psq_l f29, 232(r1), 0, qr0
|
|
/* 802D1B44 002CEAA4 CB A1 00 E0 */ lfd f29, 0xe0(r1)
|
|
/* 802D1B48 002CEAA8 E3 81 00 D8 */ psq_l f28, 216(r1), 0, qr0
|
|
/* 802D1B4C 002CEAAC CB 81 00 D0 */ lfd f28, 0xd0(r1)
|
|
/* 802D1B50 002CEAB0 E3 61 00 C8 */ psq_l f27, 200(r1), 0, qr0
|
|
/* 802D1B54 002CEAB4 CB 61 00 C0 */ lfd f27, 0xc0(r1)
|
|
/* 802D1B58 002CEAB8 E3 41 00 B8 */ psq_l f26, 184(r1), 0, qr0
|
|
/* 802D1B5C 002CEABC CB 41 00 B0 */ lfd f26, 0xb0(r1)
|
|
/* 802D1B60 002CEAC0 E3 21 00 A8 */ psq_l f25, 168(r1), 0, qr0
|
|
/* 802D1B64 002CEAC4 CB 21 00 A0 */ lfd f25, 0xa0(r1)
|
|
/* 802D1B68 002CEAC8 E3 01 00 98 */ psq_l f24, 152(r1), 0, qr0
|
|
/* 802D1B6C 002CEACC CB 01 00 90 */ lfd f24, 0x90(r1)
|
|
/* 802D1B70 002CEAD0 E2 E1 00 88 */ psq_l f23, 136(r1), 0, qr0
|
|
/* 802D1B74 002CEAD4 CA E1 00 80 */ lfd f23, 0x80(r1)
|
|
/* 802D1B78 002CEAD8 E2 C1 00 78 */ psq_l f22, 120(r1), 0, qr0
|
|
/* 802D1B7C 002CEADC CA C1 00 70 */ lfd f22, 0x70(r1)
|
|
/* 802D1B80 002CEAE0 E2 A1 00 68 */ psq_l f21, 104(r1), 0, qr0
|
|
/* 802D1B84 002CEAE4 CA A1 00 60 */ lfd f21, 0x60(r1)
|
|
/* 802D1B88 002CEAE8 E2 81 00 58 */ psq_l f20, 88(r1), 0, qr0
|
|
/* 802D1B8C 002CEAEC CA 81 00 50 */ lfd f20, 0x50(r1)
|
|
/* 802D1B90 002CEAF0 E2 61 00 48 */ psq_l f19, 72(r1), 0, qr0
|
|
/* 802D1B94 002CEAF4 CA 61 00 40 */ lfd f19, 0x40(r1)
|
|
/* 802D1B98 002CEAF8 E2 41 00 38 */ psq_l f18, 56(r1), 0, qr0
|
|
/* 802D1B9C 002CEAFC CA 41 00 30 */ lfd f18, 0x30(r1)
|
|
/* 802D1BA0 002CEB00 38 21 01 10 */ addi r1, r1, 0x110
|
|
/* 802D1BA4 002CEB04 4E 80 00 20 */ blr
|
|
|
|
.global BoxLineTest__13CollisionUtilFRC6CAABoxRC9CVector3fRC9CVector3fRfRfRiRb
|
|
BoxLineTest__13CollisionUtilFRC6CAABoxRC9CVector3fRC9CVector3fRfRfRiRb:
|
|
/* 802D1BA8 002CEB08 C0 02 C4 CC */ lfs f0, lbl_805AE1EC@sda21(r2)
|
|
/* 802D1BAC 002CEB0C 38 00 00 03 */ li r0, 3
|
|
/* 802D1BB0 002CEB10 39 43 00 0C */ addi r10, r3, 0xc
|
|
/* 802D1BB4 002CEB14 C0 42 C4 B8 */ lfs f2, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1BB8 002CEB18 D0 06 00 00 */ stfs f0, 0(r6)
|
|
/* 802D1BBC 002CEB1C 39 60 00 00 */ li r11, 0
|
|
/* 802D1BC0 002CEB20 C0 02 C4 D0 */ lfs f0, lbl_805AE1F0@sda21(r2)
|
|
/* 802D1BC4 002CEB24 D0 07 00 00 */ stfs f0, 0(r7)
|
|
/* 802D1BC8 002CEB28 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D1BCC:
|
|
/* 802D1BCC 002CEB2C C0 85 00 00 */ lfs f4, 0(r5)
|
|
/* 802D1BD0 002CEB30 FC 02 20 00 */ fcmpu cr0, f2, f4
|
|
/* 802D1BD4 002CEB34 40 82 00 28 */ bne lbl_802D1BFC
|
|
/* 802D1BD8 002CEB38 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D1BDC 002CEB3C C0 03 00 00 */ lfs f0, 0(r3)
|
|
/* 802D1BE0 002CEB40 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1BE4 002CEB44 41 80 00 10 */ blt lbl_802D1BF4
|
|
/* 802D1BE8 002CEB48 C0 0A 00 00 */ lfs f0, 0(r10)
|
|
/* 802D1BEC 002CEB4C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1BF0 002CEB50 40 81 00 90 */ ble lbl_802D1C80
|
|
lbl_802D1BF4:
|
|
/* 802D1BF4 002CEB54 38 60 00 00 */ li r3, 0
|
|
/* 802D1BF8 002CEB58 4E 80 00 20 */ blr
|
|
lbl_802D1BFC:
|
|
/* 802D1BFC 002CEB5C C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
/* 802D1C00 002CEB60 FC 04 10 40 */ fcmpo cr0, f4, f2
|
|
/* 802D1C04 002CEB64 EC A0 20 24 */ fdivs f5, f0, f4
|
|
/* 802D1C08 002CEB68 40 80 00 24 */ bge lbl_802D1C2C
|
|
/* 802D1C0C 002CEB6C C0 2A 00 00 */ lfs f1, 0(r10)
|
|
/* 802D1C10 002CEB70 C0 64 00 00 */ lfs f3, 0(r4)
|
|
/* 802D1C14 002CEB74 C0 03 00 00 */ lfs f0, 0(r3)
|
|
/* 802D1C18 002CEB78 EC 21 18 28 */ fsubs f1, f1, f3
|
|
/* 802D1C1C 002CEB7C EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D1C20 002CEB80 EC 25 00 72 */ fmuls f1, f5, f1
|
|
/* 802D1C24 002CEB84 EC 65 00 32 */ fmuls f3, f5, f0
|
|
/* 802D1C28 002CEB88 48 00 00 20 */ b lbl_802D1C48
|
|
lbl_802D1C2C:
|
|
/* 802D1C2C 002CEB8C C0 23 00 00 */ lfs f1, 0(r3)
|
|
/* 802D1C30 002CEB90 C0 64 00 00 */ lfs f3, 0(r4)
|
|
/* 802D1C34 002CEB94 C0 0A 00 00 */ lfs f0, 0(r10)
|
|
/* 802D1C38 002CEB98 EC 21 18 28 */ fsubs f1, f1, f3
|
|
/* 802D1C3C 002CEB9C EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D1C40 002CEBA0 EC 25 00 72 */ fmuls f1, f5, f1
|
|
/* 802D1C44 002CEBA4 EC 65 00 32 */ fmuls f3, f5, f0
|
|
lbl_802D1C48:
|
|
/* 802D1C48 002CEBA8 C0 06 00 00 */ lfs f0, 0(r6)
|
|
/* 802D1C4C 002CEBAC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1C50 002CEBB0 40 81 00 20 */ ble lbl_802D1C70
|
|
/* 802D1C54 002CEBB4 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1C58 002CEBB8 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1C5C 002CEBBC 7C 00 00 26 */ mfcr r0
|
|
/* 802D1C60 002CEBC0 54 00 0F FE */ srwi r0, r0, 0x1f
|
|
/* 802D1C64 002CEBC4 98 09 00 00 */ stb r0, 0(r9)
|
|
/* 802D1C68 002CEBC8 91 68 00 00 */ stw r11, 0(r8)
|
|
/* 802D1C6C 002CEBCC D0 26 00 00 */ stfs f1, 0(r6)
|
|
lbl_802D1C70:
|
|
/* 802D1C70 002CEBD0 C0 07 00 00 */ lfs f0, 0(r7)
|
|
/* 802D1C74 002CEBD4 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D1C78 002CEBD8 40 80 00 08 */ bge lbl_802D1C80
|
|
/* 802D1C7C 002CEBDC D0 67 00 00 */ stfs f3, 0(r7)
|
|
lbl_802D1C80:
|
|
/* 802D1C80 002CEBE0 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 802D1C84 002CEBE4 38 84 00 04 */ addi r4, r4, 4
|
|
/* 802D1C88 002CEBE8 38 63 00 04 */ addi r3, r3, 4
|
|
/* 802D1C8C 002CEBEC 39 4A 00 04 */ addi r10, r10, 4
|
|
/* 802D1C90 002CEBF0 39 6B 00 01 */ addi r11, r11, 1
|
|
/* 802D1C94 002CEBF4 42 00 FF 38 */ bdnz lbl_802D1BCC
|
|
/* 802D1C98 002CEBF8 C0 26 00 00 */ lfs f1, 0(r6)
|
|
/* 802D1C9C 002CEBFC C0 07 00 00 */ lfs f0, 0(r7)
|
|
/* 802D1CA0 002CEC00 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1CA4 002CEC04 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D1CA8 002CEC08 7C 00 00 26 */ mfcr r0
|
|
/* 802D1CAC 002CEC0C 54 03 1F FE */ rlwinm r3, r0, 3, 0x1f, 0x1f
|
|
/* 802D1CB0 002CEC10 4E 80 00 20 */ blr
|
|
|
|
.global AABox_AABox_Moving__13CollisionUtilFRC6CAABoxRC6CAABoxRC9CVector3fRdR9CVector3fR9CVector3f
|
|
AABox_AABox_Moving__13CollisionUtilFRC6CAABoxRC6CAABoxRC9CVector3fRdR9CVector3fR9CVector3f:
|
|
/* 802D1CB4 002CEC14 94 21 FF B0 */ stwu r1, -0x50(r1)
|
|
/* 802D1CB8 002CEC18 7C 08 02 A6 */ mflr r0
|
|
/* 802D1CBC 002CEC1C C8 22 C4 D8 */ lfd f1, lbl_805AE1F8@sda21(r2)
|
|
/* 802D1CC0 002CEC20 90 01 00 54 */ stw r0, 0x54(r1)
|
|
/* 802D1CC4 002CEC24 FC 40 08 90 */ fmr f2, f1
|
|
/* 802D1CC8 002CEC28 BF 41 00 38 */ stmw r26, 0x38(r1)
|
|
/* 802D1CCC 002CEC2C 7C 7A 1B 78 */ mr r26, r3
|
|
/* 802D1CD0 002CEC30 FC 60 08 90 */ fmr f3, f1
|
|
/* 802D1CD4 002CEC34 7C 9B 23 78 */ mr r27, r4
|
|
/* 802D1CD8 002CEC38 7C BC 2B 78 */ mr r28, r5
|
|
/* 802D1CDC 002CEC3C 7C DD 33 78 */ mr r29, r6
|
|
/* 802D1CE0 002CEC40 7C FE 3B 78 */ mr r30, r7
|
|
/* 802D1CE4 002CEC44 7D 1F 43 78 */ mr r31, r8
|
|
/* 802D1CE8 002CEC48 38 61 00 20 */ addi r3, r1, 0x20
|
|
/* 802D1CEC 002CEC4C 48 04 28 B5 */ bl __ct__9CVector3dFddd
|
|
/* 802D1CF0 002CEC50 C8 22 C4 E0 */ lfd f1, lbl_805AE200@sda21(r2)
|
|
/* 802D1CF4 002CEC54 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D1CF8 002CEC58 FC 40 08 90 */ fmr f2, f1
|
|
/* 802D1CFC 002CEC5C FC 60 08 90 */ fmr f3, f1
|
|
/* 802D1D00 002CEC60 48 04 28 A1 */ bl __ct__9CVector3dFddd
|
|
/* 802D1D04 002CEC64 38 00 00 03 */ li r0, 3
|
|
/* 802D1D08 002CEC68 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D1D0C 002CEC6C 7F 65 DB 78 */ mr r5, r27
|
|
/* 802D1D10 002CEC70 7F 46 D3 78 */ mr r6, r26
|
|
/* 802D1D14 002CEC74 39 01 00 20 */ addi r8, r1, 0x20
|
|
/* 802D1D18 002CEC78 39 21 00 08 */ addi r9, r1, 8
|
|
/* 802D1D1C 002CEC7C C0 22 C4 C8 */ lfs f1, lbl_805AE1E8@sda21(r2)
|
|
/* 802D1D20 002CEC80 38 E0 00 00 */ li r7, 0
|
|
/* 802D1D24 002CEC84 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D1D28:
|
|
/* 802D1D28 002CEC88 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D1D2C 002CEC8C FC 00 12 10 */ fabs f0, f2
|
|
/* 802D1D30 002CEC90 FC 00 00 18 */ frsp f0, f0
|
|
/* 802D1D34 002CEC94 FC 00 08 40 */ fcmpo cr0, f0, f1
|
|
/* 802D1D38 002CEC98 40 80 00 74 */ bge lbl_802D1DAC
|
|
/* 802D1D3C 002CEC9C C0 46 00 00 */ lfs f2, 0(r6)
|
|
/* 802D1D40 002CECA0 C0 65 00 00 */ lfs f3, 0(r5)
|
|
/* 802D1D44 002CECA4 FC 02 18 40 */ fcmpo cr0, f2, f3
|
|
/* 802D1D48 002CECA8 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D1D4C 002CECAC 40 82 00 18 */ bne lbl_802D1D64
|
|
/* 802D1D50 002CECB0 7C 7B 3A 14 */ add r3, r27, r7
|
|
/* 802D1D54 002CECB4 C0 03 00 0C */ lfs f0, 0xc(r3)
|
|
/* 802D1D58 002CECB8 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D1D5C 002CECBC 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D1D60 002CECC0 41 82 01 AC */ beq lbl_802D1F0C
|
|
lbl_802D1D64:
|
|
/* 802D1D64 002CECC4 7C 7A 3A 14 */ add r3, r26, r7
|
|
/* 802D1D68 002CECC8 C0 83 00 0C */ lfs f4, 0xc(r3)
|
|
/* 802D1D6C 002CECCC FC 04 18 40 */ fcmpo cr0, f4, f3
|
|
/* 802D1D70 002CECD0 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D1D74 002CECD4 40 82 00 18 */ bne lbl_802D1D8C
|
|
/* 802D1D78 002CECD8 7C 7B 3A 14 */ add r3, r27, r7
|
|
/* 802D1D7C 002CECDC C0 03 00 0C */ lfs f0, 0xc(r3)
|
|
/* 802D1D80 002CECE0 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1D84 002CECE4 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D1D88 002CECE8 41 82 01 84 */ beq lbl_802D1F0C
|
|
lbl_802D1D8C:
|
|
/* 802D1D8C 002CECEC FC 02 18 40 */ fcmpo cr0, f2, f3
|
|
/* 802D1D90 002CECF0 40 80 00 14 */ bge lbl_802D1DA4
|
|
/* 802D1D94 002CECF4 7C 7B 3A 14 */ add r3, r27, r7
|
|
/* 802D1D98 002CECF8 C0 03 00 0C */ lfs f0, 0xc(r3)
|
|
/* 802D1D9C 002CECFC FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1DA0 002CED00 41 81 01 6C */ bgt lbl_802D1F0C
|
|
lbl_802D1DA4:
|
|
/* 802D1DA4 002CED04 38 60 00 00 */ li r3, 0
|
|
/* 802D1DA8 002CED08 48 00 02 F8 */ b lbl_802D20A0
|
|
lbl_802D1DAC:
|
|
/* 802D1DAC 002CED0C 7D 5A 3A 14 */ add r10, r26, r7
|
|
/* 802D1DB0 002CED10 C0 65 00 00 */ lfs f3, 0(r5)
|
|
/* 802D1DB4 002CED14 C0 AA 00 0C */ lfs f5, 0xc(r10)
|
|
/* 802D1DB8 002CED18 FC 05 18 40 */ fcmpo cr0, f5, f3
|
|
/* 802D1DBC 002CED1C 40 80 00 20 */ bge lbl_802D1DDC
|
|
/* 802D1DC0 002CED20 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1DC4 002CED24 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D1DC8 002CED28 40 81 00 14 */ ble lbl_802D1DDC
|
|
/* 802D1DCC 002CED2C EC 03 28 28 */ fsubs f0, f3, f5
|
|
/* 802D1DD0 002CED30 EC 00 10 24 */ fdivs f0, f0, f2
|
|
/* 802D1DD4 002CED34 D8 08 00 00 */ stfd f0, 0(r8)
|
|
/* 802D1DD8 002CED38 48 00 00 84 */ b lbl_802D1E5C
|
|
lbl_802D1DDC:
|
|
/* 802D1DDC 002CED3C 7C 7B 3A 14 */ add r3, r27, r7
|
|
/* 802D1DE0 002CED40 C0 46 00 00 */ lfs f2, 0(r6)
|
|
/* 802D1DE4 002CED44 C0 C3 00 0C */ lfs f6, 0xc(r3)
|
|
/* 802D1DE8 002CED48 FC 06 10 40 */ fcmpo cr0, f6, f2
|
|
/* 802D1DEC 002CED4C 40 80 00 24 */ bge lbl_802D1E10
|
|
/* 802D1DF0 002CED50 C0 84 00 00 */ lfs f4, 0(r4)
|
|
/* 802D1DF4 002CED54 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1DF8 002CED58 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1DFC 002CED5C 40 80 00 14 */ bge lbl_802D1E10
|
|
/* 802D1E00 002CED60 EC 06 10 28 */ fsubs f0, f6, f2
|
|
/* 802D1E04 002CED64 EC 00 20 24 */ fdivs f0, f0, f4
|
|
/* 802D1E08 002CED68 D8 08 00 00 */ stfd f0, 0(r8)
|
|
/* 802D1E0C 002CED6C 48 00 00 50 */ b lbl_802D1E5C
|
|
lbl_802D1E10:
|
|
/* 802D1E10 002CED70 FC 06 10 40 */ fcmpo cr0, f6, f2
|
|
/* 802D1E14 002CED74 40 81 00 24 */ ble lbl_802D1E38
|
|
/* 802D1E18 002CED78 C0 84 00 00 */ lfs f4, 0(r4)
|
|
/* 802D1E1C 002CED7C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1E20 002CED80 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1E24 002CED84 40 80 00 14 */ bge lbl_802D1E38
|
|
/* 802D1E28 002CED88 EC 06 10 28 */ fsubs f0, f6, f2
|
|
/* 802D1E2C 002CED8C EC 00 20 24 */ fdivs f0, f0, f4
|
|
/* 802D1E30 002CED90 D8 08 00 00 */ stfd f0, 0(r8)
|
|
/* 802D1E34 002CED94 48 00 00 28 */ b lbl_802D1E5C
|
|
lbl_802D1E38:
|
|
/* 802D1E38 002CED98 FC 05 18 40 */ fcmpo cr0, f5, f3
|
|
/* 802D1E3C 002CED9C 40 81 00 20 */ ble lbl_802D1E5C
|
|
/* 802D1E40 002CEDA0 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D1E44 002CEDA4 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1E48 002CEDA8 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D1E4C 002CEDAC 40 81 00 10 */ ble lbl_802D1E5C
|
|
/* 802D1E50 002CEDB0 EC 03 28 28 */ fsubs f0, f3, f5
|
|
/* 802D1E54 002CEDB4 EC 00 10 24 */ fdivs f0, f0, f2
|
|
/* 802D1E58 002CEDB8 D8 08 00 00 */ stfd f0, 0(r8)
|
|
lbl_802D1E5C:
|
|
/* 802D1E5C 002CEDBC 7C 7B 3A 14 */ add r3, r27, r7
|
|
/* 802D1E60 002CEDC0 C0 46 00 00 */ lfs f2, 0(r6)
|
|
/* 802D1E64 002CEDC4 C0 A3 00 0C */ lfs f5, 0xc(r3)
|
|
/* 802D1E68 002CEDC8 FC 05 10 40 */ fcmpo cr0, f5, f2
|
|
/* 802D1E6C 002CEDCC 40 81 00 24 */ ble lbl_802D1E90
|
|
/* 802D1E70 002CEDD0 C0 64 00 00 */ lfs f3, 0(r4)
|
|
/* 802D1E74 002CEDD4 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1E78 002CEDD8 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D1E7C 002CEDDC 40 81 00 14 */ ble lbl_802D1E90
|
|
/* 802D1E80 002CEDE0 EC 05 10 28 */ fsubs f0, f5, f2
|
|
/* 802D1E84 002CEDE4 EC 00 18 24 */ fdivs f0, f0, f3
|
|
/* 802D1E88 002CEDE8 D8 09 00 00 */ stfd f0, 0(r9)
|
|
/* 802D1E8C 002CEDEC 48 00 00 80 */ b lbl_802D1F0C
|
|
lbl_802D1E90:
|
|
/* 802D1E90 002CEDF0 C0 CA 00 0C */ lfs f6, 0xc(r10)
|
|
/* 802D1E94 002CEDF4 C0 65 00 00 */ lfs f3, 0(r5)
|
|
/* 802D1E98 002CEDF8 FC 06 18 40 */ fcmpo cr0, f6, f3
|
|
/* 802D1E9C 002CEDFC 40 81 00 24 */ ble lbl_802D1EC0
|
|
/* 802D1EA0 002CEE00 C0 84 00 00 */ lfs f4, 0(r4)
|
|
/* 802D1EA4 002CEE04 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1EA8 002CEE08 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1EAC 002CEE0C 40 80 00 14 */ bge lbl_802D1EC0
|
|
/* 802D1EB0 002CEE10 EC 03 30 28 */ fsubs f0, f3, f6
|
|
/* 802D1EB4 002CEE14 EC 00 20 24 */ fdivs f0, f0, f4
|
|
/* 802D1EB8 002CEE18 D8 09 00 00 */ stfd f0, 0(r9)
|
|
/* 802D1EBC 002CEE1C 48 00 00 50 */ b lbl_802D1F0C
|
|
lbl_802D1EC0:
|
|
/* 802D1EC0 002CEE20 FC 06 18 40 */ fcmpo cr0, f6, f3
|
|
/* 802D1EC4 002CEE24 40 80 00 24 */ bge lbl_802D1EE8
|
|
/* 802D1EC8 002CEE28 C0 84 00 00 */ lfs f4, 0(r4)
|
|
/* 802D1ECC 002CEE2C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1ED0 002CEE30 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D1ED4 002CEE34 40 80 00 14 */ bge lbl_802D1EE8
|
|
/* 802D1ED8 002CEE38 EC 03 30 28 */ fsubs f0, f3, f6
|
|
/* 802D1EDC 002CEE3C EC 00 20 24 */ fdivs f0, f0, f4
|
|
/* 802D1EE0 002CEE40 D8 09 00 00 */ stfd f0, 0(r9)
|
|
/* 802D1EE4 002CEE44 48 00 00 28 */ b lbl_802D1F0C
|
|
lbl_802D1EE8:
|
|
/* 802D1EE8 002CEE48 FC 05 10 40 */ fcmpo cr0, f5, f2
|
|
/* 802D1EEC 002CEE4C 40 80 00 20 */ bge lbl_802D1F0C
|
|
/* 802D1EF0 002CEE50 C0 64 00 00 */ lfs f3, 0(r4)
|
|
/* 802D1EF4 002CEE54 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1EF8 002CEE58 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D1EFC 002CEE5C 40 81 00 10 */ ble lbl_802D1F0C
|
|
/* 802D1F00 002CEE60 EC 05 10 28 */ fsubs f0, f5, f2
|
|
/* 802D1F04 002CEE64 EC 00 18 24 */ fdivs f0, f0, f3
|
|
/* 802D1F08 002CEE68 D8 09 00 00 */ stfd f0, 0(r9)
|
|
lbl_802D1F0C:
|
|
/* 802D1F0C 002CEE6C 38 84 00 04 */ addi r4, r4, 4
|
|
/* 802D1F10 002CEE70 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 802D1F14 002CEE74 38 C6 00 04 */ addi r6, r6, 4
|
|
/* 802D1F18 002CEE78 38 E7 00 04 */ addi r7, r7, 4
|
|
/* 802D1F1C 002CEE7C 39 08 00 08 */ addi r8, r8, 8
|
|
/* 802D1F20 002CEE80 39 29 00 08 */ addi r9, r9, 8
|
|
/* 802D1F24 002CEE84 42 00 FE 04 */ bdnz lbl_802D1D28
|
|
/* 802D1F28 002CEE88 C8 21 00 28 */ lfd f1, 0x28(r1)
|
|
/* 802D1F2C 002CEE8C 38 A0 00 00 */ li r5, 0
|
|
/* 802D1F30 002CEE90 C8 01 00 20 */ lfd f0, 0x20(r1)
|
|
/* 802D1F34 002CEE94 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1F38 002CEE98 40 81 00 08 */ ble lbl_802D1F40
|
|
/* 802D1F3C 002CEE9C 38 A0 00 01 */ li r5, 1
|
|
lbl_802D1F40:
|
|
/* 802D1F40 002CEEA0 54 A0 18 38 */ slwi r0, r5, 3
|
|
/* 802D1F44 002CEEA4 38 61 00 20 */ addi r3, r1, 0x20
|
|
/* 802D1F48 002CEEA8 C8 21 00 30 */ lfd f1, 0x30(r1)
|
|
/* 802D1F4C 002CEEAC 7C 03 04 AE */ lfdx f0, r3, r0
|
|
/* 802D1F50 002CEEB0 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1F54 002CEEB4 40 81 00 08 */ ble lbl_802D1F5C
|
|
/* 802D1F58 002CEEB8 38 A0 00 02 */ li r5, 2
|
|
lbl_802D1F5C:
|
|
/* 802D1F5C 002CEEBC C8 21 00 18 */ lfd f1, 0x18(r1)
|
|
/* 802D1F60 002CEEC0 38 61 00 18 */ addi r3, r1, 0x18
|
|
/* 802D1F64 002CEEC4 C8 01 00 10 */ lfd f0, 0x10(r1)
|
|
/* 802D1F68 002CEEC8 38 01 00 10 */ addi r0, r1, 0x10
|
|
/* 802D1F6C 002CEECC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1F70 002CEED0 40 80 00 08 */ bge lbl_802D1F78
|
|
/* 802D1F74 002CEED4 48 00 00 08 */ b lbl_802D1F7C
|
|
lbl_802D1F78:
|
|
/* 802D1F78 002CEED8 7C 03 03 78 */ mr r3, r0
|
|
lbl_802D1F7C:
|
|
/* 802D1F7C 002CEEDC C8 23 00 00 */ lfd f1, 0(r3)
|
|
/* 802D1F80 002CEEE0 C8 01 00 08 */ lfd f0, 8(r1)
|
|
/* 802D1F84 002CEEE4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1F88 002CEEE8 40 80 00 08 */ bge lbl_802D1F90
|
|
/* 802D1F8C 002CEEEC 48 00 00 08 */ b lbl_802D1F94
|
|
lbl_802D1F90:
|
|
/* 802D1F90 002CEEF0 38 61 00 08 */ addi r3, r1, 8
|
|
lbl_802D1F94:
|
|
/* 802D1F94 002CEEF4 54 A0 18 38 */ slwi r0, r5, 3
|
|
/* 802D1F98 002CEEF8 38 81 00 20 */ addi r4, r1, 0x20
|
|
/* 802D1F9C 002CEEFC 7C 24 04 AE */ lfdx f1, r4, r0
|
|
/* 802D1FA0 002CEF00 C8 03 00 00 */ lfd f0, 0(r3)
|
|
/* 802D1FA4 002CEF04 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1FA8 002CEF08 40 81 00 0C */ ble lbl_802D1FB4
|
|
/* 802D1FAC 002CEF0C 38 60 00 00 */ li r3, 0
|
|
/* 802D1FB0 002CEF10 48 00 00 F0 */ b lbl_802D20A0
|
|
lbl_802D1FB4:
|
|
/* 802D1FB4 002CEF14 D8 3D 00 00 */ stfd f1, 0(r29)
|
|
/* 802D1FB8 002CEF18 3C 60 80 5A */ lis r3, skZero3f@ha
|
|
/* 802D1FBC 002CEF1C 54 A0 10 3A */ slwi r0, r5, 2
|
|
/* 802D1FC0 002CEF20 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1FC4 002CEF24 C4 23 66 A0 */ lfsu f1, skZero3f@l(r3)
|
|
/* 802D1FC8 002CEF28 D0 3F 00 00 */ stfs f1, 0(r31)
|
|
/* 802D1FCC 002CEF2C C0 23 00 04 */ lfs f1, 4(r3)
|
|
/* 802D1FD0 002CEF30 D0 3F 00 04 */ stfs f1, 4(r31)
|
|
/* 802D1FD4 002CEF34 C0 23 00 08 */ lfs f1, 8(r3)
|
|
/* 802D1FD8 002CEF38 D0 3F 00 08 */ stfs f1, 8(r31)
|
|
/* 802D1FDC 002CEF3C 7C 3C 04 2E */ lfsx f1, r28, r0
|
|
/* 802D1FE0 002CEF40 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D1FE4 002CEF44 40 81 00 0C */ ble lbl_802D1FF0
|
|
/* 802D1FE8 002CEF48 C0 02 C4 C0 */ lfs f0, lbl_805AE1E0@sda21(r2)
|
|
/* 802D1FEC 002CEF4C 48 00 00 08 */ b lbl_802D1FF4
|
|
lbl_802D1FF0:
|
|
/* 802D1FF0 002CEF50 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
lbl_802D1FF4:
|
|
/* 802D1FF4 002CEF54 7C 1F 05 2E */ stfsx f0, r31, r0
|
|
/* 802D1FF8 002CEF58 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D1FFC 002CEF5C C0 3C 00 00 */ lfs f1, 0(r28)
|
|
/* 802D2000 002CEF60 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2004 002CEF64 40 81 00 0C */ ble lbl_802D2010
|
|
/* 802D2008 002CEF68 C0 1A 00 0C */ lfs f0, 0xc(r26)
|
|
/* 802D200C 002CEF6C 48 00 00 08 */ b lbl_802D2014
|
|
lbl_802D2010:
|
|
/* 802D2010 002CEF70 C0 1A 00 00 */ lfs f0, 0(r26)
|
|
lbl_802D2014:
|
|
/* 802D2014 002CEF74 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D2018 002CEF78 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D201C 002CEF7C C0 3C 00 04 */ lfs f1, 4(r28)
|
|
/* 802D2020 002CEF80 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2024 002CEF84 40 81 00 0C */ ble lbl_802D2030
|
|
/* 802D2028 002CEF88 C0 1A 00 10 */ lfs f0, 0x10(r26)
|
|
/* 802D202C 002CEF8C 48 00 00 08 */ b lbl_802D2034
|
|
lbl_802D2030:
|
|
/* 802D2030 002CEF90 C0 1A 00 04 */ lfs f0, 4(r26)
|
|
lbl_802D2034:
|
|
/* 802D2034 002CEF94 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D2038 002CEF98 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D203C 002CEF9C C0 3C 00 08 */ lfs f1, 8(r28)
|
|
/* 802D2040 002CEFA0 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2044 002CEFA4 40 81 00 0C */ ble lbl_802D2050
|
|
/* 802D2048 002CEFA8 C0 1A 00 14 */ lfs f0, 0x14(r26)
|
|
/* 802D204C 002CEFAC 48 00 00 08 */ b lbl_802D2054
|
|
lbl_802D2050:
|
|
/* 802D2050 002CEFB0 C0 1A 00 08 */ lfs f0, 8(r26)
|
|
lbl_802D2054:
|
|
/* 802D2054 002CEFB4 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D2058 002CEFB8 38 60 00 01 */ li r3, 1
|
|
/* 802D205C 002CEFBC C8 9D 00 00 */ lfd f4, 0(r29)
|
|
/* 802D2060 002CEFC0 C0 1C 00 00 */ lfs f0, 0(r28)
|
|
/* 802D2064 002CEFC4 FC 80 20 18 */ frsp f4, f4
|
|
/* 802D2068 002CEFC8 C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D206C 002CEFCC C0 5C 00 08 */ lfs f2, 8(r28)
|
|
/* 802D2070 002CEFD0 C0 3E 00 00 */ lfs f1, 0(r30)
|
|
/* 802D2074 002CEFD4 EC 04 00 32 */ fmuls f0, f4, f0
|
|
/* 802D2078 002CEFD8 EC 64 00 F2 */ fmuls f3, f4, f3
|
|
/* 802D207C 002CEFDC EC 44 00 B2 */ fmuls f2, f4, f2
|
|
/* 802D2080 002CEFE0 EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D2084 002CEFE4 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D2088 002CEFE8 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D208C 002CEFEC EC 00 18 2A */ fadds f0, f0, f3
|
|
/* 802D2090 002CEFF0 D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D2094 002CEFF4 C0 1E 00 08 */ lfs f0, 8(r30)
|
|
/* 802D2098 002CEFF8 EC 00 10 2A */ fadds f0, f0, f2
|
|
/* 802D209C 002CEFFC D0 1E 00 08 */ stfs f0, 8(r30)
|
|
lbl_802D20A0:
|
|
/* 802D20A0 002CF000 BB 41 00 38 */ lmw r26, 0x38(r1)
|
|
/* 802D20A4 002CF004 80 01 00 54 */ lwz r0, 0x54(r1)
|
|
/* 802D20A8 002CF008 7C 08 03 A6 */ mtlr r0
|
|
/* 802D20AC 002CF00C 38 21 00 50 */ addi r1, r1, 0x50
|
|
/* 802D20B0 002CF010 4E 80 00 20 */ blr
|
|
|
|
.global AddAverageToFront__13CollisionUtilFRC18CCollisionInfoListR18CCollisionInfoList
|
|
AddAverageToFront__13CollisionUtilFRC18CCollisionInfoListR18CCollisionInfoList:
|
|
/* 802D20B4 002CF014 94 21 FF 50 */ stwu r1, -0xb0(r1)
|
|
/* 802D20B8 002CF018 7C 08 02 A6 */ mflr r0
|
|
/* 802D20BC 002CF01C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D20C0 002CF020 90 01 00 B4 */ stw r0, 0xb4(r1)
|
|
/* 802D20C4 002CF024 93 E1 00 AC */ stw r31, 0xac(r1)
|
|
/* 802D20C8 002CF028 93 C1 00 A8 */ stw r30, 0xa8(r1)
|
|
/* 802D20CC 002CF02C 93 A1 00 A4 */ stw r29, 0xa4(r1)
|
|
/* 802D20D0 002CF030 7C 7D 1B 78 */ mr r29, r3
|
|
/* 802D20D4 002CF034 93 81 00 A0 */ stw r28, 0xa0(r1)
|
|
/* 802D20D8 002CF038 7C 9C 23 78 */ mr r28, r4
|
|
/* 802D20DC 002CF03C 83 E3 00 00 */ lwz r31, 0(r3)
|
|
/* 802D20E0 002CF040 D0 01 00 20 */ stfs f0, 0x20(r1)
|
|
/* 802D20E4 002CF044 2C 1F 00 01 */ cmpwi r31, 1
|
|
/* 802D20E8 002CF048 D0 01 00 24 */ stfs f0, 0x24(r1)
|
|
/* 802D20EC 002CF04C D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D20F0 002CF050 D0 01 00 14 */ stfs f0, 0x14(r1)
|
|
/* 802D20F4 002CF054 D0 01 00 18 */ stfs f0, 0x18(r1)
|
|
/* 802D20F8 002CF058 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
|
/* 802D20FC 002CF05C 40 81 02 00 */ ble lbl_802D22FC
|
|
/* 802D2100 002CF060 2C 1F 00 00 */ cmpwi r31, 0
|
|
/* 802D2104 002CF064 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D2108 002CF068 38 9D 00 04 */ addi r4, r29, 4
|
|
/* 802D210C 002CF06C 40 81 01 4C */ ble lbl_802D2258
|
|
/* 802D2110 002CF070 57 E0 F8 7F */ rlwinm. r0, r31, 0x1f, 1, 0x1f
|
|
/* 802D2114 002CF074 7C 09 03 A6 */ mtctr r0
|
|
/* 802D2118 002CF078 41 82 00 D4 */ beq lbl_802D21EC
|
|
lbl_802D211C:
|
|
/* 802D211C 002CF07C C0 81 00 14 */ lfs f4, 0x14(r1)
|
|
/* 802D2120 002CF080 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D2124 002CF084 C0 A1 00 18 */ lfs f5, 0x18(r1)
|
|
/* 802D2128 002CF088 ED 44 10 2A */ fadds f10, f4, f2
|
|
/* 802D212C 002CF08C C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D2130 002CF090 C0 81 00 1C */ lfs f4, 0x1c(r1)
|
|
/* 802D2134 002CF094 ED 25 08 2A */ fadds f9, f5, f1
|
|
/* 802D2138 002CF098 C0 44 00 08 */ lfs f2, 8(r4)
|
|
/* 802D213C 002CF09C C0 E1 00 20 */ lfs f7, 0x20(r1)
|
|
/* 802D2140 002CF0A0 ED 04 10 2A */ fadds f8, f4, f2
|
|
/* 802D2144 002CF0A4 C0 24 00 48 */ lfs f1, 0x48(r4)
|
|
/* 802D2148 002CF0A8 C0 A1 00 24 */ lfs f5, 0x24(r1)
|
|
/* 802D214C 002CF0AC EC C7 08 2A */ fadds f6, f7, f1
|
|
/* 802D2150 002CF0B0 C0 84 00 4C */ lfs f4, 0x4c(r4)
|
|
/* 802D2154 002CF0B4 C0 41 00 28 */ lfs f2, 0x28(r1)
|
|
/* 802D2158 002CF0B8 EC 65 20 2A */ fadds f3, f5, f4
|
|
/* 802D215C 002CF0BC C0 24 00 50 */ lfs f1, 0x50(r4)
|
|
/* 802D2160 002CF0C0 FC 80 50 18 */ frsp f4, f10
|
|
/* 802D2164 002CF0C4 EC 02 08 2A */ fadds f0, f2, f1
|
|
/* 802D2168 002CF0C8 C0 44 00 60 */ lfs f2, 0x60(r4)
|
|
/* 802D216C 002CF0CC D1 41 00 14 */ stfs f10, 0x14(r1)
|
|
/* 802D2170 002CF0D0 ED 44 10 2A */ fadds f10, f4, f2
|
|
/* 802D2174 002CF0D4 C0 24 00 64 */ lfs f1, 0x64(r4)
|
|
/* 802D2178 002CF0D8 FC A0 48 18 */ frsp f5, f9
|
|
/* 802D217C 002CF0DC D1 21 00 18 */ stfs f9, 0x18(r1)
|
|
/* 802D2180 002CF0E0 FC 80 40 18 */ frsp f4, f8
|
|
/* 802D2184 002CF0E4 FC E0 30 18 */ frsp f7, f6
|
|
/* 802D2188 002CF0E8 ED 25 08 2A */ fadds f9, f5, f1
|
|
/* 802D218C 002CF0EC C0 44 00 68 */ lfs f2, 0x68(r4)
|
|
/* 802D2190 002CF0F0 D1 01 00 1C */ stfs f8, 0x1c(r1)
|
|
/* 802D2194 002CF0F4 FC A0 18 18 */ frsp f5, f3
|
|
/* 802D2198 002CF0F8 ED 04 10 2A */ fadds f8, f4, f2
|
|
/* 802D219C 002CF0FC C0 24 00 A8 */ lfs f1, 0xa8(r4)
|
|
/* 802D21A0 002CF100 D0 C1 00 20 */ stfs f6, 0x20(r1)
|
|
/* 802D21A4 002CF104 FC 40 00 18 */ frsp f2, f0
|
|
/* 802D21A8 002CF108 EC C7 08 2A */ fadds f6, f7, f1
|
|
/* 802D21AC 002CF10C C0 84 00 AC */ lfs f4, 0xac(r4)
|
|
/* 802D21B0 002CF110 C0 24 00 B0 */ lfs f1, 0xb0(r4)
|
|
/* 802D21B4 002CF114 38 84 00 C0 */ addi r4, r4, 0xc0
|
|
/* 802D21B8 002CF118 D0 61 00 24 */ stfs f3, 0x24(r1)
|
|
/* 802D21BC 002CF11C EC 65 20 2A */ fadds f3, f5, f4
|
|
/* 802D21C0 002CF120 D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D21C4 002CF124 EC 02 08 2A */ fadds f0, f2, f1
|
|
/* 802D21C8 002CF128 D1 41 00 14 */ stfs f10, 0x14(r1)
|
|
/* 802D21CC 002CF12C D1 21 00 18 */ stfs f9, 0x18(r1)
|
|
/* 802D21D0 002CF130 D1 01 00 1C */ stfs f8, 0x1c(r1)
|
|
/* 802D21D4 002CF134 D0 C1 00 20 */ stfs f6, 0x20(r1)
|
|
/* 802D21D8 002CF138 D0 61 00 24 */ stfs f3, 0x24(r1)
|
|
/* 802D21DC 002CF13C D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D21E0 002CF140 42 00 FF 3C */ bdnz lbl_802D211C
|
|
/* 802D21E4 002CF144 70 63 00 01 */ andi. r3, r3, 1
|
|
/* 802D21E8 002CF148 41 82 00 70 */ beq lbl_802D2258
|
|
lbl_802D21EC:
|
|
/* 802D21EC 002CF14C 7C 69 03 A6 */ mtctr r3
|
|
lbl_802D21F0:
|
|
/* 802D21F0 002CF150 C0 81 00 14 */ lfs f4, 0x14(r1)
|
|
/* 802D21F4 002CF154 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D21F8 002CF158 C0 A1 00 18 */ lfs f5, 0x18(r1)
|
|
/* 802D21FC 002CF15C ED 44 10 2A */ fadds f10, f4, f2
|
|
/* 802D2200 002CF160 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D2204 002CF164 C0 81 00 1C */ lfs f4, 0x1c(r1)
|
|
/* 802D2208 002CF168 ED 25 08 2A */ fadds f9, f5, f1
|
|
/* 802D220C 002CF16C C0 44 00 08 */ lfs f2, 8(r4)
|
|
/* 802D2210 002CF170 C0 E1 00 20 */ lfs f7, 0x20(r1)
|
|
/* 802D2214 002CF174 ED 04 10 2A */ fadds f8, f4, f2
|
|
/* 802D2218 002CF178 C0 24 00 48 */ lfs f1, 0x48(r4)
|
|
/* 802D221C 002CF17C C0 A1 00 24 */ lfs f5, 0x24(r1)
|
|
/* 802D2220 002CF180 EC C7 08 2A */ fadds f6, f7, f1
|
|
/* 802D2224 002CF184 C0 84 00 4C */ lfs f4, 0x4c(r4)
|
|
/* 802D2228 002CF188 C0 24 00 50 */ lfs f1, 0x50(r4)
|
|
/* 802D222C 002CF18C C0 41 00 28 */ lfs f2, 0x28(r1)
|
|
/* 802D2230 002CF190 EC 65 20 2A */ fadds f3, f5, f4
|
|
/* 802D2234 002CF194 D1 41 00 14 */ stfs f10, 0x14(r1)
|
|
/* 802D2238 002CF198 EC 02 08 2A */ fadds f0, f2, f1
|
|
/* 802D223C 002CF19C 38 84 00 60 */ addi r4, r4, 0x60
|
|
/* 802D2240 002CF1A0 D1 21 00 18 */ stfs f9, 0x18(r1)
|
|
/* 802D2244 002CF1A4 D1 01 00 1C */ stfs f8, 0x1c(r1)
|
|
/* 802D2248 002CF1A8 D0 C1 00 20 */ stfs f6, 0x20(r1)
|
|
/* 802D224C 002CF1AC D0 61 00 24 */ stfs f3, 0x24(r1)
|
|
/* 802D2250 002CF1B0 D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D2254 002CF1B4 42 00 FF 9C */ bdnz lbl_802D21F0
|
|
lbl_802D2258:
|
|
/* 802D2258 002CF1B8 38 61 00 20 */ addi r3, r1, 0x20
|
|
/* 802D225C 002CF1BC 48 04 24 9D */ bl CanBeNormalized__9CVector3fCFv
|
|
/* 802D2260 002CF1C0 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D2264 002CF1C4 41 82 00 98 */ beq lbl_802D22FC
|
|
/* 802D2268 002CF1C8 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D226C 002CF1CC 38 81 00 20 */ addi r4, r1, 0x20
|
|
/* 802D2270 002CF1D0 48 04 25 E1 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D2274 002CF1D4 6F E3 80 00 */ xoris r3, r31, 0x8000
|
|
/* 802D2278 002CF1D8 3C 00 43 30 */ lis r0, 0x4330
|
|
/* 802D227C 002CF1DC 90 61 00 94 */ stw r3, 0x94(r1)
|
|
/* 802D2280 002CF1E0 38 61 00 30 */ addi r3, r1, 0x30
|
|
/* 802D2284 002CF1E4 C0 C1 00 08 */ lfs f6, 8(r1)
|
|
/* 802D2288 002CF1E8 38 81 00 14 */ addi r4, r1, 0x14
|
|
/* 802D228C 002CF1EC 90 01 00 90 */ stw r0, 0x90(r1)
|
|
/* 802D2290 002CF1F0 38 BD 00 44 */ addi r5, r29, 0x44
|
|
/* 802D2294 002CF1F4 C8 22 C4 E8 */ lfd f1, lbl_805AE208@sda21(r2)
|
|
/* 802D2298 002CF1F8 38 DD 00 3C */ addi r6, r29, 0x3c
|
|
/* 802D229C 002CF1FC C8 01 00 90 */ lfd f0, 0x90(r1)
|
|
/* 802D22A0 002CF200 38 E1 00 20 */ addi r7, r1, 0x20
|
|
/* 802D22A4 002CF204 C0 62 C4 BC */ lfs f3, lbl_805AE1DC@sda21(r2)
|
|
/* 802D22A8 002CF208 EC 00 08 28 */ fsubs f0, f0, f1
|
|
/* 802D22AC 002CF20C C0 A1 00 0C */ lfs f5, 0xc(r1)
|
|
/* 802D22B0 002CF210 C0 81 00 10 */ lfs f4, 0x10(r1)
|
|
/* 802D22B4 002CF214 C0 41 00 14 */ lfs f2, 0x14(r1)
|
|
/* 802D22B8 002CF218 EC 63 00 24 */ fdivs f3, f3, f0
|
|
/* 802D22BC 002CF21C C0 21 00 18 */ lfs f1, 0x18(r1)
|
|
/* 802D22C0 002CF220 C0 01 00 1C */ lfs f0, 0x1c(r1)
|
|
/* 802D22C4 002CF224 D0 C1 00 20 */ stfs f6, 0x20(r1)
|
|
/* 802D22C8 002CF228 D0 A1 00 24 */ stfs f5, 0x24(r1)
|
|
/* 802D22CC 002CF22C D0 81 00 28 */ stfs f4, 0x28(r1)
|
|
/* 802D22D0 002CF230 EC 42 00 F2 */ fmuls f2, f2, f3
|
|
/* 802D22D4 002CF234 EC 21 00 F2 */ fmuls f1, f1, f3
|
|
/* 802D22D8 002CF238 EC 00 00 F2 */ fmuls f0, f0, f3
|
|
/* 802D22DC 002CF23C D0 41 00 14 */ stfs f2, 0x14(r1)
|
|
/* 802D22E0 002CF240 D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
/* 802D22E4 002CF244 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
|
/* 802D22E8 002CF248 4B FF C1 61 */ bl __ct__14CCollisionInfoFRC9CVector3fRC13CMaterialListRC13CMaterialListRC9CVector3f
|
|
/* 802D22EC 002CF24C 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D22F0 002CF250 7F 83 E3 78 */ mr r3, r28
|
|
/* 802D22F4 002CF254 38 A0 00 00 */ li r5, 0
|
|
/* 802D22F8 002CF258 4B EB 33 29 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
lbl_802D22FC:
|
|
/* 802D22FC 002CF25C 3B DD 00 04 */ addi r30, r29, 4
|
|
/* 802D2300 002CF260 3B A0 00 00 */ li r29, 0
|
|
/* 802D2304 002CF264 48 00 00 1C */ b lbl_802D2320
|
|
lbl_802D2308:
|
|
/* 802D2308 002CF268 7F 83 E3 78 */ mr r3, r28
|
|
/* 802D230C 002CF26C 7F C4 F3 78 */ mr r4, r30
|
|
/* 802D2310 002CF270 38 A0 00 00 */ li r5, 0
|
|
/* 802D2314 002CF274 4B EB 33 0D */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
/* 802D2318 002CF278 3B DE 00 60 */ addi r30, r30, 0x60
|
|
/* 802D231C 002CF27C 3B BD 00 01 */ addi r29, r29, 1
|
|
lbl_802D2320:
|
|
/* 802D2320 002CF280 7C 1D F8 00 */ cmpw r29, r31
|
|
/* 802D2324 002CF284 41 80 FF E4 */ blt lbl_802D2308
|
|
/* 802D2328 002CF288 80 01 00 B4 */ lwz r0, 0xb4(r1)
|
|
/* 802D232C 002CF28C 83 E1 00 AC */ lwz r31, 0xac(r1)
|
|
/* 802D2330 002CF290 83 C1 00 A8 */ lwz r30, 0xa8(r1)
|
|
/* 802D2334 002CF294 83 A1 00 A4 */ lwz r29, 0xa4(r1)
|
|
/* 802D2338 002CF298 83 81 00 A0 */ lwz r28, 0xa0(r1)
|
|
/* 802D233C 002CF29C 7C 08 03 A6 */ mtlr r0
|
|
/* 802D2340 002CF2A0 38 21 00 B0 */ addi r1, r1, 0xb0
|
|
/* 802D2344 002CF2A4 4E 80 00 20 */ blr
|
|
|
|
.global FilterOutBackfaces__13CollisionUtilFRC9CVector3fRC18CCollisionInfoListR18CCollisionInfoList
|
|
FilterOutBackfaces__13CollisionUtilFRC9CVector3fRC18CCollisionInfoListR18CCollisionInfoList:
|
|
/* 802D2348 002CF2A8 94 21 FF 90 */ stwu r1, -0x70(r1)
|
|
/* 802D234C 002CF2AC 7C 08 02 A6 */ mflr r0
|
|
/* 802D2350 002CF2B0 90 01 00 74 */ stw r0, 0x74(r1)
|
|
/* 802D2354 002CF2B4 DB E1 00 60 */ stfd f31, 0x60(r1)
|
|
/* 802D2358 002CF2B8 F3 E1 00 68 */ psq_st f31, 104(r1), 0, qr0
|
|
/* 802D235C 002CF2BC DB C1 00 50 */ stfd f30, 0x50(r1)
|
|
/* 802D2360 002CF2C0 F3 C1 00 58 */ psq_st f30, 88(r1), 0, qr0
|
|
/* 802D2364 002CF2C4 DB A1 00 40 */ stfd f29, 0x40(r1)
|
|
/* 802D2368 002CF2C8 F3 A1 00 48 */ psq_st f29, 72(r1), 0, qr0
|
|
/* 802D236C 002CF2CC DB 81 00 30 */ stfd f28, 0x30(r1)
|
|
/* 802D2370 002CF2D0 F3 81 00 38 */ psq_st f28, 56(r1), 0, qr0
|
|
/* 802D2374 002CF2D4 93 E1 00 2C */ stw r31, 0x2c(r1)
|
|
/* 802D2378 002CF2D8 93 C1 00 28 */ stw r30, 0x28(r1)
|
|
/* 802D237C 002CF2DC 93 A1 00 24 */ stw r29, 0x24(r1)
|
|
/* 802D2380 002CF2E0 93 81 00 20 */ stw r28, 0x20(r1)
|
|
/* 802D2384 002CF2E4 7C 7E 1B 78 */ mr r30, r3
|
|
/* 802D2388 002CF2E8 7C 9C 23 78 */ mr r28, r4
|
|
/* 802D238C 002CF2EC 7C BD 2B 78 */ mr r29, r5
|
|
/* 802D2390 002CF2F0 48 04 23 69 */ bl CanBeNormalized__9CVector3fCFv
|
|
/* 802D2394 002CF2F4 54 60 06 3F */ clrlwi. r0, r3, 0x18
|
|
/* 802D2398 002CF2F8 41 82 00 74 */ beq lbl_802D240C
|
|
/* 802D239C 002CF2FC 7F C4 F3 78 */ mr r4, r30
|
|
/* 802D23A0 002CF300 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D23A4 002CF304 48 04 24 AD */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D23A8 002CF308 C3 C1 00 08 */ lfs f30, 8(r1)
|
|
/* 802D23AC 002CF30C 3B FC 00 04 */ addi r31, r28, 4
|
|
/* 802D23B0 002CF310 C3 A1 00 0C */ lfs f29, 0xc(r1)
|
|
/* 802D23B4 002CF314 3B C0 00 00 */ li r30, 0
|
|
/* 802D23B8 002CF318 C3 81 00 10 */ lfs f28, 0x10(r1)
|
|
/* 802D23BC 002CF31C C3 E2 C4 F0 */ lfs f31, lbl_805AE210@sda21(r2)
|
|
/* 802D23C0 002CF320 48 00 00 3C */ b lbl_802D23FC
|
|
lbl_802D23C4:
|
|
/* 802D23C4 002CF324 C0 1F 00 4C */ lfs f0, 0x4c(r31)
|
|
/* 802D23C8 002CF328 C0 3F 00 48 */ lfs f1, 0x48(r31)
|
|
/* 802D23CC 002CF32C EC 1D 00 32 */ fmuls f0, f29, f0
|
|
/* 802D23D0 002CF330 C0 5F 00 50 */ lfs f2, 0x50(r31)
|
|
/* 802D23D4 002CF334 EC 1E 00 7A */ fmadds f0, f30, f1, f0
|
|
/* 802D23D8 002CF338 EC 1C 00 BA */ fmadds f0, f28, f2, f0
|
|
/* 802D23DC 002CF33C FC 00 F8 40 */ fcmpo cr0, f0, f31
|
|
/* 802D23E0 002CF340 40 80 00 14 */ bge lbl_802D23F4
|
|
/* 802D23E4 002CF344 7F A3 EB 78 */ mr r3, r29
|
|
/* 802D23E8 002CF348 7F E4 FB 78 */ mr r4, r31
|
|
/* 802D23EC 002CF34C 38 A0 00 00 */ li r5, 0
|
|
/* 802D23F0 002CF350 4B EB 32 31 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
lbl_802D23F4:
|
|
/* 802D23F4 002CF354 3B FF 00 60 */ addi r31, r31, 0x60
|
|
/* 802D23F8 002CF358 3B DE 00 01 */ addi r30, r30, 1
|
|
lbl_802D23FC:
|
|
/* 802D23FC 002CF35C 80 1C 00 00 */ lwz r0, 0(r28)
|
|
/* 802D2400 002CF360 7C 1E 00 00 */ cmpw r30, r0
|
|
/* 802D2404 002CF364 41 80 FF C0 */ blt lbl_802D23C4
|
|
/* 802D2408 002CF368 48 00 00 10 */ b lbl_802D2418
|
|
lbl_802D240C:
|
|
/* 802D240C 002CF36C 7F A3 EB 78 */ mr r3, r29
|
|
/* 802D2410 002CF370 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D2414 002CF374 4B E1 EF 15 */ bl __as__18CCollisionInfoListFRC18CCollisionInfoList
|
|
lbl_802D2418:
|
|
/* 802D2418 002CF378 E3 E1 00 68 */ psq_l f31, 104(r1), 0, qr0
|
|
/* 802D241C 002CF37C CB E1 00 60 */ lfd f31, 0x60(r1)
|
|
/* 802D2420 002CF380 E3 C1 00 58 */ psq_l f30, 88(r1), 0, qr0
|
|
/* 802D2424 002CF384 CB C1 00 50 */ lfd f30, 0x50(r1)
|
|
/* 802D2428 002CF388 E3 A1 00 48 */ psq_l f29, 72(r1), 0, qr0
|
|
/* 802D242C 002CF38C CB A1 00 40 */ lfd f29, 0x40(r1)
|
|
/* 802D2430 002CF390 E3 81 00 38 */ psq_l f28, 56(r1), 0, qr0
|
|
/* 802D2434 002CF394 CB 81 00 30 */ lfd f28, 0x30(r1)
|
|
/* 802D2438 002CF398 83 E1 00 2C */ lwz r31, 0x2c(r1)
|
|
/* 802D243C 002CF39C 83 C1 00 28 */ lwz r30, 0x28(r1)
|
|
/* 802D2440 002CF3A0 83 A1 00 24 */ lwz r29, 0x24(r1)
|
|
/* 802D2444 002CF3A4 80 01 00 74 */ lwz r0, 0x74(r1)
|
|
/* 802D2448 002CF3A8 83 81 00 20 */ lwz r28, 0x20(r1)
|
|
/* 802D244C 002CF3AC 7C 08 03 A6 */ mtlr r0
|
|
/* 802D2450 002CF3B0 38 21 00 70 */ addi r1, r1, 0x70
|
|
/* 802D2454 002CF3B4 4E 80 00 20 */ blr
|
|
|
|
.global FilterByClosestNormal__13CollisionUtilFRC9CVector3fRC18CCollisionInfoListR18CCollisionInfoList
|
|
FilterByClosestNormal__13CollisionUtilFRC9CVector3fRC18CCollisionInfoListR18CCollisionInfoList:
|
|
/* 802D2458 002CF3B8 94 21 FF F0 */ stwu r1, -0x10(r1)
|
|
/* 802D245C 002CF3BC 7C 08 02 A6 */ mflr r0
|
|
/* 802D2460 002CF3C0 38 C4 00 04 */ addi r6, r4, 4
|
|
/* 802D2464 002CF3C4 C0 A2 C4 F4 */ lfs f5, lbl_805AE214@sda21(r2)
|
|
/* 802D2468 002CF3C8 90 01 00 14 */ stw r0, 0x14(r1)
|
|
/* 802D246C 002CF3CC 39 00 FF FF */ li r8, -1
|
|
/* 802D2470 002CF3D0 38 E0 00 00 */ li r7, 0
|
|
/* 802D2474 002CF3D4 80 04 00 00 */ lwz r0, 0(r4)
|
|
/* 802D2478 002CF3D8 7C 09 03 A6 */ mtctr r0
|
|
/* 802D247C 002CF3DC 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 802D2480 002CF3E0 40 81 00 44 */ ble lbl_802D24C4
|
|
lbl_802D2484:
|
|
/* 802D2484 002CF3E4 C0 26 00 4C */ lfs f1, 0x4c(r6)
|
|
/* 802D2488 002CF3E8 C0 03 00 04 */ lfs f0, 4(r3)
|
|
/* 802D248C 002CF3EC C0 46 00 48 */ lfs f2, 0x48(r6)
|
|
/* 802D2490 002CF3F0 EC 01 00 32 */ fmuls f0, f1, f0
|
|
/* 802D2494 002CF3F4 C0 23 00 00 */ lfs f1, 0(r3)
|
|
/* 802D2498 002CF3F8 C0 86 00 50 */ lfs f4, 0x50(r6)
|
|
/* 802D249C 002CF3FC C0 63 00 08 */ lfs f3, 8(r3)
|
|
/* 802D24A0 002CF400 EC 02 00 7A */ fmadds f0, f2, f1, f0
|
|
/* 802D24A4 002CF404 EC 04 00 FA */ fmadds f0, f4, f3, f0
|
|
/* 802D24A8 002CF408 FC 00 28 40 */ fcmpo cr0, f0, f5
|
|
/* 802D24AC 002CF40C 40 81 00 0C */ ble lbl_802D24B8
|
|
/* 802D24B0 002CF410 FC A0 00 90 */ fmr f5, f0
|
|
/* 802D24B4 002CF414 7C E8 3B 78 */ mr r8, r7
|
|
lbl_802D24B8:
|
|
/* 802D24B8 002CF418 38 C6 00 60 */ addi r6, r6, 0x60
|
|
/* 802D24BC 002CF41C 38 E7 00 01 */ addi r7, r7, 1
|
|
/* 802D24C0 002CF420 42 00 FF C4 */ bdnz lbl_802D2484
|
|
lbl_802D24C4:
|
|
/* 802D24C4 002CF424 2C 08 FF FF */ cmpwi r8, -1
|
|
/* 802D24C8 002CF428 41 82 00 1C */ beq lbl_802D24E4
|
|
/* 802D24CC 002CF42C 1C 08 00 60 */ mulli r0, r8, 0x60
|
|
/* 802D24D0 002CF430 7C A3 2B 78 */ mr r3, r5
|
|
/* 802D24D4 002CF434 38 A0 00 00 */ li r5, 0
|
|
/* 802D24D8 002CF438 7C 84 02 14 */ add r4, r4, r0
|
|
/* 802D24DC 002CF43C 38 84 00 04 */ addi r4, r4, 4
|
|
/* 802D24E0 002CF440 4B EB 31 41 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
lbl_802D24E4:
|
|
/* 802D24E4 002CF444 80 01 00 14 */ lwz r0, 0x14(r1)
|
|
/* 802D24E8 002CF448 7C 08 03 A6 */ mtlr r0
|
|
/* 802D24EC 002CF44C 38 21 00 10 */ addi r1, r1, 0x10
|
|
/* 802D24F0 002CF450 4E 80 00 20 */ blr
|
|
|
|
.global RayTriangleIntersection_Double__13CollisionUtilFRC9CVector3fRC9CVector3fPC9CVector3fRd
|
|
RayTriangleIntersection_Double__13CollisionUtilFRC9CVector3fRC9CVector3fPC9CVector3fRd:
|
|
/* 802D24F4 002CF454 94 21 FE C0 */ stwu r1, -0x140(r1)
|
|
/* 802D24F8 002CF458 7C 08 02 A6 */ mflr r0
|
|
/* 802D24FC 002CF45C 90 01 01 44 */ stw r0, 0x144(r1)
|
|
/* 802D2500 002CF460 DB E1 01 30 */ stfd f31, 0x130(r1)
|
|
/* 802D2504 002CF464 F3 E1 01 38 */ psq_st f31, 312(r1), 0, qr0
|
|
/* 802D2508 002CF468 DB C1 01 20 */ stfd f30, 0x120(r1)
|
|
/* 802D250C 002CF46C F3 C1 01 28 */ psq_st f30, 296(r1), 0, qr0
|
|
/* 802D2510 002CF470 93 E1 01 1C */ stw r31, 0x11c(r1)
|
|
/* 802D2514 002CF474 93 C1 01 18 */ stw r30, 0x118(r1)
|
|
/* 802D2518 002CF478 93 A1 01 14 */ stw r29, 0x114(r1)
|
|
/* 802D251C 002CF47C 93 81 01 10 */ stw r28, 0x110(r1)
|
|
/* 802D2520 002CF480 7C BE 2B 78 */ mr r30, r5
|
|
/* 802D2524 002CF484 7C 7C 1B 78 */ mr r28, r3
|
|
/* 802D2528 002CF488 C0 25 00 10 */ lfs f1, 0x10(r5)
|
|
/* 802D252C 002CF48C 7C 9D 23 78 */ mr r29, r4
|
|
/* 802D2530 002CF490 C0 05 00 04 */ lfs f0, 4(r5)
|
|
/* 802D2534 002CF494 7C DF 33 78 */ mr r31, r6
|
|
/* 802D2538 002CF498 C0 65 00 14 */ lfs f3, 0x14(r5)
|
|
/* 802D253C 002CF49C 38 61 00 F0 */ addi r3, r1, 0xf0
|
|
/* 802D2540 002CF4A0 C0 45 00 08 */ lfs f2, 8(r5)
|
|
/* 802D2544 002CF4A4 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D2548 002CF4A8 C0 25 00 0C */ lfs f1, 0xc(r5)
|
|
/* 802D254C 002CF4AC 38 81 00 20 */ addi r4, r1, 0x20
|
|
/* 802D2550 002CF4B0 C0 05 00 00 */ lfs f0, 0(r5)
|
|
/* 802D2554 002CF4B4 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D2558 002CF4B8 D0 81 00 24 */ stfs f4, 0x24(r1)
|
|
/* 802D255C 002CF4BC EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D2560 002CF4C0 D0 41 00 28 */ stfs f2, 0x28(r1)
|
|
/* 802D2564 002CF4C4 D0 01 00 20 */ stfs f0, 0x20(r1)
|
|
/* 802D2568 002CF4C8 48 04 20 1D */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D256C 002CF4CC C0 3E 00 1C */ lfs f1, 0x1c(r30)
|
|
/* 802D2570 002CF4D0 38 61 00 D8 */ addi r3, r1, 0xd8
|
|
/* 802D2574 002CF4D4 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D2578 002CF4D8 38 81 00 14 */ addi r4, r1, 0x14
|
|
/* 802D257C 002CF4DC C0 7E 00 20 */ lfs f3, 0x20(r30)
|
|
/* 802D2580 002CF4E0 C0 5E 00 08 */ lfs f2, 8(r30)
|
|
/* 802D2584 002CF4E4 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D2588 002CF4E8 C0 3E 00 18 */ lfs f1, 0x18(r30)
|
|
/* 802D258C 002CF4EC C0 1E 00 00 */ lfs f0, 0(r30)
|
|
/* 802D2590 002CF4F0 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D2594 002CF4F4 D0 81 00 18 */ stfs f4, 0x18(r1)
|
|
/* 802D2598 002CF4F8 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D259C 002CF4FC D0 41 00 1C */ stfs f2, 0x1c(r1)
|
|
/* 802D25A0 002CF500 D0 01 00 14 */ stfs f0, 0x14(r1)
|
|
/* 802D25A4 002CF504 48 04 1F E1 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D25A8 002CF508 7F A4 EB 78 */ mr r4, r29
|
|
/* 802D25AC 002CF50C 38 61 00 60 */ addi r3, r1, 0x60
|
|
/* 802D25B0 002CF510 48 04 1F D5 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D25B4 002CF514 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D25B8 002CF518 38 61 00 78 */ addi r3, r1, 0x78
|
|
/* 802D25BC 002CF51C 38 A1 00 D8 */ addi r5, r1, 0xd8
|
|
/* 802D25C0 002CF520 48 04 1E 5D */ bl Cross__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D25C4 002CF524 C8 41 00 78 */ lfd f2, 0x78(r1)
|
|
/* 802D25C8 002CF528 38 61 00 F0 */ addi r3, r1, 0xf0
|
|
/* 802D25CC 002CF52C C8 21 00 80 */ lfd f1, 0x80(r1)
|
|
/* 802D25D0 002CF530 38 81 00 C0 */ addi r4, r1, 0xc0
|
|
/* 802D25D4 002CF534 C8 01 00 88 */ lfd f0, 0x88(r1)
|
|
/* 802D25D8 002CF538 D8 41 00 C0 */ stfd f2, 0xc0(r1)
|
|
/* 802D25DC 002CF53C D8 21 00 C8 */ stfd f1, 0xc8(r1)
|
|
/* 802D25E0 002CF540 D8 01 00 D0 */ stfd f0, 0xd0(r1)
|
|
/* 802D25E4 002CF544 48 04 1E 89 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D25E8 002CF548 FF C0 08 90 */ fmr f30, f1
|
|
/* 802D25EC 002CF54C C8 02 C4 F8 */ lfd f0, lbl_805AE218@sda21(r2)
|
|
/* 802D25F0 002CF550 FC 1E 00 40 */ fcmpo cr0, f30, f0
|
|
/* 802D25F4 002CF554 40 80 00 0C */ bge lbl_802D2600
|
|
/* 802D25F8 002CF558 38 60 00 00 */ li r3, 0
|
|
/* 802D25FC 002CF55C 48 00 01 10 */ b lbl_802D270C
|
|
lbl_802D2600:
|
|
/* 802D2600 002CF560 C0 3C 00 04 */ lfs f1, 4(r28)
|
|
/* 802D2604 002CF564 38 61 00 A8 */ addi r3, r1, 0xa8
|
|
/* 802D2608 002CF568 C0 1E 00 04 */ lfs f0, 4(r30)
|
|
/* 802D260C 002CF56C 38 81 00 08 */ addi r4, r1, 8
|
|
/* 802D2610 002CF570 C0 7C 00 08 */ lfs f3, 8(r28)
|
|
/* 802D2614 002CF574 C0 5E 00 08 */ lfs f2, 8(r30)
|
|
/* 802D2618 002CF578 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D261C 002CF57C C0 3C 00 00 */ lfs f1, 0(r28)
|
|
/* 802D2620 002CF580 C0 1E 00 00 */ lfs f0, 0(r30)
|
|
/* 802D2624 002CF584 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D2628 002CF588 D0 81 00 0C */ stfs f4, 0xc(r1)
|
|
/* 802D262C 002CF58C EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D2630 002CF590 D0 41 00 10 */ stfs f2, 0x10(r1)
|
|
/* 802D2634 002CF594 D0 01 00 08 */ stfs f0, 8(r1)
|
|
/* 802D2638 002CF598 48 04 1F 4D */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D263C 002CF59C 38 61 00 A8 */ addi r3, r1, 0xa8
|
|
/* 802D2640 002CF5A0 38 81 00 C0 */ addi r4, r1, 0xc0
|
|
/* 802D2644 002CF5A4 48 04 1E 29 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D2648 002CF5A8 FF E0 08 90 */ fmr f31, f1
|
|
/* 802D264C 002CF5AC C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D2650 002CF5B0 FC 1F 00 40 */ fcmpo cr0, f31, f0
|
|
/* 802D2654 002CF5B4 41 80 00 0C */ blt lbl_802D2660
|
|
/* 802D2658 002CF5B8 FC 1F F0 40 */ fcmpo cr0, f31, f30
|
|
/* 802D265C 002CF5BC 40 81 00 0C */ ble lbl_802D2668
|
|
lbl_802D2660:
|
|
/* 802D2660 002CF5C0 38 60 00 00 */ li r3, 0
|
|
/* 802D2664 002CF5C4 48 00 00 A8 */ b lbl_802D270C
|
|
lbl_802D2668:
|
|
/* 802D2668 002CF5C8 38 61 00 48 */ addi r3, r1, 0x48
|
|
/* 802D266C 002CF5CC 38 81 00 A8 */ addi r4, r1, 0xa8
|
|
/* 802D2670 002CF5D0 38 A1 00 F0 */ addi r5, r1, 0xf0
|
|
/* 802D2674 002CF5D4 48 04 1D A9 */ bl Cross__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D2678 002CF5D8 C8 41 00 48 */ lfd f2, 0x48(r1)
|
|
/* 802D267C 002CF5DC 7F A4 EB 78 */ mr r4, r29
|
|
/* 802D2680 002CF5E0 C8 21 00 50 */ lfd f1, 0x50(r1)
|
|
/* 802D2684 002CF5E4 38 61 00 30 */ addi r3, r1, 0x30
|
|
/* 802D2688 002CF5E8 C8 01 00 58 */ lfd f0, 0x58(r1)
|
|
/* 802D268C 002CF5EC D8 41 00 90 */ stfd f2, 0x90(r1)
|
|
/* 802D2690 002CF5F0 D8 21 00 98 */ stfd f1, 0x98(r1)
|
|
/* 802D2694 002CF5F4 D8 01 00 A0 */ stfd f0, 0xa0(r1)
|
|
/* 802D2698 002CF5F8 48 04 1E ED */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D269C 002CF5FC 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D26A0 002CF600 38 61 00 90 */ addi r3, r1, 0x90
|
|
/* 802D26A4 002CF604 48 04 1D C9 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D26A8 002CF608 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D26AC 002CF60C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D26B0 002CF610 41 80 00 10 */ blt lbl_802D26C0
|
|
/* 802D26B4 002CF614 FC 1F 08 2A */ fadd f0, f31, f1
|
|
/* 802D26B8 002CF618 FC 00 F0 40 */ fcmpo cr0, f0, f30
|
|
/* 802D26BC 002CF61C 40 81 00 0C */ ble lbl_802D26C8
|
|
lbl_802D26C0:
|
|
/* 802D26C0 002CF620 38 60 00 00 */ li r3, 0
|
|
/* 802D26C4 002CF624 48 00 00 48 */ b lbl_802D270C
|
|
lbl_802D26C8:
|
|
/* 802D26C8 002CF628 38 61 00 90 */ addi r3, r1, 0x90
|
|
/* 802D26CC 002CF62C 38 81 00 D8 */ addi r4, r1, 0xd8
|
|
/* 802D26D0 002CF630 48 04 1D 9D */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D26D4 002CF634 C8 42 C4 A8 */ lfd f2, lbl_805AE1C8@sda21(r2)
|
|
/* 802D26D8 002CF638 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D26DC 002CF63C FC 42 F0 24 */ fdiv f2, f2, f30
|
|
/* 802D26E0 002CF640 FC 22 00 72 */ fmul f1, f2, f1
|
|
/* 802D26E4 002CF644 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D26E8 002CF648 41 80 00 14 */ blt lbl_802D26FC
|
|
/* 802D26EC 002CF64C C8 1F 00 00 */ lfd f0, 0(r31)
|
|
/* 802D26F0 002CF650 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D26F4 002CF654 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D26F8 002CF658 40 82 00 0C */ bne lbl_802D2704
|
|
lbl_802D26FC:
|
|
/* 802D26FC 002CF65C 38 60 00 00 */ li r3, 0
|
|
/* 802D2700 002CF660 48 00 00 0C */ b lbl_802D270C
|
|
lbl_802D2704:
|
|
/* 802D2704 002CF664 D8 3F 00 00 */ stfd f1, 0(r31)
|
|
/* 802D2708 002CF668 38 60 00 01 */ li r3, 1
|
|
lbl_802D270C:
|
|
/* 802D270C 002CF66C E3 E1 01 38 */ psq_l f31, 312(r1), 0, qr0
|
|
/* 802D2710 002CF670 CB E1 01 30 */ lfd f31, 0x130(r1)
|
|
/* 802D2714 002CF674 E3 C1 01 28 */ psq_l f30, 296(r1), 0, qr0
|
|
/* 802D2718 002CF678 CB C1 01 20 */ lfd f30, 0x120(r1)
|
|
/* 802D271C 002CF67C 83 E1 01 1C */ lwz r31, 0x11c(r1)
|
|
/* 802D2720 002CF680 83 C1 01 18 */ lwz r30, 0x118(r1)
|
|
/* 802D2724 002CF684 83 A1 01 14 */ lwz r29, 0x114(r1)
|
|
/* 802D2728 002CF688 80 01 01 44 */ lwz r0, 0x144(r1)
|
|
/* 802D272C 002CF68C 83 81 01 10 */ lwz r28, 0x110(r1)
|
|
/* 802D2730 002CF690 7C 08 03 A6 */ mtlr r0
|
|
/* 802D2734 002CF694 38 21 01 40 */ addi r1, r1, 0x140
|
|
/* 802D2738 002CF698 4E 80 00 20 */ blr
|
|
|
|
.global RayTriangleIntersection__13CollisionUtilFRC9CVector3fRC9CVector3fPC9CVector3fRf
|
|
RayTriangleIntersection__13CollisionUtilFRC9CVector3fRC9CVector3fPC9CVector3fRf:
|
|
/* 802D273C 002CF69C 94 21 FF 90 */ stwu r1, -0x70(r1)
|
|
/* 802D2740 002CF6A0 DB E1 00 60 */ stfd f31, 0x60(r1)
|
|
/* 802D2744 002CF6A4 F3 E1 00 68 */ psq_st f31, 104(r1), 0, qr0
|
|
/* 802D2748 002CF6A8 DB C1 00 50 */ stfd f30, 0x50(r1)
|
|
/* 802D274C 002CF6AC F3 C1 00 58 */ psq_st f30, 88(r1), 0, qr0
|
|
/* 802D2750 002CF6B0 DB A1 00 40 */ stfd f29, 0x40(r1)
|
|
/* 802D2754 002CF6B4 F3 A1 00 48 */ psq_st f29, 72(r1), 0, qr0
|
|
/* 802D2758 002CF6B8 DB 81 00 30 */ stfd f28, 0x30(r1)
|
|
/* 802D275C 002CF6BC F3 81 00 38 */ psq_st f28, 56(r1), 0, qr0
|
|
/* 802D2760 002CF6C0 DB 61 00 20 */ stfd f27, 0x20(r1)
|
|
/* 802D2764 002CF6C4 F3 61 00 28 */ psq_st f27, 40(r1), 0, qr0
|
|
/* 802D2768 002CF6C8 DB 41 00 10 */ stfd f26, 0x10(r1)
|
|
/* 802D276C 002CF6CC F3 41 00 18 */ psq_st f26, 24(r1), 0, qr0
|
|
/* 802D2770 002CF6D0 C0 65 00 08 */ lfs f3, 8(r5)
|
|
/* 802D2774 002CF6D4 C0 05 00 20 */ lfs f0, 0x20(r5)
|
|
/* 802D2778 002CF6D8 C0 25 00 14 */ lfs f1, 0x14(r5)
|
|
/* 802D277C 002CF6DC EC 00 18 28 */ fsubs f0, f0, f3
|
|
/* 802D2780 002CF6E0 C0 A4 00 00 */ lfs f5, 0(r4)
|
|
/* 802D2784 002CF6E4 C3 A5 00 00 */ lfs f29, 0(r5)
|
|
/* 802D2788 002CF6E8 ED 41 18 28 */ fsubs f10, f1, f3
|
|
/* 802D278C 002CF6EC C0 25 00 18 */ lfs f1, 0x18(r5)
|
|
/* 802D2790 002CF6F0 C3 C5 00 04 */ lfs f30, 4(r5)
|
|
/* 802D2794 002CF6F4 C0 85 00 1C */ lfs f4, 0x1c(r5)
|
|
/* 802D2798 002CF6F8 EC 21 E8 28 */ fsubs f1, f1, f29
|
|
/* 802D279C 002CF6FC C0 E5 00 10 */ lfs f7, 0x10(r5)
|
|
/* 802D27A0 002CF700 EC 40 01 72 */ fmuls f2, f0, f5
|
|
/* 802D27A4 002CF704 C0 C4 00 08 */ lfs f6, 8(r4)
|
|
/* 802D27A8 002CF708 ED A4 F0 28 */ fsubs f13, f4, f30
|
|
/* 802D27AC 002CF70C C1 25 00 0C */ lfs f9, 0xc(r5)
|
|
/* 802D27B0 002CF710 C0 84 00 04 */ lfs f4, 4(r4)
|
|
/* 802D27B4 002CF714 ED 67 F0 28 */ fsubs f11, f7, f30
|
|
/* 802D27B8 002CF718 EF 66 10 78 */ fmsubs f27, f6, f1, f2
|
|
/* 802D27BC 002CF71C C0 E2 C5 00 */ lfs f7, lbl_805AE220@sda21(r2)
|
|
/* 802D27C0 002CF720 EC 4D 01 B2 */ fmuls f2, f13, f6
|
|
/* 802D27C4 002CF724 ED 01 01 32 */ fmuls f8, f1, f4
|
|
/* 802D27C8 002CF728 ED 89 E8 28 */ fsubs f12, f9, f29
|
|
/* 802D27CC 002CF72C EF 84 10 38 */ fmsubs f28, f4, f0, f2
|
|
/* 802D27D0 002CF730 EC 4B 06 F2 */ fmuls f2, f11, f27
|
|
/* 802D27D4 002CF734 EF 45 43 78 */ fmsubs f26, f5, f13, f8
|
|
/* 802D27D8 002CF738 EC 4C 17 3A */ fmadds f2, f12, f28, f2
|
|
/* 802D27DC 002CF73C EC 4A 16 BA */ fmadds f2, f10, f26, f2
|
|
/* 802D27E0 002CF740 FC 02 38 40 */ fcmpo cr0, f2, f7
|
|
/* 802D27E4 002CF744 40 80 00 0C */ bge lbl_802D27F0
|
|
/* 802D27E8 002CF748 38 60 00 00 */ li r3, 0
|
|
/* 802D27EC 002CF74C 48 00 00 C4 */ b lbl_802D28B0
|
|
lbl_802D27F0:
|
|
/* 802D27F0 002CF750 C0 E3 00 04 */ lfs f7, 4(r3)
|
|
/* 802D27F4 002CF754 C1 03 00 00 */ lfs f8, 0(r3)
|
|
/* 802D27F8 002CF758 EF C7 F0 28 */ fsubs f30, f7, f30
|
|
/* 802D27FC 002CF75C C0 E3 00 08 */ lfs f7, 8(r3)
|
|
/* 802D2800 002CF760 EF A8 E8 28 */ fsubs f29, f8, f29
|
|
/* 802D2804 002CF764 C1 22 C4 B8 */ lfs f9, lbl_805AE1D8@sda21(r2)
|
|
/* 802D2808 002CF768 EF E7 18 28 */ fsubs f31, f7, f3
|
|
/* 802D280C 002CF76C EC 7E 06 F2 */ fmuls f3, f30, f27
|
|
/* 802D2810 002CF770 EC 7D 1F 3A */ fmadds f3, f29, f28, f3
|
|
/* 802D2814 002CF774 EF 5F 1E BA */ fmadds f26, f31, f26, f3
|
|
/* 802D2818 002CF778 FC 1A 48 40 */ fcmpo cr0, f26, f9
|
|
/* 802D281C 002CF77C 41 80 00 0C */ blt lbl_802D2828
|
|
/* 802D2820 002CF780 FC 1A 10 40 */ fcmpo cr0, f26, f2
|
|
/* 802D2824 002CF784 40 81 00 0C */ ble lbl_802D2830
|
|
lbl_802D2828:
|
|
/* 802D2828 002CF788 38 60 00 00 */ li r3, 0
|
|
/* 802D282C 002CF78C 48 00 00 84 */ b lbl_802D28B0
|
|
lbl_802D2830:
|
|
/* 802D2830 002CF790 EC EA 07 72 */ fmuls f7, f10, f29
|
|
/* 802D2834 002CF794 EC 6B 07 F2 */ fmuls f3, f11, f31
|
|
/* 802D2838 002CF798 ED 0C 07 B2 */ fmuls f8, f12, f30
|
|
/* 802D283C 002CF79C ED 9F 3B 38 */ fmsubs f12, f31, f12, f7
|
|
/* 802D2840 002CF7A0 EC FE 1A B8 */ fmsubs f7, f30, f10, f3
|
|
/* 802D2844 002CF7A4 ED 1D 42 F8 */ fmsubs f8, f29, f11, f8
|
|
/* 802D2848 002CF7A8 EC 6C 01 32 */ fmuls f3, f12, f4
|
|
/* 802D284C 002CF7AC EC 67 19 7A */ fmadds f3, f7, f5, f3
|
|
/* 802D2850 002CF7B0 EC 68 19 BA */ fmadds f3, f8, f6, f3
|
|
/* 802D2854 002CF7B4 FC 03 48 40 */ fcmpo cr0, f3, f9
|
|
/* 802D2858 002CF7B8 41 80 00 10 */ blt lbl_802D2868
|
|
/* 802D285C 002CF7BC EC 7A 18 2A */ fadds f3, f26, f3
|
|
/* 802D2860 002CF7C0 FC 03 10 40 */ fcmpo cr0, f3, f2
|
|
/* 802D2864 002CF7C4 40 81 00 0C */ ble lbl_802D2870
|
|
lbl_802D2868:
|
|
/* 802D2868 002CF7C8 38 60 00 00 */ li r3, 0
|
|
/* 802D286C 002CF7CC 48 00 00 44 */ b lbl_802D28B0
|
|
lbl_802D2870:
|
|
/* 802D2870 002CF7D0 C0 82 C4 BC */ lfs f4, lbl_805AE1DC@sda21(r2)
|
|
/* 802D2874 002CF7D4 EC 6C 03 72 */ fmuls f3, f12, f13
|
|
/* 802D2878 002CF7D8 EC 44 10 24 */ fdivs f2, f4, f2
|
|
/* 802D287C 002CF7DC EC 27 18 7A */ fmadds f1, f7, f1, f3
|
|
/* 802D2880 002CF7E0 EC 08 08 3A */ fmadds f0, f8, f0, f1
|
|
/* 802D2884 002CF7E4 EC 22 00 32 */ fmuls f1, f2, f0
|
|
/* 802D2888 002CF7E8 FC 01 48 40 */ fcmpo cr0, f1, f9
|
|
/* 802D288C 002CF7EC 41 80 00 14 */ blt lbl_802D28A0
|
|
/* 802D2890 002CF7F0 C0 06 00 00 */ lfs f0, 0(r6)
|
|
/* 802D2894 002CF7F4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2898 002CF7F8 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D289C 002CF7FC 40 82 00 0C */ bne lbl_802D28A8
|
|
lbl_802D28A0:
|
|
/* 802D28A0 002CF800 38 60 00 00 */ li r3, 0
|
|
/* 802D28A4 002CF804 48 00 00 0C */ b lbl_802D28B0
|
|
lbl_802D28A8:
|
|
/* 802D28A8 002CF808 D0 26 00 00 */ stfs f1, 0(r6)
|
|
/* 802D28AC 002CF80C 38 60 00 01 */ li r3, 1
|
|
lbl_802D28B0:
|
|
/* 802D28B0 002CF810 E3 E1 00 68 */ psq_l f31, 104(r1), 0, qr0
|
|
/* 802D28B4 002CF814 CB E1 00 60 */ lfd f31, 0x60(r1)
|
|
/* 802D28B8 002CF818 E3 C1 00 58 */ psq_l f30, 88(r1), 0, qr0
|
|
/* 802D28BC 002CF81C CB C1 00 50 */ lfd f30, 0x50(r1)
|
|
/* 802D28C0 002CF820 E3 A1 00 48 */ psq_l f29, 72(r1), 0, qr0
|
|
/* 802D28C4 002CF824 CB A1 00 40 */ lfd f29, 0x40(r1)
|
|
/* 802D28C8 002CF828 E3 81 00 38 */ psq_l f28, 56(r1), 0, qr0
|
|
/* 802D28CC 002CF82C CB 81 00 30 */ lfd f28, 0x30(r1)
|
|
/* 802D28D0 002CF830 E3 61 00 28 */ psq_l f27, 40(r1), 0, qr0
|
|
/* 802D28D4 002CF834 CB 61 00 20 */ lfd f27, 0x20(r1)
|
|
/* 802D28D8 002CF838 E3 41 00 18 */ psq_l f26, 24(r1), 0, qr0
|
|
/* 802D28DC 002CF83C CB 41 00 10 */ lfd f26, 0x10(r1)
|
|
/* 802D28E0 002CF840 38 21 00 70 */ addi r1, r1, 0x70
|
|
/* 802D28E4 002CF844 4E 80 00 20 */ blr
|
|
|
|
.global AABoxSphereIntersectionRadius__13CollisionUtilFRC6CAABoxRC7CSphere
|
|
AABoxSphereIntersectionRadius__13CollisionUtilFRC6CAABoxRC7CSphere:
|
|
/* 802D28E8 002CF848 38 00 00 03 */ li r0, 3
|
|
/* 802D28EC 002CF84C C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D28F0 002CF850 7C 85 23 78 */ mr r5, r4
|
|
/* 802D28F4 002CF854 38 E3 00 0C */ addi r7, r3, 0xc
|
|
/* 802D28F8 002CF858 39 20 00 00 */ li r9, 0
|
|
/* 802D28FC 002CF85C 38 C0 00 00 */ li r6, 0
|
|
/* 802D2900 002CF860 39 00 00 01 */ li r8, 1
|
|
/* 802D2904 002CF864 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D2908:
|
|
/* 802D2908 002CF868 C0 45 00 00 */ lfs f2, 0(r5)
|
|
/* 802D290C 002CF86C C0 63 00 00 */ lfs f3, 0(r3)
|
|
/* 802D2910 002CF870 FC 02 18 40 */ fcmpo cr0, f2, f3
|
|
/* 802D2914 002CF874 40 80 00 3C */ bge lbl_802D2950
|
|
/* 802D2918 002CF878 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D291C 002CF87C EC 02 00 2A */ fadds f0, f2, f0
|
|
/* 802D2920 002CF880 FC 00 18 40 */ fcmpo cr0, f0, f3
|
|
/* 802D2924 002CF884 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2928 002CF888 40 82 00 20 */ bne lbl_802D2948
|
|
/* 802D292C 002CF88C EC 02 18 28 */ fsubs f0, f2, f3
|
|
/* 802D2930 002CF890 38 00 00 01 */ li r0, 1
|
|
/* 802D2934 002CF894 7C 00 30 30 */ slw r0, r0, r6
|
|
/* 802D2938 002CF898 7D 29 03 78 */ or r9, r9, r0
|
|
/* 802D293C 002CF89C EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D2940 002CF8A0 EC 21 00 2A */ fadds f1, f1, f0
|
|
/* 802D2944 002CF8A4 48 00 00 50 */ b lbl_802D2994
|
|
lbl_802D2948:
|
|
/* 802D2948 002CF8A8 C0 22 C4 C0 */ lfs f1, lbl_805AE1E0@sda21(r2)
|
|
/* 802D294C 002CF8AC 4E 80 00 20 */ blr
|
|
lbl_802D2950:
|
|
/* 802D2950 002CF8B0 C0 67 00 00 */ lfs f3, 0(r7)
|
|
/* 802D2954 002CF8B4 FC 02 18 40 */ fcmpo cr0, f2, f3
|
|
/* 802D2958 002CF8B8 40 81 00 3C */ ble lbl_802D2994
|
|
/* 802D295C 002CF8BC C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D2960 002CF8C0 EC 02 00 28 */ fsubs f0, f2, f0
|
|
/* 802D2964 002CF8C4 FC 00 18 40 */ fcmpo cr0, f0, f3
|
|
/* 802D2968 002CF8C8 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D296C 002CF8CC 40 82 00 20 */ bne lbl_802D298C
|
|
/* 802D2970 002CF8D0 EC 02 18 28 */ fsubs f0, f2, f3
|
|
/* 802D2974 002CF8D4 38 00 00 01 */ li r0, 1
|
|
/* 802D2978 002CF8D8 7C 00 40 30 */ slw r0, r0, r8
|
|
/* 802D297C 002CF8DC 7D 29 03 78 */ or r9, r9, r0
|
|
/* 802D2980 002CF8E0 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D2984 002CF8E4 EC 21 00 2A */ fadds f1, f1, f0
|
|
/* 802D2988 002CF8E8 48 00 00 0C */ b lbl_802D2994
|
|
lbl_802D298C:
|
|
/* 802D298C 002CF8EC C0 22 C4 C0 */ lfs f1, lbl_805AE1E0@sda21(r2)
|
|
/* 802D2990 002CF8F0 4E 80 00 20 */ blr
|
|
lbl_802D2994:
|
|
/* 802D2994 002CF8F4 38 63 00 04 */ addi r3, r3, 4
|
|
/* 802D2998 002CF8F8 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 802D299C 002CF8FC 38 C6 00 02 */ addi r6, r6, 2
|
|
/* 802D29A0 002CF900 38 E7 00 04 */ addi r7, r7, 4
|
|
/* 802D29A4 002CF904 39 08 00 02 */ addi r8, r8, 2
|
|
/* 802D29A8 002CF908 42 00 FF 60 */ bdnz lbl_802D2908
|
|
/* 802D29AC 002CF90C 2C 09 00 00 */ cmpwi r9, 0
|
|
/* 802D29B0 002CF910 4D 82 00 20 */ beqlr
|
|
/* 802D29B4 002CF914 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D29B8 002CF918 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D29BC 002CF91C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D29C0 002CF920 4C 81 00 20 */ blelr
|
|
/* 802D29C4 002CF924 C0 22 C4 C0 */ lfs f1, lbl_805AE1E0@sda21(r2)
|
|
/* 802D29C8 002CF928 4E 80 00 20 */ blr
|
|
|
|
.global AABoxSphereIntersection__13CollisionUtilFRC6CAABoxRC7CSphere
|
|
AABoxSphereIntersection__13CollisionUtilFRC6CAABoxRC7CSphere:
|
|
/* 802D29CC 002CF92C 38 00 00 03 */ li r0, 3
|
|
/* 802D29D0 002CF930 C0 62 C4 B8 */ lfs f3, lbl_805AE1D8@sda21(r2)
|
|
/* 802D29D4 002CF934 7C 85 23 78 */ mr r5, r4
|
|
/* 802D29D8 002CF938 38 E3 00 0C */ addi r7, r3, 0xc
|
|
/* 802D29DC 002CF93C 39 20 00 00 */ li r9, 0
|
|
/* 802D29E0 002CF940 38 C0 00 00 */ li r6, 0
|
|
/* 802D29E4 002CF944 39 00 00 01 */ li r8, 1
|
|
/* 802D29E8 002CF948 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D29EC:
|
|
/* 802D29EC 002CF94C C0 25 00 00 */ lfs f1, 0(r5)
|
|
/* 802D29F0 002CF950 C0 43 00 00 */ lfs f2, 0(r3)
|
|
/* 802D29F4 002CF954 FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D29F8 002CF958 40 80 00 3C */ bge lbl_802D2A34
|
|
/* 802D29FC 002CF95C C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D2A00 002CF960 EC 01 00 2A */ fadds f0, f1, f0
|
|
/* 802D2A04 002CF964 FC 00 10 40 */ fcmpo cr0, f0, f2
|
|
/* 802D2A08 002CF968 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2A0C 002CF96C 40 82 00 20 */ bne lbl_802D2A2C
|
|
/* 802D2A10 002CF970 EC 01 10 28 */ fsubs f0, f1, f2
|
|
/* 802D2A14 002CF974 38 00 00 01 */ li r0, 1
|
|
/* 802D2A18 002CF978 7C 00 30 30 */ slw r0, r0, r6
|
|
/* 802D2A1C 002CF97C 7D 29 03 78 */ or r9, r9, r0
|
|
/* 802D2A20 002CF980 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D2A24 002CF984 EC 63 00 2A */ fadds f3, f3, f0
|
|
/* 802D2A28 002CF988 48 00 00 50 */ b lbl_802D2A78
|
|
lbl_802D2A2C:
|
|
/* 802D2A2C 002CF98C 38 60 00 00 */ li r3, 0
|
|
/* 802D2A30 002CF990 4E 80 00 20 */ blr
|
|
lbl_802D2A34:
|
|
/* 802D2A34 002CF994 C0 47 00 00 */ lfs f2, 0(r7)
|
|
/* 802D2A38 002CF998 FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D2A3C 002CF99C 40 81 00 3C */ ble lbl_802D2A78
|
|
/* 802D2A40 002CF9A0 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D2A44 002CF9A4 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D2A48 002CF9A8 FC 00 10 40 */ fcmpo cr0, f0, f2
|
|
/* 802D2A4C 002CF9AC 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2A50 002CF9B0 40 82 00 20 */ bne lbl_802D2A70
|
|
/* 802D2A54 002CF9B4 EC 01 10 28 */ fsubs f0, f1, f2
|
|
/* 802D2A58 002CF9B8 38 00 00 01 */ li r0, 1
|
|
/* 802D2A5C 002CF9BC 7C 00 40 30 */ slw r0, r0, r8
|
|
/* 802D2A60 002CF9C0 7D 29 03 78 */ or r9, r9, r0
|
|
/* 802D2A64 002CF9C4 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D2A68 002CF9C8 EC 63 00 2A */ fadds f3, f3, f0
|
|
/* 802D2A6C 002CF9CC 48 00 00 0C */ b lbl_802D2A78
|
|
lbl_802D2A70:
|
|
/* 802D2A70 002CF9D0 38 60 00 00 */ li r3, 0
|
|
/* 802D2A74 002CF9D4 4E 80 00 20 */ blr
|
|
lbl_802D2A78:
|
|
/* 802D2A78 002CF9D8 38 63 00 04 */ addi r3, r3, 4
|
|
/* 802D2A7C 002CF9DC 38 A5 00 04 */ addi r5, r5, 4
|
|
/* 802D2A80 002CF9E0 38 C6 00 02 */ addi r6, r6, 2
|
|
/* 802D2A84 002CF9E4 38 E7 00 04 */ addi r7, r7, 4
|
|
/* 802D2A88 002CF9E8 39 08 00 02 */ addi r8, r8, 2
|
|
/* 802D2A8C 002CF9EC 42 00 FF 60 */ bdnz lbl_802D29EC
|
|
/* 802D2A90 002CF9F0 2C 09 00 00 */ cmpwi r9, 0
|
|
/* 802D2A94 002CF9F4 40 82 00 0C */ bne lbl_802D2AA0
|
|
/* 802D2A98 002CF9F8 38 60 00 01 */ li r3, 1
|
|
/* 802D2A9C 002CF9FC 4E 80 00 20 */ blr
|
|
lbl_802D2AA0:
|
|
/* 802D2AA0 002CFA00 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D2AA4 002CFA04 EC 00 00 32 */ fmuls f0, f0, f0
|
|
/* 802D2AA8 002CFA08 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2AAC 002CFA0C 7C 00 00 26 */ mfcr r0
|
|
/* 802D2AB0 002CFA10 54 00 17 FE */ rlwinm r0, r0, 2, 0x1f, 0x1f
|
|
/* 802D2AB4 002CFA14 7C 00 00 34 */ cntlzw r0, r0
|
|
/* 802D2AB8 002CFA18 54 03 D9 7E */ srwi r3, r0, 5
|
|
/* 802D2ABC 002CFA1C 4E 80 00 20 */ blr
|
|
|
|
.global AABoxAABoxIntersection__13CollisionUtilFRC6CAABoxRC13CMaterialListRC6CAABoxRC13CMaterialListR18CCollisionInfoList
|
|
AABoxAABoxIntersection__13CollisionUtilFRC6CAABoxRC13CMaterialListRC6CAABoxRC13CMaterialListR18CCollisionInfoList:
|
|
/* 802D2AC0 002CFA20 94 21 FD E0 */ stwu r1, -0x220(r1)
|
|
/* 802D2AC4 002CFA24 7C 08 02 A6 */ mflr r0
|
|
/* 802D2AC8 002CFA28 90 01 02 24 */ stw r0, 0x224(r1)
|
|
/* 802D2ACC 002CFA2C BF 21 02 04 */ stmw r25, 0x204(r1)
|
|
/* 802D2AD0 002CFA30 7C 7C 1B 78 */ mr r28, r3
|
|
/* 802D2AD4 002CFA34 7C BB 2B 78 */ mr r27, r5
|
|
/* 802D2AD8 002CFA38 7C 9D 23 78 */ mr r29, r4
|
|
/* 802D2ADC 002CFA3C 7C DE 33 78 */ mr r30, r6
|
|
/* 802D2AE0 002CFA40 7C FF 3B 78 */ mr r31, r7
|
|
/* 802D2AE4 002CFA44 C0 05 00 08 */ lfs f0, 8(r5)
|
|
/* 802D2AE8 002CFA48 C0 23 00 08 */ lfs f1, 8(r3)
|
|
/* 802D2AEC 002CFA4C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2AF0 002CFA50 40 81 00 08 */ ble lbl_802D2AF8
|
|
/* 802D2AF4 002CFA54 48 00 00 08 */ b lbl_802D2AFC
|
|
lbl_802D2AF8:
|
|
/* 802D2AF8 002CFA58 FC 20 00 90 */ fmr f1, f0
|
|
lbl_802D2AFC:
|
|
/* 802D2AFC 002CFA5C C0 1B 00 04 */ lfs f0, 4(r27)
|
|
/* 802D2B00 002CFA60 C0 5C 00 04 */ lfs f2, 4(r28)
|
|
/* 802D2B04 002CFA64 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2B08 002CFA68 40 81 00 08 */ ble lbl_802D2B10
|
|
/* 802D2B0C 002CFA6C 48 00 00 08 */ b lbl_802D2B14
|
|
lbl_802D2B10:
|
|
/* 802D2B10 002CFA70 FC 40 00 90 */ fmr f2, f0
|
|
lbl_802D2B14:
|
|
/* 802D2B14 002CFA74 C0 1B 00 00 */ lfs f0, 0(r27)
|
|
/* 802D2B18 002CFA78 C0 7C 00 00 */ lfs f3, 0(r28)
|
|
/* 802D2B1C 002CFA7C FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2B20 002CFA80 40 81 00 08 */ ble lbl_802D2B28
|
|
/* 802D2B24 002CFA84 48 00 00 08 */ b lbl_802D2B2C
|
|
lbl_802D2B28:
|
|
/* 802D2B28 002CFA88 FC 60 00 90 */ fmr f3, f0
|
|
lbl_802D2B2C:
|
|
/* 802D2B2C 002CFA8C C0 1B 00 14 */ lfs f0, 0x14(r27)
|
|
/* 802D2B30 002CFA90 C0 9C 00 14 */ lfs f4, 0x14(r28)
|
|
/* 802D2B34 002CFA94 D0 61 00 44 */ stfs f3, 0x44(r1)
|
|
/* 802D2B38 002CFA98 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D2B3C 002CFA9C D0 41 00 48 */ stfs f2, 0x48(r1)
|
|
/* 802D2B40 002CFAA0 D0 21 00 4C */ stfs f1, 0x4c(r1)
|
|
/* 802D2B44 002CFAA4 40 80 00 08 */ bge lbl_802D2B4C
|
|
/* 802D2B48 002CFAA8 48 00 00 08 */ b lbl_802D2B50
|
|
lbl_802D2B4C:
|
|
/* 802D2B4C 002CFAAC FC 80 00 90 */ fmr f4, f0
|
|
lbl_802D2B50:
|
|
/* 802D2B50 002CFAB0 C0 1B 00 10 */ lfs f0, 0x10(r27)
|
|
/* 802D2B54 002CFAB4 C0 5C 00 10 */ lfs f2, 0x10(r28)
|
|
/* 802D2B58 002CFAB8 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2B5C 002CFABC 40 80 00 08 */ bge lbl_802D2B64
|
|
/* 802D2B60 002CFAC0 48 00 00 08 */ b lbl_802D2B68
|
|
lbl_802D2B64:
|
|
/* 802D2B64 002CFAC4 FC 40 00 90 */ fmr f2, f0
|
|
lbl_802D2B68:
|
|
/* 802D2B68 002CFAC8 C0 1B 00 0C */ lfs f0, 0xc(r27)
|
|
/* 802D2B6C 002CFACC C0 7C 00 0C */ lfs f3, 0xc(r28)
|
|
/* 802D2B70 002CFAD0 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2B74 002CFAD4 40 80 00 08 */ bge lbl_802D2B7C
|
|
/* 802D2B78 002CFAD8 48 00 00 08 */ b lbl_802D2B80
|
|
lbl_802D2B7C:
|
|
/* 802D2B7C 002CFADC FC 60 00 90 */ fmr f3, f0
|
|
lbl_802D2B80:
|
|
/* 802D2B80 002CFAE0 FC 00 18 18 */ frsp f0, f3
|
|
/* 802D2B84 002CFAE4 C0 21 00 44 */ lfs f1, 0x44(r1)
|
|
/* 802D2B88 002CFAE8 D0 61 00 38 */ stfs f3, 0x38(r1)
|
|
/* 802D2B8C 002CFAEC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2B90 002CFAF0 D0 41 00 3C */ stfs f2, 0x3c(r1)
|
|
/* 802D2B94 002CFAF4 D0 81 00 40 */ stfs f4, 0x40(r1)
|
|
/* 802D2B98 002CFAF8 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2B9C 002CFAFC 41 82 00 2C */ beq lbl_802D2BC8
|
|
/* 802D2BA0 002CFB00 FC 00 10 18 */ frsp f0, f2
|
|
/* 802D2BA4 002CFB04 C0 21 00 48 */ lfs f1, 0x48(r1)
|
|
/* 802D2BA8 002CFB08 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2BAC 002CFB0C 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2BB0 002CFB10 41 82 00 18 */ beq lbl_802D2BC8
|
|
/* 802D2BB4 002CFB14 FC 00 20 18 */ frsp f0, f4
|
|
/* 802D2BB8 002CFB18 C0 21 00 4C */ lfs f1, 0x4c(r1)
|
|
/* 802D2BBC 002CFB1C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2BC0 002CFB20 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2BC4 002CFB24 40 82 00 0C */ bne lbl_802D2BD0
|
|
lbl_802D2BC8:
|
|
/* 802D2BC8 002CFB28 38 60 00 00 */ li r3, 0
|
|
/* 802D2BCC 002CFB2C 48 00 02 DC */ b lbl_802D2EA8
|
|
lbl_802D2BD0:
|
|
/* 802D2BD0 002CFB30 38 61 00 5C */ addi r3, r1, 0x5c
|
|
/* 802D2BD4 002CFB34 38 81 00 44 */ addi r4, r1, 0x44
|
|
/* 802D2BD8 002CFB38 38 A1 00 38 */ addi r5, r1, 0x38
|
|
/* 802D2BDC 002CFB3C 48 06 59 2D */ bl __ct__6CAABoxFRC9CVector3fRC9CVector3f
|
|
/* 802D2BE0 002CFB40 C0 3B 00 00 */ lfs f1, 0(r27)
|
|
/* 802D2BE4 002CFB44 C0 7C 00 00 */ lfs f3, 0(r28)
|
|
/* 802D2BE8 002CFB48 C0 1B 00 0C */ lfs f0, 0xc(r27)
|
|
/* 802D2BEC 002CFB4C FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D2BF0 002CFB50 C0 5C 00 0C */ lfs f2, 0xc(r28)
|
|
/* 802D2BF4 002CFB54 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2BF8 002CFB58 7C A0 00 26 */ mfcr r5
|
|
/* 802D2BFC 002CFB5C FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2C00 002CFB60 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C04 002CFB64 7C 80 00 26 */ mfcr r4
|
|
/* 802D2C08 002CFB68 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2C0C 002CFB6C 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C10 002CFB70 7C 60 00 26 */ mfcr r3
|
|
/* 802D2C14 002CFB74 FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D2C18 002CFB78 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C1C 002CFB7C 7C 00 00 26 */ mfcr r0
|
|
/* 802D2C20 002CFB80 C0 3B 00 04 */ lfs f1, 4(r27)
|
|
/* 802D2C24 002CFB84 C0 7C 00 04 */ lfs f3, 4(r28)
|
|
/* 802D2C28 002CFB88 54 00 2F 7A */ rlwinm r0, r0, 5, 0x1d, 0x1d
|
|
/* 802D2C2C 002CFB8C 50 60 37 38 */ rlwimi r0, r3, 6, 0x1c, 0x1c
|
|
/* 802D2C30 002CFB90 C0 1B 00 10 */ lfs f0, 0x10(r27)
|
|
/* 802D2C34 002CFB94 50 80 27 BC */ rlwimi r0, r4, 4, 0x1e, 0x1e
|
|
/* 802D2C38 002CFB98 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D2C3C 002CFB9C 50 A0 1F FE */ rlwimi r0, r5, 3, 0x1f, 0x1f
|
|
/* 802D2C40 002CFBA0 C0 5C 00 10 */ lfs f2, 0x10(r28)
|
|
/* 802D2C44 002CFBA4 90 01 00 50 */ stw r0, 0x50(r1)
|
|
/* 802D2C48 002CFBA8 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C4C 002CFBAC 7C A0 00 26 */ mfcr r5
|
|
/* 802D2C50 002CFBB0 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2C54 002CFBB4 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C58 002CFBB8 7C 80 00 26 */ mfcr r4
|
|
/* 802D2C5C 002CFBBC FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2C60 002CFBC0 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C64 002CFBC4 7C 60 00 26 */ mfcr r3
|
|
/* 802D2C68 002CFBC8 FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D2C6C 002CFBCC 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2C70 002CFBD0 7C 00 00 26 */ mfcr r0
|
|
/* 802D2C74 002CFBD4 C0 3B 00 08 */ lfs f1, 8(r27)
|
|
/* 802D2C78 002CFBD8 C0 7C 00 08 */ lfs f3, 8(r28)
|
|
/* 802D2C7C 002CFBDC 54 00 2F 7A */ rlwinm r0, r0, 5, 0x1d, 0x1d
|
|
/* 802D2C80 002CFBE0 50 60 37 38 */ rlwimi r0, r3, 6, 0x1c, 0x1c
|
|
/* 802D2C84 002CFBE4 C0 1B 00 14 */ lfs f0, 0x14(r27)
|
|
/* 802D2C88 002CFBE8 50 80 27 BC */ rlwimi r0, r4, 4, 0x1e, 0x1e
|
|
/* 802D2C8C 002CFBEC FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D2C90 002CFBF0 50 A0 1F FE */ rlwimi r0, r5, 3, 0x1f, 0x1f
|
|
/* 802D2C94 002CFBF4 C0 5C 00 14 */ lfs f2, 0x14(r28)
|
|
/* 802D2C98 002CFBF8 90 01 00 54 */ stw r0, 0x54(r1)
|
|
/* 802D2C9C 002CFBFC 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2CA0 002CFC00 7C C0 00 26 */ mfcr r6
|
|
/* 802D2CA4 002CFC04 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2CA8 002CFC08 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2CAC 002CFC0C 7C A0 00 26 */ mfcr r5
|
|
/* 802D2CB0 002CFC10 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2CB4 002CFC14 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2CB8 002CFC18 7C 80 00 26 */ mfcr r4
|
|
/* 802D2CBC 002CFC1C FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D2CC0 002CFC20 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D2CC4 002CFC24 7C 00 00 26 */ mfcr r0
|
|
/* 802D2CC8 002CFC28 3C 60 80 48 */ lis r3, lbl_80479510@ha
|
|
/* 802D2CCC 002CFC2C 54 00 2F 7A */ rlwinm r0, r0, 5, 0x1d, 0x1d
|
|
/* 802D2CD0 002CFC30 3B 81 00 50 */ addi r28, r1, 0x50
|
|
/* 802D2CD4 002CFC34 50 80 37 38 */ rlwimi r0, r4, 6, 0x1c, 0x1c
|
|
/* 802D2CD8 002CFC38 3B 63 95 10 */ addi r27, r3, lbl_80479510@l
|
|
/* 802D2CDC 002CFC3C 50 A0 27 BC */ rlwimi r0, r5, 4, 0x1e, 0x1e
|
|
/* 802D2CE0 002CFC40 3B 20 00 00 */ li r25, 0
|
|
/* 802D2CE4 002CFC44 50 C0 1F FE */ rlwimi r0, r6, 3, 0x1f, 0x1f
|
|
/* 802D2CE8 002CFC48 3B 40 00 0C */ li r26, 0xc
|
|
/* 802D2CEC 002CFC4C 90 01 00 58 */ stw r0, 0x58(r1)
|
|
lbl_802D2CF0:
|
|
/* 802D2CF0 002CFC50 80 1C 00 00 */ lwz r0, 0(r28)
|
|
/* 802D2CF4 002CFC54 2C 00 00 0A */ cmpwi r0, 0xa
|
|
/* 802D2CF8 002CFC58 41 82 00 D8 */ beq lbl_802D2DD0
|
|
/* 802D2CFC 002CFC5C 40 80 00 1C */ bge lbl_802D2D18
|
|
/* 802D2D00 002CFC60 2C 00 00 03 */ cmpwi r0, 3
|
|
/* 802D2D04 002CFC64 41 82 00 CC */ beq lbl_802D2DD0
|
|
/* 802D2D08 002CFC68 40 80 00 C8 */ bge lbl_802D2DD0
|
|
/* 802D2D0C 002CFC6C 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D2D10 002CFC70 40 80 00 14 */ bge lbl_802D2D24
|
|
/* 802D2D14 002CFC74 48 00 00 BC */ b lbl_802D2DD0
|
|
lbl_802D2D18:
|
|
/* 802D2D18 002CFC78 2C 00 00 0C */ cmpwi r0, 0xc
|
|
/* 802D2D1C 002CFC7C 40 80 00 B4 */ bge lbl_802D2DD0
|
|
/* 802D2D20 002CFC80 48 00 00 60 */ b lbl_802D2D80
|
|
lbl_802D2D24:
|
|
/* 802D2D24 002CFC84 C0 5B 00 0C */ lfs f2, 0xc(r27)
|
|
/* 802D2D28 002CFC88 3C 60 80 48 */ lis r3, lbl_80479510@ha
|
|
/* 802D2D2C 002CFC8C C0 3B 00 10 */ lfs f1, 0x10(r27)
|
|
/* 802D2D30 002CFC90 38 03 95 10 */ addi r0, r3, lbl_80479510@l
|
|
/* 802D2D34 002CFC94 C0 1B 00 14 */ lfs f0, 0x14(r27)
|
|
/* 802D2D38 002CFC98 FC 40 10 50 */ fneg f2, f2
|
|
/* 802D2D3C 002CFC9C FC 20 08 50 */ fneg f1, f1
|
|
/* 802D2D40 002CFCA0 7F A5 EB 78 */ mr r5, r29
|
|
/* 802D2D44 002CFCA4 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D2D48 002CFCA8 7F C6 F3 78 */ mr r6, r30
|
|
/* 802D2D4C 002CFCAC D0 41 00 2C */ stfs f2, 0x2c(r1)
|
|
/* 802D2D50 002CFCB0 38 61 01 98 */ addi r3, r1, 0x198
|
|
/* 802D2D54 002CFCB4 D0 21 00 30 */ stfs f1, 0x30(r1)
|
|
/* 802D2D58 002CFCB8 38 81 00 5C */ addi r4, r1, 0x5c
|
|
/* 802D2D5C 002CFCBC 7C E0 D2 14 */ add r7, r0, r26
|
|
/* 802D2D60 002CFCC0 39 01 00 2C */ addi r8, r1, 0x2c
|
|
/* 802D2D64 002CFCC4 D0 01 00 34 */ stfs f0, 0x34(r1)
|
|
/* 802D2D68 002CFCC8 4B FF B5 51 */ bl __ct__14CCollisionInfoFRC6CAABoxRC13CMaterialListRC13CMaterialListRC9CVector3fRC9CVector3f
|
|
/* 802D2D6C 002CFCCC 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D2D70 002CFCD0 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D2D74 002CFCD4 38 A0 00 00 */ li r5, 0
|
|
/* 802D2D78 002CFCD8 4B EB 28 A9 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
/* 802D2D7C 002CFCDC 48 00 00 54 */ b lbl_802D2DD0
|
|
lbl_802D2D80:
|
|
/* 802D2D80 002CFCE0 C0 5B 00 00 */ lfs f2, 0(r27)
|
|
/* 802D2D84 002CFCE4 7F A5 EB 78 */ mr r5, r29
|
|
/* 802D2D88 002CFCE8 C0 3B 00 04 */ lfs f1, 4(r27)
|
|
/* 802D2D8C 002CFCEC 7F C6 F3 78 */ mr r6, r30
|
|
/* 802D2D90 002CFCF0 C0 1B 00 08 */ lfs f0, 8(r27)
|
|
/* 802D2D94 002CFCF4 FC 40 10 50 */ fneg f2, f2
|
|
/* 802D2D98 002CFCF8 FC 20 08 50 */ fneg f1, f1
|
|
/* 802D2D9C 002CFCFC 7F 67 DB 78 */ mr r7, r27
|
|
/* 802D2DA0 002CFD00 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D2DA4 002CFD04 38 61 01 38 */ addi r3, r1, 0x138
|
|
/* 802D2DA8 002CFD08 D0 41 00 20 */ stfs f2, 0x20(r1)
|
|
/* 802D2DAC 002CFD0C 38 81 00 5C */ addi r4, r1, 0x5c
|
|
/* 802D2DB0 002CFD10 D0 21 00 24 */ stfs f1, 0x24(r1)
|
|
/* 802D2DB4 002CFD14 39 01 00 20 */ addi r8, r1, 0x20
|
|
/* 802D2DB8 002CFD18 D0 01 00 28 */ stfs f0, 0x28(r1)
|
|
/* 802D2DBC 002CFD1C 4B FF B4 FD */ bl __ct__14CCollisionInfoFRC6CAABoxRC13CMaterialListRC13CMaterialListRC9CVector3fRC9CVector3f
|
|
/* 802D2DC0 002CFD20 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D2DC4 002CFD24 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D2DC8 002CFD28 38 A0 00 00 */ li r5, 0
|
|
/* 802D2DCC 002CFD2C 4B EB 28 55 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
lbl_802D2DD0:
|
|
/* 802D2DD0 002CFD30 3B 39 00 01 */ addi r25, r25, 1
|
|
/* 802D2DD4 002CFD34 3B 7B 00 18 */ addi r27, r27, 0x18
|
|
/* 802D2DD8 002CFD38 2C 19 00 03 */ cmpwi r25, 3
|
|
/* 802D2DDC 002CFD3C 3B 5A 00 18 */ addi r26, r26, 0x18
|
|
/* 802D2DE0 002CFD40 3B 9C 00 04 */ addi r28, r28, 4
|
|
/* 802D2DE4 002CFD44 41 80 FF 0C */ blt lbl_802D2CF0
|
|
/* 802D2DE8 002CFD48 80 1F 00 00 */ lwz r0, 0(r31)
|
|
/* 802D2DEC 002CFD4C 2C 00 00 00 */ cmpwi r0, 0
|
|
/* 802D2DF0 002CFD50 40 82 00 B4 */ bne lbl_802D2EA4
|
|
/* 802D2DF4 002CFD54 3C 60 80 48 */ lis r3, lbl_80479510@ha
|
|
/* 802D2DF8 002CFD58 7F A5 EB 78 */ mr r5, r29
|
|
/* 802D2DFC 002CFD5C 38 63 95 10 */ addi r3, r3, lbl_80479510@l
|
|
/* 802D2E00 002CFD60 7F C6 F3 78 */ mr r6, r30
|
|
/* 802D2E04 002CFD64 C0 23 00 34 */ lfs f1, 0x34(r3)
|
|
/* 802D2E08 002CFD68 38 E3 00 30 */ addi r7, r3, 0x30
|
|
/* 802D2E0C 002CFD6C C0 43 00 30 */ lfs f2, 0x30(r3)
|
|
/* 802D2E10 002CFD70 38 81 00 5C */ addi r4, r1, 0x5c
|
|
/* 802D2E14 002CFD74 C0 03 00 38 */ lfs f0, 0x38(r3)
|
|
/* 802D2E18 002CFD78 FC 20 08 50 */ fneg f1, f1
|
|
/* 802D2E1C 002CFD7C FC 40 10 50 */ fneg f2, f2
|
|
/* 802D2E20 002CFD80 38 61 00 D8 */ addi r3, r1, 0xd8
|
|
/* 802D2E24 002CFD84 FC 00 00 50 */ fneg f0, f0
|
|
/* 802D2E28 002CFD88 39 01 00 14 */ addi r8, r1, 0x14
|
|
/* 802D2E2C 002CFD8C D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
/* 802D2E30 002CFD90 D0 41 00 14 */ stfs f2, 0x14(r1)
|
|
/* 802D2E34 002CFD94 D0 01 00 1C */ stfs f0, 0x1c(r1)
|
|
/* 802D2E38 002CFD98 4B FF B4 81 */ bl __ct__14CCollisionInfoFRC6CAABoxRC13CMaterialListRC13CMaterialListRC9CVector3fRC9CVector3f
|
|
/* 802D2E3C 002CFD9C 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D2E40 002CFDA0 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D2E44 002CFDA4 38 A0 00 00 */ li r5, 0
|
|
/* 802D2E48 002CFDA8 4B EB 27 D9 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
/* 802D2E4C 002CFDAC 3C 60 80 48 */ lis r3, lbl_80479510@ha
|
|
/* 802D2E50 002CFDB0 7F A5 EB 78 */ mr r5, r29
|
|
/* 802D2E54 002CFDB4 38 63 95 10 */ addi r3, r3, lbl_80479510@l
|
|
/* 802D2E58 002CFDB8 7F C6 F3 78 */ mr r6, r30
|
|
/* 802D2E5C 002CFDBC C0 23 00 40 */ lfs f1, 0x40(r3)
|
|
/* 802D2E60 002CFDC0 38 E3 00 3C */ addi r7, r3, 0x3c
|
|
/* 802D2E64 002CFDC4 C0 43 00 3C */ lfs f2, 0x3c(r3)
|
|
/* 802D2E68 002CFDC8 38 81 00 5C */ addi r4, r1, 0x5c
|
|
/* 802D2E6C 002CFDCC C0 03 00 44 */ lfs f0, 0x44(r3)
|
|
/* 802D2E70 002CFDD0 FC 20 08 50 */ fneg f1, f1
|
|
/* 802D2E74 002CFDD4 FC 40 10 50 */ fneg f2, f2
|
|
/* 802D2E78 002CFDD8 38 61 00 78 */ addi r3, r1, 0x78
|
|
/* 802D2E7C 002CFDDC FC 00 00 50 */ fneg f0, f0
|
|
/* 802D2E80 002CFDE0 39 01 00 08 */ addi r8, r1, 8
|
|
/* 802D2E84 002CFDE4 D0 21 00 0C */ stfs f1, 0xc(r1)
|
|
/* 802D2E88 002CFDE8 D0 41 00 08 */ stfs f2, 8(r1)
|
|
/* 802D2E8C 002CFDEC D0 01 00 10 */ stfs f0, 0x10(r1)
|
|
/* 802D2E90 002CFDF0 4B FF B4 29 */ bl __ct__14CCollisionInfoFRC6CAABoxRC13CMaterialListRC13CMaterialListRC9CVector3fRC9CVector3f
|
|
/* 802D2E94 002CFDF4 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D2E98 002CFDF8 7F E3 FB 78 */ mr r3, r31
|
|
/* 802D2E9C 002CFDFC 38 A0 00 00 */ li r5, 0
|
|
/* 802D2EA0 002CFE00 4B EB 27 81 */ bl Add__18CCollisionInfoListFRC14CCollisionInfob
|
|
lbl_802D2EA4:
|
|
/* 802D2EA4 002CFE04 38 60 00 01 */ li r3, 1
|
|
lbl_802D2EA8:
|
|
/* 802D2EA8 002CFE08 BB 21 02 04 */ lmw r25, 0x204(r1)
|
|
/* 802D2EAC 002CFE0C 80 01 02 24 */ lwz r0, 0x224(r1)
|
|
/* 802D2EB0 002CFE10 7C 08 03 A6 */ mtlr r0
|
|
/* 802D2EB4 002CFE14 38 21 02 20 */ addi r1, r1, 0x220
|
|
/* 802D2EB8 002CFE18 4E 80 00 20 */ blr
|
|
|
|
.global AABoxAABoxIntersection__13CollisionUtilFRC6CAABoxRC6CAABox
|
|
AABoxAABoxIntersection__13CollisionUtilFRC6CAABoxRC6CAABox:
|
|
/* 802D2EBC 002CFE1C C0 04 00 00 */ lfs f0, 0(r4)
|
|
/* 802D2EC0 002CFE20 C0 23 00 00 */ lfs f1, 0(r3)
|
|
/* 802D2EC4 002CFE24 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2EC8 002CFE28 40 81 00 08 */ ble lbl_802D2ED0
|
|
/* 802D2ECC 002CFE2C 48 00 00 08 */ b lbl_802D2ED4
|
|
lbl_802D2ED0:
|
|
/* 802D2ED0 002CFE30 FC 20 00 90 */ fmr f1, f0
|
|
lbl_802D2ED4:
|
|
/* 802D2ED4 002CFE34 C0 04 00 04 */ lfs f0, 4(r4)
|
|
/* 802D2ED8 002CFE38 C0 43 00 04 */ lfs f2, 4(r3)
|
|
/* 802D2EDC 002CFE3C FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D2EE0 002CFE40 40 81 00 08 */ ble lbl_802D2EE8
|
|
/* 802D2EE4 002CFE44 48 00 00 08 */ b lbl_802D2EEC
|
|
lbl_802D2EE8:
|
|
/* 802D2EE8 002CFE48 FC 40 00 90 */ fmr f2, f0
|
|
lbl_802D2EEC:
|
|
/* 802D2EEC 002CFE4C C0 04 00 08 */ lfs f0, 8(r4)
|
|
/* 802D2EF0 002CFE50 C0 63 00 08 */ lfs f3, 8(r3)
|
|
/* 802D2EF4 002CFE54 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D2EF8 002CFE58 40 81 00 08 */ ble lbl_802D2F00
|
|
/* 802D2EFC 002CFE5C 48 00 00 08 */ b lbl_802D2F04
|
|
lbl_802D2F00:
|
|
/* 802D2F00 002CFE60 FC 60 00 90 */ fmr f3, f0
|
|
lbl_802D2F04:
|
|
/* 802D2F04 002CFE64 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D2F08 002CFE68 C0 83 00 0C */ lfs f4, 0xc(r3)
|
|
/* 802D2F0C 002CFE6C FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D2F10 002CFE70 40 80 00 08 */ bge lbl_802D2F18
|
|
/* 802D2F14 002CFE74 48 00 00 08 */ b lbl_802D2F1C
|
|
lbl_802D2F18:
|
|
/* 802D2F18 002CFE78 FC 80 00 90 */ fmr f4, f0
|
|
lbl_802D2F1C:
|
|
/* 802D2F1C 002CFE7C C0 04 00 10 */ lfs f0, 0x10(r4)
|
|
/* 802D2F20 002CFE80 C0 A3 00 10 */ lfs f5, 0x10(r3)
|
|
/* 802D2F24 002CFE84 FC 05 00 40 */ fcmpo cr0, f5, f0
|
|
/* 802D2F28 002CFE88 40 80 00 08 */ bge lbl_802D2F30
|
|
/* 802D2F2C 002CFE8C 48 00 00 08 */ b lbl_802D2F34
|
|
lbl_802D2F30:
|
|
/* 802D2F30 002CFE90 FC A0 00 90 */ fmr f5, f0
|
|
lbl_802D2F34:
|
|
/* 802D2F34 002CFE94 FC 01 20 40 */ fcmpo cr0, f1, f4
|
|
/* 802D2F38 002CFE98 C0 04 00 14 */ lfs f0, 0x14(r4)
|
|
/* 802D2F3C 002CFE9C C0 23 00 14 */ lfs f1, 0x14(r3)
|
|
/* 802D2F40 002CFEA0 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2F44 002CFEA4 41 82 00 2C */ beq lbl_802D2F70
|
|
/* 802D2F48 002CFEA8 FC 02 28 40 */ fcmpo cr0, f2, f5
|
|
/* 802D2F4C 002CFEAC 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2F50 002CFEB0 41 82 00 20 */ beq lbl_802D2F70
|
|
/* 802D2F54 002CFEB4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D2F58 002CFEB8 40 80 00 08 */ bge lbl_802D2F60
|
|
/* 802D2F5C 002CFEBC 48 00 00 08 */ b lbl_802D2F64
|
|
lbl_802D2F60:
|
|
/* 802D2F60 002CFEC0 FC 20 00 90 */ fmr f1, f0
|
|
lbl_802D2F64:
|
|
/* 802D2F64 002CFEC4 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D2F68 002CFEC8 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D2F6C 002CFECC 40 82 00 0C */ bne lbl_802D2F78
|
|
lbl_802D2F70:
|
|
/* 802D2F70 002CFED0 38 60 00 00 */ li r3, 0
|
|
/* 802D2F74 002CFED4 4E 80 00 20 */ blr
|
|
lbl_802D2F78:
|
|
/* 802D2F78 002CFED8 38 60 00 01 */ li r3, 1
|
|
/* 802D2F7C 002CFEDC 4E 80 00 20 */ blr
|
|
|
|
.global RayAABoxIntersection__13CollisionUtilFRC5CMRayRC6CAABoxRfRf
|
|
RayAABoxIntersection__13CollisionUtilFRC5CMRayRC6CAABoxRfRf:
|
|
/* 802D2F80 002CFEE0 94 21 FF E0 */ stwu r1, -0x20(r1)
|
|
/* 802D2F84 002CFEE4 38 00 00 03 */ li r0, 3
|
|
/* 802D2F88 002CFEE8 C0 22 C4 CC */ lfs f1, lbl_805AE1EC@sda21(r2)
|
|
/* 802D2F8C 002CFEEC C0 43 00 00 */ lfs f2, 0(r3)
|
|
/* 802D2F90 002CFEF0 38 E1 00 08 */ addi r7, r1, 8
|
|
/* 802D2F94 002CFEF4 C1 03 00 04 */ lfs f8, 4(r3)
|
|
/* 802D2F98 002CFEF8 39 01 00 14 */ addi r8, r1, 0x14
|
|
/* 802D2F9C 002CFEFC C0 E3 00 08 */ lfs f7, 8(r3)
|
|
/* 802D2FA0 002CFF00 C0 C3 00 2C */ lfs f6, 0x2c(r3)
|
|
/* 802D2FA4 002CFF04 C0 A3 00 30 */ lfs f5, 0x30(r3)
|
|
/* 802D2FA8 002CFF08 C0 83 00 34 */ lfs f4, 0x34(r3)
|
|
/* 802D2FAC 002CFF0C 38 64 00 0C */ addi r3, r4, 0xc
|
|
/* 802D2FB0 002CFF10 D0 41 00 14 */ stfs f2, 0x14(r1)
|
|
/* 802D2FB4 002CFF14 C0 02 C4 D0 */ lfs f0, lbl_805AE1F0@sda21(r2)
|
|
/* 802D2FB8 002CFF18 D0 25 00 00 */ stfs f1, 0(r5)
|
|
/* 802D2FBC 002CFF1C C0 62 C4 B8 */ lfs f3, lbl_805AE1D8@sda21(r2)
|
|
/* 802D2FC0 002CFF20 C0 42 C5 04 */ lfs f2, lbl_805AE224@sda21(r2)
|
|
/* 802D2FC4 002CFF24 D1 01 00 18 */ stfs f8, 0x18(r1)
|
|
/* 802D2FC8 002CFF28 D0 E1 00 1C */ stfs f7, 0x1c(r1)
|
|
/* 802D2FCC 002CFF2C D0 C1 00 08 */ stfs f6, 8(r1)
|
|
/* 802D2FD0 002CFF30 D0 A1 00 0C */ stfs f5, 0xc(r1)
|
|
/* 802D2FD4 002CFF34 D0 81 00 10 */ stfs f4, 0x10(r1)
|
|
/* 802D2FD8 002CFF38 D0 06 00 00 */ stfs f0, 0(r6)
|
|
/* 802D2FDC 002CFF3C 7C 09 03 A6 */ mtctr r0
|
|
lbl_802D2FE0:
|
|
/* 802D2FE0 002CFF40 C0 C7 00 00 */ lfs f6, 0(r7)
|
|
/* 802D2FE4 002CFF44 C0 A8 00 00 */ lfs f5, 0(r8)
|
|
/* 802D2FE8 002CFF48 EC 06 18 28 */ fsubs f0, f6, f3
|
|
/* 802D2FEC 002CFF4C C0 84 00 00 */ lfs f4, 0(r4)
|
|
/* 802D2FF0 002CFF50 C0 E3 00 00 */ lfs f7, 0(r3)
|
|
/* 802D2FF4 002CFF54 FC 00 02 10 */ fabs f0, f0
|
|
/* 802D2FF8 002CFF58 FC 00 10 40 */ fcmpo cr0, f0, f2
|
|
/* 802D2FFC 002CFF5C 40 80 00 1C */ bge lbl_802D3018
|
|
/* 802D3000 002CFF60 FC 05 20 40 */ fcmpo cr0, f5, f4
|
|
/* 802D3004 002CFF64 41 80 00 0C */ blt lbl_802D3010
|
|
/* 802D3008 002CFF68 FC 05 38 40 */ fcmpo cr0, f5, f7
|
|
/* 802D300C 002CFF6C 40 81 00 98 */ ble lbl_802D30A4
|
|
lbl_802D3010:
|
|
/* 802D3010 002CFF70 38 60 00 00 */ li r3, 0
|
|
/* 802D3014 002CFF74 48 00 00 C4 */ b lbl_802D30D8
|
|
lbl_802D3018:
|
|
/* 802D3018 002CFF78 FC 06 18 40 */ fcmpo cr0, f6, f3
|
|
/* 802D301C 002CFF7C 40 80 00 48 */ bge lbl_802D3064
|
|
/* 802D3020 002CFF80 C0 22 C4 BC */ lfs f1, lbl_805AE1DC@sda21(r2)
|
|
/* 802D3024 002CFF84 EC E7 28 28 */ fsubs f7, f7, f5
|
|
/* 802D3028 002CFF88 C0 05 00 00 */ lfs f0, 0(r5)
|
|
/* 802D302C 002CFF8C EC 84 28 28 */ fsubs f4, f4, f5
|
|
/* 802D3030 002CFF90 EC 21 30 24 */ fdivs f1, f1, f6
|
|
/* 802D3034 002CFF94 EC 00 01 B2 */ fmuls f0, f0, f6
|
|
/* 802D3038 002CFF98 FC 07 00 40 */ fcmpo cr0, f7, f0
|
|
/* 802D303C 002CFF9C 40 80 00 0C */ bge lbl_802D3048
|
|
/* 802D3040 002CFFA0 EC 07 00 72 */ fmuls f0, f7, f1
|
|
/* 802D3044 002CFFA4 D0 05 00 00 */ stfs f0, 0(r5)
|
|
lbl_802D3048:
|
|
/* 802D3048 002CFFA8 C0 06 00 00 */ lfs f0, 0(r6)
|
|
/* 802D304C 002CFFAC EC 00 01 B2 */ fmuls f0, f0, f6
|
|
/* 802D3050 002CFFB0 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D3054 002CFFB4 40 81 00 50 */ ble lbl_802D30A4
|
|
/* 802D3058 002CFFB8 EC 04 00 72 */ fmuls f0, f4, f1
|
|
/* 802D305C 002CFFBC D0 06 00 00 */ stfs f0, 0(r6)
|
|
/* 802D3060 002CFFC0 48 00 00 44 */ b lbl_802D30A4
|
|
lbl_802D3064:
|
|
/* 802D3064 002CFFC4 C0 22 C4 BC */ lfs f1, lbl_805AE1DC@sda21(r2)
|
|
/* 802D3068 002CFFC8 EC 84 28 28 */ fsubs f4, f4, f5
|
|
/* 802D306C 002CFFCC C0 05 00 00 */ lfs f0, 0(r5)
|
|
/* 802D3070 002CFFD0 EC A7 28 28 */ fsubs f5, f7, f5
|
|
/* 802D3074 002CFFD4 EC 21 30 24 */ fdivs f1, f1, f6
|
|
/* 802D3078 002CFFD8 EC 00 01 B2 */ fmuls f0, f0, f6
|
|
/* 802D307C 002CFFDC FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D3080 002CFFE0 40 81 00 0C */ ble lbl_802D308C
|
|
/* 802D3084 002CFFE4 EC 04 00 72 */ fmuls f0, f4, f1
|
|
/* 802D3088 002CFFE8 D0 05 00 00 */ stfs f0, 0(r5)
|
|
lbl_802D308C:
|
|
/* 802D308C 002CFFEC C0 06 00 00 */ lfs f0, 0(r6)
|
|
/* 802D3090 002CFFF0 EC 00 01 B2 */ fmuls f0, f0, f6
|
|
/* 802D3094 002CFFF4 FC 05 00 40 */ fcmpo cr0, f5, f0
|
|
/* 802D3098 002CFFF8 40 80 00 0C */ bge lbl_802D30A4
|
|
/* 802D309C 002CFFFC EC 05 00 72 */ fmuls f0, f5, f1
|
|
/* 802D30A0 002D0000 D0 06 00 00 */ stfs f0, 0(r6)
|
|
lbl_802D30A4:
|
|
/* 802D30A4 002D0004 38 E7 00 04 */ addi r7, r7, 4
|
|
/* 802D30A8 002D0008 39 08 00 04 */ addi r8, r8, 4
|
|
/* 802D30AC 002D000C 38 84 00 04 */ addi r4, r4, 4
|
|
/* 802D30B0 002D0010 38 63 00 04 */ addi r3, r3, 4
|
|
/* 802D30B4 002D0014 42 00 FF 2C */ bdnz lbl_802D2FE0
|
|
/* 802D30B8 002D0018 C0 25 00 00 */ lfs f1, 0(r5)
|
|
/* 802D30BC 002D001C C0 06 00 00 */ lfs f0, 0(r6)
|
|
/* 802D30C0 002D0020 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D30C4 002D0024 4C 40 13 82 */ cror 2, 0, 2
|
|
/* 802D30C8 002D0028 40 82 00 0C */ bne lbl_802D30D4
|
|
/* 802D30CC 002D002C 38 60 00 02 */ li r3, 2
|
|
/* 802D30D0 002D0030 48 00 00 08 */ b lbl_802D30D8
|
|
lbl_802D30D4:
|
|
/* 802D30D4 002D0034 38 60 00 00 */ li r3, 0
|
|
lbl_802D30D8:
|
|
/* 802D30D8 002D0038 38 21 00 20 */ addi r1, r1, 0x20
|
|
/* 802D30DC 002D003C 4E 80 00 20 */ blr
|
|
|
|
.global RayAABoxIntersection_Double__13CollisionUtilFRC5CMRayRC6CAABoxR9CVector3fRd
|
|
RayAABoxIntersection_Double__13CollisionUtilFRC5CMRayRC6CAABoxR9CVector3fRd:
|
|
/* 802D30E0 002D0040 94 21 FF 10 */ stwu r1, -0xf0(r1)
|
|
/* 802D30E4 002D0044 7C 08 02 A6 */ mflr r0
|
|
/* 802D30E8 002D0048 90 01 00 F4 */ stw r0, 0xf4(r1)
|
|
/* 802D30EC 002D004C DB E1 00 E0 */ stfd f31, 0xe0(r1)
|
|
/* 802D30F0 002D0050 F3 E1 00 E8 */ psq_st f31, 232(r1), 0, qr0
|
|
/* 802D30F4 002D0054 DB C1 00 D0 */ stfd f30, 0xd0(r1)
|
|
/* 802D30F8 002D0058 F3 C1 00 D8 */ psq_st f30, 216(r1), 0, qr0
|
|
/* 802D30FC 002D005C DB A1 00 C0 */ stfd f29, 0xc0(r1)
|
|
/* 802D3100 002D0060 F3 A1 00 C8 */ psq_st f29, 200(r1), 0, qr0
|
|
/* 802D3104 002D0064 BF 61 00 AC */ stmw r27, 0xac(r1)
|
|
/* 802D3108 002D0068 3C E0 80 3D */ lis r7, lbl_803D0004@ha
|
|
/* 802D310C 002D006C 7C 7B 1B 78 */ mr r27, r3
|
|
/* 802D3110 002D0070 84 67 6A 68 */ lwzu r3, 0x6a68(r7)
|
|
/* 802D3114 002D0074 7C BE 2B 78 */ mr r30, r5
|
|
/* 802D3118 002D0078 7C 9C 23 78 */ mr r28, r4
|
|
/* 802D311C 002D007C 7C DF 33 78 */ mr r31, r6
|
|
/* 802D3120 002D0080 80 A7 00 04 */ lwz r5, lbl_803D0004@l(r7)
|
|
/* 802D3124 002D0084 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D3128 002D0088 80 07 00 08 */ lwz r0, 8(r7)
|
|
/* 802D312C 002D008C 3B A0 00 01 */ li r29, 1
|
|
/* 802D3130 002D0090 90 61 00 08 */ stw r3, 8(r1)
|
|
/* 802D3134 002D0094 38 61 00 90 */ addi r3, r1, 0x90
|
|
/* 802D3138 002D0098 90 A1 00 0C */ stw r5, 0xc(r1)
|
|
/* 802D313C 002D009C 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 802D3140 002D00A0 48 04 14 45 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3144 002D00A4 38 61 00 78 */ addi r3, r1, 0x78
|
|
/* 802D3148 002D00A8 38 9B 00 18 */ addi r4, r27, 0x18
|
|
/* 802D314C 002D00AC 48 04 14 39 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3150 002D00B0 3C 60 80 3D */ lis r3, lbl_803D6A78@ha
|
|
/* 802D3154 002D00B4 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D3158 002D00B8 38 A3 6A 78 */ addi r5, r3, lbl_803D6A78@l
|
|
/* 802D315C 002D00BC 38 61 00 48 */ addi r3, r1, 0x48
|
|
/* 802D3160 002D00C0 C8 45 00 00 */ lfd f2, 0(r5)
|
|
/* 802D3164 002D00C4 C8 25 00 08 */ lfd f1, 8(r5)
|
|
/* 802D3168 002D00C8 C8 05 00 10 */ lfd f0, 0x10(r5)
|
|
/* 802D316C 002D00CC D8 41 00 60 */ stfd f2, 0x60(r1)
|
|
/* 802D3170 002D00D0 D8 21 00 68 */ stfd f1, 0x68(r1)
|
|
/* 802D3174 002D00D4 D8 01 00 70 */ stfd f0, 0x70(r1)
|
|
/* 802D3178 002D00D8 48 04 14 0D */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D317C 002D00DC 38 61 00 30 */ addi r3, r1, 0x30
|
|
/* 802D3180 002D00E0 38 9C 00 0C */ addi r4, r28, 0xc
|
|
/* 802D3184 002D00E4 48 04 14 01 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3188 002D00E8 C8 22 C4 A0 */ lfd f1, lbl_805AE1C0@sda21(r2)
|
|
/* 802D318C 002D00EC 38 61 00 18 */ addi r3, r1, 0x18
|
|
/* 802D3190 002D00F0 FC 40 08 90 */ fmr f2, f1
|
|
/* 802D3194 002D00F4 FC 60 08 90 */ fmr f3, f1
|
|
/* 802D3198 002D00F8 48 04 14 09 */ bl __ct__9CVector3dFddd
|
|
/* 802D319C 002D00FC C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D31A0 002D0100 C8 41 00 78 */ lfd f2, 0x78(r1)
|
|
/* 802D31A4 002D0104 FC 00 10 00 */ fcmpu cr0, f0, f2
|
|
/* 802D31A8 002D0108 41 82 01 24 */ beq lbl_802D32CC
|
|
/* 802D31AC 002D010C C8 61 00 80 */ lfd f3, 0x80(r1)
|
|
/* 802D31B0 002D0110 FC 00 18 00 */ fcmpu cr0, f0, f3
|
|
/* 802D31B4 002D0114 41 82 01 18 */ beq lbl_802D32CC
|
|
/* 802D31B8 002D0118 C8 81 00 88 */ lfd f4, 0x88(r1)
|
|
/* 802D31BC 002D011C FC 00 20 00 */ fcmpu cr0, f0, f4
|
|
/* 802D31C0 002D0120 41 82 01 0C */ beq lbl_802D32CC
|
|
/* 802D31C4 002D0124 C8 21 00 90 */ lfd f1, 0x90(r1)
|
|
/* 802D31C8 002D0128 C8 01 00 48 */ lfd f0, 0x48(r1)
|
|
/* 802D31CC 002D012C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D31D0 002D0130 40 80 00 20 */ bge lbl_802D31F0
|
|
/* 802D31D4 002D0134 FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D31D8 002D0138 38 00 00 01 */ li r0, 1
|
|
/* 802D31DC 002D013C 90 01 00 08 */ stw r0, 8(r1)
|
|
/* 802D31E0 002D0140 3B A0 00 00 */ li r29, 0
|
|
/* 802D31E4 002D0144 FC 00 10 24 */ fdiv f0, f0, f2
|
|
/* 802D31E8 002D0148 D8 01 00 60 */ stfd f0, 0x60(r1)
|
|
/* 802D31EC 002D014C 48 00 00 28 */ b lbl_802D3214
|
|
lbl_802D31F0:
|
|
/* 802D31F0 002D0150 C8 01 00 30 */ lfd f0, 0x30(r1)
|
|
/* 802D31F4 002D0154 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D31F8 002D0158 40 81 00 1C */ ble lbl_802D3214
|
|
/* 802D31FC 002D015C FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D3200 002D0160 38 00 00 00 */ li r0, 0
|
|
/* 802D3204 002D0164 90 01 00 08 */ stw r0, 8(r1)
|
|
/* 802D3208 002D0168 3B A0 00 00 */ li r29, 0
|
|
/* 802D320C 002D016C FC 00 10 24 */ fdiv f0, f0, f2
|
|
/* 802D3210 002D0170 D8 01 00 60 */ stfd f0, 0x60(r1)
|
|
lbl_802D3214:
|
|
/* 802D3214 002D0174 C8 21 00 98 */ lfd f1, 0x98(r1)
|
|
/* 802D3218 002D0178 C8 01 00 50 */ lfd f0, 0x50(r1)
|
|
/* 802D321C 002D017C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3220 002D0180 40 80 00 20 */ bge lbl_802D3240
|
|
/* 802D3224 002D0184 FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D3228 002D0188 38 00 00 01 */ li r0, 1
|
|
/* 802D322C 002D018C 90 01 00 0C */ stw r0, 0xc(r1)
|
|
/* 802D3230 002D0190 3B A0 00 00 */ li r29, 0
|
|
/* 802D3234 002D0194 FC 00 18 24 */ fdiv f0, f0, f3
|
|
/* 802D3238 002D0198 D8 01 00 68 */ stfd f0, 0x68(r1)
|
|
/* 802D323C 002D019C 48 00 00 28 */ b lbl_802D3264
|
|
lbl_802D3240:
|
|
/* 802D3240 002D01A0 C8 01 00 38 */ lfd f0, 0x38(r1)
|
|
/* 802D3244 002D01A4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3248 002D01A8 40 81 00 1C */ ble lbl_802D3264
|
|
/* 802D324C 002D01AC FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D3250 002D01B0 38 00 00 00 */ li r0, 0
|
|
/* 802D3254 002D01B4 90 01 00 0C */ stw r0, 0xc(r1)
|
|
/* 802D3258 002D01B8 3B A0 00 00 */ li r29, 0
|
|
/* 802D325C 002D01BC FC 00 18 24 */ fdiv f0, f0, f3
|
|
/* 802D3260 002D01C0 D8 01 00 68 */ stfd f0, 0x68(r1)
|
|
lbl_802D3264:
|
|
/* 802D3264 002D01C4 C8 21 00 A0 */ lfd f1, 0xa0(r1)
|
|
/* 802D3268 002D01C8 C8 01 00 58 */ lfd f0, 0x58(r1)
|
|
/* 802D326C 002D01CC FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3270 002D01D0 40 80 00 20 */ bge lbl_802D3290
|
|
/* 802D3274 002D01D4 FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D3278 002D01D8 38 00 00 01 */ li r0, 1
|
|
/* 802D327C 002D01DC 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 802D3280 002D01E0 3B A0 00 00 */ li r29, 0
|
|
/* 802D3284 002D01E4 FC 00 20 24 */ fdiv f0, f0, f4
|
|
/* 802D3288 002D01E8 D8 01 00 70 */ stfd f0, 0x70(r1)
|
|
/* 802D328C 002D01EC 48 00 00 28 */ b lbl_802D32B4
|
|
lbl_802D3290:
|
|
/* 802D3290 002D01F0 C8 01 00 40 */ lfd f0, 0x40(r1)
|
|
/* 802D3294 002D01F4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3298 002D01F8 40 81 00 1C */ ble lbl_802D32B4
|
|
/* 802D329C 002D01FC FC 00 08 28 */ fsub f0, f0, f1
|
|
/* 802D32A0 002D0200 38 00 00 00 */ li r0, 0
|
|
/* 802D32A4 002D0204 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 802D32A8 002D0208 3B A0 00 00 */ li r29, 0
|
|
/* 802D32AC 002D020C FC 00 20 24 */ fdiv f0, f0, f4
|
|
/* 802D32B0 002D0210 D8 01 00 70 */ stfd f0, 0x70(r1)
|
|
lbl_802D32B4:
|
|
/* 802D32B4 002D0214 57 A0 06 3F */ clrlwi. r0, r29, 0x18
|
|
/* 802D32B8 002D0218 41 82 01 60 */ beq lbl_802D3418
|
|
/* 802D32BC 002D021C C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D32C0 002D0220 38 60 00 01 */ li r3, 1
|
|
/* 802D32C4 002D0224 D8 1F 00 00 */ stfd f0, 0(r31)
|
|
/* 802D32C8 002D0228 48 00 02 9C */ b lbl_802D3564
|
|
lbl_802D32CC:
|
|
/* 802D32CC 002D022C C8 21 00 90 */ lfd f1, 0x90(r1)
|
|
/* 802D32D0 002D0230 C8 01 00 48 */ lfd f0, 0x48(r1)
|
|
/* 802D32D4 002D0234 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D32D8 002D0238 40 80 00 18 */ bge lbl_802D32F0
|
|
/* 802D32DC 002D023C 38 00 00 01 */ li r0, 1
|
|
/* 802D32E0 002D0240 FF E0 00 90 */ fmr f31, f0
|
|
/* 802D32E4 002D0244 90 01 00 08 */ stw r0, 8(r1)
|
|
/* 802D32E8 002D0248 3B A0 00 00 */ li r29, 0
|
|
/* 802D32EC 002D024C 48 00 00 20 */ b lbl_802D330C
|
|
lbl_802D32F0:
|
|
/* 802D32F0 002D0250 C8 01 00 30 */ lfd f0, 0x30(r1)
|
|
/* 802D32F4 002D0254 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D32F8 002D0258 40 81 00 14 */ ble lbl_802D330C
|
|
/* 802D32FC 002D025C 38 00 00 00 */ li r0, 0
|
|
/* 802D3300 002D0260 FF E0 00 90 */ fmr f31, f0
|
|
/* 802D3304 002D0264 90 01 00 08 */ stw r0, 8(r1)
|
|
/* 802D3308 002D0268 3B A0 00 00 */ li r29, 0
|
|
lbl_802D330C:
|
|
/* 802D330C 002D026C C8 61 00 98 */ lfd f3, 0x98(r1)
|
|
/* 802D3310 002D0270 C8 01 00 50 */ lfd f0, 0x50(r1)
|
|
/* 802D3314 002D0274 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3318 002D0278 40 80 00 18 */ bge lbl_802D3330
|
|
/* 802D331C 002D027C 38 00 00 01 */ li r0, 1
|
|
/* 802D3320 002D0280 FF C0 00 90 */ fmr f30, f0
|
|
/* 802D3324 002D0284 90 01 00 0C */ stw r0, 0xc(r1)
|
|
/* 802D3328 002D0288 3B A0 00 00 */ li r29, 0
|
|
/* 802D332C 002D028C 48 00 00 20 */ b lbl_802D334C
|
|
lbl_802D3330:
|
|
/* 802D3330 002D0290 C8 01 00 38 */ lfd f0, 0x38(r1)
|
|
/* 802D3334 002D0294 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3338 002D0298 40 81 00 14 */ ble lbl_802D334C
|
|
/* 802D333C 002D029C 38 00 00 00 */ li r0, 0
|
|
/* 802D3340 002D02A0 FF C0 00 90 */ fmr f30, f0
|
|
/* 802D3344 002D02A4 90 01 00 0C */ stw r0, 0xc(r1)
|
|
/* 802D3348 002D02A8 3B A0 00 00 */ li r29, 0
|
|
lbl_802D334C:
|
|
/* 802D334C 002D02AC C8 81 00 A0 */ lfd f4, 0xa0(r1)
|
|
/* 802D3350 002D02B0 C8 01 00 58 */ lfd f0, 0x58(r1)
|
|
/* 802D3354 002D02B4 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D3358 002D02B8 40 80 00 18 */ bge lbl_802D3370
|
|
/* 802D335C 002D02BC 38 00 00 01 */ li r0, 1
|
|
/* 802D3360 002D02C0 FF A0 00 90 */ fmr f29, f0
|
|
/* 802D3364 002D02C4 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 802D3368 002D02C8 3B A0 00 00 */ li r29, 0
|
|
/* 802D336C 002D02CC 48 00 00 20 */ b lbl_802D338C
|
|
lbl_802D3370:
|
|
/* 802D3370 002D02D0 C8 01 00 40 */ lfd f0, 0x40(r1)
|
|
/* 802D3374 002D02D4 FC 04 00 40 */ fcmpo cr0, f4, f0
|
|
/* 802D3378 002D02D8 40 81 00 14 */ ble lbl_802D338C
|
|
/* 802D337C 002D02DC 38 00 00 00 */ li r0, 0
|
|
/* 802D3380 002D02E0 FF A0 00 90 */ fmr f29, f0
|
|
/* 802D3384 002D02E4 90 01 00 10 */ stw r0, 0x10(r1)
|
|
/* 802D3388 002D02E8 3B A0 00 00 */ li r29, 0
|
|
lbl_802D338C:
|
|
/* 802D338C 002D02EC 57 A0 06 3F */ clrlwi. r0, r29, 0x18
|
|
/* 802D3390 002D02F0 41 82 00 14 */ beq lbl_802D33A4
|
|
/* 802D3394 002D02F4 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D3398 002D02F8 38 60 00 01 */ li r3, 1
|
|
/* 802D339C 002D02FC D8 1F 00 00 */ stfd f0, 0(r31)
|
|
/* 802D33A0 002D0300 48 00 01 C4 */ b lbl_802D3564
|
|
lbl_802D33A4:
|
|
/* 802D33A4 002D0304 80 01 00 08 */ lwz r0, 8(r1)
|
|
/* 802D33A8 002D0308 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D33AC 002D030C 41 82 00 1C */ beq lbl_802D33C8
|
|
/* 802D33B0 002D0310 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D33B4 002D0314 FC 00 10 00 */ fcmpu cr0, f0, f2
|
|
/* 802D33B8 002D0318 41 82 00 10 */ beq lbl_802D33C8
|
|
/* 802D33BC 002D031C FC 1F 08 28 */ fsub f0, f31, f1
|
|
/* 802D33C0 002D0320 FC 00 10 24 */ fdiv f0, f0, f2
|
|
/* 802D33C4 002D0324 D8 01 00 60 */ stfd f0, 0x60(r1)
|
|
lbl_802D33C8:
|
|
/* 802D33C8 002D0328 80 01 00 0C */ lwz r0, 0xc(r1)
|
|
/* 802D33CC 002D032C 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D33D0 002D0330 41 82 00 20 */ beq lbl_802D33F0
|
|
/* 802D33D4 002D0334 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D33D8 002D0338 C8 21 00 80 */ lfd f1, 0x80(r1)
|
|
/* 802D33DC 002D033C FC 00 08 00 */ fcmpu cr0, f0, f1
|
|
/* 802D33E0 002D0340 41 82 00 10 */ beq lbl_802D33F0
|
|
/* 802D33E4 002D0344 FC 1E 18 28 */ fsub f0, f30, f3
|
|
/* 802D33E8 002D0348 FC 00 08 24 */ fdiv f0, f0, f1
|
|
/* 802D33EC 002D034C D8 01 00 68 */ stfd f0, 0x68(r1)
|
|
lbl_802D33F0:
|
|
/* 802D33F0 002D0350 80 01 00 10 */ lwz r0, 0x10(r1)
|
|
/* 802D33F4 002D0354 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D33F8 002D0358 41 82 00 20 */ beq lbl_802D3418
|
|
/* 802D33FC 002D035C C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D3400 002D0360 C8 21 00 88 */ lfd f1, 0x88(r1)
|
|
/* 802D3404 002D0364 FC 00 08 00 */ fcmpu cr0, f0, f1
|
|
/* 802D3408 002D0368 41 82 00 10 */ beq lbl_802D3418
|
|
/* 802D340C 002D036C FC 1D 20 28 */ fsub f0, f29, f4
|
|
/* 802D3410 002D0370 FC 00 08 24 */ fdiv f0, f0, f1
|
|
/* 802D3414 002D0374 D8 01 00 70 */ stfd f0, 0x70(r1)
|
|
lbl_802D3418:
|
|
/* 802D3418 002D0378 C8 61 00 60 */ lfd f3, 0x60(r1)
|
|
/* 802D341C 002D037C 38 A0 00 00 */ li r5, 0
|
|
/* 802D3420 002D0380 C8 01 00 68 */ lfd f0, 0x68(r1)
|
|
/* 802D3424 002D0384 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3428 002D0388 40 80 00 0C */ bge lbl_802D3434
|
|
/* 802D342C 002D038C 38 A0 00 01 */ li r5, 1
|
|
/* 802D3430 002D0390 FC 60 00 90 */ fmr f3, f0
|
|
lbl_802D3434:
|
|
/* 802D3434 002D0394 C8 01 00 70 */ lfd f0, 0x70(r1)
|
|
/* 802D3438 002D0398 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D343C 002D039C 40 80 00 0C */ bge lbl_802D3448
|
|
/* 802D3440 002D03A0 38 A0 00 02 */ li r5, 2
|
|
/* 802D3444 002D03A4 FC 60 00 90 */ fmr f3, f0
|
|
lbl_802D3448:
|
|
/* 802D3448 002D03A8 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D344C 002D03AC FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3450 002D03B0 40 80 00 0C */ bge lbl_802D345C
|
|
/* 802D3454 002D03B4 38 60 00 00 */ li r3, 0
|
|
/* 802D3458 002D03B8 48 00 01 0C */ b lbl_802D3564
|
|
lbl_802D345C:
|
|
/* 802D345C 002D03BC C8 02 C4 A8 */ lfd f0, lbl_805AE1C8@sda21(r2)
|
|
/* 802D3460 002D03C0 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3464 002D03C4 40 81 00 0C */ ble lbl_802D3470
|
|
/* 802D3468 002D03C8 38 60 00 00 */ li r3, 0
|
|
/* 802D346C 002D03CC 48 00 00 F8 */ b lbl_802D3564
|
|
lbl_802D3470:
|
|
/* 802D3470 002D03D0 2C 05 00 00 */ cmpwi r5, 0
|
|
/* 802D3474 002D03D4 41 82 00 30 */ beq lbl_802D34A4
|
|
/* 802D3478 002D03D8 C8 21 00 90 */ lfd f1, 0x90(r1)
|
|
/* 802D347C 002D03DC C8 01 00 48 */ lfd f0, 0x48(r1)
|
|
/* 802D3480 002D03E0 FC 23 08 BA */ fmadd f1, f3, f2, f1
|
|
/* 802D3484 002D03E4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3488 002D03E8 D8 21 00 18 */ stfd f1, 0x18(r1)
|
|
/* 802D348C 002D03EC 41 80 00 10 */ blt lbl_802D349C
|
|
/* 802D3490 002D03F0 C8 01 00 30 */ lfd f0, 0x30(r1)
|
|
/* 802D3494 002D03F4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3498 002D03F8 40 81 00 0C */ ble lbl_802D34A4
|
|
lbl_802D349C:
|
|
/* 802D349C 002D03FC 38 60 00 00 */ li r3, 0
|
|
/* 802D34A0 002D0400 48 00 00 C4 */ b lbl_802D3564
|
|
lbl_802D34A4:
|
|
/* 802D34A4 002D0404 2C 05 00 01 */ cmpwi r5, 1
|
|
/* 802D34A8 002D0408 41 82 00 34 */ beq lbl_802D34DC
|
|
/* 802D34AC 002D040C C8 41 00 80 */ lfd f2, 0x80(r1)
|
|
/* 802D34B0 002D0410 C8 21 00 98 */ lfd f1, 0x98(r1)
|
|
/* 802D34B4 002D0414 C8 01 00 50 */ lfd f0, 0x50(r1)
|
|
/* 802D34B8 002D0418 FC 23 08 BA */ fmadd f1, f3, f2, f1
|
|
/* 802D34BC 002D041C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D34C0 002D0420 D8 21 00 20 */ stfd f1, 0x20(r1)
|
|
/* 802D34C4 002D0424 41 80 00 10 */ blt lbl_802D34D4
|
|
/* 802D34C8 002D0428 C8 01 00 38 */ lfd f0, 0x38(r1)
|
|
/* 802D34CC 002D042C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D34D0 002D0430 40 81 00 0C */ ble lbl_802D34DC
|
|
lbl_802D34D4:
|
|
/* 802D34D4 002D0434 38 60 00 00 */ li r3, 0
|
|
/* 802D34D8 002D0438 48 00 00 8C */ b lbl_802D3564
|
|
lbl_802D34DC:
|
|
/* 802D34DC 002D043C 2C 05 00 02 */ cmpwi r5, 2
|
|
/* 802D34E0 002D0440 41 82 00 34 */ beq lbl_802D3514
|
|
/* 802D34E4 002D0444 C8 41 00 88 */ lfd f2, 0x88(r1)
|
|
/* 802D34E8 002D0448 C8 21 00 A0 */ lfd f1, 0xa0(r1)
|
|
/* 802D34EC 002D044C C8 01 00 58 */ lfd f0, 0x58(r1)
|
|
/* 802D34F0 002D0450 FC 23 08 BA */ fmadd f1, f3, f2, f1
|
|
/* 802D34F4 002D0454 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D34F8 002D0458 D8 21 00 28 */ stfd f1, 0x28(r1)
|
|
/* 802D34FC 002D045C 41 80 00 10 */ blt lbl_802D350C
|
|
/* 802D3500 002D0460 C8 01 00 40 */ lfd f0, 0x40(r1)
|
|
/* 802D3504 002D0464 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3508 002D0468 40 81 00 0C */ ble lbl_802D3514
|
|
lbl_802D350C:
|
|
/* 802D350C 002D046C 38 60 00 00 */ li r3, 0
|
|
/* 802D3510 002D0470 48 00 00 54 */ b lbl_802D3564
|
|
lbl_802D3514:
|
|
/* 802D3514 002D0474 3C 60 80 5A */ lis r3, skZero3f@ha
|
|
/* 802D3518 002D0478 D8 7F 00 00 */ stfd f3, 0(r31)
|
|
/* 802D351C 002D047C 38 83 66 A0 */ addi r4, r3, skZero3f@l
|
|
/* 802D3520 002D0480 54 A0 10 3A */ slwi r0, r5, 2
|
|
/* 802D3524 002D0484 C0 04 00 00 */ lfs f0, 0(r4)
|
|
/* 802D3528 002D0488 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D352C 002D048C 7C 03 00 2E */ lwzx r0, r3, r0
|
|
/* 802D3530 002D0490 D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D3534 002D0494 2C 00 00 01 */ cmpwi r0, 1
|
|
/* 802D3538 002D0498 C0 04 00 04 */ lfs f0, 4(r4)
|
|
/* 802D353C 002D049C D0 1E 00 04 */ stfs f0, 4(r30)
|
|
/* 802D3540 002D04A0 C0 04 00 08 */ lfs f0, 8(r4)
|
|
/* 802D3544 002D04A4 D0 1E 00 08 */ stfs f0, 8(r30)
|
|
/* 802D3548 002D04A8 40 82 00 0C */ bne lbl_802D3554
|
|
/* 802D354C 002D04AC C0 02 C4 C0 */ lfs f0, lbl_805AE1E0@sda21(r2)
|
|
/* 802D3550 002D04B0 48 00 00 08 */ b lbl_802D3558
|
|
lbl_802D3554:
|
|
/* 802D3554 002D04B4 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
lbl_802D3558:
|
|
/* 802D3558 002D04B8 54 A0 10 3A */ slwi r0, r5, 2
|
|
/* 802D355C 002D04BC 38 60 00 02 */ li r3, 2
|
|
/* 802D3560 002D04C0 7C 1E 05 2E */ stfsx f0, r30, r0
|
|
lbl_802D3564:
|
|
/* 802D3564 002D04C4 E3 E1 00 E8 */ psq_l f31, 232(r1), 0, qr0
|
|
/* 802D3568 002D04C8 CB E1 00 E0 */ lfd f31, 0xe0(r1)
|
|
/* 802D356C 002D04CC E3 C1 00 D8 */ psq_l f30, 216(r1), 0, qr0
|
|
/* 802D3570 002D04D0 CB C1 00 D0 */ lfd f30, 0xd0(r1)
|
|
/* 802D3574 002D04D4 E3 A1 00 C8 */ psq_l f29, 200(r1), 0, qr0
|
|
/* 802D3578 002D04D8 CB A1 00 C0 */ lfd f29, 0xc0(r1)
|
|
/* 802D357C 002D04DC BB 61 00 AC */ lmw r27, 0xac(r1)
|
|
/* 802D3580 002D04E0 80 01 00 F4 */ lwz r0, 0xf4(r1)
|
|
/* 802D3584 002D04E4 7C 08 03 A6 */ mtlr r0
|
|
/* 802D3588 002D04E8 38 21 00 F0 */ addi r1, r1, 0xf0
|
|
/* 802D358C 002D04EC 4E 80 00 20 */ blr
|
|
|
|
.global RayAABoxIntersection__13CollisionUtilFRC5CMRayRC6CAABoxR9CVector3fRf
|
|
RayAABoxIntersection__13CollisionUtilFRC5CMRayRC6CAABoxR9CVector3fRf:
|
|
/* 802D3590 002D04F0 94 21 FF C0 */ stwu r1, -0x40(r1)
|
|
/* 802D3594 002D04F4 3C E0 80 3D */ lis r7, lbl_803D6A50@ha
|
|
/* 802D3598 002D04F8 3D 00 80 3D */ lis r8, lbl_803D6A5C@ha
|
|
/* 802D359C 002D04FC C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D35A0 002D0500 93 E1 00 3C */ stw r31, 0x3c(r1)
|
|
/* 802D35A4 002D0504 39 27 6A 50 */ addi r9, r7, lbl_803D6A50@l
|
|
/* 802D35A8 002D0508 3C E0 80 5A */ lis r7, skZero3f@ha
|
|
/* 802D35AC 002D050C 39 48 6A 5C */ addi r10, r8, lbl_803D6A5C@l
|
|
/* 802D35B0 002D0510 93 C1 00 38 */ stw r30, 0x38(r1)
|
|
/* 802D35B4 002D0514 3B C0 00 01 */ li r30, 1
|
|
/* 802D35B8 002D0518 C4 87 66 A0 */ lfsu f4, skZero3f@l(r7)
|
|
/* 802D35BC 002D051C C0 03 00 18 */ lfs f0, 0x18(r3)
|
|
/* 802D35C0 002D0520 83 E9 00 00 */ lwz r31, 0(r9)
|
|
/* 802D35C4 002D0524 81 89 00 04 */ lwz r12, 4(r9)
|
|
/* 802D35C8 002D0528 FC 01 00 00 */ fcmpu cr0, f1, f0
|
|
/* 802D35CC 002D052C 81 69 00 08 */ lwz r11, 8(r9)
|
|
/* 802D35D0 002D0530 81 2A 00 00 */ lwz r9, 0(r10)
|
|
/* 802D35D4 002D0534 81 0A 00 04 */ lwz r8, 4(r10)
|
|
/* 802D35D8 002D0538 80 0A 00 08 */ lwz r0, 8(r10)
|
|
/* 802D35DC 002D053C C0 67 00 04 */ lfs f3, 4(r7)
|
|
/* 802D35E0 002D0540 C0 47 00 08 */ lfs f2, 8(r7)
|
|
/* 802D35E4 002D0544 93 E1 00 20 */ stw r31, 0x20(r1)
|
|
/* 802D35E8 002D0548 91 81 00 24 */ stw r12, 0x24(r1)
|
|
/* 802D35EC 002D054C 91 61 00 28 */ stw r11, 0x28(r1)
|
|
/* 802D35F0 002D0550 91 21 00 14 */ stw r9, 0x14(r1)
|
|
/* 802D35F4 002D0554 91 01 00 18 */ stw r8, 0x18(r1)
|
|
/* 802D35F8 002D0558 90 01 00 1C */ stw r0, 0x1c(r1)
|
|
/* 802D35FC 002D055C D0 81 00 08 */ stfs f4, 8(r1)
|
|
/* 802D3600 002D0560 D0 61 00 0C */ stfs f3, 0xc(r1)
|
|
/* 802D3604 002D0564 D0 41 00 10 */ stfs f2, 0x10(r1)
|
|
/* 802D3608 002D0568 41 82 01 24 */ beq lbl_802D372C
|
|
/* 802D360C 002D056C C0 63 00 1C */ lfs f3, 0x1c(r3)
|
|
/* 802D3610 002D0570 FC 01 18 00 */ fcmpu cr0, f1, f3
|
|
/* 802D3614 002D0574 41 82 01 18 */ beq lbl_802D372C
|
|
/* 802D3618 002D0578 C0 83 00 20 */ lfs f4, 0x20(r3)
|
|
/* 802D361C 002D057C FC 01 20 00 */ fcmpu cr0, f1, f4
|
|
/* 802D3620 002D0580 41 82 01 0C */ beq lbl_802D372C
|
|
/* 802D3624 002D0584 C0 23 00 00 */ lfs f1, 0(r3)
|
|
/* 802D3628 002D0588 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D362C 002D058C FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D3630 002D0590 40 80 00 20 */ bge lbl_802D3650
|
|
/* 802D3634 002D0594 EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D3638 002D0598 38 00 00 01 */ li r0, 1
|
|
/* 802D363C 002D059C 90 01 00 20 */ stw r0, 0x20(r1)
|
|
/* 802D3640 002D05A0 3B C0 00 00 */ li r30, 0
|
|
/* 802D3644 002D05A4 EC 21 00 24 */ fdivs f1, f1, f0
|
|
/* 802D3648 002D05A8 D0 21 00 14 */ stfs f1, 0x14(r1)
|
|
/* 802D364C 002D05AC 48 00 00 28 */ b lbl_802D3674
|
|
lbl_802D3650:
|
|
/* 802D3650 002D05B0 C0 44 00 0C */ lfs f2, 0xc(r4)
|
|
/* 802D3654 002D05B4 FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D3658 002D05B8 40 81 00 1C */ ble lbl_802D3674
|
|
/* 802D365C 002D05BC EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D3660 002D05C0 38 00 00 00 */ li r0, 0
|
|
/* 802D3664 002D05C4 90 01 00 20 */ stw r0, 0x20(r1)
|
|
/* 802D3668 002D05C8 3B C0 00 00 */ li r30, 0
|
|
/* 802D366C 002D05CC EC 21 00 24 */ fdivs f1, f1, f0
|
|
/* 802D3670 002D05D0 D0 21 00 14 */ stfs f1, 0x14(r1)
|
|
lbl_802D3674:
|
|
/* 802D3674 002D05D4 C0 23 00 04 */ lfs f1, 4(r3)
|
|
/* 802D3678 002D05D8 C0 44 00 04 */ lfs f2, 4(r4)
|
|
/* 802D367C 002D05DC FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D3680 002D05E0 40 80 00 20 */ bge lbl_802D36A0
|
|
/* 802D3684 002D05E4 EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D3688 002D05E8 38 00 00 01 */ li r0, 1
|
|
/* 802D368C 002D05EC 90 01 00 24 */ stw r0, 0x24(r1)
|
|
/* 802D3690 002D05F0 3B C0 00 00 */ li r30, 0
|
|
/* 802D3694 002D05F4 EC 21 18 24 */ fdivs f1, f1, f3
|
|
/* 802D3698 002D05F8 D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
/* 802D369C 002D05FC 48 00 00 28 */ b lbl_802D36C4
|
|
lbl_802D36A0:
|
|
/* 802D36A0 002D0600 C0 44 00 10 */ lfs f2, 0x10(r4)
|
|
/* 802D36A4 002D0604 FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D36A8 002D0608 40 81 00 1C */ ble lbl_802D36C4
|
|
/* 802D36AC 002D060C EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D36B0 002D0610 38 00 00 00 */ li r0, 0
|
|
/* 802D36B4 002D0614 90 01 00 24 */ stw r0, 0x24(r1)
|
|
/* 802D36B8 002D0618 3B C0 00 00 */ li r30, 0
|
|
/* 802D36BC 002D061C EC 21 18 24 */ fdivs f1, f1, f3
|
|
/* 802D36C0 002D0620 D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
lbl_802D36C4:
|
|
/* 802D36C4 002D0624 C0 23 00 08 */ lfs f1, 8(r3)
|
|
/* 802D36C8 002D0628 C0 44 00 08 */ lfs f2, 8(r4)
|
|
/* 802D36CC 002D062C FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D36D0 002D0630 40 80 00 20 */ bge lbl_802D36F0
|
|
/* 802D36D4 002D0634 EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D36D8 002D0638 38 00 00 01 */ li r0, 1
|
|
/* 802D36DC 002D063C 90 01 00 28 */ stw r0, 0x28(r1)
|
|
/* 802D36E0 002D0640 3B C0 00 00 */ li r30, 0
|
|
/* 802D36E4 002D0644 EC 21 20 24 */ fdivs f1, f1, f4
|
|
/* 802D36E8 002D0648 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
/* 802D36EC 002D064C 48 00 00 28 */ b lbl_802D3714
|
|
lbl_802D36F0:
|
|
/* 802D36F0 002D0650 C0 44 00 14 */ lfs f2, 0x14(r4)
|
|
/* 802D36F4 002D0654 FC 01 10 40 */ fcmpo cr0, f1, f2
|
|
/* 802D36F8 002D0658 40 81 00 1C */ ble lbl_802D3714
|
|
/* 802D36FC 002D065C EC 22 08 28 */ fsubs f1, f2, f1
|
|
/* 802D3700 002D0660 38 00 00 00 */ li r0, 0
|
|
/* 802D3704 002D0664 90 01 00 28 */ stw r0, 0x28(r1)
|
|
/* 802D3708 002D0668 3B C0 00 00 */ li r30, 0
|
|
/* 802D370C 002D066C EC 21 20 24 */ fdivs f1, f1, f4
|
|
/* 802D3710 002D0670 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
lbl_802D3714:
|
|
/* 802D3714 002D0674 57 C0 06 3F */ clrlwi. r0, r30, 0x18
|
|
/* 802D3718 002D0678 41 82 01 60 */ beq lbl_802D3878
|
|
/* 802D371C 002D067C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3720 002D0680 38 60 00 01 */ li r3, 1
|
|
/* 802D3724 002D0684 D0 06 00 00 */ stfs f0, 0(r6)
|
|
/* 802D3728 002D0688 48 00 02 98 */ b lbl_802D39C0
|
|
lbl_802D372C:
|
|
/* 802D372C 002D068C C0 43 00 00 */ lfs f2, 0(r3)
|
|
/* 802D3730 002D0690 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D3734 002D0694 FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D3738 002D0698 40 80 00 18 */ bge lbl_802D3750
|
|
/* 802D373C 002D069C 38 00 00 01 */ li r0, 1
|
|
/* 802D3740 002D06A0 FC A0 08 90 */ fmr f5, f1
|
|
/* 802D3744 002D06A4 90 01 00 20 */ stw r0, 0x20(r1)
|
|
/* 802D3748 002D06A8 3B C0 00 00 */ li r30, 0
|
|
/* 802D374C 002D06AC 48 00 00 20 */ b lbl_802D376C
|
|
lbl_802D3750:
|
|
/* 802D3750 002D06B0 C0 24 00 0C */ lfs f1, 0xc(r4)
|
|
/* 802D3754 002D06B4 FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D3758 002D06B8 40 81 00 14 */ ble lbl_802D376C
|
|
/* 802D375C 002D06BC 38 00 00 00 */ li r0, 0
|
|
/* 802D3760 002D06C0 FC A0 08 90 */ fmr f5, f1
|
|
/* 802D3764 002D06C4 90 01 00 20 */ stw r0, 0x20(r1)
|
|
/* 802D3768 002D06C8 3B C0 00 00 */ li r30, 0
|
|
lbl_802D376C:
|
|
/* 802D376C 002D06CC C0 63 00 04 */ lfs f3, 4(r3)
|
|
/* 802D3770 002D06D0 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D3774 002D06D4 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D3778 002D06D8 40 80 00 18 */ bge lbl_802D3790
|
|
/* 802D377C 002D06DC 38 00 00 01 */ li r0, 1
|
|
/* 802D3780 002D06E0 FC C0 08 90 */ fmr f6, f1
|
|
/* 802D3784 002D06E4 90 01 00 24 */ stw r0, 0x24(r1)
|
|
/* 802D3788 002D06E8 3B C0 00 00 */ li r30, 0
|
|
/* 802D378C 002D06EC 48 00 00 20 */ b lbl_802D37AC
|
|
lbl_802D3790:
|
|
/* 802D3790 002D06F0 C0 24 00 10 */ lfs f1, 0x10(r4)
|
|
/* 802D3794 002D06F4 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D3798 002D06F8 40 81 00 14 */ ble lbl_802D37AC
|
|
/* 802D379C 002D06FC 38 00 00 00 */ li r0, 0
|
|
/* 802D37A0 002D0700 FC C0 08 90 */ fmr f6, f1
|
|
/* 802D37A4 002D0704 90 01 00 24 */ stw r0, 0x24(r1)
|
|
/* 802D37A8 002D0708 3B C0 00 00 */ li r30, 0
|
|
lbl_802D37AC:
|
|
/* 802D37AC 002D070C C0 83 00 08 */ lfs f4, 8(r3)
|
|
/* 802D37B0 002D0710 C0 24 00 08 */ lfs f1, 8(r4)
|
|
/* 802D37B4 002D0714 FC 04 08 40 */ fcmpo cr0, f4, f1
|
|
/* 802D37B8 002D0718 40 80 00 18 */ bge lbl_802D37D0
|
|
/* 802D37BC 002D071C 38 00 00 01 */ li r0, 1
|
|
/* 802D37C0 002D0720 FC E0 08 90 */ fmr f7, f1
|
|
/* 802D37C4 002D0724 90 01 00 28 */ stw r0, 0x28(r1)
|
|
/* 802D37C8 002D0728 3B C0 00 00 */ li r30, 0
|
|
/* 802D37CC 002D072C 48 00 00 20 */ b lbl_802D37EC
|
|
lbl_802D37D0:
|
|
/* 802D37D0 002D0730 C0 24 00 14 */ lfs f1, 0x14(r4)
|
|
/* 802D37D4 002D0734 FC 04 08 40 */ fcmpo cr0, f4, f1
|
|
/* 802D37D8 002D0738 40 81 00 14 */ ble lbl_802D37EC
|
|
/* 802D37DC 002D073C 38 00 00 00 */ li r0, 0
|
|
/* 802D37E0 002D0740 FC E0 08 90 */ fmr f7, f1
|
|
/* 802D37E4 002D0744 90 01 00 28 */ stw r0, 0x28(r1)
|
|
/* 802D37E8 002D0748 3B C0 00 00 */ li r30, 0
|
|
lbl_802D37EC:
|
|
/* 802D37EC 002D074C 57 C0 06 3F */ clrlwi. r0, r30, 0x18
|
|
/* 802D37F0 002D0750 41 82 00 14 */ beq lbl_802D3804
|
|
/* 802D37F4 002D0754 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D37F8 002D0758 38 60 00 01 */ li r3, 1
|
|
/* 802D37FC 002D075C D0 06 00 00 */ stfs f0, 0(r6)
|
|
/* 802D3800 002D0760 48 00 01 C0 */ b lbl_802D39C0
|
|
lbl_802D3804:
|
|
/* 802D3804 002D0764 80 01 00 20 */ lwz r0, 0x20(r1)
|
|
/* 802D3808 002D0768 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D380C 002D076C 41 82 00 1C */ beq lbl_802D3828
|
|
/* 802D3810 002D0770 C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3814 002D0774 FC 01 00 00 */ fcmpu cr0, f1, f0
|
|
/* 802D3818 002D0778 41 82 00 10 */ beq lbl_802D3828
|
|
/* 802D381C 002D077C EC 25 10 28 */ fsubs f1, f5, f2
|
|
/* 802D3820 002D0780 EC 21 00 24 */ fdivs f1, f1, f0
|
|
/* 802D3824 002D0784 D0 21 00 14 */ stfs f1, 0x14(r1)
|
|
lbl_802D3828:
|
|
/* 802D3828 002D0788 80 01 00 24 */ lwz r0, 0x24(r1)
|
|
/* 802D382C 002D078C 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D3830 002D0790 41 82 00 20 */ beq lbl_802D3850
|
|
/* 802D3834 002D0794 C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3838 002D0798 C0 43 00 1C */ lfs f2, 0x1c(r3)
|
|
/* 802D383C 002D079C FC 01 10 00 */ fcmpu cr0, f1, f2
|
|
/* 802D3840 002D07A0 41 82 00 10 */ beq lbl_802D3850
|
|
/* 802D3844 002D07A4 EC 26 18 28 */ fsubs f1, f6, f3
|
|
/* 802D3848 002D07A8 EC 21 10 24 */ fdivs f1, f1, f2
|
|
/* 802D384C 002D07AC D0 21 00 18 */ stfs f1, 0x18(r1)
|
|
lbl_802D3850:
|
|
/* 802D3850 002D07B0 80 01 00 28 */ lwz r0, 0x28(r1)
|
|
/* 802D3854 002D07B4 2C 00 00 02 */ cmpwi r0, 2
|
|
/* 802D3858 002D07B8 41 82 00 20 */ beq lbl_802D3878
|
|
/* 802D385C 002D07BC C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3860 002D07C0 C0 43 00 20 */ lfs f2, 0x20(r3)
|
|
/* 802D3864 002D07C4 FC 01 10 00 */ fcmpu cr0, f1, f2
|
|
/* 802D3868 002D07C8 41 82 00 10 */ beq lbl_802D3878
|
|
/* 802D386C 002D07CC EC 27 20 28 */ fsubs f1, f7, f4
|
|
/* 802D3870 002D07D0 EC 21 10 24 */ fdivs f1, f1, f2
|
|
/* 802D3874 002D07D4 D0 21 00 1C */ stfs f1, 0x1c(r1)
|
|
lbl_802D3878:
|
|
/* 802D3878 002D07D8 C0 61 00 14 */ lfs f3, 0x14(r1)
|
|
/* 802D387C 002D07DC 39 00 00 00 */ li r8, 0
|
|
/* 802D3880 002D07E0 C0 21 00 18 */ lfs f1, 0x18(r1)
|
|
/* 802D3884 002D07E4 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D3888 002D07E8 40 80 00 0C */ bge lbl_802D3894
|
|
/* 802D388C 002D07EC 39 00 00 01 */ li r8, 1
|
|
/* 802D3890 002D07F0 FC 60 08 90 */ fmr f3, f1
|
|
lbl_802D3894:
|
|
/* 802D3894 002D07F4 C0 21 00 1C */ lfs f1, 0x1c(r1)
|
|
/* 802D3898 002D07F8 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D389C 002D07FC 40 80 00 0C */ bge lbl_802D38A8
|
|
/* 802D38A0 002D0800 39 00 00 02 */ li r8, 2
|
|
/* 802D38A4 002D0804 FC 60 08 90 */ fmr f3, f1
|
|
lbl_802D38A8:
|
|
/* 802D38A8 002D0808 C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D38AC 002D080C FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D38B0 002D0810 40 80 00 0C */ bge lbl_802D38BC
|
|
/* 802D38B4 002D0814 38 60 00 00 */ li r3, 0
|
|
/* 802D38B8 002D0818 48 00 01 08 */ b lbl_802D39C0
|
|
lbl_802D38BC:
|
|
/* 802D38BC 002D081C C0 22 C4 BC */ lfs f1, lbl_805AE1DC@sda21(r2)
|
|
/* 802D38C0 002D0820 FC 03 08 40 */ fcmpo cr0, f3, f1
|
|
/* 802D38C4 002D0824 40 81 00 0C */ ble lbl_802D38D0
|
|
/* 802D38C8 002D0828 38 60 00 00 */ li r3, 0
|
|
/* 802D38CC 002D082C 48 00 00 F4 */ b lbl_802D39C0
|
|
lbl_802D38D0:
|
|
/* 802D38D0 002D0830 2C 08 00 00 */ cmpwi r8, 0
|
|
/* 802D38D4 002D0834 41 82 00 30 */ beq lbl_802D3904
|
|
/* 802D38D8 002D0838 C0 43 00 00 */ lfs f2, 0(r3)
|
|
/* 802D38DC 002D083C C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D38E0 002D0840 EC 43 10 3A */ fmadds f2, f3, f0, f2
|
|
/* 802D38E4 002D0844 FC 02 08 40 */ fcmpo cr0, f2, f1
|
|
/* 802D38E8 002D0848 D0 41 00 08 */ stfs f2, 8(r1)
|
|
/* 802D38EC 002D084C 41 80 00 10 */ blt lbl_802D38FC
|
|
/* 802D38F0 002D0850 C0 04 00 0C */ lfs f0, 0xc(r4)
|
|
/* 802D38F4 002D0854 FC 02 00 40 */ fcmpo cr0, f2, f0
|
|
/* 802D38F8 002D0858 40 81 00 0C */ ble lbl_802D3904
|
|
lbl_802D38FC:
|
|
/* 802D38FC 002D085C 38 60 00 00 */ li r3, 0
|
|
/* 802D3900 002D0860 48 00 00 C0 */ b lbl_802D39C0
|
|
lbl_802D3904:
|
|
/* 802D3904 002D0864 2C 08 00 01 */ cmpwi r8, 1
|
|
/* 802D3908 002D0868 41 82 00 34 */ beq lbl_802D393C
|
|
/* 802D390C 002D086C C0 43 00 1C */ lfs f2, 0x1c(r3)
|
|
/* 802D3910 002D0870 C0 23 00 04 */ lfs f1, 4(r3)
|
|
/* 802D3914 002D0874 C0 04 00 04 */ lfs f0, 4(r4)
|
|
/* 802D3918 002D0878 EC 23 08 BA */ fmadds f1, f3, f2, f1
|
|
/* 802D391C 002D087C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3920 002D0880 D0 21 00 0C */ stfs f1, 0xc(r1)
|
|
/* 802D3924 002D0884 41 80 00 10 */ blt lbl_802D3934
|
|
/* 802D3928 002D0888 C0 04 00 10 */ lfs f0, 0x10(r4)
|
|
/* 802D392C 002D088C FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3930 002D0890 40 81 00 0C */ ble lbl_802D393C
|
|
lbl_802D3934:
|
|
/* 802D3934 002D0894 38 60 00 00 */ li r3, 0
|
|
/* 802D3938 002D0898 48 00 00 88 */ b lbl_802D39C0
|
|
lbl_802D393C:
|
|
/* 802D393C 002D089C 2C 08 00 02 */ cmpwi r8, 2
|
|
/* 802D3940 002D08A0 41 82 00 34 */ beq lbl_802D3974
|
|
/* 802D3944 002D08A4 C0 43 00 20 */ lfs f2, 0x20(r3)
|
|
/* 802D3948 002D08A8 C0 23 00 08 */ lfs f1, 8(r3)
|
|
/* 802D394C 002D08AC C0 04 00 08 */ lfs f0, 8(r4)
|
|
/* 802D3950 002D08B0 EC 23 08 BA */ fmadds f1, f3, f2, f1
|
|
/* 802D3954 002D08B4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3958 002D08B8 D0 21 00 10 */ stfs f1, 0x10(r1)
|
|
/* 802D395C 002D08BC 41 80 00 10 */ blt lbl_802D396C
|
|
/* 802D3960 002D08C0 C0 04 00 14 */ lfs f0, 0x14(r4)
|
|
/* 802D3964 002D08C4 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3968 002D08C8 40 81 00 0C */ ble lbl_802D3974
|
|
lbl_802D396C:
|
|
/* 802D396C 002D08CC 38 60 00 00 */ li r3, 0
|
|
/* 802D3970 002D08D0 48 00 00 50 */ b lbl_802D39C0
|
|
lbl_802D3974:
|
|
/* 802D3974 002D08D4 D0 66 00 00 */ stfs f3, 0(r6)
|
|
/* 802D3978 002D08D8 3C 60 80 5A */ lis r3, skZero3f@ha
|
|
/* 802D397C 002D08DC 55 00 10 3A */ slwi r0, r8, 2
|
|
/* 802D3980 002D08E0 C0 03 66 A0 */ lfs f0, skZero3f@l(r3)
|
|
/* 802D3984 002D08E4 38 61 00 20 */ addi r3, r1, 0x20
|
|
/* 802D3988 002D08E8 7C 03 00 2E */ lwzx r0, r3, r0
|
|
/* 802D398C 002D08EC D0 05 00 00 */ stfs f0, 0(r5)
|
|
/* 802D3990 002D08F0 2C 00 00 01 */ cmpwi r0, 1
|
|
/* 802D3994 002D08F4 C0 07 00 04 */ lfs f0, 4(r7)
|
|
/* 802D3998 002D08F8 D0 05 00 04 */ stfs f0, 4(r5)
|
|
/* 802D399C 002D08FC C0 07 00 08 */ lfs f0, 8(r7)
|
|
/* 802D39A0 002D0900 D0 05 00 08 */ stfs f0, 8(r5)
|
|
/* 802D39A4 002D0904 40 82 00 0C */ bne lbl_802D39B0
|
|
/* 802D39A8 002D0908 C0 02 C4 C0 */ lfs f0, lbl_805AE1E0@sda21(r2)
|
|
/* 802D39AC 002D090C 48 00 00 08 */ b lbl_802D39B4
|
|
lbl_802D39B0:
|
|
/* 802D39B0 002D0910 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
lbl_802D39B4:
|
|
/* 802D39B4 002D0914 55 00 10 3A */ slwi r0, r8, 2
|
|
/* 802D39B8 002D0918 38 60 00 02 */ li r3, 2
|
|
/* 802D39BC 002D091C 7C 05 05 2E */ stfsx f0, r5, r0
|
|
lbl_802D39C0:
|
|
/* 802D39C0 002D0920 83 E1 00 3C */ lwz r31, 0x3c(r1)
|
|
/* 802D39C4 002D0924 83 C1 00 38 */ lwz r30, 0x38(r1)
|
|
/* 802D39C8 002D0928 38 21 00 40 */ addi r1, r1, 0x40
|
|
/* 802D39CC 002D092C 4E 80 00 20 */ blr
|
|
|
|
.global RaySphereIntersection_Double__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRd
|
|
RaySphereIntersection_Double__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3fRd:
|
|
/* 802D39D0 002D0930 94 21 FF 30 */ stwu r1, -0xd0(r1)
|
|
/* 802D39D4 002D0934 7C 08 02 A6 */ mflr r0
|
|
/* 802D39D8 002D0938 90 01 00 D4 */ stw r0, 0xd4(r1)
|
|
/* 802D39DC 002D093C DB E1 00 C0 */ stfd f31, 0xc0(r1)
|
|
/* 802D39E0 002D0940 F3 E1 00 C8 */ psq_st f31, 200(r1), 0, qr0
|
|
/* 802D39E4 002D0944 DB C1 00 B0 */ stfd f30, 0xb0(r1)
|
|
/* 802D39E8 002D0948 F3 C1 00 B8 */ psq_st f30, 184(r1), 0, qr0
|
|
/* 802D39EC 002D094C BF 41 00 98 */ stmw r26, 0x98(r1)
|
|
/* 802D39F0 002D0950 7C 7A 1B 78 */ mr r26, r3
|
|
/* 802D39F4 002D0954 7C 9B 23 78 */ mr r27, r4
|
|
/* 802D39F8 002D0958 7C BC 2B 78 */ mr r28, r5
|
|
/* 802D39FC 002D095C 7C DD 33 78 */ mr r29, r6
|
|
/* 802D3A00 002D0960 7F 44 D3 78 */ mr r4, r26
|
|
/* 802D3A04 002D0964 38 61 00 20 */ addi r3, r1, 0x20
|
|
/* 802D3A08 002D0968 3B C0 00 00 */ li r30, 0
|
|
/* 802D3A0C 002D096C 48 04 0B 79 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3A10 002D0970 7C 7F 1B 78 */ mr r31, r3
|
|
/* 802D3A14 002D0974 7F 64 DB 78 */ mr r4, r27
|
|
/* 802D3A18 002D0978 38 61 00 38 */ addi r3, r1, 0x38
|
|
/* 802D3A1C 002D097C 48 04 0B 69 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3A20 002D0980 7C 64 1B 78 */ mr r4, r3
|
|
/* 802D3A24 002D0984 7F E5 FB 78 */ mr r5, r31
|
|
/* 802D3A28 002D0988 38 61 00 50 */ addi r3, r1, 0x50
|
|
/* 802D3A2C 002D098C 48 04 09 69 */ bl __mi__FRC9CVector3dRC9CVector3d
|
|
/* 802D3A30 002D0990 C8 41 00 50 */ lfd f2, 0x50(r1)
|
|
/* 802D3A34 002D0994 7F 84 E3 78 */ mr r4, r28
|
|
/* 802D3A38 002D0998 C8 21 00 58 */ lfd f1, 0x58(r1)
|
|
/* 802D3A3C 002D099C 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D3A40 002D09A0 C8 01 00 60 */ lfd f0, 0x60(r1)
|
|
/* 802D3A44 002D09A4 D8 41 00 80 */ stfd f2, 0x80(r1)
|
|
/* 802D3A48 002D09A8 D8 21 00 88 */ stfd f1, 0x88(r1)
|
|
/* 802D3A4C 002D09AC D8 01 00 90 */ stfd f0, 0x90(r1)
|
|
/* 802D3A50 002D09B0 48 04 0B 35 */ bl __ct__9CVector3dFRC9CVector3f
|
|
/* 802D3A54 002D09B4 C8 41 00 08 */ lfd f2, 8(r1)
|
|
/* 802D3A58 002D09B8 38 61 00 80 */ addi r3, r1, 0x80
|
|
/* 802D3A5C 002D09BC C8 21 00 10 */ lfd f1, 0x10(r1)
|
|
/* 802D3A60 002D09C0 38 81 00 68 */ addi r4, r1, 0x68
|
|
/* 802D3A64 002D09C4 C8 01 00 18 */ lfd f0, 0x18(r1)
|
|
/* 802D3A68 002D09C8 D8 41 00 68 */ stfd f2, 0x68(r1)
|
|
/* 802D3A6C 002D09CC C3 FA 00 0C */ lfs f31, 0xc(r26)
|
|
/* 802D3A70 002D09D0 D8 21 00 70 */ stfd f1, 0x70(r1)
|
|
/* 802D3A74 002D09D4 D8 01 00 78 */ stfd f0, 0x78(r1)
|
|
/* 802D3A78 002D09D8 48 04 09 F5 */ bl Dot__9CVector3dFRC9CVector3dRC9CVector3d
|
|
/* 802D3A7C 002D09DC C8 02 C4 B0 */ lfd f0, lbl_805AE1D0@sda21(r2)
|
|
/* 802D3A80 002D09E0 38 61 00 80 */ addi r3, r1, 0x80
|
|
/* 802D3A84 002D09E4 FF C0 00 72 */ fmul f30, f0, f1
|
|
/* 802D3A88 002D09E8 48 04 0A 99 */ bl MagSquared__9CVector3dCFv
|
|
/* 802D3A8C 002D09EC FC 5F 0F FC */ fnmsub f2, f31, f31, f1
|
|
/* 802D3A90 002D09F0 C8 22 C5 08 */ lfd f1, lbl_805AE228@sda21(r2)
|
|
/* 802D3A94 002D09F4 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D3A98 002D09F8 FC 21 00 B2 */ fmul f1, f1, f2
|
|
/* 802D3A9C 002D09FC FC 3E 0F B8 */ fmsub f1, f30, f30, f1
|
|
/* 802D3AA0 002D0A00 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3AA4 002D0A04 4C 41 13 82 */ cror 2, 1, 2
|
|
/* 802D3AA8 002D0A08 40 82 00 38 */ bne lbl_802D3AE0
|
|
/* 802D3AAC 002D0A0C 48 04 19 C5 */ bl SqrtD__5CMathFd
|
|
/* 802D3AB0 002D0A10 FC 40 F0 50 */ fneg f2, f30
|
|
/* 802D3AB4 002D0A14 C8 62 C5 10 */ lfd f3, lbl_805AE230@sda21(r2)
|
|
/* 802D3AB8 002D0A18 C8 02 C4 A0 */ lfd f0, lbl_805AE1C0@sda21(r2)
|
|
/* 802D3ABC 002D0A1C C8 9D 00 00 */ lfd f4, 0(r29)
|
|
/* 802D3AC0 002D0A20 FC 22 08 28 */ fsub f1, f2, f1
|
|
/* 802D3AC4 002D0A24 FC 00 20 00 */ fcmpu cr0, f0, f4
|
|
/* 802D3AC8 002D0A28 FC 03 00 72 */ fmul f0, f3, f1
|
|
/* 802D3ACC 002D0A2C 41 82 00 0C */ beq lbl_802D3AD8
|
|
/* 802D3AD0 002D0A30 FC 00 20 40 */ fcmpo cr0, f0, f4
|
|
/* 802D3AD4 002D0A34 40 80 00 0C */ bge lbl_802D3AE0
|
|
lbl_802D3AD8:
|
|
/* 802D3AD8 002D0A38 D8 1D 00 00 */ stfd f0, 0(r29)
|
|
/* 802D3ADC 002D0A3C 3B C0 00 01 */ li r30, 1
|
|
lbl_802D3AE0:
|
|
/* 802D3AE0 002D0A40 7F C3 F3 78 */ mr r3, r30
|
|
/* 802D3AE4 002D0A44 E3 E1 00 C8 */ psq_l f31, 200(r1), 0, qr0
|
|
/* 802D3AE8 002D0A48 CB E1 00 C0 */ lfd f31, 0xc0(r1)
|
|
/* 802D3AEC 002D0A4C E3 C1 00 B8 */ psq_l f30, 184(r1), 0, qr0
|
|
/* 802D3AF0 002D0A50 CB C1 00 B0 */ lfd f30, 0xb0(r1)
|
|
/* 802D3AF4 002D0A54 BB 41 00 98 */ lmw r26, 0x98(r1)
|
|
/* 802D3AF8 002D0A58 80 01 00 D4 */ lwz r0, 0xd4(r1)
|
|
/* 802D3AFC 002D0A5C 7C 08 03 A6 */ mtlr r0
|
|
/* 802D3B00 002D0A60 38 21 00 D0 */ addi r1, r1, 0xd0
|
|
/* 802D3B04 002D0A64 4E 80 00 20 */ blr
|
|
|
|
.global RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f
|
|
RaySphereIntersection__13CollisionUtilFRC7CSphereRC9CVector3fRC9CVector3ffRfR9CVector3f:
|
|
/* 802D3B08 002D0A68 94 21 FF A0 */ stwu r1, -0x60(r1)
|
|
/* 802D3B0C 002D0A6C 7C 08 02 A6 */ mflr r0
|
|
/* 802D3B10 002D0A70 90 01 00 64 */ stw r0, 0x64(r1)
|
|
/* 802D3B14 002D0A74 DB E1 00 50 */ stfd f31, 0x50(r1)
|
|
/* 802D3B18 002D0A78 F3 E1 00 58 */ psq_st f31, 88(r1), 0, qr0
|
|
/* 802D3B1C 002D0A7C DB C1 00 40 */ stfd f30, 0x40(r1)
|
|
/* 802D3B20 002D0A80 F3 C1 00 48 */ psq_st f30, 72(r1), 0, qr0
|
|
/* 802D3B24 002D0A84 DB A1 00 30 */ stfd f29, 0x30(r1)
|
|
/* 802D3B28 002D0A88 F3 A1 00 38 */ psq_st f29, 56(r1), 0, qr0
|
|
/* 802D3B2C 002D0A8C DB 81 00 20 */ stfd f28, 0x20(r1)
|
|
/* 802D3B30 002D0A90 F3 81 00 28 */ psq_st f28, 40(r1), 0, qr0
|
|
/* 802D3B34 002D0A94 93 E1 00 1C */ stw r31, 0x1c(r1)
|
|
/* 802D3B38 002D0A98 93 C1 00 18 */ stw r30, 0x18(r1)
|
|
/* 802D3B3C 002D0A9C 93 A1 00 14 */ stw r29, 0x14(r1)
|
|
/* 802D3B40 002D0AA0 93 81 00 10 */ stw r28, 0x10(r1)
|
|
/* 802D3B44 002D0AA4 7C 9C 23 78 */ mr r28, r4
|
|
/* 802D3B48 002D0AA8 7C BD 2B 78 */ mr r29, r5
|
|
/* 802D3B4C 002D0AAC C0 43 00 04 */ lfs f2, 4(r3)
|
|
/* 802D3B50 002D0AB0 FF C0 08 90 */ fmr f30, f1
|
|
/* 802D3B54 002D0AB4 C0 04 00 04 */ lfs f0, 4(r4)
|
|
/* 802D3B58 002D0AB8 7C DE 33 78 */ mr r30, r6
|
|
/* 802D3B5C 002D0ABC C0 23 00 0C */ lfs f1, 0xc(r3)
|
|
/* 802D3B60 002D0AC0 7C FF 3B 78 */ mr r31, r7
|
|
/* 802D3B64 002D0AC4 EC A2 00 28 */ fsubs f5, f2, f0
|
|
/* 802D3B68 002D0AC8 C0 05 00 04 */ lfs f0, 4(r5)
|
|
/* 802D3B6C 002D0ACC EF E1 00 72 */ fmuls f31, f1, f1
|
|
/* 802D3B70 002D0AD0 C0 63 00 00 */ lfs f3, 0(r3)
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|
/* 802D3B74 002D0AD4 C0 44 00 00 */ lfs f2, 0(r4)
|
|
/* 802D3B78 002D0AD8 EC 25 00 32 */ fmuls f1, f5, f0
|
|
/* 802D3B7C 002D0ADC C0 83 00 08 */ lfs f4, 8(r3)
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|
/* 802D3B80 002D0AE0 EC 05 01 72 */ fmuls f0, f5, f5
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|
/* 802D3B84 002D0AE4 EC A3 10 28 */ fsubs f5, f3, f2
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|
/* 802D3B88 002D0AE8 C0 64 00 08 */ lfs f3, 8(r4)
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|
/* 802D3B8C 002D0AEC C0 45 00 00 */ lfs f2, 0(r5)
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|
/* 802D3B90 002D0AF0 EC 84 18 28 */ fsubs f4, f4, f3
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|
/* 802D3B94 002D0AF4 C0 65 00 08 */ lfs f3, 8(r5)
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|
/* 802D3B98 002D0AF8 EC 45 08 BA */ fmadds f2, f5, f2, f1
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|
/* 802D3B9C 002D0AFC EC 25 01 7A */ fmadds f1, f5, f5, f0
|
|
/* 802D3BA0 002D0B00 C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
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|
/* 802D3BA4 002D0B04 EF A4 10 FA */ fmadds f29, f4, f3, f2
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|
/* 802D3BA8 002D0B08 EF 84 09 3A */ fmadds f28, f4, f4, f1
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|
/* 802D3BAC 002D0B0C FC 1D 00 40 */ fcmpo cr0, f29, f0
|
|
/* 802D3BB0 002D0B10 EC 1D 07 72 */ fmuls f0, f29, f29
|
|
/* 802D3BB4 002D0B14 40 80 00 14 */ bge lbl_802D3BC8
|
|
/* 802D3BB8 002D0B18 FC 1C F8 40 */ fcmpo cr0, f28, f31
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|
/* 802D3BBC 002D0B1C 40 81 00 0C */ ble lbl_802D3BC8
|
|
/* 802D3BC0 002D0B20 38 60 00 00 */ li r3, 0
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|
/* 802D3BC4 002D0B24 48 00 00 9C */ b lbl_802D3C60
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|
lbl_802D3BC8:
|
|
/* 802D3BC8 002D0B28 EC 3C 00 28 */ fsubs f1, f28, f0
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|
/* 802D3BCC 002D0B2C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3BD0 002D0B30 EC 3F 08 28 */ fsubs f1, f31, f1
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|
/* 802D3BD4 002D0B34 FC 01 00 40 */ fcmpo cr0, f1, f0
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|
/* 802D3BD8 002D0B38 40 80 00 0C */ bge lbl_802D3BE4
|
|
/* 802D3BDC 002D0B3C 38 60 00 00 */ li r3, 0
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|
/* 802D3BE0 002D0B40 48 00 00 80 */ b lbl_802D3C60
|
|
lbl_802D3BE4:
|
|
/* 802D3BE4 002D0B44 48 04 19 1D */ bl SqrtF__5CMathFf
|
|
/* 802D3BE8 002D0B48 FC 1C F8 40 */ fcmpo cr0, f28, f31
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|
/* 802D3BEC 002D0B4C 40 81 00 0C */ ble lbl_802D3BF8
|
|
/* 802D3BF0 002D0B50 EC 1D 08 28 */ fsubs f0, f29, f1
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|
/* 802D3BF4 002D0B54 48 00 00 08 */ b lbl_802D3BFC
|
|
lbl_802D3BF8:
|
|
/* 802D3BF8 002D0B58 EC 1D 08 2A */ fadds f0, f29, f1
|
|
lbl_802D3BFC:
|
|
/* 802D3BFC 002D0B5C D0 1E 00 00 */ stfs f0, 0(r30)
|
|
/* 802D3C00 002D0B60 C0 DE 00 00 */ lfs f6, 0(r30)
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|
/* 802D3C04 002D0B64 FC 06 F0 40 */ fcmpo cr0, f6, f30
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|
/* 802D3C08 002D0B68 41 80 00 10 */ blt lbl_802D3C18
|
|
/* 802D3C0C 002D0B6C C0 02 C4 B8 */ lfs f0, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3C10 002D0B70 FC 00 F0 00 */ fcmpu cr0, f0, f30
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|
/* 802D3C14 002D0B74 40 82 00 48 */ bne lbl_802D3C5C
|
|
lbl_802D3C18:
|
|
/* 802D3C18 002D0B78 C0 1D 00 00 */ lfs f0, 0(r29)
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|
/* 802D3C1C 002D0B7C 38 60 00 01 */ li r3, 1
|
|
/* 802D3C20 002D0B80 C0 7D 00 04 */ lfs f3, 4(r29)
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|
/* 802D3C24 002D0B84 EC 06 00 32 */ fmuls f0, f6, f0
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|
/* 802D3C28 002D0B88 C0 3C 00 00 */ lfs f1, 0(r28)
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|
/* 802D3C2C 002D0B8C C0 5D 00 08 */ lfs f2, 8(r29)
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|
/* 802D3C30 002D0B90 EC 86 00 F2 */ fmuls f4, f6, f3
|
|
/* 802D3C34 002D0B94 C0 BC 00 04 */ lfs f5, 4(r28)
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|
/* 802D3C38 002D0B98 EC 01 00 2A */ fadds f0, f1, f0
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|
/* 802D3C3C 002D0B9C C0 7C 00 08 */ lfs f3, 8(r28)
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|
/* 802D3C40 002D0BA0 EC 26 00 B2 */ fmuls f1, f6, f2
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|
/* 802D3C44 002D0BA4 EC 45 20 2A */ fadds f2, f5, f4
|
|
/* 802D3C48 002D0BA8 D0 1F 00 00 */ stfs f0, 0(r31)
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|
/* 802D3C4C 002D0BAC EC 03 08 2A */ fadds f0, f3, f1
|
|
/* 802D3C50 002D0BB0 D0 5F 00 04 */ stfs f2, 4(r31)
|
|
/* 802D3C54 002D0BB4 D0 1F 00 08 */ stfs f0, 8(r31)
|
|
/* 802D3C58 002D0BB8 48 00 00 08 */ b lbl_802D3C60
|
|
lbl_802D3C5C:
|
|
/* 802D3C5C 002D0BBC 38 60 00 00 */ li r3, 0
|
|
lbl_802D3C60:
|
|
/* 802D3C60 002D0BC0 E3 E1 00 58 */ psq_l f31, 88(r1), 0, qr0
|
|
/* 802D3C64 002D0BC4 CB E1 00 50 */ lfd f31, 0x50(r1)
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|
/* 802D3C68 002D0BC8 E3 C1 00 48 */ psq_l f30, 72(r1), 0, qr0
|
|
/* 802D3C6C 002D0BCC CB C1 00 40 */ lfd f30, 0x40(r1)
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|
/* 802D3C70 002D0BD0 E3 A1 00 38 */ psq_l f29, 56(r1), 0, qr0
|
|
/* 802D3C74 002D0BD4 CB A1 00 30 */ lfd f29, 0x30(r1)
|
|
/* 802D3C78 002D0BD8 E3 81 00 28 */ psq_l f28, 40(r1), 0, qr0
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|
/* 802D3C7C 002D0BDC CB 81 00 20 */ lfd f28, 0x20(r1)
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|
/* 802D3C80 002D0BE0 83 E1 00 1C */ lwz r31, 0x1c(r1)
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|
/* 802D3C84 002D0BE4 83 C1 00 18 */ lwz r30, 0x18(r1)
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|
/* 802D3C88 002D0BE8 83 A1 00 14 */ lwz r29, 0x14(r1)
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|
/* 802D3C8C 002D0BEC 80 01 00 64 */ lwz r0, 0x64(r1)
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|
/* 802D3C90 002D0BF0 83 81 00 10 */ lwz r28, 0x10(r1)
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|
/* 802D3C94 002D0BF4 7C 08 03 A6 */ mtlr r0
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|
/* 802D3C98 002D0BF8 38 21 00 60 */ addi r1, r1, 0x60
|
|
/* 802D3C9C 002D0BFC 4E 80 00 20 */ blr
|
|
|
|
.global RayPlaneIntersection__13CollisionUtilFRC9CVector3fRC9CVector3fRC6CPlaneR9CVector3f
|
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RayPlaneIntersection__13CollisionUtilFRC9CVector3fRC9CVector3fRC6CPlaneR9CVector3f:
|
|
/* 802D3CA0 002D0C00 94 21 FF A0 */ stwu r1, -0x60(r1)
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|
/* 802D3CA4 002D0C04 7C 08 02 A6 */ mflr r0
|
|
/* 802D3CA8 002D0C08 90 01 00 64 */ stw r0, 0x64(r1)
|
|
/* 802D3CAC 002D0C0C DB E1 00 50 */ stfd f31, 0x50(r1)
|
|
/* 802D3CB0 002D0C10 F3 E1 00 58 */ psq_st f31, 88(r1), 0, qr0
|
|
/* 802D3CB4 002D0C14 DB C1 00 40 */ stfd f30, 0x40(r1)
|
|
/* 802D3CB8 002D0C18 F3 C1 00 48 */ psq_st f30, 72(r1), 0, qr0
|
|
/* 802D3CBC 002D0C1C DB A1 00 30 */ stfd f29, 0x30(r1)
|
|
/* 802D3CC0 002D0C20 F3 A1 00 38 */ psq_st f29, 56(r1), 0, qr0
|
|
/* 802D3CC4 002D0C24 93 E1 00 2C */ stw r31, 0x2c(r1)
|
|
/* 802D3CC8 002D0C28 93 C1 00 28 */ stw r30, 0x28(r1)
|
|
/* 802D3CCC 002D0C2C 93 A1 00 24 */ stw r29, 0x24(r1)
|
|
/* 802D3CD0 002D0C30 7C 7D 1B 78 */ mr r29, r3
|
|
/* 802D3CD4 002D0C34 7C BE 2B 78 */ mr r30, r5
|
|
/* 802D3CD8 002D0C38 C0 24 00 04 */ lfs f1, 4(r4)
|
|
/* 802D3CDC 002D0C3C 7C DF 33 78 */ mr r31, r6
|
|
/* 802D3CE0 002D0C40 C0 03 00 04 */ lfs f0, 4(r3)
|
|
/* 802D3CE4 002D0C44 38 61 00 08 */ addi r3, r1, 8
|
|
/* 802D3CE8 002D0C48 C0 64 00 08 */ lfs f3, 8(r4)
|
|
/* 802D3CEC 002D0C4C C0 5D 00 08 */ lfs f2, 8(r29)
|
|
/* 802D3CF0 002D0C50 EC 81 00 28 */ fsubs f4, f1, f0
|
|
/* 802D3CF4 002D0C54 C0 24 00 00 */ lfs f1, 0(r4)
|
|
/* 802D3CF8 002D0C58 38 81 00 14 */ addi r4, r1, 0x14
|
|
/* 802D3CFC 002D0C5C C0 1D 00 00 */ lfs f0, 0(r29)
|
|
/* 802D3D00 002D0C60 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D3D04 002D0C64 D0 81 00 18 */ stfs f4, 0x18(r1)
|
|
/* 802D3D08 002D0C68 EC 01 00 28 */ fsubs f0, f1, f0
|
|
/* 802D3D0C 002D0C6C C3 C5 00 00 */ lfs f30, 0(r5)
|
|
/* 802D3D10 002D0C70 D0 41 00 1C */ stfs f2, 0x1c(r1)
|
|
/* 802D3D14 002D0C74 C3 A5 00 04 */ lfs f29, 4(r5)
|
|
/* 802D3D18 002D0C78 D0 01 00 14 */ stfs f0, 0x14(r1)
|
|
/* 802D3D1C 002D0C7C C3 E5 00 08 */ lfs f31, 8(r5)
|
|
/* 802D3D20 002D0C80 48 04 0B 31 */ bl AsNormalized__9CVector3fCFv
|
|
/* 802D3D24 002D0C84 C0 01 00 0C */ lfs f0, 0xc(r1)
|
|
/* 802D3D28 002D0C88 C0 41 00 08 */ lfs f2, 8(r1)
|
|
/* 802D3D2C 002D0C8C EC 20 07 72 */ fmuls f1, f0, f29
|
|
/* 802D3D30 002D0C90 C0 61 00 10 */ lfs f3, 0x10(r1)
|
|
/* 802D3D34 002D0C94 C0 02 C5 18 */ lfs f0, lbl_805AE238@sda21(r2)
|
|
/* 802D3D38 002D0C98 EC 22 0F BA */ fmadds f1, f2, f30, f1
|
|
/* 802D3D3C 002D0C9C EC 23 0F FA */ fmadds f1, f3, f31, f1
|
|
/* 802D3D40 002D0CA0 FC 20 0A 10 */ fabs f1, f1
|
|
/* 802D3D44 002D0CA4 FC 20 08 18 */ frsp f1, f1
|
|
/* 802D3D48 002D0CA8 FC 01 00 40 */ fcmpo cr0, f1, f0
|
|
/* 802D3D4C 002D0CAC 40 80 00 0C */ bge lbl_802D3D58
|
|
/* 802D3D50 002D0CB0 38 60 00 00 */ li r3, 0
|
|
/* 802D3D54 002D0CB4 48 00 00 8C */ b lbl_802D3DE0
|
|
lbl_802D3D58:
|
|
/* 802D3D58 002D0CB8 C1 1D 00 04 */ lfs f8, 4(r29)
|
|
/* 802D3D5C 002D0CBC C0 A1 00 18 */ lfs f5, 0x18(r1)
|
|
/* 802D3D60 002D0CC0 EC 28 07 72 */ fmuls f1, f8, f29
|
|
/* 802D3D64 002D0CC4 C0 FD 00 00 */ lfs f7, 0(r29)
|
|
/* 802D3D68 002D0CC8 C1 3D 00 08 */ lfs f9, 8(r29)
|
|
/* 802D3D6C 002D0CCC EC 05 07 72 */ fmuls f0, f5, f29
|
|
/* 802D3D70 002D0CD0 C0 81 00 14 */ lfs f4, 0x14(r1)
|
|
/* 802D3D74 002D0CD4 EC 67 0F BA */ fmadds f3, f7, f30, f1
|
|
/* 802D3D78 002D0CD8 C0 5E 00 0C */ lfs f2, 0xc(r30)
|
|
/* 802D3D7C 002D0CDC EC 24 07 BA */ fmadds f1, f4, f30, f0
|
|
/* 802D3D80 002D0CE0 C0 C1 00 1C */ lfs f6, 0x1c(r1)
|
|
/* 802D3D84 002D0CE4 EC 69 1F FA */ fmadds f3, f9, f31, f3
|
|
/* 802D3D88 002D0CE8 C0 02 C5 1C */ lfs f0, lbl_805AE23C@sda21(r2)
|
|
/* 802D3D8C 002D0CEC EC 26 0F FA */ fmadds f1, f6, f31, f1
|
|
/* 802D3D90 002D0CF0 EC 43 10 28 */ fsubs f2, f3, f2
|
|
/* 802D3D94 002D0CF4 FC 40 10 50 */ fneg f2, f2
|
|
/* 802D3D98 002D0CF8 EC 62 08 24 */ fdivs f3, f2, f1
|
|
/* 802D3D9C 002D0CFC FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3DA0 002D0D00 41 80 00 10 */ blt lbl_802D3DB0
|
|
/* 802D3DA4 002D0D04 C0 02 C5 20 */ lfs f0, lbl_805AE240@sda21(r2)
|
|
/* 802D3DA8 002D0D08 FC 03 00 40 */ fcmpo cr0, f3, f0
|
|
/* 802D3DAC 002D0D0C 40 81 00 0C */ ble lbl_802D3DB8
|
|
lbl_802D3DB0:
|
|
/* 802D3DB0 002D0D10 38 60 00 00 */ li r3, 0
|
|
/* 802D3DB4 002D0D14 48 00 00 2C */ b lbl_802D3DE0
|
|
lbl_802D3DB8:
|
|
/* 802D3DB8 002D0D18 EC 43 01 32 */ fmuls f2, f3, f4
|
|
/* 802D3DBC 002D0D1C 38 60 00 01 */ li r3, 1
|
|
/* 802D3DC0 002D0D20 EC 23 01 72 */ fmuls f1, f3, f5
|
|
/* 802D3DC4 002D0D24 EC 03 01 B2 */ fmuls f0, f3, f6
|
|
/* 802D3DC8 002D0D28 EC 47 10 2A */ fadds f2, f7, f2
|
|
/* 802D3DCC 002D0D2C EC 28 08 2A */ fadds f1, f8, f1
|
|
/* 802D3DD0 002D0D30 EC 09 00 2A */ fadds f0, f9, f0
|
|
/* 802D3DD4 002D0D34 D0 5F 00 00 */ stfs f2, 0(r31)
|
|
/* 802D3DD8 002D0D38 D0 3F 00 04 */ stfs f1, 4(r31)
|
|
/* 802D3DDC 002D0D3C D0 1F 00 08 */ stfs f0, 8(r31)
|
|
lbl_802D3DE0:
|
|
/* 802D3DE0 002D0D40 E3 E1 00 58 */ psq_l f31, 88(r1), 0, qr0
|
|
/* 802D3DE4 002D0D44 CB E1 00 50 */ lfd f31, 0x50(r1)
|
|
/* 802D3DE8 002D0D48 E3 C1 00 48 */ psq_l f30, 72(r1), 0, qr0
|
|
/* 802D3DEC 002D0D4C CB C1 00 40 */ lfd f30, 0x40(r1)
|
|
/* 802D3DF0 002D0D50 E3 A1 00 38 */ psq_l f29, 56(r1), 0, qr0
|
|
/* 802D3DF4 002D0D54 CB A1 00 30 */ lfd f29, 0x30(r1)
|
|
/* 802D3DF8 002D0D58 83 E1 00 2C */ lwz r31, 0x2c(r1)
|
|
/* 802D3DFC 002D0D5C 83 C1 00 28 */ lwz r30, 0x28(r1)
|
|
/* 802D3E00 002D0D60 80 01 00 64 */ lwz r0, 0x64(r1)
|
|
/* 802D3E04 002D0D64 83 A1 00 24 */ lwz r29, 0x24(r1)
|
|
/* 802D3E08 002D0D68 7C 08 03 A6 */ mtlr r0
|
|
/* 802D3E0C 002D0D6C 38 21 00 60 */ addi r1, r1, 0x60
|
|
/* 802D3E10 002D0D70 4E 80 00 20 */ blr
|
|
|
|
.global __sinit_CollisionUtil_cpp
|
|
__sinit_CollisionUtil_cpp:
|
|
/* 802D3E14 002D0D74 C0 42 C4 C0 */ lfs f2, lbl_805AE1E0@sda21(r2)
|
|
/* 802D3E18 002D0D78 3C 60 80 48 */ lis r3, lbl_80479510@ha
|
|
/* 802D3E1C 002D0D7C C0 22 C4 B8 */ lfs f1, lbl_805AE1D8@sda21(r2)
|
|
/* 802D3E20 002D0D80 D4 43 95 10 */ stfsu f2, lbl_80479510@l(r3)
|
|
/* 802D3E24 002D0D84 C0 02 C4 BC */ lfs f0, lbl_805AE1DC@sda21(r2)
|
|
/* 802D3E28 002D0D88 D0 23 00 04 */ stfs f1, 4(r3)
|
|
/* 802D3E2C 002D0D8C D0 23 00 08 */ stfs f1, 8(r3)
|
|
/* 802D3E30 002D0D90 D0 03 00 0C */ stfs f0, 0xc(r3)
|
|
/* 802D3E34 002D0D94 D0 23 00 10 */ stfs f1, 0x10(r3)
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/* 802D3E38 002D0D98 D0 23 00 14 */ stfs f1, 0x14(r3)
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/* 802D3E3C 002D0D9C D0 23 00 18 */ stfs f1, 0x18(r3)
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/* 802D3E40 002D0DA0 D0 43 00 1C */ stfs f2, 0x1c(r3)
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/* 802D3E44 002D0DA4 D0 23 00 20 */ stfs f1, 0x20(r3)
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/* 802D3E48 002D0DA8 D0 23 00 24 */ stfs f1, 0x24(r3)
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/* 802D3E4C 002D0DAC D0 03 00 28 */ stfs f0, 0x28(r3)
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/* 802D3E50 002D0DB0 D0 23 00 2C */ stfs f1, 0x2c(r3)
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/* 802D3E54 002D0DB4 D0 23 00 30 */ stfs f1, 0x30(r3)
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/* 802D3E58 002D0DB8 D0 23 00 34 */ stfs f1, 0x34(r3)
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/* 802D3E5C 002D0DBC D0 43 00 38 */ stfs f2, 0x38(r3)
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/* 802D3E60 002D0DC0 D0 23 00 3C */ stfs f1, 0x3c(r3)
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/* 802D3E64 002D0DC4 D0 23 00 40 */ stfs f1, 0x40(r3)
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/* 802D3E68 002D0DC8 D0 03 00 44 */ stfs f0, 0x44(r3)
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/* 802D3E6C 002D0DCC 4E 80 00 20 */ blr
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