2022-12-14 00:16:59 +00:00
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#include "compiler/StrengthReduction.h"
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#include "compiler/BitVectors.h"
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#include "compiler/CompilerTools.h"
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#include "compiler/LoopDetection.h"
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#include "compiler/PCode.h"
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#include "compiler/PCodeInfo.h"
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#include "compiler/UseDefChains.h"
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int strengthreducedloops;
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static PCode *findinitializer(Loop *loop, short reg) {
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UInt32 *vec;
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PCode *best;
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RegUseOrDef *list;
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vec = usedefinfo[loop->body->blockIndex].defvec8;
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best = NULL;
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for (list = reg_Defs[RegClass_GPR][reg]; list; list = list->next) {
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if (
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!(bitvectorgetbit(Defs[list->id].pcode->block->blockIndex, loop->memberblocks)) &&
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bitvectorgetbit(list->id, vec)
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)
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{
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if (best)
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return NULL;
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best = Defs[list->id].pcode;
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}
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}
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if (best) {
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if (best->op == PC_LI || best->op == PC_ADDI || best->op == PC_ADD)
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return best;
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}
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return NULL;
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}
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static int isbasicinductionvariable(Loop *loop, short reg, SInt32 step) {
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RegUseOrDef *list;
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PCode *instr;
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for (list = reg_Defs[RegClass_GPR][reg]; list; list = list->next) {
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instr = Defs[list->id].pcode;
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if (bitvectorgetbit(instr->block->blockIndex, loop->memberblocks)) {
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if (instr->op != PC_ADDI)
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return 0;
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if (instr->args[1].data.reg.reg != reg)
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return 0;
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if (instr->args[2].data.imm.value != step)
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return 0;
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}
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}
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return 1;
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}
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static void addbasicinductionvariable(Loop *loop, short reg, SInt32 step) {
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BasicInductionVar *biv;
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RegUseOrDef *list;
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PCode *instr;
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InstrList *instrList;
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for (biv = loop->basicInductionVars; biv; biv = biv->next) {
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if (biv->reg == reg)
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return;
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}
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biv = oalloc(sizeof(BasicInductionVar));
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biv->next = loop->basicInductionVars;
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loop->basicInductionVars = biv;
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biv->loop = loop;
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biv->inductionVars = NULL;
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biv->instrsC = NULL;
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biv->step = step;
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biv->reg = reg;
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for (list = reg_Defs[RegClass_GPR][reg]; list; list = list->next) {
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instr = Defs[list->id].pcode;
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if (bitvectorgetbit(instr->block->blockIndex, loop->memberblocks)) {
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instrList = oalloc(sizeof(InstrList));
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instrList->next = biv->instrsC;
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biv->instrsC = instrList;
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instrList->instr = instr;
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}
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}
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biv->initializer = findinitializer(loop, reg);
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}
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static void findbasicinductionvariables(Loop *loop) {
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SInt16 step;
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BlockList *block;
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PCode *instr;
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short reg;
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for (block = loop->blocks; block; block = block->next) {
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for (instr = block->block->firstPCode; instr; instr = instr->nextPCode) {
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if (instr->op == PC_ADDI) {
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if (
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(reg = instr->args[0].data.reg.reg) >= 32 &&
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instr->args[1].data.reg.reg == reg &&
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isbasicinductionvariable(loop, reg, step = instr->args[2].data.imm.value)
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)
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addbasicinductionvariable(loop, reg, step);
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}
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}
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}
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}
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static void findallbasicinductionvariables(Loop *loop) {
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while (loop) {
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if (loop->children)
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findallbasicinductionvariables(loop->children);
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findbasicinductionvariables(loop);
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loop = loop->nextSibling;
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}
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}
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static int isinductionvariable(BasicInductionVar *biv, int useID, SInt32 *result1, short *result2, short *result3, Loop **result4) {
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RegUseOrDef *list;
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int counter;
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Loop *loop;
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Loop *scanloop;
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PCode *instr;
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instr = Uses[useID].pcode;
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*result2 = 0;
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*result3 = 0;
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*result4 = NULL;
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switch (instr->op) {
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case PC_MULLI:
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*result1 = instr->args[2].data.imm.value;
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break;
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case PC_RLWINM:
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if (instr->args[3].data.imm.value)
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return 0;
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if (instr->args[2].data.imm.value > 15)
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return 0;
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if (instr->args[4].data.imm.value != (31 - instr->args[2].data.imm.value))
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return 0;
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if (PCODE_FLAG_SET_F(instr) & fPCodeFlag20000000)
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return 0;
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*result1 = 1 << instr->args[2].data.imm.value;
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break;
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case PC_LBZX:
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case PC_LHZX:
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case PC_LHAX:
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case PC_LWZX:
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case PC_STBX:
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case PC_STHX:
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case PC_STWX:
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case PC_LFSX:
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case PC_LFDX:
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case PC_STFSX:
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case PC_STFDX:
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*result2 = 0;
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*result3 = 0;
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if (instr->args[1].data.reg.reg == biv->reg) {
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*result2 = 1;
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*result3 = 2;
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} else if (instr->args[2].data.reg.reg == biv->reg) {
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*result2 = 2;
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*result3 = 1;
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}
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counter = 0;
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for (list = reg_Defs[RegClass_GPR][instr->args[*result3].data.reg.reg]; list; list = list->next) {
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if (bitvectorgetbit(Defs[list->id].pcode->block->blockIndex, biv->loop->memberblocks))
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counter++;
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}
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if (counter)
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return 0;
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loop = biv->loop;
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for (scanloop = loop->parent; scanloop; scanloop = scanloop->parent) {
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counter = 0;
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for (list = reg_Defs[RegClass_GPR][instr->args[*result3].data.reg.reg]; list; list = list->next) {
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if (bitvectorgetbit(Defs[list->id].pcode->block->blockIndex, scanloop->memberblocks))
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counter++;
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}
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if (!biv->initializer || bitvectorgetbit(biv->initializer->block->blockIndex, scanloop->memberblocks))
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counter++;
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if (counter)
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break;
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loop = scanloop;
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}
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*result4 = loop;
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*result1 = 1;
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return 1;
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default:
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return 0;
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}
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counter = 0;
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for (list = reg_Defs[RegClass_GPR][instr->args[0].data.reg.reg]; list; list = list->next) {
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if (bitvectorgetbit(Defs[list->id].pcode->block->blockIndex, biv->loop->memberblocks))
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counter++;
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}
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return counter == 1;
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}
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static void addinductionvariable(BasicInductionVar *biv, PCode *instr, SInt32 val1, short val2, short val3, Loop *val4) {
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InductionVar *iv;
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iv = oalloc(sizeof(InductionVar));
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iv->next = biv->inductionVars;
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biv->inductionVars = iv;
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iv->basicVar = biv;
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iv->instr = instr;
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iv->instrC = NULL;
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iv->step = val1;
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iv->x18 = val2;
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iv->x1A = val3;
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iv->someloop = val4;
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if (instr->flags & (fPCodeFlag2 | fPCodeFlag4))
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iv->x1C = -1;
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else
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iv->x1C = instr->args[0].data.reg.reg;
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iv->x1E = -1;
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}
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static void findnonbasicinductionvariables(Loop *loop) {
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BasicInductionVar *biv;
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RegUseOrDef *list;
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SInt32 result1;
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short result2;
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short result3;
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Loop *result4;
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for (biv = loop->basicInductionVars; biv; biv = biv->next) {
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for (list = reg_Uses[RegClass_GPR][biv->reg]; list; list = list->next) {
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if (bitvectorgetbit(Uses[list->id].pcode->block->blockIndex, loop->memberblocks)) {
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if (isinductionvariable(biv, list->id, &result1, &result2, &result3, &result4))
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addinductionvariable(biv, Uses[list->id].pcode, result1, result2, result3, result4);
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}
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}
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}
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}
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static void findallnonbasicinductionvariables(Loop *loop) {
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while (loop) {
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if (loop->children)
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findallnonbasicinductionvariables(loop->children);
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if (loop->basicInductionVars)
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findnonbasicinductionvariables(loop);
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loop = loop->nextSibling;
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}
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}
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static void initializeinductionvariable(InductionVar *iv) {
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BasicInductionVar *biv; // r31
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PCode *instr; // r27
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PCodeBlock *preheader; // r30
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SInt32 value30; // r30
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short reg29; // r29
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short reg26; // r26
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biv = iv->basicVar;
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preheader = biv->loop->preheader;
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if (iv->x1A) {
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reg29 = iv->instr->args[iv->x1A].data.reg.reg;
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reg26 = iv->instr->args[iv->x18].data.reg.reg;
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instr = NULL;
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if (
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biv->initializer &&
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biv->initializer->op == PC_LI &&
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biv->initializer->block == preheader
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)
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{
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if (biv->initializer->args[1].data.imm.value == 0)
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instr = makepcode(PC_MR, iv->x1E, reg29);
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else if (FITS_IN_SHORT(biv->initializer->args[1].data.imm.value))
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instr = makepcode(PC_ADDI, iv->x1E, reg29, 0, biv->initializer->args[1].data.imm.value);
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}
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if (!instr)
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instr = makepcode(PC_ADD, iv->x1E, reg29, reg26);
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if (biv->initializer && instr->op != PC_ADD)
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insertpcodeafter(biv->initializer, instr);
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else if (iv->someloop && iv->someloop->preheader->lastPCode)
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insertpcodebefore(iv->someloop->preheader->lastPCode, instr);
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else
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insertpcodebefore(preheader->lastPCode, instr);
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iv->instrC = instr;
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iv->x1C = reg29;
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return;
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}
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if (!biv->initializer || biv->initializer->op != PC_LI) {
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instr = copypcode(iv->instr);
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instr->args[0].data.reg.reg = iv->x1E;
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insertpcodebefore(preheader->lastPCode, instr);
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} else {
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value30 = biv->initializer->args[1].data.imm.value * iv->step;
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if (!FITS_IN_SHORT(value30)) {
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instr = makepcode(PC_LIS, iv->x1E, 0, HIGH_PART(value30));
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insertpcodeafter(biv->initializer, instr);
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if (value30 != 0)
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insertpcodeafter(instr, makepcode(PC_ADDI, iv->x1E, iv->x1E, 0, LOW_PART(value30)));
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} else {
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instr = makepcode(PC_LI, iv->x1E, value30);
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insertpcodeafter(biv->initializer, instr);
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}
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}
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}
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static void incrementinductionvariable(InductionVar *iv) {
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SInt32 value;
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BasicInductionVar *biv;
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PCode *instr;
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InstrList *list;
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biv = iv->basicVar;
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value = iv->step * biv->step;
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for (list = biv->instrsC; list; list = list->next) {
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if (!FITS_IN_SHORT(value)) {
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instr = makepcode(PC_ADDIS, iv->x1E, iv->x1E, 0, HIGH_PART(value));
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insertpcodeafter(list->instr, instr);
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if (value != 0) {
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instr = makepcode(PC_ADDI, iv->x1E, iv->x1E, 0, LOW_PART(value));
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insertpcodeafter(list->instr->nextPCode, instr);
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}
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} else {
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instr = makepcode(PC_ADDI, iv->x1E, iv->x1E, 0, value);
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insertpcodeafter(list->instr, instr);
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}
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}
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}
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static void copyinductionvariable(InductionVar *iv) {
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if (iv->instr->flags & (fPCodeFlag2 | fPCodeFlag4)) {
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iv->instr->op -= 2;
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iv->instr->args[1].data.reg.reg = iv->x1E;
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iv->instr->args[2].kind = PCOp_IMMEDIATE;
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iv->instr->args[2].data.imm.value = 0;
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iv->instr->args[2].data.imm.obj = NULL;
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} else {
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insertpcodeafter(iv->instr, makepcode(PC_MR, iv->x1C, iv->x1E));
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deletepcode(iv->instr);
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}
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}
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static int testnestediv(InductionVar *iv, SInt32 step1, int reg, SInt32 step2, Loop *loop1, Loop *loop2) {
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SInt32 addend;
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BlockList *list;
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PCode *instr;
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PCodeArg *op;
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int i;
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|
if (iv->instrC && iv->x1C == reg) {
|
|
|
|
if (iv->instrC->op == PC_MR)
|
|
|
|
addend = 0;
|
|
|
|
else if (iv->instrC->op == PC_ADDI)
|
|
|
|
addend = iv->instrC->args[2].data.imm.value;
|
|
|
|
else
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (step2 == (addend + (step1 * iv->step * loop2->iterationCount))) {
|
|
|
|
for (list = loop1->blocks; list && list->block != loop2->blocks->block; list = list->next) {
|
|
|
|
for (instr = list->block->firstPCode; instr; instr = instr->nextPCode) {
|
|
|
|
op = instr->args;
|
|
|
|
i = instr->argCount;
|
|
|
|
while (i--) {
|
|
|
|
if (
|
|
|
|
op->kind == PCOp_REGISTER &&
|
|
|
|
op->arg == RegClass_GPR &&
|
|
|
|
op->data.reg.reg == reg
|
|
|
|
)
|
|
|
|
return 0;
|
|
|
|
op++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void strengthreducenestediv(short reg, SInt32 step, PCode *initializer, Loop *loop) {
|
|
|
|
Loop *scanloop;
|
|
|
|
BasicInductionVar *biv;
|
|
|
|
InductionVar *iv;
|
|
|
|
PCode *instr;
|
|
|
|
PCodeArg *op;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (scanloop = loop->children; scanloop; scanloop = scanloop->nextSibling) {
|
|
|
|
if (
|
|
|
|
scanloop->isKnownCountingLoop &&
|
|
|
|
scanloop->x4F &&
|
|
|
|
bitvectorgetbit(scanloop->body->blockIndex, loop->vec2C)
|
|
|
|
)
|
|
|
|
{
|
|
|
|
for (biv = scanloop->basicInductionVars; biv; biv = biv->next) {
|
|
|
|
for (iv = biv->inductionVars; iv; iv = iv->next) {
|
|
|
|
if (testnestediv(iv, biv->step, reg, step, loop, scanloop)) {
|
|
|
|
deletepcode(iv->instrC);
|
|
|
|
if (initializer) {
|
|
|
|
insertpcodeafter(initializer, iv->instrC);
|
|
|
|
} else if (loop->body->lastPCode) {
|
|
|
|
for (instr = loop->body->lastPCode; instr; instr = instr->prevPCode) {
|
|
|
|
op = instr->args;
|
|
|
|
i = instr->argCount;
|
|
|
|
while (i--) {
|
|
|
|
if (
|
|
|
|
op->kind == PCOp_REGISTER &&
|
|
|
|
op->arg == RegClass_GPR &&
|
|
|
|
(op->data.reg.effect & EffectWrite) &&
|
|
|
|
op->data.reg.reg == reg
|
|
|
|
)
|
|
|
|
break;
|
|
|
|
op++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (instr)
|
|
|
|
insertpcodeafter(instr, iv->instrC);
|
|
|
|
else
|
|
|
|
insertpcodebefore(loop->body->firstPCode, iv->instrC);
|
|
|
|
} else {
|
|
|
|
appendpcode(loop->body, iv->instrC);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void strengthreducenestedbiv(BasicInductionVar *biv) {
|
|
|
|
Loop *loop;
|
|
|
|
InductionVar *iv;
|
|
|
|
|
|
|
|
loop = biv->loop;
|
|
|
|
for (iv = biv->inductionVars; iv; iv = iv->next)
|
|
|
|
strengthreducenestediv(iv->x1E, iv->step * biv->step, iv->instrC, loop);
|
|
|
|
|
|
|
|
strengthreducenestediv(biv->reg, biv->step, biv->initializer, loop);
|
|
|
|
}
|
|
|
|
|
|
|
|
static void strengthreduceinductionvariable(BasicInductionVar *biv) {
|
|
|
|
int counter;
|
|
|
|
InductionVar *iv;
|
|
|
|
InductionVar *otherIv;
|
|
|
|
short reg;
|
|
|
|
|
|
|
|
counter = 0;
|
|
|
|
for (iv = biv->inductionVars; iv; iv = iv->next) {
|
|
|
|
if (iv->step == 1)
|
|
|
|
counter++;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (iv = biv->inductionVars; iv; iv = iv->next) {
|
|
|
|
if (
|
|
|
|
(counter <= 4 || iv->step != 1) &&
|
|
|
|
iv->instr->block &&
|
|
|
|
(iv->x1A == 0 || iv->instr->args[2].kind != PCOp_IMMEDIATE)
|
|
|
|
)
|
|
|
|
{
|
|
|
|
if (iv->x1E == -1) {
|
|
|
|
iv->x1E = used_virtual_registers[RegClass_GPR]++;
|
|
|
|
initializeinductionvariable(iv);
|
|
|
|
incrementinductionvariable(iv);
|
|
|
|
if (iv->step == 1) {
|
|
|
|
reg = iv->instr->args[iv->x1A].data.reg.reg;
|
|
|
|
for (otherIv = iv->next; otherIv; otherIv = otherIv->next) {
|
|
|
|
if (otherIv->x1A != 0 && otherIv->instr->args[otherIv->x1A].data.reg.reg == reg)
|
|
|
|
otherIv->x1E = iv->x1E;
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
for (otherIv = iv->next; otherIv; otherIv = otherIv->next) {
|
|
|
|
if (otherIv->step == iv->step)
|
|
|
|
otherIv->x1E = iv->x1E;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
copyinductionvariable(iv);
|
|
|
|
strengthreducedloops = 1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifdef __MWERKS__
|
|
|
|
#pragma options align=mac68k
|
|
|
|
#endif
|
|
|
|
typedef struct BivInit {
|
|
|
|
SInt32 x0;
|
|
|
|
short x4;
|
|
|
|
short x6;
|
|
|
|
short x8;
|
|
|
|
Object *xA;
|
|
|
|
} BivInit;
|
|
|
|
#ifdef __MWERKS__
|
|
|
|
#pragma options align=reset
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static void calc_biv_init(BasicInductionVar *biv, BivInit *init) {
|
|
|
|
PCode *instr;
|
|
|
|
PCode *scan;
|
|
|
|
PCodeArg *op;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
instr = biv->initializer;
|
|
|
|
init->x0 = 0;
|
|
|
|
init->x4 = -1;
|
|
|
|
init->x6 = -1;
|
|
|
|
init->x8 = 0;
|
|
|
|
init->xA = NULL;
|
|
|
|
|
|
|
|
if (!biv->initializer || (biv->initializer->op != PC_ADDI && biv->initializer->op != PC_ADD))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (instr->op == PC_ADDI) {
|
|
|
|
if (instr->args[1].data.reg.reg == biv->reg) {
|
|
|
|
init->x0 = instr->args[2].data.imm.value;
|
|
|
|
for (scan = instr->prevPCode; scan; scan = scan->prevPCode) {
|
|
|
|
op = scan->args;
|
|
|
|
i = scan->argCount;
|
|
|
|
while (i--) {
|
|
|
|
if (
|
|
|
|
op->kind == PCOp_REGISTER &&
|
|
|
|
op->arg == RegClass_GPR &&
|
|
|
|
op->data.reg.reg == biv->reg &&
|
|
|
|
(op->data.reg.effect & EffectWrite)
|
|
|
|
)
|
|
|
|
{
|
|
|
|
if (scan->op == PC_ADD) {
|
|
|
|
init->x4 = scan->args[1].data.reg.reg;
|
|
|
|
init->x6 = scan->args[2].data.reg.reg;
|
|
|
|
} else if (scan->op == PC_ADDI) {
|
|
|
|
if (scan->args[2].kind == PCOp_IMMEDIATE) {
|
|
|
|
init->x4 = scan->args[1].data.reg.reg;
|
|
|
|
init->x8 = scan->args[2].data.imm.value;
|
|
|
|
} else if (scan->args[2].kind == PCOp_MEMORY) {
|
|
|
|
init->x4 = scan->args[1].data.reg.reg;
|
|
|
|
init->x8 = scan->args[2].data.mem.offset;
|
|
|
|
init->xA = scan->args[2].data.mem.obj;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
op++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
if (instr->args[2].kind == PCOp_IMMEDIATE) {
|
|
|
|
init->x4 = instr->args[1].data.reg.reg;
|
|
|
|
init->x8 = instr->args[2].data.imm.value;
|
|
|
|
} else if (instr->args[2].kind == PCOp_MEMORY) {
|
|
|
|
init->x4 = instr->args[1].data.reg.reg;
|
|
|
|
init->x8 = instr->args[2].data.mem.offset;
|
|
|
|
init->xA = instr->args[2].data.mem.obj;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else if (instr->op == PC_ADD) {
|
|
|
|
if (instr->args[1].data.reg.reg == biv->reg) {
|
|
|
|
init->x6 = instr->args[2].data.reg.reg;
|
|
|
|
for (scan = instr->prevPCode; scan; scan = scan->prevPCode) {
|
|
|
|
op = scan->args;
|
|
|
|
i = scan->argCount;
|
|
|
|
while (i--) {
|
|
|
|
if (
|
|
|
|
op->kind == PCOp_REGISTER &&
|
|
|
|
op->arg == RegClass_GPR &&
|
|
|
|
op->data.reg.reg == biv->reg &&
|
|
|
|
(op->data.reg.effect & EffectWrite) &&
|
|
|
|
scan->op == PC_ADDI
|
|
|
|
)
|
|
|
|
{
|
|
|
|
if (scan->args[2].kind == PCOp_IMMEDIATE) {
|
|
|
|
init->x4 = scan->args[1].data.reg.reg;
|
|
|
|
init->x8 = scan->args[2].data.imm.value;
|
|
|
|
} else if (scan->args[2].kind == PCOp_MEMORY) {
|
|
|
|
init->x4 = scan->args[1].data.reg.reg;
|
|
|
|
init->x8 = scan->args[2].data.mem.offset;
|
|
|
|
init->xA = scan->args[2].data.mem.obj;
|
|
|
|
}
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
op++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
init->x4 = instr->args[1].data.reg.reg;
|
|
|
|
init->x6 = instr->args[2].data.reg.reg;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void combineinductionvariables(Loop *loop, BasicInductionVar *biv1, BasicInductionVar *biv2, SInt32 difference) {
|
|
|
|
PCode *instr1; // r31
|
|
|
|
int reg1; // r30
|
|
|
|
int reg2; // r29
|
|
|
|
PCode *instr2; // r24
|
|
|
|
PCodeBlock *nextBlock; // r24
|
|
|
|
BlockList *list;
|
|
|
|
PCodeArg *op;
|
|
|
|
int i;
|
|
|
|
PCode *instr;
|
|
|
|
|
|
|
|
instr1 = NULL;
|
|
|
|
instr2 = NULL;
|
|
|
|
|
|
|
|
reg1 = biv1->reg;
|
|
|
|
#line 930
|
|
|
|
CError_ASSERT(reg1 >= 0);
|
|
|
|
|
|
|
|
reg2 = biv2->reg;
|
|
|
|
#line 934
|
|
|
|
CError_ASSERT(reg2 >= 0);
|
|
|
|
|
|
|
|
if (!FITS_IN_SHORT(difference))
|
|
|
|
return;
|
|
|
|
|
|
|
|
for (list = loop->blocks; list; list = list->next) {
|
|
|
|
for (instr = list->block->firstPCode; instr; instr = instr->nextPCode) {
|
|
|
|
if (instr1) {
|
|
|
|
op = instr->args;
|
|
|
|
i = instr->argCount;
|
|
|
|
while (i--) {
|
|
|
|
if (
|
|
|
|
op->kind == PCOp_REGISTER &&
|
|
|
|
op->arg == RegClass_GPR &&
|
|
|
|
op->data.reg.reg == reg1
|
|
|
|
)
|
|
|
|
return;
|
|
|
|
op++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (instr->op == PC_ADDI) {
|
|
|
|
if (instr->args[0].data.reg.reg == reg1) {
|
|
|
|
if (instr1)
|
|
|
|
return;
|
|
|
|
instr1 = instr;
|
|
|
|
} else if (instr->args[0].data.reg.reg == reg2) {
|
|
|
|
if (instr2)
|
|
|
|
return;
|
|
|
|
instr2 = instr;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (loop->body->lastPCode->flags & fPCodeFlag1) {
|
|
|
|
nextBlock = NULL;
|
|
|
|
|
|
|
|
for (i = 0; i < loop->body->lastPCode->argCount; i++) {
|
|
|
|
if (loop->body->lastPCode->args[i].kind == PCOp_LABEL) {
|
|
|
|
nextBlock = loop->body->lastPCode->args[i].data.label.label->block;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!nextBlock)
|
|
|
|
return;
|
|
|
|
} else {
|
|
|
|
nextBlock = loop->body->nextBlock;
|
|
|
|
}
|
|
|
|
|
|
|
|
deletepcode(instr1);
|
|
|
|
instr1->args[1].data.reg.reg = reg2;
|
|
|
|
instr1->args[2].data.imm.value = difference;
|
|
|
|
|
|
|
|
if (nextBlock->firstPCode)
|
|
|
|
insertpcodebefore(nextBlock->firstPCode, instr1);
|
|
|
|
else
|
|
|
|
appendpcode(nextBlock, instr1);
|
|
|
|
|
|
|
|
biv1->reg = -1;
|
|
|
|
strengthreducedloops = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void strengthreduceinductionvariables(Loop *loop) {
|
|
|
|
BasicInductionVar *biv1;
|
|
|
|
BasicInductionVar *biv2;
|
|
|
|
BivInit init1;
|
|
|
|
BivInit init2;
|
|
|
|
|
|
|
|
for (biv1 = loop->basicInductionVars; biv1; biv1 = biv1->next) {
|
|
|
|
if (biv1->inductionVars)
|
|
|
|
strengthreduceinductionvariable(biv1);
|
|
|
|
strengthreducenestedbiv(biv1);
|
|
|
|
}
|
|
|
|
|
|
|
|
for (biv1 = loop->basicInductionVars; biv1; biv1 = biv1->next) {
|
|
|
|
if (biv1->reg != -1) {
|
|
|
|
calc_biv_init(biv1, &init1);
|
|
|
|
if (init1.x4 != -1) {
|
|
|
|
for (biv2 = loop->basicInductionVars; biv2; biv2 = biv2->next) {
|
|
|
|
if (biv2->reg != -1 && biv2 != biv1) {
|
|
|
|
calc_biv_init(biv2, &init2);
|
|
|
|
if (
|
|
|
|
init2.x4 != -1 &&
|
|
|
|
init1.x4 == init2.x4 &&
|
|
|
|
init1.x6 == init2.x6 &&
|
|
|
|
init1.x8 == init2.x8 &&
|
|
|
|
init1.xA == init2.xA &&
|
|
|
|
biv1->step == biv2->step
|
|
|
|
)
|
|
|
|
{
|
|
|
|
if (init1.x0 < init2.x0) {
|
|
|
|
combineinductionvariables(loop, biv2, biv1, init2.x0 - init1.x0);
|
|
|
|
} else {
|
|
|
|
combineinductionvariables(loop, biv1, biv2, init1.x0 - init2.x0);
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static void strengthreduceallinductionvariables(Loop *loop) {
|
|
|
|
while (loop) {
|
|
|
|
if (loop->children)
|
|
|
|
strengthreduceallinductionvariables(loop->children);
|
|
|
|
if (loop->basicInductionVars)
|
|
|
|
strengthreduceinductionvariables(loop);
|
|
|
|
loop = loop->nextSibling;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void strengthreduceloops(void) {
|
|
|
|
strengthreducedloops = 0;
|
|
|
|
if (loopsinflowgraph) {
|
|
|
|
computeusedefchains(0);
|
|
|
|
findallbasicinductionvariables(loopsinflowgraph);
|
|
|
|
findallnonbasicinductionvariables(loopsinflowgraph);
|
|
|
|
strengthreduceallinductionvariables(loopsinflowgraph);
|
|
|
|
freeoheap();
|
|
|
|
}
|
|
|
|
}
|