mirror of https://git.wuffs.org/MWCC
rename some stuff and use an enum for RegClass
This commit is contained in:
parent
25bab8b1fb
commit
bc1321735c
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@ -4,6 +4,7 @@
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#include "compiler/CopyPropagation.h"
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#include "compiler/PCode.h"
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#include "compiler/PCodeInfo.h"
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#include "compiler/Registers.h"
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#include "compiler/StackFrame.h"
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#include "compiler/CError.h"
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#include "compiler/CParser.h"
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@ -19,12 +20,12 @@ static int is_add(PCode *instr) {
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instr->op == PC_ADDI &&
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(
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instr->args[2].kind == PCOp_IMMEDIATE ||
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(instr->args[2].kind == PCOp_MEMORY && (unsigned char) instr->args[2].arg == 1)
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(instr->args[2].kind == PCOp_MEMORY && (PCOpMemoryArg) instr->args[2].arg == PCOpMemory1)
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)
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)
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)
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&&
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instr->args[0].data.reg.reg >= n_real_registers[(char) instr->args[0].arg];
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instr->args[0].data.reg.reg >= n_real_registers[instr->args[0].arg];
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}
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static int addpropagatestouse(int candidateID, int useID) {
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@ -140,9 +141,7 @@ static int addpropagatestouse(int candidateID, int useID) {
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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op->arg == RegClass_GPR &&
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(op->data.reg.effect & EffectWrite) &&
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PC_OP_IS_WRITE_ANY_REGISTER(op, RegClass_GPR) &&
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(op->data.reg.reg == reg2 || op->data.reg.reg == reg27)
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)
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return 0;
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@ -161,9 +160,7 @@ static int addpropagatestouse(int candidateID, int useID) {
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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op->arg == RegClass_GPR &&
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(op->data.reg.effect & EffectWrite) &&
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PC_OP_IS_WRITE_ANY_REGISTER(op, RegClass_GPR) &&
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(op->data.reg.reg == reg2 || op->data.reg.reg == reg27)
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)
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return 0;
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@ -544,7 +544,7 @@ void gather_alias_info(void) {
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if (
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(!(pcode->flags & (fPCodeFlag4 | fPCodeFlag40000)) || op != pcode->args) &&
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op->kind == PCOp_REGISTER &&
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op->arg == RegClass_GPR &&
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(RegClass) op->arg == RegClass_GPR &&
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(op->data.reg.effect & EffectRead)
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) {
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alias_array[aliases_idx] = NULL;
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@ -138,7 +138,7 @@ static int isuniquedefinition(PCode *pcode, Loop *loop) {
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return 0;
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if (def->v.kind == PCOp_REGISTER) {
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for (list = reg_Defs[(char) def->v.arg][def->v.u.reg]; list; list = list->next) {
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for (list = reg_Defs[def->v.arg][def->v.u.reg]; list; list = list->next) {
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if (
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bitvectorgetbit(Defs[list->id].pcode->block->blockIndex, loop->memberblocks) &&
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list->id != defID
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@ -171,7 +171,7 @@ static int uniquelyreachesuse(int defID, int useID) {
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def = &Defs[defID];
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use = &Uses[useID];
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if (def->v.kind == PCOp_REGISTER) {
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for (list = reg_Defs[(char) def->v.arg][def->v.u.reg]; list; list = list->next) {
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for (list = reg_Defs[def->v.arg][def->v.u.reg]; list; list = list->next) {
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if (
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list->id != defID &&
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bitvectorgetbit(list->id, usedefinfo[use->pcode->block->blockIndex].defvec8)
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@ -209,7 +209,7 @@ static int uniquelyreachesalluses(int defID, Loop *loop) {
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def = &Defs[defID];
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if (def->v.kind == PCOp_REGISTER) {
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for (list = reg_Uses[(char) def->v.arg][def->v.u.reg]; list; list = list->next) {
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for (list = reg_Uses[def->v.arg][def->v.u.reg]; list; list = list->next) {
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if (
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bitvectorgetbit(list->id, usedefinfo[loop->preheader->blockIndex].usevec1C) ||
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(bitvectorgetbit(Uses[list->id].pcode->block->blockIndex, loop->memberblocks) && !uniquelyreachesuse(defID, list->id))
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@ -241,7 +241,7 @@ static int isliveonexit(TinyValue *v, Loop *loop) {
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vec = usedefinfo[loop->preheader->blockIndex].usevec1C;
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if (v->kind == PCOp_REGISTER) {
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for (list = reg_Uses[(char) v->arg][v->u.reg]; list; list = list->next) {
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for (list = reg_Uses[v->arg][v->u.reg]; list; list = list->next) {
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if (
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bitvectorgetbit(list->id, vec) &&
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!bitvectorgetbit(Uses[list->id].pcode->block->blockIndex, loop->memberblocks)
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@ -317,7 +317,7 @@ static void moveinvariantcomputation(PCode *pcode, Loop *loop) {
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if (def->v.kind == PCOp_REGISTER) {
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for (blocklist = loop->blocks; blocklist; blocklist = blocklist->next) {
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for (list = reg_Defs[(char) def->v.arg][def->v.u.reg]; list; list = list->next)
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for (list = reg_Defs[def->v.arg][def->v.u.reg]; list; list = list->next)
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bitvectorclearbit(list->id, usedefinfo[blocklist->block->blockIndex].defvec8);
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bitvectorsetbit(defID, usedefinfo[blocklist->block->blockIndex].defvec8);
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}
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@ -874,10 +874,10 @@ static void moveinvariantsfromloop(Loop *loop) {
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for (def = &Defs[defID = instr->defID]; defID < number_of_Defs && def->pcode == instr; def++, defID++) {
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if (def->v.kind == PCOp_REGISTER) {
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for (list = reg_Defs[(char) def->v.arg][def->v.u.reg]; list; list = list->next)
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for (list = reg_Defs[def->v.arg][def->v.u.reg]; list; list = list->next)
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bitvectorclearbit(list->id, myvec);
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} else if (def->v.kind == PCOp_MEMORY) {
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if ((char) def->v.arg == 0) {
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if (def->v.arg == PCOpMemory0) {
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for (list = findobjectusedef(def->v.u.object)->defs; list; list = list->next) {
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if (uniquely_aliases(instr, Defs[list->id].pcode))
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bitvectorclearbit(list->id, myvec);
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@ -10,7 +10,7 @@
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#include "compiler/StackFrame.h"
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#include "compiler/objects.h"
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char coloring_class;
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RegClass coloring_class;
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static short used_regs_before_coloring;
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static void markspecialregisters(RegClass rclass) {
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@ -198,7 +198,7 @@ static void rewritepcode(void) {
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if (
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(instr->flags & fPCodeFlag10) &&
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((char) instr->args[1].arg == coloring_class) &&
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(instr->args[1].arg == coloring_class) &&
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instr->args[1].data.reg.reg == instr->args[0].data.reg.reg
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)
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deletepcode(instr);
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@ -1,15 +1,12 @@
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#include "compiler/CopyPropagation.h"
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#include "compiler/CMangler.h"
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#include "compiler/CParser.h"
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#include "compiler/CodeGen.h"
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#include "compiler/CompilerTools.h"
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#include "compiler/UseDefChains.h"
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#include "compiler/PCode.h"
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#include "compiler/RegisterInfo.h"
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#include "compiler/BitVectors.h"
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// TODO move me
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extern void pclistblocks(char *, char *);
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#include "compiler/CompilerTools.h"
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#include "compiler/PCode.h"
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#include "compiler/PCodeListing.h"
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#include "compiler/RegisterInfo.h"
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#include "compiler/UseDefChains.h"
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int propagatedcopies;
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int propagated_instructions;
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@ -98,13 +95,13 @@ static void computecandidatelist(void) {
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}
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for (def = &Defs[defID = pcode->defID]; defID < number_of_Defs && def->pcode == pcode; def++, defID++) {
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if (def->kind == PCOp_REGISTER) {
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for (list = reg_Uses[def->arg][def->u.reg]; list; list = list->next)
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if (def->v.kind == PCOp_REGISTER) {
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for (list = reg_Uses[def->v.arg][def->v.u.reg]; list; list = list->next)
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bitvectorclearbit(list->id, vec);
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}
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}
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for (use = &Uses[useID = pcode->useID]; useID < number_of_Uses && use->pcode == pcode; use++, useID++) {
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if (use->kind == PCOp_REGISTER)
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if (use->v.kind == PCOp_REGISTER)
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bitvectorsetbit(useID, vec);
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}
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}
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@ -224,7 +221,7 @@ static void computeglobalpropinfo(void) {
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UInt32 *vec8;
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UInt32 *vecC;
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int i;
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int j;
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int blockIndex;
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int flag;
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PCLink *preds;
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UInt32 val;
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@ -245,10 +242,10 @@ static void computeglobalpropinfo(void) {
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while (flag) {
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flag = 0;
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for (i = 0; i < pcblockcount; i++) {
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if (depthfirstordering[i]) {
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info = &propinfo[depthfirstordering[i]->blockIndex];
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if ((preds = depthfirstordering[i]->predecessors)) {
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for (blockIndex = 0; blockIndex < pcblockcount; blockIndex++) {
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if (depthfirstordering[blockIndex]) {
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info = &propinfo[depthfirstordering[blockIndex]->blockIndex];
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if ((preds = depthfirstordering[blockIndex]->predecessors)) {
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vec8 = info->vec8;
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bitvectorcopy(vec8, propinfo[preds->block->blockIndex].vecC, number_of_candidates);
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for (preds = preds->nextLink; preds; preds = preds->nextLink)
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@ -259,7 +256,7 @@ static void computeglobalpropinfo(void) {
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vec8 = info->vec8;
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vec0 = info->vec0;
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vec4 = info->vec4;
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for (j = 0; j < bitvecsize; j++) {
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for (i = 0; i < bitvecsize; i++) {
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val = *vec0 | (*vec8 & ~*vec4);
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if (val != *vecC) {
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*vecC = val;
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@ -359,7 +356,7 @@ static int copypropagatestouse(int candidateID, int useID) {
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UseOrDef *use;
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short reg1;
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short reg2;
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char rclass;
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RegClass rclass;
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PCode *pcode;
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int i;
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PCode *scan;
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@ -419,7 +416,7 @@ static int copypropagatestouse(int candidateID, int useID) {
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static void propagateandremovecopy(int id) {
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Candidate *candidate;
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unsigned char rclass;
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RegClass rclass;
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short reg1;
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short reg2;
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RegUseOrDef *list;
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@ -434,7 +431,7 @@ static void propagateandremovecopy(int id) {
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if (rclass == RegClass_GPR && reg1 >= 32 && reg1 <= last_exception_register[RegClass_GPR])
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return;
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if (!moreaggressiveoptimization && reg2 < n_real_registers[(char) rclass])
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if (!moreaggressiveoptimization && reg2 < n_real_registers[rclass])
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return;
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for (list = candidate->list; list; list = list->next) {
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@ -443,7 +440,7 @@ static void propagateandremovecopy(int id) {
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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op->arg == (char) rclass &&
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op->arg == rclass &&
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op->data.reg.reg == reg1 &&
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(op->data.reg.effect & EffectRead)
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)
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@ -21,7 +21,7 @@ void InlineAsm_InitializeRegisters() {
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hashedregisters[i] = NULL;
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}
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void InlineAsm_InsertRegister(char *name, char rclass, short num, Object *object) {
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void InlineAsm_InsertRegister(char *name, RegClass rclass, short num, Object *object) {
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HashedRegister **ptr;
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HashedRegister *hr;
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@ -23,7 +23,7 @@ typedef struct RegInfo {
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typedef struct AsmRegister {
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char *name;
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char rclass;
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RegClass rclass;
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SInt32 num;
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} AsmRegister;
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@ -53,25 +53,19 @@ static void buildinterferencematrix(void) {
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vec = oalloc(4 * ((regs + 31) >> 5));
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for (block = pcbasicblocks; block; block = block->nextBlock) {
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bitvectorcopy(vec, liveinfo[block->blockIndex].vecC, regs);
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bitvectorcopy(vec, liveinfo[block->blockIndex].out, regs);
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for (instr = block->lastPCode; instr; instr = instr->prevPCode) {
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op = instr->args;
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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(op->data.reg.effect & EffectWrite)
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)
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{
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if (PC_OP_IS_WRITE_ANY_REGISTER(op, coloring_class)) {
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reg = op->data.reg.reg;
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bitvectorclearbit(reg, vec);
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for (j = 0; j < regs; j++) {
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if (bitvectorgetbit(j, vec)) {
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if (
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(instr->flags & fPCodeFlag10) &&
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instr->args[0].kind == PCOp_REGISTER &&
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(char) instr->args[0].arg == coloring_class &&
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PC_OP_IS_ANY_REGISTER(&instr->args[0], coloring_class) &&
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instr->args[1].data.reg.reg == j
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)
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continue;
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@ -85,12 +79,7 @@ static void buildinterferencematrix(void) {
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op = instr->args;
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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(op->data.reg.effect & EffectRead)
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)
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{
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if (PC_OP_IS_READ_ANY_REGISTER(op, coloring_class)) {
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reg = op->data.reg.reg;
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if (bitvectorgetbit(reg, vec) == 0)
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op->data.reg.effect |= Effect4;
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@ -196,7 +185,7 @@ static void coalescenodes(void) {
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}
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}
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if (instr->args[0].kind == PCOp_REGISTER && (char) instr->args[0].arg == coloring_class) {
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if (PC_OP_IS_ANY_REGISTER(&instr->args[0], coloring_class)) {
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path1 = coalesced_path(instr->args[0].data.reg.reg);
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path2 = coalesced_path(instr->args[1].data.reg.reg);
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if (path1 == path2) {
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@ -240,11 +229,7 @@ static void coalescenodes(void) {
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op = instr->args;
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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op->data.reg.reg != coalesced[op->data.reg.reg]
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)
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if (PC_OP_IS_ANY_REGISTER(op, coloring_class) && op->data.reg.reg != coalesced[op->data.reg.reg])
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op->data.reg.reg = coalesced_path(op->data.reg.reg);
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op++;
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}
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@ -307,7 +292,7 @@ static void eliminatedeadcode(void) {
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vec = oalloc(4 * ((regs + 31) >> 5));
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for (block = pcbasicblocks; block; block = block->nextBlock) {
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bitvectorcopy(vec, liveinfo[block->blockIndex].vecC, regs);
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bitvectorcopy(vec, liveinfo[block->blockIndex].out, regs);
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for (instr = block->lastPCode; instr; instr = instr->prevPCode) {
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if (dead(instr, coloring_class, vec)) {
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deletepcode(instr);
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@ -317,11 +302,7 @@ static void eliminatedeadcode(void) {
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op = instr->args;
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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(op->data.reg.effect & EffectWrite)
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)
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if (PC_OP_IS_WRITE_ANY_REGISTER(op, coloring_class))
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bitvectorclearbit(op->data.reg.reg, vec);
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op++;
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}
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@ -329,12 +310,7 @@ static void eliminatedeadcode(void) {
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op = instr->args;
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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(op->data.reg.effect & EffectRead)
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)
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{
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if (PC_OP_IS_READ_ANY_REGISTER(op, coloring_class)) {
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int reg = op->data.reg.reg;
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if (!bitvectorgetbit(reg, vec))
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op->data.reg.effect |= Effect4;
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@ -362,9 +338,7 @@ static void findrematerializations(void) {
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i = instr->argCount;
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while (i--) {
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if (
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op->kind == PCOp_REGISTER &&
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(char) op->arg == coloring_class &&
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(op->data.reg.effect & EffectWrite) &&
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PC_OP_IS_WRITE_ANY_REGISTER(op, coloring_class) &&
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op->data.reg.reg >= n_real_registers[coloring_class] &&
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!(interferencegraph[op->data.reg.reg]->flags & (fPairLow | fPairHigh)) &&
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!(interferencegraph[op->data.reg.reg]->flags & fIGNode40)
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@ -19,10 +19,10 @@ static void allocateliveinfo(void) {
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liveinfo = oalloc(sizeof(LiveInfo) * pcblockcount);
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for (i = 0, info = liveinfo; i < pcblockcount; i++, info++) {
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bitvectorinitialize(info->vec0 = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
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bitvectorinitialize(info->vec4 = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
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bitvectorinitialize(info->vec8 = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
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bitvectorinitialize(info->vecC = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
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bitvectorinitialize(info->use = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
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bitvectorinitialize(info->def = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
|
||||
bitvectorinitialize(info->in = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
|
||||
bitvectorinitialize(info->out = oalloc(4 * ((regs + 31) >> 5)), regs, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -30,40 +30,30 @@ static void computelocalusedef(void) {
|
|||
LiveInfo *info;
|
||||
PCodeBlock *block;
|
||||
PCode *instr;
|
||||
UInt32 *vec0;
|
||||
UInt32 *vec4;
|
||||
UInt32 *use;
|
||||
UInt32 *def;
|
||||
PCodeArg *op;
|
||||
int i;
|
||||
|
||||
for (block = pcbasicblocks; block; block = block->nextBlock) {
|
||||
info = &liveinfo[block->blockIndex];
|
||||
vec0 = info->vec0;
|
||||
vec4 = info->vec4;
|
||||
use = info->use;
|
||||
def = info->def;
|
||||
|
||||
for (instr = block->firstPCode; instr; instr = instr->nextPCode) {
|
||||
op = instr->args;
|
||||
i = instr->argCount;
|
||||
while (i--) {
|
||||
if (
|
||||
op->kind == PCOp_REGISTER &&
|
||||
(char) op->arg == coloring_class &&
|
||||
(op->data.reg.effect & EffectRead) &&
|
||||
!bitvectorgetbit(op->data.reg.reg, vec4)
|
||||
)
|
||||
bitvectorsetbit(op->data.reg.reg, vec0);
|
||||
if (PC_OP_IS_READ_ANY_REGISTER(op, coloring_class) && !bitvectorgetbit(op->data.reg.reg, def))
|
||||
bitvectorsetbit(op->data.reg.reg, use);
|
||||
op++;
|
||||
}
|
||||
|
||||
op = instr->args;
|
||||
i = instr->argCount;
|
||||
while (i--) {
|
||||
if (
|
||||
op->kind == PCOp_REGISTER &&
|
||||
(char) op->arg == coloring_class &&
|
||||
(op->data.reg.effect & EffectWrite) &&
|
||||
!bitvectorgetbit(op->data.reg.reg, vec0)
|
||||
)
|
||||
bitvectorsetbit(op->data.reg.reg, vec4);
|
||||
if (PC_OP_IS_WRITE_ANY_REGISTER(op, coloring_class) && !bitvectorgetbit(op->data.reg.reg, use))
|
||||
bitvectorsetbit(op->data.reg.reg, def);
|
||||
op++;
|
||||
}
|
||||
}
|
||||
|
@ -73,10 +63,10 @@ static void computelocalusedef(void) {
|
|||
static void computeglobalinout(void) {
|
||||
UInt32 regs;
|
||||
LiveInfo *info;
|
||||
UInt32 *vec0;
|
||||
UInt32 *vec4;
|
||||
UInt32 *vec8;
|
||||
UInt32 *vecC;
|
||||
UInt32 *use;
|
||||
UInt32 *def;
|
||||
UInt32 *in;
|
||||
UInt32 *out;
|
||||
int bitvecsize;
|
||||
int blockIndex;
|
||||
int i;
|
||||
|
@ -95,26 +85,26 @@ static void computeglobalinout(void) {
|
|||
if ((block = depthfirstordering[--blockIndex])) {
|
||||
info = &liveinfo[block->blockIndex];
|
||||
if ((link = block->successors)) {
|
||||
vecC = info->vecC;
|
||||
bitvectorcopy(vecC, liveinfo[link->block->blockIndex].vec8, regs);
|
||||
out = info->out;
|
||||
bitvectorcopy(out, liveinfo[link->block->blockIndex].in, regs);
|
||||
for (link = link->nextLink; link; link = link->nextLink)
|
||||
bitvectorunion(vecC, liveinfo[link->block->blockIndex].vec8, regs);
|
||||
bitvectorunion(out, liveinfo[link->block->blockIndex].in, regs);
|
||||
}
|
||||
|
||||
vecC = info->vecC;
|
||||
vec8 = info->vec8;
|
||||
vec0 = info->vec0;
|
||||
vec4 = info->vec4;
|
||||
out = info->out;
|
||||
in = info->in;
|
||||
use = info->use;
|
||||
def = info->def;
|
||||
for (i = 0; i < bitvecsize; i++) {
|
||||
val = *vec0 | (*vecC & ~*vec4);
|
||||
if (val != *vec8) {
|
||||
*vec8 = val;
|
||||
val = *use | (*out & ~*def);
|
||||
if (val != *in) {
|
||||
*in = val;
|
||||
flag = 1;
|
||||
}
|
||||
vec8++;
|
||||
vecC++;
|
||||
vec0++;
|
||||
vec4++;
|
||||
in++;
|
||||
out++;
|
||||
use++;
|
||||
def++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -130,19 +120,19 @@ void computelivevariables(Object *proc) {
|
|||
computelocalusedef();
|
||||
|
||||
if (coloring_class == RegClass_GPR && TYPE_FITS_IN_REGISTER(returnType)) {
|
||||
bitvectorsetbit(3, liveinfo[epilogue->blockIndex].vec0);
|
||||
bitvectorsetbit(3, liveinfo[epilogue->blockIndex].use);
|
||||
if (TYPE_IS_8BYTES(returnType))
|
||||
bitvectorsetbit(4, liveinfo[pclastblock->blockIndex].vec0);
|
||||
bitvectorsetbit(4, liveinfo[pclastblock->blockIndex].use);
|
||||
} else if (coloring_class == RegClass_FPR && IS_TYPE_FLOAT(returnType)) {
|
||||
bitvectorsetbit(1, liveinfo[epilogue->blockIndex].vec0);
|
||||
bitvectorsetbit(1, liveinfo[epilogue->blockIndex].use);
|
||||
} else if (coloring_class == RegClass_VR && IS_TYPE_VECTOR(returnType)) {
|
||||
bitvectorsetbit(2, liveinfo[epilogue->blockIndex].vec0);
|
||||
bitvectorsetbit(2, liveinfo[epilogue->blockIndex].use);
|
||||
}
|
||||
|
||||
computeglobalinout();
|
||||
}
|
||||
|
||||
int dead(PCode *instr, char rclass, UInt32 *vec) {
|
||||
int dead(PCode *instr, RegClass rclass, UInt32 *vec) {
|
||||
int i;
|
||||
PCodeArg *op;
|
||||
|
||||
|
@ -157,7 +147,7 @@ int dead(PCode *instr, char rclass, UInt32 *vec) {
|
|||
if (
|
||||
op->kind == PCOp_REGISTER &&
|
||||
(op->data.reg.effect & EffectWrite) &&
|
||||
(rclass != (char) op->arg || bitvectorgetbit(op->data.reg.reg, vec))
|
||||
(rclass != op->arg || bitvectorgetbit(op->data.reg.reg, vec))
|
||||
)
|
||||
return 0;
|
||||
op++;
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
#include "compiler/CParser.h"
|
||||
#include "compiler/PCode.h"
|
||||
#include "compiler/PCodeInfo.h"
|
||||
#include "compiler/Registers.h"
|
||||
|
||||
int deletedloads;
|
||||
|
||||
|
@ -10,7 +11,7 @@ static int is_load(PCode *instr) {
|
|||
return
|
||||
(instr->op == PC_LI || instr->op == PC_VSPLTISB || instr->op == PC_VSPLTISH || instr->op == PC_VSPLTISW)
|
||||
&&
|
||||
instr->args[0].data.reg.reg >= n_real_registers[(char) instr->args[0].arg];
|
||||
instr->args[0].data.reg.reg >= n_real_registers[instr->args[0].arg];
|
||||
}
|
||||
|
||||
static int loadpropagatestouse(int candidateID, int useID) {
|
||||
|
@ -23,7 +24,7 @@ static void deleteload(int id) {
|
|||
candidate = Candidates + id;
|
||||
if (candidate->list || (candidate->pcode->flags & fSideEffects))
|
||||
return;
|
||||
if (candidate->pcode->args[0].data.reg.reg < n_real_registers[(char) candidate->pcode->args[0].arg])
|
||||
if (candidate->pcode->args[0].data.reg.reg < n_real_registers[candidate->pcode->args[0].arg])
|
||||
return;
|
||||
|
||||
deletepcode(candidate->pcode);
|
||||
|
|
|
@ -5,6 +5,7 @@
|
|||
#include "compiler/CompilerTools.h"
|
||||
#include "compiler/LoopDetection.h"
|
||||
#include "compiler/PCode.h"
|
||||
#include "compiler/Registers.h"
|
||||
#include "compiler/UseDefChains.h"
|
||||
#include "compiler/objects.h"
|
||||
#include "compiler/types.h"
|
||||
|
@ -1309,7 +1310,7 @@ void changearraytoregisters(void) {
|
|||
while (i--) {
|
||||
if (
|
||||
op->kind == PCOp_MEMORY &&
|
||||
(unsigned char) op->arg == 1 &&
|
||||
(PCOpMemoryArg) op->arg == PCOpMemory1 &&
|
||||
(array = lookup_array_object(arrays, op->data.mem.obj)) &&
|
||||
!array->invalid
|
||||
) {
|
||||
|
@ -1475,7 +1476,7 @@ void changearraytoregisters(void) {
|
|||
instr->argCount &&
|
||||
(instr->flags & (fPCodeFlag2 | fPCodeFlag4)) &&
|
||||
instr->args[2].kind == PCOp_MEMORY &&
|
||||
(unsigned char) instr->args[2].arg == 1 &&
|
||||
(PCOpMemoryArg) instr->args[2].arg == PCOpMemory1 &&
|
||||
(array = lookup_array_object(arrays, instr->args[2].data.mem.obj)) &&
|
||||
!(array->invalid)
|
||||
)
|
||||
|
|
|
@ -126,10 +126,10 @@ static void pclistblock(PCodeBlock *block, char *format, UInt32 vecSize) {
|
|||
|
||||
if (vecSize) {
|
||||
fprintf(pcfile, "............................................................\n");
|
||||
formatdataflowset("use", liveinfo[block->blockIndex].vec0, vecSize, format);
|
||||
formatdataflowset("def", liveinfo[block->blockIndex].vec4, vecSize, format);
|
||||
formatdataflowset("in ", liveinfo[block->blockIndex].vec8, vecSize, format);
|
||||
formatdataflowset("out", liveinfo[block->blockIndex].vecC, vecSize, format);
|
||||
formatdataflowset("use", liveinfo[block->blockIndex].use, vecSize, format);
|
||||
formatdataflowset("def", liveinfo[block->blockIndex].def, vecSize, format);
|
||||
formatdataflowset("in ", liveinfo[block->blockIndex].in, vecSize, format);
|
||||
formatdataflowset("out", liveinfo[block->blockIndex].out, vecSize, format);
|
||||
}
|
||||
|
||||
fflush(pcfile);
|
||||
|
|
|
@ -18,7 +18,7 @@ static UInt8 save_state[RegisterMax];
|
|||
|
||||
short spr_to_sysreg[4] = {1, 8, 9, 0x100};
|
||||
|
||||
void asm_used_register(char rclass, short reg) {
|
||||
void asm_used_register(RegClass rclass, short reg) {
|
||||
int i;
|
||||
|
||||
if ((reg < n_real_registers[rclass]) && (reg_state[rclass][reg] == RegState0)) {
|
||||
|
@ -39,7 +39,7 @@ void asm_used_register(char rclass, short reg) {
|
|||
}
|
||||
}
|
||||
|
||||
void retain_register(Object *obj, char rclass, short reg) {
|
||||
void retain_register(Object *obj, RegClass rclass, short reg) {
|
||||
VarInfo *vi;
|
||||
|
||||
#line 95
|
||||
|
@ -79,7 +79,7 @@ int is_register_object(Object *obj) {
|
|||
return obj->sclass == OBJECT_SCLASS_101;
|
||||
}
|
||||
|
||||
int GetABIFirstNonVolatile(char rclass) {
|
||||
int GetABIFirstNonVolatile(RegClass rclass) {
|
||||
switch (rclass) {
|
||||
case RegClass_SPR: return 3;
|
||||
case RegClass_CRFIELD: return 2;
|
||||
|
@ -90,7 +90,7 @@ int GetABIFirstNonVolatile(char rclass) {
|
|||
}
|
||||
}
|
||||
|
||||
char GetRegisterClassName(char rclass) {
|
||||
char GetRegisterClassName(RegClass rclass) {
|
||||
switch (rclass) {
|
||||
case RegClass_VR: return 'v';
|
||||
case RegClass_GPR: return 'r';
|
||||
|
@ -102,7 +102,7 @@ char GetRegisterClassName(char rclass) {
|
|||
}
|
||||
}
|
||||
|
||||
static int first_nonvolatile_reg(char rclass) {
|
||||
static int first_nonvolatile_reg(RegClass rclass) {
|
||||
return GetABIFirstNonVolatile(rclass);
|
||||
}
|
||||
|
||||
|
@ -120,7 +120,7 @@ void setup_diagnostic_reg_strings(void) {
|
|||
}
|
||||
|
||||
void init_target_registers(void) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
int reg;
|
||||
int end;
|
||||
int tmp;
|
||||
|
@ -130,7 +130,7 @@ void init_target_registers(void) {
|
|||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
for (reg = 0; reg < RegisterMax; reg++)
|
||||
special_register_names[(char)rclass][reg] = NULL;
|
||||
special_register_names[rclass][reg] = NULL;
|
||||
}
|
||||
|
||||
special_register_names[RegClass_SPR][0] = "XER";
|
||||
|
@ -150,27 +150,27 @@ void init_target_registers(void) {
|
|||
reg_state[RegClass_CRFIELD][5] = RegState2;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
n_nonvolatile_registers[(char)rclass] = 0;
|
||||
if (last_nonvolatile_reg[(char)rclass] >= 0) {
|
||||
n_nonvolatile_registers[rclass] = 0;
|
||||
if (last_nonvolatile_reg[rclass] >= 0) {
|
||||
end = first_nonvolatile_reg(rclass);
|
||||
for (reg = last_nonvolatile_reg[(char)rclass]; reg >= end; reg--) {
|
||||
if (reg_state[(char)rclass][reg] == RegState0) {
|
||||
tmp = n_nonvolatile_registers[(char)rclass]++;
|
||||
nonvolatile_registers[(char)rclass][tmp] = reg;
|
||||
for (reg = last_nonvolatile_reg[rclass]; reg >= end; reg--) {
|
||||
if (reg_state[rclass][reg] == RegState0) {
|
||||
tmp = n_nonvolatile_registers[rclass]++;
|
||||
nonvolatile_registers[rclass][tmp] = reg;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
assignable_registers[(char)rclass] = n_nonvolatile_registers[(char)rclass] - nonvol_reserve[(char)rclass];
|
||||
if (assignable_registers[(char)rclass] < 0)
|
||||
assignable_registers[(char)rclass] = 0;
|
||||
assignable_registers[rclass] = n_nonvolatile_registers[rclass] - nonvol_reserve[rclass];
|
||||
if (assignable_registers[rclass] < 0)
|
||||
assignable_registers[rclass] = 0;
|
||||
|
||||
n_scratch_registers[(char)rclass] = 0;
|
||||
for (reg = 0; reg < n_real_registers[(char)rclass]; reg++) {
|
||||
if (reg < GetABIFirstNonVolatile(rclass) || reg > last_nonvolatile_reg[(char)rclass]) {
|
||||
if (reg_state[(char)rclass][reg] == RegState0) {
|
||||
tmp = n_scratch_registers[(char)rclass]++;
|
||||
scratch_registers[(char)rclass][tmp] = reg;
|
||||
n_scratch_registers[rclass] = 0;
|
||||
for (reg = 0; reg < n_real_registers[rclass]; reg++) {
|
||||
if (reg < GetABIFirstNonVolatile(rclass) || reg > last_nonvolatile_reg[rclass]) {
|
||||
if (reg_state[rclass][reg] == RegState0) {
|
||||
tmp = n_scratch_registers[rclass]++;
|
||||
scratch_registers[rclass][tmp] = reg;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -340,17 +340,17 @@ UInt32 colored_vrs_as_vrsave(PCodeBlock *block) {
|
|||
return mask;
|
||||
}
|
||||
|
||||
void save_before_coloring_nonvolatile_registers(char rclass) {
|
||||
void save_before_coloring_nonvolatile_registers(RegClass rclass) {
|
||||
used_regs_before_coloring = used_nonvolatile_registers[rclass];
|
||||
memcpy(save_state, reg_state[rclass], sizeof(save_state));
|
||||
}
|
||||
|
||||
void reset_nonvolatile_registers(char rclass) {
|
||||
void reset_nonvolatile_registers(RegClass rclass) {
|
||||
used_nonvolatile_registers[rclass] = used_regs_before_coloring;
|
||||
memcpy(reg_state[rclass], save_state, sizeof(save_state));
|
||||
}
|
||||
|
||||
int is_nonvolatile_register(char rclass, int reg) {
|
||||
int is_nonvolatile_register(RegClass rclass, int reg) {
|
||||
int i;
|
||||
|
||||
for (i = 0; i < n_nonvolatile_registers[rclass]; i++) {
|
||||
|
@ -380,7 +380,7 @@ void init_endian(void) {
|
|||
}
|
||||
|
||||
void update_asm_nonvolatile_registers(void) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
int r31;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
|
|
|
@ -5,12 +5,6 @@
|
|||
#include "compiler/CompilerTools.h"
|
||||
#include "compiler/objects.h"
|
||||
|
||||
// haven't checked this object file for .data stuff yet
|
||||
|
||||
// ONLY FOR TESTING
|
||||
// this file gets kinda fucked up by the loop unroller
|
||||
//#pragma opt_unroll_loops off
|
||||
|
||||
int used_virtual_registers[RegClassMax];
|
||||
int used_nonvolatile_registers[RegClassMax];
|
||||
int assignable_registers[RegClassMax];
|
||||
|
@ -26,6 +20,7 @@ char *register_class_name[RegClassMax];
|
|||
char *register_class_format[RegClassMax];
|
||||
int coloring;
|
||||
int optimizing;
|
||||
|
||||
typedef struct ModifiedRegisters {
|
||||
struct ModifiedRegisters *next;
|
||||
Object *obj;
|
||||
|
@ -34,28 +29,27 @@ typedef struct ModifiedRegisters {
|
|||
static ModifiedRegisters *mod_regs_table[128];
|
||||
|
||||
void init_registers(void) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
int j;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
for (j = 0; j < RegisterMax; j++) {
|
||||
reg_state[(char)rclass][j] = RegState0;
|
||||
}
|
||||
for (j = 0; j < RegisterMax; j++)
|
||||
reg_state[rclass][j] = RegState0;
|
||||
}
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
used_nonvolatile_registers[(char)rclass] = 0;
|
||||
used_nonvolatile_registers[rclass] = 0;
|
||||
|
||||
optimizing = 1;
|
||||
|
||||
init_target_registers();
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
used_virtual_registers[(char)rclass] = n_real_registers[(char)rclass];
|
||||
used_virtual_registers[rclass] = n_real_registers[rclass];
|
||||
|
||||
coloring = 1;
|
||||
}
|
||||
|
||||
void assign_register_to_variable(Object *obj, char rclass) {
|
||||
void assign_register_to_variable(Object *obj, RegClass rclass) {
|
||||
VarInfo *vi;
|
||||
short reg;
|
||||
|
||||
|
@ -72,7 +66,7 @@ void assign_register_to_variable(Object *obj, char rclass) {
|
|||
vi->reg = reg;
|
||||
}
|
||||
|
||||
void retain_register_for_argument(Object *obj, char rclass, short reg) {
|
||||
void retain_register_for_argument(Object *obj, RegClass rclass, short reg) {
|
||||
VarInfo *vi = obj->u.var.info;
|
||||
reg_state[rclass][reg] = RegState1;
|
||||
vi->flags |= VarInfoFlag2;
|
||||
|
@ -80,7 +74,7 @@ void retain_register_for_argument(Object *obj, char rclass, short reg) {
|
|||
vi->reg = reg;
|
||||
}
|
||||
|
||||
int available_registers(char rclass) {
|
||||
int available_registers(RegClass rclass) {
|
||||
int i;
|
||||
int count = 0;
|
||||
|
||||
|
@ -92,7 +86,7 @@ int available_registers(char rclass) {
|
|||
return count;
|
||||
}
|
||||
|
||||
UInt32 volatile_registers(char rclass) {
|
||||
UInt32 volatile_registers(RegClass rclass) {
|
||||
UInt32 mask = 0;
|
||||
int i;
|
||||
int reg;
|
||||
|
@ -106,7 +100,7 @@ UInt32 volatile_registers(char rclass) {
|
|||
return mask;
|
||||
}
|
||||
|
||||
short obtain_nonvolatile_register(char rclass) {
|
||||
short obtain_nonvolatile_register(RegClass rclass) {
|
||||
int best = -1;
|
||||
|
||||
while (used_nonvolatile_registers[rclass] < n_nonvolatile_registers[rclass]) {
|
||||
|
@ -121,54 +115,45 @@ short obtain_nonvolatile_register(char rclass) {
|
|||
}
|
||||
|
||||
void open_temp_registers(void) {
|
||||
int rclass;
|
||||
RegClass rclass;
|
||||
|
||||
for (rclass = 0; (char)rclass < RegClassMax; rclass++) {
|
||||
int r = used_virtual_registers[(char)rclass];
|
||||
//last_temporary_register[rclass] = r;
|
||||
//first_temporary_register[rclass] = r;
|
||||
first_temporary_register[(char)rclass] = last_temporary_register[(char)rclass] = r;
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
int r = used_virtual_registers[rclass];
|
||||
first_temporary_register[rclass] = last_temporary_register[rclass] = r;
|
||||
}
|
||||
/*rclass = 0;
|
||||
while (rclass < RegClassMax) {
|
||||
r = used_virtual_registers[(char)rclass];
|
||||
last_temporary_register[(char)rclass] = r;
|
||||
first_temporary_register[(char)rclass] = r;
|
||||
rclass = rclass + 1;
|
||||
}*/
|
||||
}
|
||||
|
||||
void check_temp_registers(void) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
|
||||
if (!optimizing) {
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
if (used_virtual_registers[(char)rclass] > last_temporary_register[(char)rclass])
|
||||
last_temporary_register[(char)rclass] = used_virtual_registers[(char)rclass];
|
||||
if (used_virtual_registers[(char)rclass] > 256)
|
||||
used_virtual_registers[(char)rclass] = first_temporary_register[(char)rclass];
|
||||
if (used_virtual_registers[rclass] > last_temporary_register[rclass])
|
||||
last_temporary_register[rclass] = used_virtual_registers[rclass];
|
||||
if (used_virtual_registers[rclass] > 256)
|
||||
used_virtual_registers[rclass] = first_temporary_register[rclass];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
void close_temp_registers(void) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++) {
|
||||
if (used_virtual_registers[(char)rclass] < last_temporary_register[(char)rclass])
|
||||
used_virtual_registers[(char)rclass] = last_temporary_register[(char)rclass];
|
||||
if (used_virtual_registers[rclass] < last_temporary_register[rclass])
|
||||
used_virtual_registers[rclass] = last_temporary_register[rclass];
|
||||
else
|
||||
last_temporary_register[(char)rclass] = used_virtual_registers[(char)rclass];
|
||||
last_temporary_register[rclass] = used_virtual_registers[rclass];
|
||||
}
|
||||
}
|
||||
|
||||
int count_scratch_registers(void) {
|
||||
int rclass;
|
||||
RegClass rclass;
|
||||
int count;
|
||||
|
||||
count = 0;
|
||||
for (rclass = 0; (char)rclass < RegClassMax; rclass++)
|
||||
count += n_scratch_registers[(char)rclass];
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
count += n_scratch_registers[rclass];
|
||||
return count;
|
||||
}
|
||||
|
||||
|
@ -180,19 +165,23 @@ void init_modified_registers(void) {
|
|||
}
|
||||
|
||||
static void compute_modified_registers(UInt32 *masks) {
|
||||
int rclass;
|
||||
RegClass rclass;
|
||||
PCodeBlock *block;
|
||||
PCode *pcode;
|
||||
PCodeArg *op;
|
||||
int i;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
masks[(char)rclass] = 0;
|
||||
masks[rclass] = 0;
|
||||
|
||||
for (block = pcbasicblocks; block; block = block->nextBlock) {
|
||||
for (pcode = block->firstPCode; pcode; pcode = pcode->nextPCode) {
|
||||
for (i = 0; i < pcode->argCount; i++) {
|
||||
if (pcode->args[i].kind == PCOp_REGISTER && pcode->args[i].data.reg.effect & EffectWrite)
|
||||
masks[pcode->args[i].arg] |= 1 << pcode->args[i].data.reg.reg;
|
||||
op = pcode->args;
|
||||
i = pcode->argCount;
|
||||
while (i--) {
|
||||
if (op->kind == PCOp_REGISTER && (op->data.reg.effect & EffectWrite))
|
||||
masks[op->arg] |= 1 << op->data.reg.reg;
|
||||
op++;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
@ -204,25 +193,25 @@ void note_modified_registers(Object *obj) {
|
|||
mr = galloc(sizeof(ModifiedRegisters));
|
||||
mr->obj = obj;
|
||||
compute_modified_registers(mr->mask);
|
||||
mr->next = mod_regs_table[obj->name->hashval];
|
||||
mod_regs_table[obj->name->hashval] = mr;
|
||||
mr->next = mod_regs_table[obj->name->hashval & 127];
|
||||
mod_regs_table[obj->name->hashval & 127] = mr;
|
||||
}
|
||||
|
||||
void find_modified_registers(Object *obj, UInt32 *masks) {
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
ModifiedRegisters *scan;
|
||||
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
masks[(char)rclass] = 0xFFFFFFFF;
|
||||
masks[rclass] = 0xFFFFFFFF;
|
||||
|
||||
if (CParser_HasInternalLinkage(obj)) {
|
||||
for (scan = mod_regs_table[obj->name->hashval]; scan; scan = scan->next) {
|
||||
for (scan = mod_regs_table[obj->name->hashval & 127]; scan; scan = scan->next) {
|
||||
if (scan->obj == obj)
|
||||
break;
|
||||
}
|
||||
if (scan) {
|
||||
for (rclass = 0; rclass < RegClassMax; rclass++)
|
||||
masks[(char)rclass] = scan->mask[(char)rclass];
|
||||
masks[rclass] = scan->mask[rclass];
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -4,6 +4,7 @@
|
|||
#include "compiler/LoopDetection.h"
|
||||
#include "compiler/PCode.h"
|
||||
#include "compiler/PCodeInfo.h"
|
||||
#include "compiler/Registers.h"
|
||||
#include "compiler/UseDefChains.h"
|
||||
|
||||
int strengthreducedloops;
|
||||
|
|
|
@ -1,10 +1,11 @@
|
|||
#include "compiler/UseDefChains.h"
|
||||
#include "compiler/Alias.h"
|
||||
#include "compiler/PCode.h"
|
||||
#include "compiler/BitVectors.h"
|
||||
#include "compiler/CompilerTools.h"
|
||||
#include "compiler/PCode.h"
|
||||
#include "compiler/Registers.h"
|
||||
#include "compiler/objects.h"
|
||||
#include "compiler/types.h"
|
||||
#include "compiler/BitVectors.h"
|
||||
|
||||
int number_of_Defs;
|
||||
UseOrDef *Defs;
|
||||
|
|
|
@ -21,10 +21,10 @@ typedef struct LocalVectorArray {
|
|||
} LocalVectorArray;
|
||||
|
||||
typedef struct VectorPropInfo {
|
||||
UInt32 *vec0;
|
||||
UInt32 *vec4;
|
||||
UInt32 *vec8;
|
||||
UInt32 *vecC;
|
||||
UInt32 *use;
|
||||
UInt32 *def;
|
||||
UInt32 *in;
|
||||
UInt32 *out;
|
||||
} VectorPropInfo;
|
||||
|
||||
typedef struct ADDI {
|
||||
|
@ -116,7 +116,7 @@ static void scaninstructions(LocalVectorArray *arrays) {
|
|||
while (i--) {
|
||||
if (
|
||||
op->kind == PCOp_MEMORY &&
|
||||
op->arg == PCOpMemory1 &&
|
||||
(PCOpMemoryArg) op->arg == PCOpMemory1 &&
|
||||
(array = lookup_vector_array_object(arrays, op->data.mem.obj)) &&
|
||||
!array->invalid
|
||||
)
|
||||
|
@ -174,7 +174,7 @@ static void computeaddilist(LocalVectorArray *arrays) {
|
|||
instr->op == PC_ADDI &&
|
||||
(reg = instr->args[0].data.reg.reg) >= n_real_registers[RegClass_GPR] &&
|
||||
instr->args[2].kind == PCOp_MEMORY &&
|
||||
(unsigned char) instr->args[2].arg == 1 &&
|
||||
(PCOpMemoryArg) instr->args[2].arg == PCOpMemory1 &&
|
||||
(array = lookup_vector_array_object(arrays, instr->args[2].data.mem.obj)) &&
|
||||
!array->invalid
|
||||
)
|
||||
|
@ -195,7 +195,7 @@ static void computeaddilist(LocalVectorArray *arrays) {
|
|||
for (def = &Defs[defID = instr->defID]; defID < number_of_Defs && def->pcode == instr; def++, defID++) {
|
||||
if (def->v.kind == PCOp_REGISTER) {
|
||||
RegUseOrDef *l;
|
||||
for (l = reg_Uses[(char) def->v.arg][def->v.u.reg]; l; l = l->next)
|
||||
for (l = reg_Uses[def->v.arg][def->v.u.reg]; l; l = l->next)
|
||||
bitvectorclearbit(l->id, vec);
|
||||
}
|
||||
}
|
||||
|
@ -216,10 +216,10 @@ static void allocatevectorpropinfo(void) {
|
|||
|
||||
vectorpropinfo = oalloc(sizeof(VectorPropInfo) * pcblockcount);
|
||||
for (i = 0, info = vectorpropinfo; i < pcblockcount; i++, info++) {
|
||||
info->vec0 = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->vec4 = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->vec8 = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->vecC = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->use = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->def = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->in = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
info->out = oalloc(4 * ((number_of_ADDIs + 31) >> 5));
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -238,8 +238,8 @@ static void computelocalvectorpropinfo(LocalVectorArray *arrays) {
|
|||
|
||||
for (block = pcbasicblocks; block; block = block->nextBlock) {
|
||||
info = &vectorpropinfo[block->blockIndex];
|
||||
vec0 = info->vec0;
|
||||
vec4 = info->vec4;
|
||||
vec0 = info->use;
|
||||
vec4 = info->def;
|
||||
bitvectorinitialize(vec0, number_of_ADDIs, 0);
|
||||
bitvectorinitialize(vec4, number_of_ADDIs, 0);
|
||||
index = firstaddinblock[block->blockIndex];
|
||||
|
@ -253,7 +253,7 @@ static void computelocalvectorpropinfo(LocalVectorArray *arrays) {
|
|||
for (addi_i = 0, addi = ADDIs; addi_i < number_of_ADDIs; addi_i++, addi++) {
|
||||
if (
|
||||
addi->instr &&
|
||||
(char) addi->instr->args[0].arg == (char) op->arg &&
|
||||
addi->instr->args[0].arg == op->arg &&
|
||||
addi->instr->args[0].data.reg.reg == op->data.reg.reg
|
||||
)
|
||||
{
|
||||
|
@ -270,7 +270,7 @@ static void computelocalvectorpropinfo(LocalVectorArray *arrays) {
|
|||
if (
|
||||
instr->op == PC_ADDI &&
|
||||
instr->args[2].kind == PCOp_MEMORY &&
|
||||
instr->args[2].arg == PCOpMemory1 &&
|
||||
(PCOpMemoryArg) instr->args[2].arg == PCOpMemory1 &&
|
||||
(array = lookup_vector_array_object(arrays, instr->args[2].data.mem.obj)) &&
|
||||
!array->invalid
|
||||
)
|
||||
|
@ -301,13 +301,13 @@ static void computeglobalvectorpropinfo(void) {
|
|||
bitvecsize = (number_of_ADDIs + 31) >> 5;
|
||||
flag = 1;
|
||||
info = &vectorpropinfo[pcbasicblocks->blockIndex];
|
||||
bitvectorinitialize(info->vec8, number_of_ADDIs, 0);
|
||||
bitvectorcopy(info->vecC, info->vec0, number_of_ADDIs);
|
||||
bitvectorinitialize(info->in, number_of_ADDIs, 0);
|
||||
bitvectorcopy(info->out, info->use, number_of_ADDIs);
|
||||
|
||||
for (block = pcbasicblocks->nextBlock; block; block = block->nextBlock) {
|
||||
info = &vectorpropinfo[block->blockIndex];
|
||||
vecC = info->vecC;
|
||||
vec4 = info->vec4;
|
||||
vecC = info->out;
|
||||
vec4 = info->def;
|
||||
for (i = 0; i < bitvecsize; vecC++, vec4++, i++)
|
||||
*vecC = ~*vec4;
|
||||
}
|
||||
|
@ -318,16 +318,16 @@ static void computeglobalvectorpropinfo(void) {
|
|||
if (depthfirstordering[blockIndex]) {
|
||||
info = &vectorpropinfo[depthfirstordering[blockIndex]->blockIndex];
|
||||
if ((preds = depthfirstordering[blockIndex]->predecessors)) {
|
||||
vec8 = info->vec8;
|
||||
bitvectorcopy(vec8, vectorpropinfo[preds->block->blockIndex].vecC, number_of_ADDIs);
|
||||
vec8 = info->in;
|
||||
bitvectorcopy(vec8, vectorpropinfo[preds->block->blockIndex].out, number_of_ADDIs);
|
||||
for (preds = preds->nextLink; preds; preds = preds->nextLink)
|
||||
bitvectorintersect(vec8, vectorpropinfo[preds->block->blockIndex].vecC, number_of_ADDIs);
|
||||
bitvectorintersect(vec8, vectorpropinfo[preds->block->blockIndex].out, number_of_ADDIs);
|
||||
}
|
||||
|
||||
vecC = info->vecC;
|
||||
vec8 = info->vec8;
|
||||
vec0 = info->vec0;
|
||||
vec4 = info->vec4;
|
||||
vecC = info->out;
|
||||
vec8 = info->in;
|
||||
vec0 = info->use;
|
||||
vec4 = info->def;
|
||||
for (j = 0; j < bitvecsize; j++) {
|
||||
val = *vec0 | (*vec8 & ~*vec4);
|
||||
if (val != *vecC) {
|
||||
|
|
|
@ -2,10 +2,8 @@
|
|||
#define COMPILER_COLORING_H
|
||||
|
||||
#include "compiler/common.h"
|
||||
#include "compiler/Registers.h"
|
||||
|
||||
//extern RegClass coloring_class;
|
||||
extern char coloring_class;
|
||||
extern RegClass coloring_class;
|
||||
|
||||
extern void colorinstructions(Object *proc);
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@ typedef struct IAMnemonic {
|
|||
|
||||
typedef struct IARegister {
|
||||
char *name;
|
||||
char rclass;
|
||||
RegClass rclass;
|
||||
SInt32 num;
|
||||
Object *object;
|
||||
} IARegister;
|
||||
|
|
|
@ -5,7 +5,7 @@
|
|||
#include "compiler/InlineAsm.h"
|
||||
|
||||
extern void InlineAsm_InitializeRegisters(void);
|
||||
extern void InlineAsm_InsertRegister(char *name, char rclass, short num, Object *object);
|
||||
extern void InlineAsm_InsertRegister(char *name, RegClass rclass, short num, Object *object);
|
||||
extern IARegister *InlineAsm_LookupRegister(char *name);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -4,15 +4,15 @@
|
|||
#include "compiler/common.h"
|
||||
|
||||
typedef struct LiveInfo {
|
||||
UInt32 *vec0; // use
|
||||
UInt32 *vec4; // def
|
||||
UInt32 *vec8; // in
|
||||
UInt32 *vecC; // out
|
||||
UInt32 *use;
|
||||
UInt32 *def;
|
||||
UInt32 *in;
|
||||
UInt32 *out;
|
||||
} LiveInfo;
|
||||
|
||||
extern LiveInfo *liveinfo;
|
||||
|
||||
extern void computelivevariables(Object *proc);
|
||||
extern int dead(PCode *instr, char rclass, UInt32 *vec);
|
||||
extern int dead(PCode *instr, RegClass rclass, UInt32 *vec);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -51,7 +51,7 @@ typedef enum {
|
|||
|
||||
struct PCodeArg {
|
||||
PCOpKind kind;
|
||||
unsigned char arg;
|
||||
RegClass arg;
|
||||
union {
|
||||
struct {
|
||||
unsigned short effect;
|
||||
|
@ -79,33 +79,33 @@ struct PCodeArg {
|
|||
|
||||
#define PC_OP_IS_REGISTER(_op, _rclass, _reg) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass) && \
|
||||
(_op)->arg == (_rclass) && \
|
||||
(_op)->data.reg.reg == (_reg))
|
||||
|
||||
#define PC_OP_IS_READ_REGISTER(_op, _rclass, _reg) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass) && \
|
||||
(_op)->arg == (_rclass) && \
|
||||
(_op)->data.reg.reg == (_reg) && \
|
||||
((_op)->data.reg.effect & EffectRead))
|
||||
|
||||
#define PC_OP_IS_WRITE_REGISTER(_op, _rclass, _reg) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass) && \
|
||||
(_op)->arg == (_rclass) && \
|
||||
(_op)->data.reg.reg == (_reg) && \
|
||||
((_op)->data.reg.effect & EffectWrite))
|
||||
|
||||
#define PC_OP_IS_ANY_REGISTER(_op, _rclass) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass))
|
||||
(_op)->arg == (_rclass))
|
||||
|
||||
#define PC_OP_IS_READ_ANY_REGISTER(_op, _rclass) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass) && \
|
||||
(_op)->arg == (_rclass) && \
|
||||
((_op)->data.reg.effect & EffectRead))
|
||||
|
||||
#define PC_OP_IS_WRITE_ANY_REGISTER(_op, _rclass) \
|
||||
((_op)->kind == PCOp_REGISTER && \
|
||||
(char) (_op)->arg == (_rclass) && \
|
||||
(_op)->arg == (_rclass) && \
|
||||
((_op)->data.reg.effect & EffectWrite))
|
||||
|
||||
|
||||
|
|
|
@ -18,6 +18,7 @@ typedef enum {
|
|||
} PCOpKind;
|
||||
|
||||
typedef enum {
|
||||
PCOpMemory0 = 0,
|
||||
PCOpMemory1 = 1
|
||||
} PCOpMemoryArg;
|
||||
|
||||
|
|
|
@ -12,12 +12,12 @@ extern short _CALLER_SP_;
|
|||
extern char *special_register_names[RegClassMax][RegisterMax];
|
||||
extern short spr_to_sysreg[4];
|
||||
|
||||
extern void asm_used_register(char rclass, short reg);
|
||||
extern void retain_register(Object *obj, char rclass, short reg);
|
||||
extern void asm_used_register(RegClass rclass, short reg);
|
||||
extern void retain_register(Object *obj, RegClass rclass, short reg);
|
||||
extern void retain_GPR_pair(Object *obj, short reg, short regHi);
|
||||
extern int is_register_object(Object *obj);
|
||||
extern int GetABIFirstNonVolatile(char rclass);
|
||||
extern char GetRegisterClassName(char rclass);
|
||||
extern int GetABIFirstNonVolatile(RegClass rclass);
|
||||
extern char GetRegisterClassName(RegClass rclass);
|
||||
extern void setup_diagnostic_reg_strings(void);
|
||||
extern void init_target_registers(void);
|
||||
extern void assign_register_by_type(Object *obj);
|
||||
|
@ -27,9 +27,9 @@ extern void set_last_exception_registers(void);
|
|||
extern VarInfo *Registers_GetVarInfo(Object *obj);
|
||||
extern int used_vrstate_VRs(void);
|
||||
extern UInt32 colored_vrs_as_vrsave(PCodeBlock *block);
|
||||
extern void save_before_coloring_nonvolatile_registers(char rclass);
|
||||
extern void reset_nonvolatile_registers(char rclass);
|
||||
extern int is_nonvolatile_register(char rclass, int reg);
|
||||
extern void save_before_coloring_nonvolatile_registers(RegClass rclass);
|
||||
extern void reset_nonvolatile_registers(RegClass rclass);
|
||||
extern int is_nonvolatile_register(RegClass rclass, int reg);
|
||||
extern void init_endian(void);
|
||||
extern void update_asm_nonvolatile_registers(void);
|
||||
|
||||
|
|
|
@ -8,25 +8,6 @@ enum {
|
|||
Register2 = 2,
|
||||
RegisterMax = 32
|
||||
};
|
||||
/*const char RegClass_SPR = 0;
|
||||
const char RegClass_CRFIELD = 1;
|
||||
const char RegClass_VR = 2;
|
||||
const char RegClass_FPR = 3;
|
||||
const char RegClass_GPR = 4;
|
||||
const char RegClassMax = 5;
|
||||
const char RegClass_6 = 6;
|
||||
const char RegClass_DCR = 7;*/
|
||||
typedef enum RegClass {
|
||||
RegClass_Invalid = -1,
|
||||
RegClass_SPR = 0,
|
||||
RegClass_CRFIELD = 1,
|
||||
RegClass_VR = 2,
|
||||
RegClass_FPR = 3,
|
||||
RegClass_GPR = 4,
|
||||
RegClassMax = 5,
|
||||
RegClass_6 = 6,
|
||||
RegClass_DCR = 7
|
||||
} RegClass;
|
||||
|
||||
enum {
|
||||
RegState0 = 0,
|
||||
|
@ -51,11 +32,11 @@ extern int coloring;
|
|||
extern int optimizing;
|
||||
|
||||
extern void init_registers(void);
|
||||
extern void assign_register_to_variable(Object *obj, char rclass);
|
||||
extern void retain_register_for_argument(Object *obj, char rclass, short reg);
|
||||
extern int available_registers(char rclass);
|
||||
extern UInt32 volatile_registers(char rclass);
|
||||
extern short obtain_nonvolatile_register(char rclass);
|
||||
extern void assign_register_to_variable(Object *obj, RegClass rclass);
|
||||
extern void retain_register_for_argument(Object *obj, RegClass rclass, short reg);
|
||||
extern int available_registers(RegClass rclass);
|
||||
extern UInt32 volatile_registers(RegClass rclass);
|
||||
extern short obtain_nonvolatile_register(RegClass rclass);
|
||||
extern void open_temp_registers(void);
|
||||
extern void check_temp_registers(void);
|
||||
extern void close_temp_registers(void);
|
||||
|
|
|
@ -2,7 +2,6 @@
|
|||
#define COMPILER_USEDEFCHAINS_H
|
||||
|
||||
#include "compiler/common.h"
|
||||
#include "compiler/Registers.h"
|
||||
#include "compiler/PCodeInfo.h"
|
||||
|
||||
#ifdef __MWERKS__
|
||||
|
@ -10,7 +9,7 @@
|
|||
#endif
|
||||
typedef struct TinyValue {
|
||||
PCOpKind kind;
|
||||
unsigned char arg;
|
||||
RegClass arg;
|
||||
union {
|
||||
short reg;
|
||||
Object *object;
|
||||
|
|
|
@ -10,8 +10,6 @@ typedef struct HashNameNode {
|
|||
char name[1];
|
||||
} HashNameNode;
|
||||
|
||||
typedef struct CPrepFileInfo CPrepFileInfo;
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#pragma options align=mac68k
|
||||
#endif
|
||||
|
@ -118,6 +116,7 @@ typedef struct CI_FuncData CI_FuncData;
|
|||
typedef struct CLabel CLabel;
|
||||
typedef struct ClassList ClassList;
|
||||
typedef struct CParams CParams;
|
||||
typedef struct CPrepFileInfo CPrepFileInfo;
|
||||
typedef struct DeclInfo DeclInfo;
|
||||
typedef struct DeclThing DeclThing; // rename me please
|
||||
typedef struct DefArgCtorInfo DefArgCtorInfo;
|
||||
|
@ -307,6 +306,18 @@ enum {
|
|||
EXPORT_FLAGS_EXPORT = 0x40
|
||||
};
|
||||
|
||||
typedef enum RegClass {
|
||||
RegClass_Invalid = -1,
|
||||
RegClass_SPR = 0,
|
||||
RegClass_CRFIELD = 1,
|
||||
RegClass_VR = 2,
|
||||
RegClass_FPR = 3,
|
||||
RegClass_GPR = 4,
|
||||
RegClassMax = 5,
|
||||
RegClass_6 = 6,
|
||||
RegClass_DCR = 7
|
||||
} RegClass;
|
||||
|
||||
#ifdef __MWERKS__
|
||||
#pragma options align=mac68k
|
||||
#endif
|
||||
|
|
6
notes
6
notes
|
@ -105,7 +105,7 @@ DONE IroSubable.c
|
|||
MOST RegisterInfo.c
|
||||
MOST TOC.c
|
||||
MOST StackFrame.c
|
||||
MOST Registers.c
|
||||
DONE Registers.c
|
||||
DONE PCode.c
|
||||
95% Switch.c
|
||||
DONE ValueNumbering.c
|
||||
|
@ -118,7 +118,7 @@ MOST Operands.c
|
|||
DONE PCodeListing.c
|
||||
---- Peephole.c
|
||||
DONE Scheduler.c
|
||||
99% Coloring.c
|
||||
DONE Coloring.c
|
||||
---- PCodeAssembly.c
|
||||
---- Intrinsics.c
|
||||
DONE PPCError.c
|
||||
|
@ -144,7 +144,7 @@ PART PCodeInfo.c
|
|||
---- StructMoves.c
|
||||
---- FunctionCalls.c
|
||||
DONE IroBitVect.c
|
||||
MOST InlineAsmRegistersPPC.c
|
||||
99% InlineAsmRegistersPPC.c
|
||||
DONE InlineAsmMnemonicsPPC.c
|
||||
DONE InlineAsmRegisters.c
|
||||
95% Alias.c
|
||||
|
|
Loading…
Reference in New Issue