Dawn/Tint: Polyfill reflect vec2<f32> for D3D12 FXC on Intel

This CL add a toggle-controlled Tint polyfill for reflect on vec2<f32>,
and enable this toggle by default on D3D12 Intel device when using FXC.
This CL works around issue tint:1798.

Bug: tint:1798
Change-Id: If2f4de836eaf5e7374bc2c1ae3fbe06b91a5bbd5
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/121160
Reviewed-by: Corentin Wallez <cwallez@chromium.org>
Kokoro: Kokoro <noreply+kokoro@google.com>
Commit-Queue: Zhaoming Jiang <zhaoming.jiang@intel.com>
This commit is contained in:
Zhaoming Jiang
2023-02-27 02:59:50 +00:00
committed by Dawn LUCI CQ
parent 67a3918bd8
commit 04529be9b7
10 changed files with 232 additions and 3 deletions

View File

@@ -387,6 +387,11 @@ static constexpr ToggleEnumAndInfoList kToggleNameAndInfoList = {{
"This toggle is off by default. It is expected to turn on or get removed when WebGPU V1 "
"ships and stays stable.",
"https://crbug.com/dawn/1563", ToggleStage::Device}},
{Toggle::D3D12PolyfillReflectVec2F32,
{"d3d12_polyfill_reflect_vec2_f32",
"Polyfill the reflect builtin for vec2<f32> for D3D12. This toggle is enabled by default on "
"D3D12 backends using FXC on Intel GPUs due to a driver issue on Intel D3D12 driver.",
"https://crbug.com/tint/1798", ToggleStage::Device}},
{Toggle::NoWorkaroundSampleMaskBecomesZeroForAllButLastColorTarget,
{"no_workaround_sample_mask_becomes_zero_for_all_but_last_color_target",
"MacOS 12.0+ Intel has a bug where the sample mask is only applied for the last color "

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@@ -92,6 +92,7 @@ enum class Toggle {
UseBlitForDepthTextureToTextureCopyToNonzeroSubresource,
D3D12ReplaceAddWithMinusWhenDstFactorIsZeroAndSrcFactorIsDstAlpha,
DisallowDeprecatedAPIs,
D3D12PolyfillReflectVec2F32,
// Unresolved issues.
NoWorkaroundSampleMaskBecomesZeroForAllButLastColorTarget,

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@@ -595,6 +595,12 @@ void Adapter::SetupBackendDeviceToggles(TogglesState* deviceToggles) const {
deviceToggles->ForceSet(
Toggle::D3D12UseTempBufferInTextureToTextureCopyBetweenDifferentDimensions, true);
}
// Polyfill reflect builtin for vec2<f32> on Intel device in usng FXC.
// See https://crbug.com/tint/1798 for more information.
if (gpu_info::IsIntel(vendorId) && !deviceToggles->IsEnabled(Toggle::UseDXC)) {
deviceToggles->Default(Toggle::D3D12PolyfillReflectVec2F32, true);
}
}
ResultOrError<Ref<DeviceBase>> Adapter::CreateDeviceImpl(const DeviceDescriptor* descriptor,

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@@ -95,6 +95,7 @@ enum class Compiler { FXC, DXC };
X(bool, disableSymbolRenaming) \
X(bool, isRobustnessEnabled) \
X(bool, disableWorkgroupInit) \
X(bool, polyfillReflectVec2F32) \
X(bool, dumpShaders)
#define D3D_BYTECODE_COMPILATION_REQUEST_MEMBERS(X) \
@@ -401,6 +402,8 @@ ResultOrError<std::string> TranslateToHLSL(
options.interstage_locations = r.interstageLocations;
}
options.polyfill_reflect_vec2_f32 = r.polyfillReflectVec2F32;
TRACE_EVENT0(tracePlatform.UnsafeGetValue(), General, "tint::writer::hlsl::Generate");
auto result = tint::writer::hlsl::Generate(&transformedProgram, options);
DAWN_INVALID_IF(!result.success, "An error occured while generating HLSL: %s", result.error);
@@ -606,6 +609,8 @@ ResultOrError<CompiledShader> ShaderModule::Compile(
req.hlsl.arrayLengthFromUniform = std::move(arrayLengthFromUniform);
req.hlsl.substituteOverrideConfig = std::move(substituteOverrideConfig);
req.hlsl.polyfillReflectVec2F32 = device->IsToggleEnabled(Toggle::D3D12PolyfillReflectVec2F32);
const CombinedLimits& limits = device->GetLimits();
req.hlsl.limits = LimitsForCompilationRequest::Create(limits.v1);