Reuse BGL validation in default layout computations.
Instead of calling validation functions directly in PipelineLayoutBase::CreateDefault, use ValidateBGLDesc and ValidatePipelineLayoutDesc. Also makes the visibility of the default layout match the aggregation as in the WebGPU spec. Also makes refcounting of BGLs a bit less manual at the bottom of CreateDefault. Also adds tests for minBufferBindingSize and visiblity aggregation in the default layout computations. Bug: dawn:527 Change-Id: I6bbd5f3de8b235dddf6cbd2bedfd34a094fcb277 Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/28560 Commit-Queue: Corentin Wallez <cwallez@chromium.org> Reviewed-by: Stephen White <senorblanco@chromium.org>
This commit is contained in:
parent
52a588f3c9
commit
aeda49ba50
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@ -32,23 +32,9 @@
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namespace dawn_native {
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MaybeError ValidateBindGroupLayoutDescriptor(DeviceBase*,
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MaybeError ValidateBindGroupLayoutDescriptor(DeviceBase* device,
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const BindGroupLayoutDescriptor* descriptor);
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MaybeError ValidateBindingTypeWithShaderStageVisibility(
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wgpu::BindingType bindingType,
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wgpu::ShaderStage shaderStageVisibility);
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MaybeError ValidateStorageTextureFormat(DeviceBase* device,
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wgpu::BindingType bindingType,
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wgpu::TextureFormat storageTextureFormat);
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MaybeError ValidateStorageTextureViewDimension(wgpu::BindingType bindingType,
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wgpu::TextureViewDimension dimension);
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MaybeError ValidateBindingCanBeMultisampled(wgpu::BindingType bindingType,
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wgpu::TextureViewDimension viewDimension);
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// Bindings are specified as a |BindingNumber| in the BindGroupLayoutDescriptor.
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// These numbers may be arbitrary and sparse. Internally, Dawn packs these numbers
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// into a packed range of |BindingIndex| integers.
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@ -57,10 +57,6 @@ namespace dawn_native {
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case wgpu::BindingType::WriteonlyStorageTexture:
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perStageBindingCountMember = &PerStageBindingCounts::storageTextureCount;
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break;
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default:
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UNREACHABLE();
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break;
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}
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ASSERT(perStageBindingCountMember != nullptr);
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@ -28,33 +28,14 @@ namespace dawn_native {
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bool InferredBindGroupLayoutEntriesCompatible(const BindGroupLayoutEntry& lhs,
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const BindGroupLayoutEntry& rhs) {
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// Minimum buffer binding size excluded because we take the maximum seen across stages
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return lhs.binding == rhs.binding && lhs.visibility == rhs.visibility &&
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lhs.type == rhs.type && lhs.hasDynamicOffset == rhs.hasDynamicOffset &&
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// Minimum buffer binding size excluded because we take the maximum seen across stages.
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// Visibility is excluded because we take the OR across stages.
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return lhs.binding == rhs.binding && lhs.type == rhs.type &&
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lhs.hasDynamicOffset == rhs.hasDynamicOffset &&
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lhs.multisampled == rhs.multisampled && lhs.viewDimension == rhs.viewDimension &&
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lhs.textureComponentType == rhs.textureComponentType;
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}
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wgpu::ShaderStage GetShaderStageVisibilityWithBindingType(wgpu::BindingType bindingType) {
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// TODO(jiawei.shao@intel.com): support read-only and read-write storage textures.
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switch (bindingType) {
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case wgpu::BindingType::StorageBuffer:
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case wgpu::BindingType::WriteonlyStorageTexture:
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return wgpu::ShaderStage::Fragment | wgpu::ShaderStage::Compute;
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case wgpu::BindingType::UniformBuffer:
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case wgpu::BindingType::ReadonlyStorageBuffer:
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case wgpu::BindingType::Sampler:
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case wgpu::BindingType::ComparisonSampler:
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case wgpu::BindingType::SampledTexture:
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case wgpu::BindingType::ReadonlyStorageTexture:
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return wgpu::ShaderStage::Vertex | wgpu::ShaderStage::Fragment |
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wgpu::ShaderStage::Compute;
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}
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return {};
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}
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} // anonymous namespace
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MaybeError ValidatePipelineLayoutDescriptor(DeviceBase* device,
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@ -142,22 +123,7 @@ namespace dawn_native {
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BindGroupLayoutEntry bindingSlot;
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bindingSlot.binding = static_cast<uint32_t>(bindingNumber);
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DAWN_TRY(ValidateBindingTypeWithShaderStageVisibility(bindingInfo.type,
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StageBit(shaderStage)));
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DAWN_TRY(ValidateStorageTextureFormat(device, bindingInfo.type,
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bindingInfo.storageTextureFormat));
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DAWN_TRY(ValidateStorageTextureViewDimension(bindingInfo.type,
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bindingInfo.viewDimension));
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if (bindingInfo.multisampled) {
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DAWN_TRY(ValidateBindingCanBeMultisampled(bindingInfo.type,
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bindingInfo.viewDimension));
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}
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bindingSlot.visibility =
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GetShaderStageVisibilityWithBindingType(bindingInfo.type);
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bindingSlot.visibility = StageBit(shaderStage);
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bindingSlot.type = bindingInfo.type;
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bindingSlot.hasDynamicOffset = false;
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bindingSlot.multisampled = bindingInfo.multisampled;
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@ -181,11 +147,14 @@ namespace dawn_native {
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"not compatible with previous declaration");
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}
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// Use the max |minBufferBindingSize| we find
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// Use the max |minBufferBindingSize| we find.
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existingEntry->minBufferBindingSize =
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std::max(existingEntry->minBufferBindingSize,
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bindingSlot.minBufferBindingSize);
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// Use the OR of all the stages at which we find this binding.
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existingEntry->visibility |= bindingSlot.visibility;
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// Already used slot, continue
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continue;
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}
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@ -206,36 +175,38 @@ namespace dawn_native {
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}
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}
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DAWN_TRY(ValidateBindingCounts(bindingCounts));
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ityp::array<BindGroupIndex, BindGroupLayoutBase*, kMaxBindGroups> bindGroupLayouts = {};
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// Create the deduced BGLs, validating if they are valid.
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ityp::array<BindGroupIndex, Ref<BindGroupLayoutBase>, kMaxBindGroups> bindGroupLayouts = {};
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for (BindGroupIndex group(0); group < bindGroupLayoutCount; ++group) {
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BindGroupLayoutDescriptor desc = {};
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desc.entries = entryData[group].data();
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desc.entryCount = static_cast<uint32_t>(entryCounts[group]);
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// We should never produce a bad descriptor.
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ASSERT(!ValidateBindGroupLayoutDescriptor(device, &desc).IsError());
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DAWN_TRY(ValidateBindGroupLayoutDescriptor(device, &desc));
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DAWN_TRY_ASSIGN(bindGroupLayouts[group], device->GetOrCreateBindGroupLayout(&desc));
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Ref<BindGroupLayoutBase> bgl;
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DAWN_TRY_ASSIGN(bgl, device->GetOrCreateBindGroupLayout(&desc));
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bindGroupLayouts[group] = bgl.Detach();
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ASSERT(!bindGroupLayouts[group]->IsError());
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}
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PipelineLayoutDescriptor desc = {};
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desc.bindGroupLayouts = bindGroupLayouts.data();
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desc.bindGroupLayoutCount = static_cast<uint32_t>(bindGroupLayoutCount);
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PipelineLayoutBase* pipelineLayout = device->CreatePipelineLayout(&desc);
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ASSERT(!pipelineLayout->IsError());
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// These bind group layouts are created internally and referenced by the pipeline layout.
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// Release the external refcount.
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for (BindGroupIndex group(0); group < bindGroupLayoutCount; ++group) {
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if (bindGroupLayouts[group] != nullptr) {
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bindGroupLayouts[group]->Release();
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// Create the deduced pipeline layout, validating if it is valid.
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PipelineLayoutBase* pipelineLayout = nullptr;
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{
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ityp::array<BindGroupIndex, BindGroupLayoutBase*, kMaxBindGroups> bgls = {};
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for (BindGroupIndex group(0); group < bindGroupLayoutCount; ++group) {
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bgls[group] = bindGroupLayouts[group].Get();
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}
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PipelineLayoutDescriptor desc = {};
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desc.bindGroupLayouts = bgls.data();
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desc.bindGroupLayoutCount = static_cast<uint32_t>(bindGroupLayoutCount);
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DAWN_TRY(ValidatePipelineLayoutDescriptor(device, &desc));
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DAWN_TRY_ASSIGN(pipelineLayout, device->GetOrCreatePipelineLayout(&desc));
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ASSERT(!pipelineLayout->IsError());
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}
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// Sanity check in debug that the pipeline layout is compatible with the current pipeline.
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for (const StageAndDescriptor& stage : stages) {
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const EntryPointMetadata& metadata =
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stage.second->module->GetEntryPoint(stage.second->entryPoint, stage.first);
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@ -19,9 +19,6 @@
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class GetBindGroupLayoutTests : public ValidationTest {
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protected:
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static constexpr wgpu::ShaderStage kVisibilityAll =
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wgpu::ShaderStage::Compute | wgpu::ShaderStage::Fragment | wgpu::ShaderStage::Vertex;
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wgpu::RenderPipeline RenderPipelineFromFragmentShader(const char* shader) {
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wgpu::ShaderModule vsModule =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
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@ -78,19 +75,21 @@ TEST_F(GetBindGroupLayoutTests, SameObject) {
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wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
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// The same value is returned for the same index.
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), pipeline.GetBindGroupLayout(0).Get());
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EXPECT_EQ(pipeline.GetBindGroupLayout(1).Get(), pipeline.GetBindGroupLayout(1).Get());
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// Matching bind group layouts at different indices are the same object.
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), pipeline.GetBindGroupLayout(1).Get());
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), pipeline.GetBindGroupLayout(2).Get());
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// BGLs with different bindings types are different objects.
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EXPECT_NE(pipeline.GetBindGroupLayout(2).Get(), pipeline.GetBindGroupLayout(3).Get());
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EXPECT_NE(pipeline.GetBindGroupLayout(0).Get(), pipeline.GetBindGroupLayout(3).Get());
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// BGLs with different visibilities are different objects.
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EXPECT_NE(pipeline.GetBindGroupLayout(0).Get(), pipeline.GetBindGroupLayout(2).Get());
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}
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// Test that getBindGroupLayout defaults are correct
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// - shader stage visibility is All
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// - shader stage visibility is the stage that adds the binding.
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// - dynamic offsets is false
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TEST_F(GetBindGroupLayoutTests, DefaultShaderStageAndDynamicOffsets) {
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wgpu::RenderPipeline pipeline = RenderPipelineFromFragmentShader(R"(
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// Check that visibility and dynamic offsets match
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binding.hasDynamicOffset = false;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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EXPECT_EQ(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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// Check that any change in visibility doesn't match.
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binding.visibility = wgpu::ShaderStage::Vertex;
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EXPECT_NE(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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binding.visibility = wgpu::ShaderStage::Fragment;
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EXPECT_NE(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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binding.visibility = wgpu::ShaderStage::Compute;
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EXPECT_NE(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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// Check that any change in hasDynamicOffsets doesn't match.
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binding.hasDynamicOffset = true;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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EXPECT_NE(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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}
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::UniformBuffer;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Compute;
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binding.hasDynamicOffset = false;
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binding.minBufferBindingSize = 4 * sizeof(float);
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binding.hasDynamicOffset = false;
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binding.multisampled = false;
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binding.minBufferBindingSize = 4 * sizeof(float);
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binding.visibility = wgpu::ShaderStage::Fragment;
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wgpu::BindGroupLayoutDescriptor desc = {};
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desc.entryCount = 1;
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{
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// Storage buffer binding is not supported in vertex shader.
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binding.visibility = wgpu::ShaderStage::Compute | wgpu::ShaderStage::Fragment;
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binding.visibility = wgpu::ShaderStage::Fragment;
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binding.type = wgpu::BindingType::StorageBuffer;
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wgpu::RenderPipeline pipeline = RenderPipelineFromFragmentShader(R"(
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#version 450
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void main() {})");
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EXPECT_EQ(device.CreateBindGroupLayout(&desc).Get(), pipeline.GetBindGroupLayout(0).Get());
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}
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binding.visibility = kVisibilityAll;
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{
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binding.type = wgpu::BindingType::UniformBuffer;
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wgpu::RenderPipeline pipeline = RenderPipelineFromFragmentShader(R"(
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@ -243,7 +238,7 @@ TEST_F(GetBindGroupLayoutTests, Multisampled) {
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::SampledTexture;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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binding.hasDynamicOffset = false;
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wgpu::BindGroupLayoutDescriptor desc = {};
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@ -276,7 +271,7 @@ TEST_F(GetBindGroupLayoutTests, ViewDimension) {
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::SampledTexture;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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binding.hasDynamicOffset = false;
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binding.multisampled = false;
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@ -350,7 +345,7 @@ TEST_F(GetBindGroupLayoutTests, TextureComponentType) {
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::SampledTexture;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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binding.hasDynamicOffset = false;
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binding.multisampled = false;
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@ -393,7 +388,7 @@ TEST_F(GetBindGroupLayoutTests, TextureComponentType) {
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TEST_F(GetBindGroupLayoutTests, BindingIndices) {
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wgpu::BindGroupLayoutEntry binding = {};
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binding.type = wgpu::BindingType::UniformBuffer;
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binding.visibility = kVisibilityAll;
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binding.visibility = wgpu::ShaderStage::Fragment;
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binding.hasDynamicOffset = false;
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binding.multisampled = false;
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binding.minBufferBindingSize = 4 * sizeof(float);
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@ -471,6 +466,152 @@ TEST_F(GetBindGroupLayoutTests, DuplicateBinding) {
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device.CreateRenderPipeline(&descriptor);
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}
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// Test that minBufferSize is set on the BGL and that the max of the min buffer sizes is used.
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TEST_F(GetBindGroupLayoutTests, MinBufferSize) {
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wgpu::ShaderModule vsModule4 =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
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#version 450
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layout(set = 0, binding = 0) uniform UniformBuffer {
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float pos;
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};
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void main() {})");
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wgpu::ShaderModule vsModule64 =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
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#version 450
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layout(set = 0, binding = 0) uniform UniformBuffer1 {
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mat4 pos;
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};
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void main() {})");
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wgpu::ShaderModule fsModule4 =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Fragment, R"(
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#version 450
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layout(set = 0, binding = 0) uniform UniformBuffer {
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float pos;
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};
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void main() {})");
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wgpu::ShaderModule fsModule64 =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Fragment, R"(
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#version 450
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layout(set = 0, binding = 0) uniform UniformBuffer {
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mat4 pos;
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};
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void main() {})");
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// Create BGLs with minBufferBindingSize 4 and 64.
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::UniformBuffer;
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binding.visibility = wgpu::ShaderStage::Fragment | wgpu::ShaderStage::Vertex;
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wgpu::BindGroupLayoutDescriptor desc = {};
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desc.entryCount = 1;
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desc.entries = &binding;
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binding.minBufferBindingSize = 4;
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wgpu::BindGroupLayout bgl4 = device.CreateBindGroupLayout(&desc);
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binding.minBufferBindingSize = 64;
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wgpu::BindGroupLayout bgl64 = device.CreateBindGroupLayout(&desc);
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utils::ComboRenderPipelineDescriptor descriptor(device);
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descriptor.layout = nullptr;
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// Check with both stages using 4 bytes.
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{
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descriptor.vertexStage.module = vsModule4;
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descriptor.cFragmentStage.module = fsModule4;
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wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), bgl4.Get());
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}
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// Check that the max is taken between 4 and 64.
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{
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descriptor.vertexStage.module = vsModule64;
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descriptor.cFragmentStage.module = fsModule4;
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wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), bgl64.Get());
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}
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// Check that the order doesn't change that the max is taken.
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{
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descriptor.vertexStage.module = vsModule4;
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descriptor.cFragmentStage.module = fsModule64;
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wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
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EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), bgl64.Get());
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}
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}
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// Test that the visibility is correctly aggregated if two stages have the exact same binding.
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TEST_F(GetBindGroupLayoutTests, StageAggregation) {
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wgpu::ShaderModule vsModuleNoSampler =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
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#version 450
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void main() {})");
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wgpu::ShaderModule vsModuleSampler =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
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#version 450
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layout(set = 0, binding = 0) uniform sampler mySampler;
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void main() {})");
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wgpu::ShaderModule fsModuleNoSampler =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Fragment, R"(
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#version 450
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void main() {})");
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wgpu::ShaderModule fsModuleSampler =
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utils::CreateShaderModule(device, utils::SingleShaderStage::Fragment, R"(
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#version 450
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layout(set = 0, binding = 0) uniform sampler mySampler;
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void main() {})");
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// Create BGLs with minBufferBindingSize 4 and 64.
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wgpu::BindGroupLayoutEntry binding = {};
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binding.binding = 0;
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binding.type = wgpu::BindingType::Sampler;
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wgpu::BindGroupLayoutDescriptor desc = {};
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desc.entryCount = 1;
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desc.entries = &binding;
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utils::ComboRenderPipelineDescriptor descriptor(device);
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descriptor.layout = nullptr;
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// Check with only the vertex shader using the sampler
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{
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descriptor.vertexStage.module = vsModuleSampler;
|
||||
descriptor.cFragmentStage.module = fsModuleNoSampler;
|
||||
wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
|
||||
|
||||
binding.visibility = wgpu::ShaderStage::Vertex;
|
||||
EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), device.CreateBindGroupLayout(&desc).Get());
|
||||
}
|
||||
|
||||
// Check with only the fragment shader using the sampler
|
||||
{
|
||||
descriptor.vertexStage.module = vsModuleNoSampler;
|
||||
descriptor.cFragmentStage.module = fsModuleSampler;
|
||||
wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
|
||||
|
||||
binding.visibility = wgpu::ShaderStage::Fragment;
|
||||
EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), device.CreateBindGroupLayout(&desc).Get());
|
||||
}
|
||||
|
||||
// Check with both shaders using the sampler
|
||||
{
|
||||
descriptor.vertexStage.module = vsModuleSampler;
|
||||
descriptor.cFragmentStage.module = fsModuleSampler;
|
||||
wgpu::RenderPipeline pipeline = device.CreateRenderPipeline(&descriptor);
|
||||
|
||||
binding.visibility = wgpu::ShaderStage::Fragment | wgpu::ShaderStage::Vertex;
|
||||
EXPECT_EQ(pipeline.GetBindGroupLayout(0).Get(), device.CreateBindGroupLayout(&desc).Get());
|
||||
}
|
||||
}
|
||||
|
||||
// Test it is invalid to have conflicting binding types in the shaders.
|
||||
TEST_F(GetBindGroupLayoutTests, ConflictingBindingType) {
|
||||
wgpu::ShaderModule vsModule =
|
||||
|
@ -500,8 +641,7 @@ TEST_F(GetBindGroupLayoutTests, ConflictingBindingType) {
|
|||
}
|
||||
|
||||
// Test it is invalid to have conflicting binding texture multisampling in the shaders.
|
||||
// TODO: Support multisampling
|
||||
TEST_F(GetBindGroupLayoutTests, DISABLED_ConflictingBindingTextureMultisampling) {
|
||||
TEST_F(GetBindGroupLayoutTests, ConflictingBindingTextureMultisampling) {
|
||||
wgpu::ShaderModule vsModule =
|
||||
utils::CreateShaderModule(device, utils::SingleShaderStage::Vertex, R"(
|
||||
#version 450
|
||||
|
|
Loading…
Reference in New Issue