[spirv-reader] Test OpSMod
Also, it's not clear if OpSRem has a direct mapping. Bug: tint:3 Change-Id: Ie7834253cf14109fbebd2ece8e18d9899b29753b Reviewed-on: https://dawn-review.googlesource.com/c/tint/+/19881 Reviewed-by: dan sinclair <dsinclair@google.com>
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@ -82,6 +82,8 @@ ast::BinaryOp ConvertBinaryOp(SpvOp opcode) {
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default:
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break;
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}
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// It's not clear what OpSMod should map to.
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// https://bugs.chromium.org/p/tint/issues/detail?id=52
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return ast::BinaryOp::kNone;
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}
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@ -463,6 +463,9 @@ INSTANTIATE_TEST_SUITE_P(
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"__vec_2__u32", AstFor("v2uint_10_20"), "modulo",
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AstFor("v2uint_20_10")}));
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// Currently WGSL is missing a mapping for OpSRem
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// https://github.com/gpuweb/gpuweb/issues/702
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INSTANTIATE_TEST_SUITE_P(
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SpvParserTest_SMod,
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SpvBinaryTest,
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@ -475,6 +478,110 @@ INSTANTIATE_TEST_SUITE_P(
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"__vec_2__i32", AstFor("v2int_30_40"), "modulo",
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AstFor("v2int_40_30")}));
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INSTANTIATE_TEST_SUITE_P(
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SpvParserTest_SMod_MixedSignednessOperands,
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SpvBinaryTest,
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::testing::Values(
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// Mixed, returning int, second arg uint
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BinaryData{"int", "int_30", "OpSMod", "uint_10", "__i32",
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"ScalarConstructor{30}", "modulo",
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R"(As<__i32>{
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ScalarConstructor{10}
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})"},
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// Mixed, returning int, first arg uint
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BinaryData{"int", "uint_10", "OpSMod", "int_30", "__i32",
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R"(As<__i32>{
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ScalarConstructor{10}
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})",
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"modulo", "ScalarConstructor{30}"},
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// Mixed, returning v2int, first arg v2uint
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BinaryData{"v2int", "v2uint_10_20", "OpSMod", "v2int_30_40",
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"__vec_2__i32", AstFor("cast_int_v2uint_10_20"), "modulo",
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AstFor("v2int_30_40")},
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// Mixed, returning v2int, second arg v2uint
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BinaryData{"v2int", "v2int_30_40", "OpSMod", "v2uint_10_20",
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"__vec_2__i32", AstFor("v2int_30_40"), "modulo",
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AstFor("cast_int_v2uint_10_20")}));
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TEST_F(SpvBinaryTestBasic, SMod_Scalar_UnsignedResult) {
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// The WGSL signed modulus operator expects both operands to be signed
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// and the result is signed as well.
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// In this test SPIR-V demands an unsigned result, so we have to
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// wrap the result with an as-cast.
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const auto assembly = CommonTypes() + R"(
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%100 = OpFunction %void None %voidfn
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%entry = OpLabel
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%1 = OpSMod %uint %int_30 %int_40
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OpReturn
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OpFunctionEnd
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)";
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auto p = parser(test::Assemble(assembly));
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ASSERT_TRUE(p->BuildAndParseInternalModuleExceptFunctions())
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<< p->error() << "\n"
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<< assembly;
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FunctionEmitter fe(p, *spirv_function(100));
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EXPECT_TRUE(fe.EmitBody()) << p->error();
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EXPECT_THAT(ToString(fe.ast_body()), HasSubstr(R"(
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Variable{
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x_1
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none
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__u32
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{
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As<__u32>{
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Binary{
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ScalarConstructor{30}
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modulo
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ScalarConstructor{40}
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}
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}
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}
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})"));
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}
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TEST_F(SpvBinaryTestBasic, SMod_Vector_UnsignedResult) {
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// The WGSL signed modulus operator expects both operands to be signed
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// and the result is signed as well.
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// In this test SPIR-V demands an unsigned result, so we have to
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// wrap the result with an as-cast.
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const auto assembly = CommonTypes() + R"(
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%100 = OpFunction %void None %voidfn
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%entry = OpLabel
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%1 = OpSMod %v2uint %v2int_30_40 %v2int_40_30
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OpReturn
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OpFunctionEnd
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)";
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auto p = parser(test::Assemble(assembly));
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ASSERT_TRUE(p->BuildAndParseInternalModuleExceptFunctions())
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<< p->error() << "\n"
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<< assembly;
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FunctionEmitter fe(p, *spirv_function(100));
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EXPECT_TRUE(fe.EmitBody()) << p->error();
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EXPECT_THAT(ToString(fe.ast_body()), HasSubstr(R"(
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Variable{
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x_1
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none
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__vec_2__u32
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{
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As<__vec_2__u32>{
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Binary{
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TypeConstructor{
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__vec_2__i32
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ScalarConstructor{30}
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ScalarConstructor{40}
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}
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modulo
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TypeConstructor{
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__vec_2__i32
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ScalarConstructor{40}
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ScalarConstructor{30}
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}
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}
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}
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}
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})"))
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<< ToString(fe.ast_body());
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}
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INSTANTIATE_TEST_SUITE_P(
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SpvParserTest_FMod,
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SpvBinaryTest,
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@ -160,6 +160,7 @@ bool AssumesResultSignednessMatchesBinaryFirstOperand(SpvOp opcode) {
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switch (opcode) {
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// TODO(dneto): More arithmetic operations.
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case SpvOpSDiv:
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case SpvOpSMod:
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return true;
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default:
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break;
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