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When both the vert and frag shaders have a UBO binding, the D3D12 backend was using register offset 0 for both, causing a collision, and the wrong constant value used in one of the shaders. The fix is to use the binding offsets computed by the BindGroupLayout, since they know about all of the bindings, not just the ones computed for each shader. This made it necessary to defer shader compilation until pipeline layout creation time (as is done in the Metal backend for similar reasons). Finally, those bindings offsets computed by the BGL include an offset for the CBV, UAV and SRV subgroups, so we must add the same register offset when assigning the BaseShaderRegister to the descriptor ranges in the PipelineLayout constructor so that they match. Bug: dawn:20 Change-Id: I18287bf1c06f06dd61288e12da64752f54634466 Reviewed-on: https://dawn-review.googlesource.com/c/1960 Reviewed-by: Stephen White <senorblanco@chromium.org> Reviewed-by: Corentin Wallez <cwallez@chromium.org> Commit-Queue: Stephen White <senorblanco@chromium.org>
133 lines
5.5 KiB
C++
133 lines
5.5 KiB
C++
// Copyright 2017 The Dawn Authors
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "dawn_native/d3d12/BindGroupLayoutD3D12.h"
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#include "common/BitSetIterator.h"
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#include "dawn_native/d3d12/DeviceD3D12.h"
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namespace dawn_native { namespace d3d12 {
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BindGroupLayout::BindGroupLayout(Device* device, const BindGroupLayoutDescriptor* descriptor)
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: BindGroupLayoutBase(device, descriptor), mDescriptorCounts{} {
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const auto& groupInfo = GetBindingInfo();
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for (uint32_t binding : IterateBitSet(groupInfo.mask)) {
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switch (groupInfo.types[binding]) {
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case dawn::BindingType::UniformBuffer:
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mBindingOffsets[binding] = mDescriptorCounts[CBV]++;
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break;
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case dawn::BindingType::StorageBuffer:
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mBindingOffsets[binding] = mDescriptorCounts[UAV]++;
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break;
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case dawn::BindingType::SampledTexture:
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mBindingOffsets[binding] = mDescriptorCounts[SRV]++;
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break;
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case dawn::BindingType::Sampler:
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mBindingOffsets[binding] = mDescriptorCounts[Sampler]++;
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break;
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}
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}
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auto SetDescriptorRange = [&](uint32_t index, uint32_t count, uint32_t* baseRegister,
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D3D12_DESCRIPTOR_RANGE_TYPE type) -> bool {
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if (count == 0) {
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return false;
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}
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auto& range = mRanges[index];
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range.RangeType = type;
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range.NumDescriptors = count;
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range.RegisterSpace = 0;
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range.OffsetInDescriptorsFromTableStart = D3D12_DESCRIPTOR_RANGE_OFFSET_APPEND;
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range.BaseShaderRegister = *baseRegister;
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*baseRegister += count;
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// These ranges will be copied and range.BaseShaderRegister will be set in
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// d3d12::PipelineLayout to account for bind group register offsets
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return true;
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};
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uint32_t rangeIndex = 0;
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uint32_t baseRegister = 0;
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std::array<uint32_t, DescriptorType::Count> descriptorOffsets;
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// Ranges 0-2 contain the CBV, UAV, and SRV ranges, if they exist, tightly packed
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// Range 3 contains the Sampler range, if there is one
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if (SetDescriptorRange(rangeIndex, mDescriptorCounts[CBV], &baseRegister,
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D3D12_DESCRIPTOR_RANGE_TYPE_CBV)) {
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descriptorOffsets[CBV] = mRanges[rangeIndex++].BaseShaderRegister;
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}
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if (SetDescriptorRange(rangeIndex, mDescriptorCounts[UAV], &baseRegister,
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D3D12_DESCRIPTOR_RANGE_TYPE_UAV)) {
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descriptorOffsets[UAV] = mRanges[rangeIndex++].BaseShaderRegister;
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}
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if (SetDescriptorRange(rangeIndex, mDescriptorCounts[SRV], &baseRegister,
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D3D12_DESCRIPTOR_RANGE_TYPE_SRV)) {
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descriptorOffsets[SRV] = mRanges[rangeIndex++].BaseShaderRegister;
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}
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uint32_t zero = 0;
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SetDescriptorRange(Sampler, mDescriptorCounts[Sampler], &zero,
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D3D12_DESCRIPTOR_RANGE_TYPE_SAMPLER);
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descriptorOffsets[Sampler] = 0;
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for (uint32_t binding : IterateBitSet(groupInfo.mask)) {
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switch (groupInfo.types[binding]) {
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case dawn::BindingType::UniformBuffer:
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mBindingOffsets[binding] += descriptorOffsets[CBV];
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break;
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case dawn::BindingType::StorageBuffer:
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mBindingOffsets[binding] += descriptorOffsets[UAV];
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break;
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case dawn::BindingType::SampledTexture:
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mBindingOffsets[binding] += descriptorOffsets[SRV];
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break;
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case dawn::BindingType::Sampler:
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mBindingOffsets[binding] += descriptorOffsets[Sampler];
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break;
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}
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}
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}
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const std::array<uint32_t, kMaxBindingsPerGroup>& BindGroupLayout::GetBindingOffsets() const {
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return mBindingOffsets;
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}
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uint32_t BindGroupLayout::GetCbvUavSrvDescriptorTableSize() const {
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return (static_cast<uint32_t>(mDescriptorCounts[CBV] > 0) +
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static_cast<uint32_t>(mDescriptorCounts[UAV] > 0) +
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static_cast<uint32_t>(mDescriptorCounts[SRV] > 0));
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}
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uint32_t BindGroupLayout::GetSamplerDescriptorTableSize() const {
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return mDescriptorCounts[Sampler] > 0;
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}
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uint32_t BindGroupLayout::GetCbvUavSrvDescriptorCount() const {
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return mDescriptorCounts[CBV] + mDescriptorCounts[UAV] + mDescriptorCounts[SRV];
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}
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uint32_t BindGroupLayout::GetSamplerDescriptorCount() const {
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return mDescriptorCounts[Sampler];
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}
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const D3D12_DESCRIPTOR_RANGE* BindGroupLayout::GetCbvUavSrvDescriptorRanges() const {
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return mRanges;
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}
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const D3D12_DESCRIPTOR_RANGE* BindGroupLayout::GetSamplerDescriptorRanges() const {
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return &mRanges[Sampler];
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}
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}} // namespace dawn_native::d3d12
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