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7d7976d590
This patch add DXC compile flag "-enable-16bit-types" and change profile to SM6.2 when validating generated HLSL using DXC if f16 extension is enabled in the WGSL program. The patch add Tint end-to-end test cases for expressions using f16 type, including constructor, binary operator, splat, zero-init, and others. Testcases that use f16 types in uniform or storage buffer are SKIPped, because such usage is not implemented yet. Bug: tint:1473, tint:1502 Change-Id: I481ab3d12cbb822f11ef85ba807bca3f9770089b Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/96252 Kokoro: Kokoro <noreply+kokoro@google.com> Reviewed-by: Ben Clayton <bclayton@chromium.org> Commit-Queue: Zhaoming Jiang <zhaoming.jiang@intel.com>
19 lines
630 B
Plaintext
19 lines
630 B
Plaintext
SKIP: FAILED
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swizzle/write/packed_vec3/f16.wgsl:3:8 error: using f16 types in 'storage' storage class is not implemented yet
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v: vec3<f16>,
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^^^^^^^^^
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swizzle/write/packed_vec3/f16.wgsl:2:1 note: see layout of struct:
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/* align(8) size(8) */ struct S {
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/* offset(0) align(8) size(6) */ v : vec3<f16>;
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/* offset(6) align(1) size(2) */ // -- implicit struct size padding --;
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/* */ };
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struct S {
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^^^^^^
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swizzle/write/packed_vec3/f16.wgsl:6:48 note: see declaration of variable
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@group(0) @binding(0) var<storage, read_write> U : S;
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^
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