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https://github.com/encounter/dawn-cmake.git
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84532462f6
Followup of storage buffer bindings aliasing validation. Bug: dawn:1642 Change-Id: I84bf33895320053630ed80d3503ff53d1eaa83b9 Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/121420 Kokoro: Kokoro <noreply+kokoro@google.com> Reviewed-by: Austin Eng <enga@chromium.org> Commit-Queue: Shrek Shao <shrekshao@google.com>
533 lines
21 KiB
C++
533 lines
21 KiB
C++
// Copyright 2023 The Dawn Authors
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <string>
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#include <vector>
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#include "dawn/common/Assert.h"
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#include "dawn/common/Constants.h"
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#include "dawn/common/Numeric.h"
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#include "dawn/tests/unittests/validation/ValidationTest.h"
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#include "dawn/utils/ComboRenderPipelineDescriptor.h"
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#include "dawn/utils/WGPUHelpers.h"
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namespace {
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using BindingDescriptorGroups = std::vector<std::vector<utils::BindingInitializationHelper>>;
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struct TestSet {
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bool valid;
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BindingDescriptorGroups bindingEntries;
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};
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constexpr wgpu::TextureFormat kTextureFormat = wgpu::TextureFormat::RGBA8Unorm;
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wgpu::TextureViewDescriptor GetTextureViewDescriptor(
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uint32_t baseMipLevel,
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uint32_t mipLevelcount,
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uint32_t baseArrayLayer,
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uint32_t arrayLayerCount,
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wgpu::TextureAspect aspect = wgpu::TextureAspect::All) {
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wgpu::TextureViewDescriptor descriptor;
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descriptor.dimension = wgpu::TextureViewDimension::e2DArray;
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descriptor.baseMipLevel = baseMipLevel;
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descriptor.mipLevelCount = mipLevelcount;
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descriptor.baseArrayLayer = baseArrayLayer;
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descriptor.arrayLayerCount = arrayLayerCount;
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descriptor.aspect = aspect;
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return descriptor;
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}
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// Creates a bind group with given bindings for shader text.
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std::string GenerateBindingString(const BindingDescriptorGroups& descriptors) {
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std::ostringstream ostream;
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size_t index = 0;
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uint32_t groupIndex = 0;
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for (const auto& entries : descriptors) {
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for (uint32_t bindingIndex = 0; bindingIndex < entries.size(); bindingIndex++) {
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// All texture view binding format uses RGBA8Unorm in this test.
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ostream << "@group(" << groupIndex << ") @binding(" << bindingIndex << ") "
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<< "var b" << index << " : texture_storage_2d_array<rgba8unorm, write>;\n";
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index++;
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}
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groupIndex++;
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}
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return ostream.str();
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}
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// Creates reference shader text to make sure variables don't get optimized out.
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std::string GenerateReferenceString(const BindingDescriptorGroups& descriptors) {
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std::ostringstream ostream;
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size_t index = 0;
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for (const auto& entries : descriptors) {
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for (uint32_t bindingIndex = 0; bindingIndex < entries.size(); bindingIndex++) {
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ostream << "_ = b" << index << ";\n";
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index++;
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}
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}
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return ostream.str();
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}
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// Creates a compute shader with given bindings
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std::string CreateComputeShaderWithBindings(const BindingDescriptorGroups& bindingsGroups) {
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return GenerateBindingString(bindingsGroups) + "@compute @workgroup_size(1,1,1) fn main() {\n" +
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GenerateReferenceString(bindingsGroups) + "}";
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}
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// Creates a fragment shader with given bindings
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std::string CreateFragmentShaderWithBindings(const BindingDescriptorGroups& bindingsGroups) {
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return GenerateBindingString(bindingsGroups) + "@fragment fn main() {\n" +
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GenerateReferenceString(bindingsGroups) + "}";
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}
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const char* kVertexShader = R"(
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@vertex fn main() -> @builtin(position) vec4<f32> {
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return vec4<f32>();
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}
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)";
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} // namespace
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class WritableTextureBindingAliasingValidationTests : public ValidationTest {
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public:
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wgpu::Texture CreateTexture(wgpu::TextureUsage usage,
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wgpu::TextureFormat format,
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uint32_t mipLevelCount,
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uint32_t arrayLayerCount,
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wgpu::TextureDimension dimension = wgpu::TextureDimension::e2D) {
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wgpu::TextureDescriptor descriptor;
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descriptor.dimension = dimension;
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descriptor.size = {16, 16, arrayLayerCount};
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descriptor.sampleCount = 1;
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descriptor.format = format;
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descriptor.mipLevelCount = mipLevelCount;
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descriptor.usage = usage;
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return device.CreateTexture(&descriptor);
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}
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// Creates compute pipeline given a layout and shader
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wgpu::ComputePipeline CreateComputePipeline(const std::vector<wgpu::BindGroupLayout>& layouts,
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const std::string& shader) {
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wgpu::ShaderModule csModule = utils::CreateShaderModule(device, shader.c_str());
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wgpu::ComputePipelineDescriptor csDesc;
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wgpu::PipelineLayoutDescriptor descriptor;
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descriptor.bindGroupLayoutCount = layouts.size();
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descriptor.bindGroupLayouts = layouts.data();
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csDesc.layout = device.CreatePipelineLayout(&descriptor);
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csDesc.compute.module = csModule;
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csDesc.compute.entryPoint = "main";
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return device.CreateComputePipeline(&csDesc);
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}
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// Creates render pipeline given layouts and shaders
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wgpu::RenderPipeline CreateRenderPipeline(const std::vector<wgpu::BindGroupLayout>& layouts,
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const std::string& vertexShader,
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const std::string& fragShader) {
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wgpu::ShaderModule vsModule = utils::CreateShaderModule(device, vertexShader.c_str());
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wgpu::ShaderModule fsModule = utils::CreateShaderModule(device, fragShader.c_str());
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utils::ComboRenderPipelineDescriptor pipelineDescriptor;
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pipelineDescriptor.vertex.module = vsModule;
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pipelineDescriptor.cFragment.module = fsModule;
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pipelineDescriptor.cTargets[0].writeMask = wgpu::ColorWriteMask::None;
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pipelineDescriptor.layout = nullptr;
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ASSERT(!layouts.empty());
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wgpu::PipelineLayoutDescriptor descriptor;
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descriptor.bindGroupLayoutCount = layouts.size();
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descriptor.bindGroupLayouts = layouts.data();
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pipelineDescriptor.layout = device.CreatePipelineLayout(&descriptor);
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return device.CreateRenderPipeline(&pipelineDescriptor);
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}
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// Creates bind group layout with given minimum sizes for each binding
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wgpu::BindGroupLayout CreateBindGroupLayout(
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const std::vector<utils::BindingInitializationHelper>& bindings) {
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std::vector<wgpu::BindGroupLayoutEntry> entries;
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for (size_t i = 0; i < bindings.size(); ++i) {
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const utils::BindingInitializationHelper& b = bindings[i];
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wgpu::BindGroupLayoutEntry e = {};
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e.binding = b.binding;
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e.visibility = wgpu::ShaderStage::Compute | wgpu::ShaderStage::Fragment;
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e.storageTexture.access = wgpu::StorageTextureAccess::WriteOnly; // only enum supported
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e.storageTexture.format = kTextureFormat;
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e.storageTexture.viewDimension = wgpu::TextureViewDimension::e2DArray;
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entries.push_back(e);
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}
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wgpu::BindGroupLayoutDescriptor descriptor;
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descriptor.entryCount = static_cast<uint32_t>(entries.size());
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descriptor.entries = entries.data();
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return device.CreateBindGroupLayout(&descriptor);
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}
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std::vector<wgpu::BindGroup> CreateBindGroups(const std::vector<wgpu::BindGroupLayout>& layouts,
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const BindingDescriptorGroups& bindingsGroups) {
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std::vector<wgpu::BindGroup> bindGroups;
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ASSERT(layouts.size() == bindingsGroups.size());
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for (size_t groupIdx = 0; groupIdx < layouts.size(); groupIdx++) {
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const auto& bindings = bindingsGroups[groupIdx];
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std::vector<wgpu::BindGroupEntry> entries;
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entries.reserve(bindings.size());
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for (const auto& binding : bindings) {
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entries.push_back(binding.GetAsBinding());
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}
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wgpu::BindGroupDescriptor descriptor;
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descriptor.layout = layouts[groupIdx];
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descriptor.entryCount = static_cast<uint32_t>(entries.size());
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descriptor.entries = entries.data();
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bindGroups.push_back(device.CreateBindGroup(&descriptor));
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}
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return bindGroups;
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}
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// Runs a single dispatch with given pipeline and bind group
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void TestDispatch(const wgpu::ComputePipeline& computePipeline,
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const std::vector<wgpu::BindGroup>& bindGroups,
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const TestSet& test) {
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::ComputePassEncoder computePassEncoder = commandEncoder.BeginComputePass();
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computePassEncoder.SetPipeline(computePipeline);
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ASSERT(bindGroups.size() == test.bindingEntries.size());
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ASSERT(bindGroups.size() > 0);
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for (size_t i = 0; i < bindGroups.size(); ++i) {
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computePassEncoder.SetBindGroup(i, bindGroups[i]);
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}
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computePassEncoder.DispatchWorkgroups(1);
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computePassEncoder.End();
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if (!test.valid) {
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ASSERT_DEVICE_ERROR(commandEncoder.Finish());
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} else {
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commandEncoder.Finish();
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}
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}
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// Runs a single draw with given pipeline and bind group
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void TestDraw(const wgpu::RenderPipeline& renderPipeline,
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const std::vector<wgpu::BindGroup>& bindGroups,
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const TestSet& test) {
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PlaceholderRenderPass renderPass(device);
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::RenderPassEncoder renderPassEncoder = commandEncoder.BeginRenderPass(&renderPass);
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renderPassEncoder.SetPipeline(renderPipeline);
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ASSERT(bindGroups.size() == test.bindingEntries.size());
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ASSERT(bindGroups.size() > 0);
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for (size_t i = 0; i < bindGroups.size(); ++i) {
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renderPassEncoder.SetBindGroup(i, bindGroups[i]);
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}
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renderPassEncoder.Draw(3);
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renderPassEncoder.End();
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if (!test.valid) {
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ASSERT_DEVICE_ERROR(commandEncoder.Finish());
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} else {
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commandEncoder.Finish();
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}
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}
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void TestBindings(const wgpu::ComputePipeline& computePipeline,
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const wgpu::RenderPipeline& renderPipeline,
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const std::vector<wgpu::BindGroupLayout>& layouts,
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const TestSet& test) {
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std::vector<wgpu::BindGroup> bindGroups = CreateBindGroups(layouts, test.bindingEntries);
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TestDispatch(computePipeline, bindGroups, test);
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TestDraw(renderPipeline, bindGroups, test);
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}
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};
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// Test various combinations of texture mip levels, array layers, aspects, bind groups, etc.
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// validating aliasing
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TEST_F(WritableTextureBindingAliasingValidationTests, BasicTest) {
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wgpu::Texture textureStorage =
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CreateTexture(wgpu::TextureUsage::StorageBinding, kTextureFormat, 4, 4);
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wgpu::Texture textureStorage2 =
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CreateTexture(wgpu::TextureUsage::StorageBinding, kTextureFormat, 4, 4);
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// view0 and view1 don't intersect at all
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wgpu::TextureViewDescriptor viewDescriptor0 = GetTextureViewDescriptor(0, 1, 0, 1);
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wgpu::TextureView view0 = textureStorage.CreateView(&viewDescriptor0);
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wgpu::TextureViewDescriptor viewDescriptor1 = GetTextureViewDescriptor(1, 1, 1, 1);
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wgpu::TextureView view1 = textureStorage.CreateView(&viewDescriptor1);
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// view2 and view3 intersects in mip levels only
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wgpu::TextureViewDescriptor viewDescriptor2 = GetTextureViewDescriptor(0, 1, 0, 1);
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wgpu::TextureView view2 = textureStorage.CreateView(&viewDescriptor2);
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wgpu::TextureViewDescriptor viewDescriptor3 = GetTextureViewDescriptor(0, 1, 1, 1);
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wgpu::TextureView view3 = textureStorage.CreateView(&viewDescriptor3);
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// view4 and view5 intersects in array layers only
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wgpu::TextureViewDescriptor viewDescriptor4 = GetTextureViewDescriptor(0, 1, 0, 3);
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wgpu::TextureView view4 = textureStorage.CreateView(&viewDescriptor4);
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wgpu::TextureViewDescriptor viewDescriptor5 = GetTextureViewDescriptor(1, 1, 1, 3);
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wgpu::TextureView view5 = textureStorage.CreateView(&viewDescriptor5);
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// view6 and view7 intersects in both mip levels and array layers
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wgpu::TextureViewDescriptor viewDescriptor6 = GetTextureViewDescriptor(0, 1, 0, 3);
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wgpu::TextureView view6 = textureStorage.CreateView(&viewDescriptor6);
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wgpu::TextureViewDescriptor viewDescriptor7 = GetTextureViewDescriptor(0, 1, 1, 3);
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wgpu::TextureView view7 = textureStorage.CreateView(&viewDescriptor7);
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// view72 is created by another texture, so no aliasing at all.
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wgpu::TextureView view72 = textureStorage2.CreateView(&viewDescriptor7);
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std::vector<TestSet> testSet = {
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// same texture, subresources don't intersect
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{true,
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{{
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{0, view0},
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{1, view1},
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}}},
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// same texture, subresources don't intersect
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{true,
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{{
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{0, view2},
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{1, view3},
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}}},
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// same texture, subresources don't intersect, in different bind groups
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{true,
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{{
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{0, view0},
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},
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{
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{0, view1},
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}}},
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// same texture, subresources intersect in array layers
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{true,
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{{
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{0, view4},
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{1, view5},
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}}},
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// same texture, subresources intersect in both mip levels and array layers
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{false,
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{{
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{0, view6},
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{1, view7},
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}}},
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// reverse order to test range overlap logic
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{false,
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{{
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{0, view6},
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{1, view7},
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}}},
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// subreources intersect in different bind groups
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{false,
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{{
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{0, view6},
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},
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{
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{0, view7},
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}}},
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// different texture, no aliasing at all
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{true,
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{{
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{0, view6},
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{1, view72},
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}}},
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// Altough spec says texture aspect could also affect whether two texture view intersects,
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// It is not possible to create storage texture with depth stencil format, with different
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// aspect values (all, depth only, stencil only)
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// So we don't have tests for this case.
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};
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for (const auto& test : testSet) {
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std::vector<wgpu::BindGroupLayout> layouts;
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for (const std::vector<utils::BindingInitializationHelper>& bindings :
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test.bindingEntries) {
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layouts.push_back(CreateBindGroupLayout(bindings));
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}
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std::string computeShader = CreateComputeShaderWithBindings(test.bindingEntries);
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wgpu::ComputePipeline computePipeline = CreateComputePipeline(layouts, computeShader);
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std::string fragmentShader = CreateFragmentShaderWithBindings(test.bindingEntries);
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wgpu::RenderPipeline renderPipeline =
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CreateRenderPipeline(layouts, kVertexShader, fragmentShader);
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TestBindings(computePipeline, renderPipeline, layouts, test);
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}
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}
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// Test if validate bind group lazy aspect flag is set and checked properly
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TEST_F(WritableTextureBindingAliasingValidationTests, SetBindGroupLazyAspect) {
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wgpu::Texture textureStorage =
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CreateTexture(wgpu::TextureUsage::StorageBinding, kTextureFormat, 4, 4);
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// view0 and view1 don't intersect
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wgpu::TextureViewDescriptor viewDescriptor0 = GetTextureViewDescriptor(0, 1, 0, 1);
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wgpu::TextureView view0 = textureStorage.CreateView(&viewDescriptor0);
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wgpu::TextureViewDescriptor viewDescriptor1 = GetTextureViewDescriptor(1, 1, 1, 1);
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wgpu::TextureView view1 = textureStorage.CreateView(&viewDescriptor1);
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// view2 and view3 intersects
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wgpu::TextureViewDescriptor viewDescriptor2 = GetTextureViewDescriptor(0, 1, 0, 2);
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wgpu::TextureView view2 = textureStorage.CreateView(&viewDescriptor2);
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wgpu::TextureViewDescriptor viewDescriptor3 = GetTextureViewDescriptor(0, 1, 1, 2);
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wgpu::TextureView view3 = textureStorage.CreateView(&viewDescriptor3);
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// subresources don't intersect, create valid bindGroups
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std::vector<utils::BindingInitializationHelper> bindingDescriptor0 = {{
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{0, view0},
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{1, view1},
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}};
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// subresources intersect, create invalid bindGroups
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std::vector<utils::BindingInitializationHelper> bindingDescriptor1 = {{
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{0, view2},
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{1, view3},
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}};
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// bindingDescriptor0 and 1 share the same bind group layout, shader and pipeline
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wgpu::BindGroupLayout layout = CreateBindGroupLayout(bindingDescriptor0);
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std::string computeShader = CreateComputeShaderWithBindings({bindingDescriptor0});
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wgpu::ComputePipeline computePipeline = CreateComputePipeline({layout}, computeShader);
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std::string fragmentShader = CreateFragmentShaderWithBindings({bindingDescriptor0});
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wgpu::RenderPipeline renderPipeline =
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CreateRenderPipeline({layout}, kVertexShader, fragmentShader);
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std::vector<wgpu::BindGroup> bindGroups =
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CreateBindGroups({layout, layout}, {bindingDescriptor0, bindingDescriptor1});
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// Test compute pass dispatch
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// bindGroups[0] is valid
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{
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::ComputePassEncoder computePassEncoder = commandEncoder.BeginComputePass();
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computePassEncoder.SetPipeline(computePipeline);
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computePassEncoder.SetBindGroup(0, bindGroups[0]);
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computePassEncoder.DispatchWorkgroups(1);
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computePassEncoder.End();
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commandEncoder.Finish();
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}
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// bindGroups[1] is invalid
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{
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::ComputePassEncoder computePassEncoder = commandEncoder.BeginComputePass();
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computePassEncoder.SetPipeline(computePipeline);
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computePassEncoder.SetBindGroup(0, bindGroups[1]);
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computePassEncoder.DispatchWorkgroups(1);
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computePassEncoder.End();
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ASSERT_DEVICE_ERROR(commandEncoder.Finish());
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}
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// setting bindGroups[1] first and then resetting to bindGroups[0] is valid
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{
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::ComputePassEncoder computePassEncoder = commandEncoder.BeginComputePass();
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computePassEncoder.SetPipeline(computePipeline);
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computePassEncoder.SetBindGroup(0, bindGroups[1]);
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computePassEncoder.SetBindGroup(0, bindGroups[0]);
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computePassEncoder.DispatchWorkgroups(1);
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computePassEncoder.End();
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commandEncoder.Finish();
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}
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// bindGroups[0] is valid, bindGroups[1] is invalid but set to an unused slot, should still be
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// valid
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{
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::ComputePassEncoder computePassEncoder = commandEncoder.BeginComputePass();
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computePassEncoder.SetPipeline(computePipeline);
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computePassEncoder.SetBindGroup(0, bindGroups[0]);
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computePassEncoder.SetBindGroup(1, bindGroups[1]);
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computePassEncoder.DispatchWorkgroups(1);
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computePassEncoder.End();
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commandEncoder.Finish();
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}
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// Test render pass draw
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PlaceholderRenderPass renderPass(device);
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// bindGroups[0] is valid
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{
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wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
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wgpu::RenderPassEncoder renderPassEncoder = commandEncoder.BeginRenderPass(&renderPass);
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renderPassEncoder.SetPipeline(renderPipeline);
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renderPassEncoder.SetBindGroup(0, bindGroups[0]);
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renderPassEncoder.Draw(3);
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renderPassEncoder.End();
|
|
commandEncoder.Finish();
|
|
}
|
|
|
|
// bindGroups[1] is invalid
|
|
{
|
|
wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
|
|
wgpu::RenderPassEncoder renderPassEncoder = commandEncoder.BeginRenderPass(&renderPass);
|
|
renderPassEncoder.SetPipeline(renderPipeline);
|
|
|
|
renderPassEncoder.SetBindGroup(0, bindGroups[1]);
|
|
renderPassEncoder.Draw(3);
|
|
|
|
renderPassEncoder.End();
|
|
ASSERT_DEVICE_ERROR(commandEncoder.Finish());
|
|
}
|
|
|
|
// setting bindGroups[1] first and then resetting to bindGroups[0] is valid
|
|
{
|
|
wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
|
|
wgpu::RenderPassEncoder renderPassEncoder = commandEncoder.BeginRenderPass(&renderPass);
|
|
renderPassEncoder.SetPipeline(renderPipeline);
|
|
|
|
renderPassEncoder.SetBindGroup(0, bindGroups[1]);
|
|
renderPassEncoder.SetBindGroup(0, bindGroups[0]);
|
|
renderPassEncoder.Draw(3);
|
|
|
|
renderPassEncoder.End();
|
|
commandEncoder.Finish();
|
|
}
|
|
|
|
// bindGroups[0] is valid, bindGroups[1] is invalid but set to an unused slot, should still be
|
|
// valid
|
|
{
|
|
wgpu::CommandEncoder commandEncoder = device.CreateCommandEncoder();
|
|
wgpu::RenderPassEncoder renderPassEncoder = commandEncoder.BeginRenderPass(&renderPass);
|
|
renderPassEncoder.SetPipeline(renderPipeline);
|
|
|
|
renderPassEncoder.SetBindGroup(0, bindGroups[0]);
|
|
renderPassEncoder.SetBindGroup(1, bindGroups[1]);
|
|
renderPassEncoder.Draw(3);
|
|
|
|
renderPassEncoder.End();
|
|
commandEncoder.Finish();
|
|
}
|
|
}
|