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7d7976d590
This patch add DXC compile flag "-enable-16bit-types" and change profile to SM6.2 when validating generated HLSL using DXC if f16 extension is enabled in the WGSL program. The patch add Tint end-to-end test cases for expressions using f16 type, including constructor, binary operator, splat, zero-init, and others. Testcases that use f16 types in uniform or storage buffer are SKIPped, because such usage is not implemented yet. Bug: tint:1473, tint:1502 Change-Id: I481ab3d12cbb822f11ef85ba807bca3f9770089b Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/96252 Kokoro: Kokoro <noreply+kokoro@google.com> Reviewed-by: Ben Clayton <bclayton@chromium.org> Commit-Queue: Zhaoming Jiang <zhaoming.jiang@intel.com>
20 lines
405 B
GLSL
20 lines
405 B
GLSL
#version 310 es
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#extension GL_AMD_gpu_shader_half_float : require
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f16vec3 tint_float_modulo(f16vec3 lhs, f16vec3 rhs) {
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return (lhs - rhs * trunc(lhs / rhs));
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}
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void f() {
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f16vec3 a = f16vec3(1.0hf, 2.0hf, 3.0hf);
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f16vec3 b = f16vec3(4.0hf, 5.0hf, 6.0hf);
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f16vec3 r = tint_float_modulo(a, b);
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}
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layout(local_size_x = 1, local_size_y = 1, local_size_z = 1) in;
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void main() {
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f();
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return;
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}
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