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Make function size inference logic arch-specific
For MIPS, account for delay slot nops. For x86, check for trailing nops (0x90). For PPC, check for 4-byte 0x00 padding. Resolves #229
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@@ -15,7 +15,7 @@ use crate::{
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diff::{DiffObjConfig, MipsAbi, MipsInstrCategory, display::InstructionPart},
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obj::{
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InstructionArg, InstructionArgValue, InstructionRef, Relocation, RelocationFlags,
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ResolvedInstructionRef, ResolvedRelocation, SymbolFlag, SymbolFlagSet,
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ResolvedInstructionRef, ResolvedRelocation, Section, Symbol, SymbolFlag, SymbolFlagSet,
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},
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};
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@@ -140,6 +140,14 @@ impl ArchMips {
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})
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}
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fn default_instruction_flags(&self) -> rabbitizer::InstructionFlags {
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match self.isa_extension {
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Some(extension) => rabbitizer::InstructionFlags::new_extension(extension),
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None => rabbitizer::InstructionFlags::new(IsaVersion::MIPS_III),
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}
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.with_abi(self.abi)
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}
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fn instruction_flags(&self, diff_config: &DiffObjConfig) -> rabbitizer::InstructionFlags {
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let isa_extension = match diff_config.mips_instr_category {
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MipsInstrCategory::Auto => self.isa_extension,
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@@ -151,7 +159,7 @@ impl ArchMips {
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};
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match isa_extension {
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Some(extension) => rabbitizer::InstructionFlags::new_extension(extension),
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None => rabbitizer::InstructionFlags::new_isa(IsaVersion::MIPS_III, None),
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None => rabbitizer::InstructionFlags::new(IsaVersion::MIPS_III),
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}
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.with_abi(match diff_config.mips_abi {
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MipsAbi::Auto => self.abi,
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@@ -331,6 +339,36 @@ impl Arch for ArchMips {
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}
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flags
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}
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fn infer_function_size(
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&self,
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symbol: &Symbol,
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section: &Section,
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next_address: u64,
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) -> Result<u64> {
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// Trim any trailing 4-byte zeroes from the end (nops)
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let mut new_address = next_address;
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while new_address >= symbol.address + 4
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&& let Some(data) = section.data_range(new_address - 4, 4)
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&& data == [0u8; 4]
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{
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new_address -= 4;
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}
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// Check if the last instruction has a delay slot, if so, include the delay slot nop
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if new_address + 4 <= next_address
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&& new_address >= symbol.address + 4
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&& let Some(data) = section.data_range(new_address - 4, 4)
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&& let instruction = rabbitizer::Instruction::new(
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self.endianness.read_u32_bytes(data.try_into().unwrap()),
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Vram::new((new_address - 4) as u32),
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self.default_instruction_flags(),
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)
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&& instruction.opcode().has_delay_slot()
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{
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new_address += 4;
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}
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Ok(new_address.saturating_sub(symbol.address))
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}
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}
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fn push_args(
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