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Improve ARM function size inference

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This allows 2-byte padding to be trimmed in ARM functions.

Resolves #253
This commit is contained in:
Luke Street
2025-09-25 00:26:43 -06:00
parent 7a8efb4c88
commit 90e81fad7e
8 changed files with 98 additions and 19 deletions
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14
objdiff-core/src/arch/arm.rs
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@@ -460,12 +460,16 @@ impl Arch for ArchArm {
section: &Section,
mut next_address: u64,
) -> Result<u64> {
// Trim any trailing 4-byte zeroes from the end (padding)
while next_address >= symbol.address + 4
&& let Some(data) = section.data_range(next_address - 4, 4)
&& data == [0u8; 4]
// TODO: This should probably check the disasm mode and trim accordingly,
// but self.disasm_modes isn't populated until post_init, so it needs a refactor.
// Trim any trailing 2-byte zeroes from the end (padding)
while next_address >= symbol.address + 2
&& let Some(data) = section.data_range(next_address - 2, 2)
&& data == [0u8; 2]
&& section.relocation_at(next_address - 2, 2).is_none()
{
next_address -= 4;
next_address -= 2;
}
Ok(next_address.saturating_sub(symbol.address))
}