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Fix x86 mov relocations with uint32
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@ -137,7 +137,7 @@ impl Arch for ArchX86 {
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{
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instruction.set_memory_displacement64(PLACEHOLDER);
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// Formatter always writes the displacement as Int32
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reloc_replace = Some((OpKind::Memory, NumberKind::Int32, PLACEHOLDER));
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reloc_replace = Some((OpKind::Memory, 4, PLACEHOLDER));
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} else if reloc_offset == offsets.immediate_offset() as u64
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&& reloc_size == offsets.immediate_size()
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{
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@ -155,18 +155,12 @@ impl Arch for ArchX86 {
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_ => OpKind::default(),
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}
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};
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let number_kind = match reloc_size {
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2 => NumberKind::UInt16,
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4 => NumberKind::UInt32,
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8 => NumberKind::UInt64,
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_ => NumberKind::default(),
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};
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if is_branch {
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instruction.set_near_branch64(PLACEHOLDER);
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} else {
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instruction.set_immediate32(PLACEHOLDER as u32);
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}
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reloc_replace = Some((op_kind, number_kind, PLACEHOLDER));
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reloc_replace = Some((op_kind, reloc_size, PLACEHOLDER));
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}
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}
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@ -251,7 +245,7 @@ impl Arch for ArchX86 {
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struct InstructionFormatterOutput<'a> {
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cb: &'a mut dyn FnMut(InstructionPart<'_>) -> Result<()>,
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reloc_replace: Option<(OpKind, NumberKind, u64)>,
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reloc_replace: Option<(OpKind, usize, u64)>,
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error: Option<anyhow::Error>,
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skip_next: bool,
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}
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@ -326,11 +320,17 @@ impl FormatterOutput for InstructionFormatterOutput<'_> {
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return;
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}
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if let (Some(operand), Some((target_op_kind, target_number_kind, target_value))) =
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if let (Some(operand), Some((target_op_kind, reloc_size, target_value))) =
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(instruction_operand, self.reloc_replace)
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{
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if instruction.op_kind(operand) == target_op_kind
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&& number_kind == target_number_kind
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&& match (number_kind, reloc_size) {
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(NumberKind::Int8 | NumberKind::UInt8, 1)
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| (NumberKind::Int16 | NumberKind::UInt16, 2)
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| (NumberKind::Int32 | NumberKind::UInt32, 4)
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| (NumberKind::Int64 | NumberKind::UInt64, 8) => true,
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_ => false,
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}
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&& value == target_value
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{
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if let Err(e) = (self.cb)(InstructionPart::reloc()) {
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@ -571,4 +571,43 @@ mod test {
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.unwrap();
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assert_eq!(parts, &[InstructionPart::opcode("call", opcode), InstructionPart::reloc()]);
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}
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#[test]
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fn test_process_instruction_with_reloc_4() {
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let arch = ArchX86 { arch: Architecture::X86, endianness: object::Endianness::Little };
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let code = [0x8b, 0x15, 0xa4, 0x21, 0x7e, 0x00];
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let opcode = iced_x86::Mnemonic::Mov as u16;
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let mut parts = Vec::new();
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arch.display_instruction(
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ResolvedInstructionRef {
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ins_ref: InstructionRef { address: 0x1234, size: 6, opcode },
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code: &code,
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relocation: Some(ResolvedRelocation {
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relocation: &Relocation {
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flags: RelocationFlags::Coff(pe::IMAGE_REL_I386_DIR32),
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address: 0x1234 + 2,
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target_symbol: 0,
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addend: 0,
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},
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symbol: &Default::default(),
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}),
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..Default::default()
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},
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&DiffObjConfig::default(),
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&mut |part| {
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parts.push(part.into_static());
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Ok(())
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},
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)
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.unwrap();
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assert_eq!(parts, &[
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InstructionPart::opcode("mov", opcode),
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InstructionPart::opaque("edx"),
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InstructionPart::basic(","),
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InstructionPart::basic(" "),
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InstructionPart::basic("["),
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InstructionPart::reloc(),
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InstructionPart::basic("]"),
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]);
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}
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}
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@ -61,7 +61,7 @@ fn diff_ppc() {
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let base_diff = diff.right.as_ref().unwrap();
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let sections_display = display::display_sections(
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&target_obj,
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&target_diff,
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target_diff,
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display::SymbolFilter::None,
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false,
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false,
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@ -13,7 +13,7 @@ pub fn display_diff(
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for row in &diff.instruction_rows {
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output.push('[');
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let mut separator = false;
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objdiff_core::diff::display::display_row(&obj, symbol_idx, row, &diff_config, |segment| {
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objdiff_core::diff::display::display_row(obj, symbol_idx, row, diff_config, |segment| {
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if separator {
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output.push_str(", ");
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} else {
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@ -47,6 +47,6 @@ macro_rules! include_bytes_align_as {
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#[macro_export]
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macro_rules! include_object {
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($path:literal) => {
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include_bytes_align_as!(u32, $path)
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include_bytes_align_as!(u64, $path)
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};
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}
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