Commit Graph

26 Commits

Author SHA1 Message Date
Luke Street c5896689cf Use ppc750cl Opcode::from 2024-09-27 00:12:21 -06:00
Steven Casper a43320af1f
PPC: Guess reloc data type based on the instruction. (#108)
* Guess reloc data type based on the instruction.

Adds an entry to the reloc tooltip to show the inferred data type
and value.

* Fix clippy warning

* Match on Opcode rather than mnemonic string
2024-09-25 23:45:37 -06:00
Amber Brault 35bbd40f5d
Actually update extab stuff (#110)
* Update cwextab

* Update

* Update ppc.rs

* Make fmt shut up
2024-09-24 09:16:14 -06:00
Luke Street dcf209aac5 Cleanup & move extab code into ppc arch 2024-09-09 19:43:10 -06:00
Aetias 3bd8aaee41
Bump unarm to 1.5.0 (#98) 2024-08-25 20:57:45 -06:00
Luke Street 0fccae1049 Add experimental wasm bindings
Published to npm as objdiff-wasm
2024-08-20 21:40:32 -06:00
Luke Street 8250d26b77 Support R_MIPS_LITERAL, R_MIPS15_S3 relocations
Resolves #92
Resolves #95
2024-08-18 22:05:16 -06:00
Luke Street 615ec4c50a mips: Support R_MIPS_PC16 relocations 2024-08-11 16:00:10 -06:00
Steven Casper 09cc9952df
Support R_MIPS_GPREL16 relocations correctly (#88)
* Support R_MIPS_GPREL16 relocations correctly

symbols defined in the same file require adding a
special ri_gp_value from the .reginfo section to
their relocation calculations.

* Run nightly rustfmt

* Prevent potential panic when slicing .reginfo
2024-08-08 20:20:41 -06:00
Aetias d9fb48853e
Options for ARM disassembly style (#78) 2024-07-14 16:00:57 -06:00
Luke Street 95615c2ec5 Improve MIPS ABI auto-detection 2024-06-20 19:57:18 -06:00
Aetias 97981160f4
ARMv4T (GBA) and ARMv6K (3DS) support (#75)
* Initial ARM support

* Disassemble const pool reloc

* Disasm ARM/Thumb/data based on mapping symbols

* Fallback to mapping symbol `$a`

* Support multiple DWARF sequences

* Update line info

* Rework DWARF line info parsing

- Properly handles multiple sections
  in DWARF 1
- line_info moved into ObjSection
- DWARF 2 parser no longer errors with
  no .text section
- Both parsers properly skip empty
  sections

* Simplify line_info (no Option)

* Get line info from section; output formatted ins string

* Unwrap code section in `arm.rs`

* Handle reloc `R_ARM_SBREL32`

* Update ARM disassembler

* Update README.md

* Format

* Revert "Update README.md"

This reverts commit 8bbfcc6f45.

* Update README.md

* Detect ARM version; support ARMv4T and v6K

* Combobox to force ARM version

* Clear LSB in ARM symbol addresses

* Support big-endian ARM ELF files

* Bump `unarm`, `arm-attr`

* Handle ARM implicit addends

* Update README.md

* Explicitly handle all ARM argument types

* Format

* Display more ARM relocs

* Mask LSB on ARM code symbols only

* Read ARM implicit addends

* Format

---------

Co-authored-by: Luke Street <luke.street@encounterpc.com>
2024-06-20 18:36:25 -06:00
Luke Street fc54e93681 API updates for ARM backend 2024-06-03 19:37:48 -06:00
Aetias b991960080
ARMv5TE (DS) support (#68)
* Initial ARM support

* Disassemble const pool reloc

* Disasm ARM/Thumb/data based on mapping symbols

* Fallback to mapping symbol `$a`

* Support multiple DWARF sequences

* Update line info

* Rework DWARF line info parsing

- Properly handles multiple sections
  in DWARF 1
- line_info moved into ObjSection
- DWARF 2 parser no longer errors with
  no .text section
- Both parsers properly skip empty
  sections

* Simplify line_info (no Option)

* Get line info from section; output formatted ins string

* Unwrap code section in `arm.rs`

* Handle reloc `R_ARM_SBREL32`

* Update ARM disassembler

* Update README.md

* Format

* Revert "Update README.md"

This reverts commit 8bbfcc6f45.

* Update README.md

---------

Co-authored-by: Luke Street <luke.street@encounterpc.com>
2024-06-03 19:08:49 -06:00
Luke Street 3f82c1a50f objdiff-core API adjustments
- Allows using process_code without
  constructing an ObjInfo
- Allows creating an arch without
  having to provide an object

Used in decomp-toolkit
2024-06-03 18:52:32 -06:00
Luke Street 9e57a66a05 Auto-detect MIPS ABI/category & add config
Under Diff Options -> Arch Settings, one
can override the ABI/instruction category
2024-05-21 18:06:14 -06:00
Luke Street 7148b51fe0 x86: Handle IMAGE_REL_I386_REL32 LabelAddress
Resolves #57
2024-05-21 10:16:45 -06:00
Aetias f5b5a612fc
Display correct line numbers for multiple .text sections (#63)
* Support multiple DWARF sequences

* Rework DWARF line info parsing

- Properly handles multiple sections
  in DWARF 1
- line_info moved into ObjSection
- DWARF 2 parser no longer errors with
  no .text section
- Both parsers properly skip empty
  sections

* Simplify line_info (no Option)

---------

Co-authored-by: Luke Street <luke.street@encounterpc.com>
2024-05-21 09:55:39 -06:00
Luke Street 22a24f37f5 Diff data symbols & improve symbol match logic 2024-05-20 23:53:37 -06:00
Luke Street 5bfaaaaf65 Instruction hover / context menu improvements 2024-05-20 17:38:20 -06:00
Luke Street 3e5008524e cargo fmt & cargo deny fix 2024-04-30 20:45:45 -06:00
Luke Street 2c46286aff Update all dependencies & use ppc750cl InsIter 2024-04-30 20:06:04 -06:00
Luke Street 30d14870ef Update ppc750cl, add Itanium demangler & cleanup 2024-03-21 21:36:50 -06:00
Luke Street 3c74b89f15 Restructure diffing code & initial 3-way diffing (WIP) 2024-03-18 18:10:18 -06:00
Luke Street 1343f4fd2b cargo fmt 2024-03-17 12:20:25 -06:00
Luke Street 9df98f263e Move all architecture-specific code into modules
No more scattered relocation handling and
feature checks. Everything will go through
the ObjArch trait, which makes it easier
to add new architectures going forward.
2024-03-17 12:16:47 -06:00