2021-08-08 00:59:07 +00:00
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# ppc750cl
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Rust tools for working with the PowerPC 750CL family of processors.
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2022-04-06 23:48:21 +00:00
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### Rust crates
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```shell
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rustup components add rustfmt
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cargo run --package ppc750cl-genisa
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cargo build --release
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```
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2021-08-16 22:53:29 +00:00
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2022-04-06 23:48:21 +00:00
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### Python module
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2021-08-16 22:53:29 +00:00
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```shell
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python -m venv env
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source ./env/bin/activate
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pip install maturin
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maturin build -m ./disasm-py/Cargo.toml
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```
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2022-04-06 23:48:21 +00:00
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2022-04-07 03:57:45 +00:00
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Install module in dev env
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```
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maturin develop -m ./disasm-py/Cargo.toml
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python
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>>> import ppc750cl
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2022-04-09 14:30:48 +00:00
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>>> ins = ppc750cl.Ins(addr=0x80006969, code=0x10400420)
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>>> str(ins)
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2022-04-07 03:57:45 +00:00
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'ps_merge00 f2, f0, f0'
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2022-04-09 15:19:50 +00:00
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>>> ins.fields()
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[('frD', 2), ('frA', 0), ('frB', 0)]
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2022-04-09 14:30:48 +00:00
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>>> ins.frD
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2
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2022-04-07 03:57:45 +00:00
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```
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2022-04-06 23:48:21 +00:00
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### Instruction Set
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For those unfamiliar with PowerPC, here are some basics.
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- PowerPC 7xx is a family of RISC CPUs produced from 1997 to 2012.
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- They operate with 32-bit words and every instruction is 32-bits wide.
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- This project focuses (only) on compatibility with the PowerPC 750CL.
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- This chip is famously packaged as codename "Broadway" for the Nintendo Wii.
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- Its predecessor PowerPC 750CXe is used in the Nintendo GameCube.
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- It adds a "paired-singles" SIMD unit and a bunch of other instructions.
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### isa.yaml
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The file [isa.yaml](./isa.yaml) contains a full definition of the PowerPC 750CL instruction set.
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It powers the disassembler, assembler, and Rust/Python bindings code analysis tools.
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Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file implementing an instruction decoder.
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2022-04-07 04:20:53 +00:00
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### Safety & Correctness
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- This project does not use `unsafe` Rust code outside of testing utils.
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- The disassembler has been fuzzed over all ~4.29 billion possible instructions (via `ppc750cl-fuzz`).
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- It is safe to run the disassembler over untrusted byte arrays.
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- However no guarantees on correctness are made (yet). Expect bugs.
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### Performance
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- Performance isn't great but acceptable.
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- Disassembling & printing: 600k insn/s (2.4 MB/s)
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- Disassembling only: 6M insn/s (24 MB/s)
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