Codegen updates & instruction aliases

2025-10-04 17:29:41 +00:00 · 2025-06-29 22:01:50 -06:00 · 2025-06-29 22:01:50 -06:00 · 2204612dfb
commit 2204612dfb
parent c540ce97ca
12 changed files with 2402 additions and 2271 deletions
--- a/asm/src/generated.rs
+++ b/asm/src/generated.rs
--- a/disasm/src/disasm.rs
+++ b/disasm/src/disasm.rs
@ -294,7 +294,7 @@ impl From<u8> for OpaqueU {
    }
 }
 // Vector register.
-field_arg!(VR, u8, "vr{}");
+field_arg!(VR, u8, "v{}");

 #[derive(Debug, Default, Copy, Clone, Eq, Hash, PartialEq)]
 pub enum Argument {
@ -373,7 +373,7 @@ impl Display for ParsedIns {
            } else if !writing_offset {
                write!(f, ", ")?;
            }
-            write!(f, "{}", argument)?;
+            write!(f, "{argument}")?;
            if let Argument::Offset(_) = argument {
                write!(f, "(")?;
                writing_offset = true;
--- a/disasm/src/generated.rs
+++ b/disasm/src/generated.rs
--- a/disasm/tests/test_altivec.rs
+++ b/disasm/tests/test_altivec.rs
--- a/disasm/tests/test_vmx.rs
+++ b/disasm/tests/test_vmx.rs
@ -1,4 +1,4 @@
-use ppc750cl::{Argument, Ins, InsIter, Opcode, GPR};
+use ppc750cl::Ins;

 macro_rules! assert_asm {
    ($ins:ident, $disasm:literal) => {{
@ -10,392 +10,392 @@ macro_rules! assert_asm {
    }};
 }

-macro_rules! assert_basic {
-    ($ins:ident, $disasm:literal) => {{
-        assert_eq!(format!("{}", $ins.basic_form()), $disasm)
-    }};
-    ($code:literal, $disasm:literal) => {{
-        let ins = Ins::new($code);
-        assert_eq!(format!("{}", ins.basic()), $disasm)
-    }};
+#[test]
+fn test_vmx_lvewx128() {
+    assert_asm!(0x1243388F, "lvewx128 v114, r3, r7");
 }

 #[test]
-fn test_vmx_lvewx128(){
-    assert_asm!(0x1243388F, "lvewx128 vr114, r3, r7");
+fn test_vmx_lvlx128() {
+    assert_asm!(0x1085440F, "lvlx128 v100, r5, r8");
 }

 #[test]
-fn test_vmx_lvlx128(){
-    assert_asm!(0x1085440F, "lvlx128 vr100, r5, r8");
+fn test_vmx_lvrx128() {
+    assert_asm!(0x108EE44B, "lvrx128 v68, r14, r28");
 }

 #[test]
-fn test_vmx_lvrx128(){
-    assert_asm!(0x108EE44B, "lvrx128 vr68, r14, r28");
+fn test_vmx_lvlxl128() {
+    assert_asm!(0x1105FE0B, "lvlxl128 v72, r5, r31");
 }

 #[test]
-fn test_vmx_lvlxl128(){
-    assert_asm!(0x1105FE0B, "lvlxl128 vr72, r5, r31");
+fn test_vmx_lvrxl128() {
+    assert_asm!(0x12A01E4B, "lvrxl128 v85, r0, r3");
 }

 #[test]
-fn test_vmx_lvrxl128(){
-    assert_asm!(0x12A01E4B, "lvrxl128 vr85, r0, r3");
+fn test_vmx_lvsl128() {
+    assert_asm!(0x138AF00B, "lvsl128 v92, r10, r30");
 }

 #[test]
-fn test_vmx_lvsl128(){
-    assert_asm!(0x138AF00B, "lvsl128 vr92, r10, r30");
+fn test_vmx_lvsr128() {
+    assert_asm!(0x1016C04F, "lvsr128 v96, r22, r24");
 }

 #[test]
-fn test_vmx_lvsr128(){
-    assert_asm!(0x1016C04F, "lvsr128 vr96, r22, r24");
+fn test_vmx_lvx128() {
+    assert_asm!(0x120938CF, "lvx128 v112, r9, r7");
 }

 #[test]
-fn test_vmx_lvx128(){
-    assert_asm!(0x120938CF, "lvx128 vr112, r9, r7");
+fn test_vmx_lvxl128() {
+    assert_asm!(0x12C322CF, "lvxl128 v118, r3, r4");
 }

 #[test]
-fn test_vmx_lvxl128(){
-    assert_asm!(0x12C322CF, "lvxl128 vr118, r3, r4");
+fn test_vmx_stvewx128() {
+    assert_asm!(0x131BF98F, "stvewx128 v120, r27, r31");
 }

 #[test]
-fn test_vmx_stvewx128(){
-    assert_asm!(0x131BF98F, "stvewx128 vr120, r27, r31");
+fn test_vmx_stvlx128() {
+    assert_asm!(0x12602D0B, "stvlx128 v83, r0, r5");
 }

 #[test]
-fn test_vmx_stvlx128(){
-    assert_asm!(0x12602D0B, "stvlx128 vr83, r0, r5");
+fn test_vmx_stvlxl128() {
+    assert_asm!(0x12C3A70B, "stvlxl128 v86, r3, r20");
 }

 #[test]
-fn test_vmx_stvlxl128(){
-    assert_asm!(0x12C3A70B, "stvlxl128 vr86, r3, r20");
+fn test_vmx_stvrx128() {
+    assert_asm!(0x10B8F54B, "stvrx128 v69, r24, r30");
 }

 #[test]
-fn test_vmx_stvrx128(){
-    assert_asm!(0x10B8F54B, "stvrx128 vr69, r24, r30");
+fn test_vmx_stvrxl128() {
+    assert_asm!(0x10C7074B, "stvrxl128 v70, r7, r0");
 }

 #[test]
-fn test_vmx_stvrxl128(){
-    assert_asm!(0x10C7074B, "stvrxl128 vr70, r7, r0");
+fn test_vmx_stvx128() {
+    assert_asm!(0x130341C3, "stvx128 v24, r3, r8");
 }

 #[test]
-fn test_vmx_stvx128(){
-    assert_asm!(0x130341C3, "stvx128 vr24, r3, r8");
+fn test_vmx_stvxl128() {
+    assert_asm!(0x13E553C3, "stvxl128 v31, r5, r10");
 }

 #[test]
-fn test_vmx_stvxl128(){
-    assert_asm!(0x13E553C3, "stvxl128 vr31, r5, r10");
+fn test_vmx_vaddfp128() {
+    assert_asm!(0x151E301B, "vaddfp128 v72, v30, v102");
 }

 #[test]
-fn test_vmx_vaddfp128(){
-    assert_asm!(0x151E301B, "vaddfp128 vr72, vr30, vr102");
+fn test_vmx_vand128() {
+    assert_asm!(0x16900E12, "vand128 v20, v80, v65");
 }

 #[test]
-fn test_vmx_vand128(){
-    assert_asm!(0x16900E12, "vand128 vr20, vr80, vr65");
+fn test_vmx_vandc128() {
+    assert_asm!(0x15EBFE52, "vandc128 v15, v75, v95");
 }

 #[test]
-fn test_vmx_vandc128(){
-    assert_asm!(0x15EBFE52, "vandc128 vr15, vr75, vr95");
+fn test_vmx_vctsxs128() {
+    assert_asm!(0x1A42D23B, "vctsxs128 v82, v122, 0x2");
 }

 #[test]
-fn test_vmx_vcfpsxws128(){
-    assert_asm!(0x1A42D23B, "vcfpsxws128 vr82, vr122, 0x2");
+fn test_vmx_vctuxs128() {
+    assert_asm!(0x1BEACA78, "vctuxs128 v95, v25, 0xa");
 }

 #[test]
-fn test_vmx_vcfpuxws128(){
-    assert_asm!(0x1BEACA78, "vcfpuxws128 vr95, vr25, 0xa");
+fn test_vmx_vcmpbfp128() {
+    assert_asm!(0x1BA5598E, "vcmpbfp128 v125, v5, v75");
+    assert_asm!(0x198D79C2, "vcmpbfp128. v12, v13, v79");
 }

 #[test]
-fn test_vmx_vcmpbfp128(){
-    assert_asm!(0x1BA5598E, "vcmpbfp128 vr125, vr5, vr75");
-    assert_asm!(0x198D79C2, "vcmpbfp128. vr12, vr13, vr79");
+fn test_vmx_vcmpeqfp128() {
+    assert_asm!(0x1800D80B, "vcmpeqfp128 v64, v0, v123");
+    assert_asm!(0x1ACD1C43, "vcmpeqfp128. v22, v77, v99");
 }

 #[test]
-fn test_vmx_vcmpeqfp128(){
-    assert_asm!(0x1800D80B, "vcmpeqfp128 vr64, vr0, vr123");
-    assert_asm!(0x1ACD1C43, "vcmpeqfp128. vr22, vr77, vr99");
+fn test_vmx_vcmpequw128() {
+    assert_asm!(0x18D0D60A, "vcmpequw128 v70, v80, v90");
+    assert_asm!(0x18800A40, "vcmpequw128. v4, v0, v1");
 }

 #[test]
-fn test_vmx_vcmpequw128(){
-    assert_asm!(0x18D0D60A, "vcmpequw128 vr70, vr80, vr90");
-    assert_asm!(0x18800A40, "vcmpequw128. vr4, vr0, vr1");
+fn test_vmx_vcmpgefp128() {
+    assert_asm!(0x1A8A1483, "vcmpgefp128 v20, v74, v98");
+    assert_asm!(0x18EB7CEF, "vcmpgefp128. v103, v107, v111");
 }

 #[test]
-fn test_vmx_vcmpgefp128(){
-    assert_asm!(0x1A8A1483, "vcmpgefp128 vr20, vr74, vr98");
-    assert_asm!(0x18EB7CEF, "vcmpgefp128. vr103, vr107, vr111");
+fn test_vmx_vcmpgtfp128() {
+    assert_asm!(0x1BD48102, "vcmpgtfp128 v30, v20, v80");
+    assert_asm!(0x1B586D68, "vcmpgtfp128. v90, v120, v13");
 }

 #[test]
-fn test_vmx_vcmpgtfp128(){
-    assert_asm!(0x1BD48102, "vcmpgtfp128 vr30, vr20, vr80");
-    assert_asm!(0x1B586D68, "vcmpgtfp128. vr90, vr120, vr13");
+fn test_vmx_vcfsx128() {
+    assert_asm!(0x18749ABC, "vcfsx128 v99, v19, -0xc");
 }

 #[test]
-fn test_vmx_vcsxwfp128(){
-    assert_asm!(0x18749ABC, "vcsxwfp128 vr99, vr19, -0xc");
+fn test_vmx_vcfux128() {
+    assert_asm!(0x1A6D1AF8, "vcfux128 v83, v3, 0xd");
 }

 #[test]
-fn test_vmx_vcuxwfp128(){
-    assert_asm!(0x1A6D1AF8, "vcuxwfp128 vr83, vr3, 0xd");
+fn test_vmx_vexptefp128() {
+    assert_asm!(0x198056B0, "vexptefp128 v12, v10");
 }

 #[test]
-fn test_vmx_vexptefp128(){
-    assert_asm!(0x198056B0, "vexptefp128 vr12, vr10");
+fn test_vmx_vlogefp128() {
+    assert_asm!(0x1900FEFB, "vlogefp128 v72, v127");
 }

 #[test]
-fn test_vmx_vlogefp128(){
-    assert_asm!(0x1900FEFB, "vlogefp128 vr72, vr127");
+fn test_vmx_vmaddcfp128() {
+    assert_asm!(0x163B1912, "vmaddcfp128 v17, v27, v67");
 }

 #[test]
-fn test_vmx_vmaddcfp128(){
-    assert_asm!(0x163B1912, "vmaddcfp128 vr17, vr27, vr67");
+fn test_vmx_vmaddfp128() {
+    assert_asm!(0x16B3ECFB, "vmaddfp128 v85, v115, v125");
 }

 #[test]
-fn test_vmx_vmaddfp128(){
-    assert_asm!(0x16B3ECFB, "vmaddfp128 vr85, vr115, vr125");
+fn test_vmx_vmaxfp128() {
+    assert_asm!(0x1B274683, "vmaxfp128 v25, v71, v104");
 }

 #[test]
-fn test_vmx_vmaxfp128(){
-    assert_asm!(0x1B274683, "vmaxfp128 vr25, vr71, vr104");
+fn test_vmx_vminfp128() {
+    assert_asm!(0x1BE012C0, "vminfp128 v31, v0, v2");
 }

 #[test]
-fn test_vmx_vminfp128(){
-    assert_asm!(0x1BE012C0, "vminfp128 vr31, vr0, vr2");
+fn test_vmx_vmrghw128() {
+    assert_asm!(0x18CA730B, "vmrghw128 v70, v10, v110");
 }

 #[test]
-fn test_vmx_vmrghw128(){
-    assert_asm!(0x18CA730B, "vmrghw128 vr70, vr10, vr110");
+fn test_vmx_vmrglw128() {
+    assert_asm!(0x1BD2D743, "vmrglw128 v30, v82, v122");
 }

 #[test]
-fn test_vmx_vmrglw128(){
-    assert_asm!(0x1BD2D743, "vmrglw128 vr30, vr82, vr122");
+fn test_vmx_vmsum3fp128() {
+    assert_asm!(0x14FBF993, "vmsum3fp128 v7, v27, v127");
 }

 #[test]
-fn test_vmx_vmsum3fp128(){
-    assert_asm!(0x14FBF993, "vmsum3fp128 vr7, vr27, vr127");
+fn test_vmx_vmsum4fp128() {
+    assert_asm!(0x14A869D0, "vmsum4fp128 v5, v8, v13");
 }

 #[test]
-fn test_vmx_vmsum4fp128(){
-    assert_asm!(0x14A869D0, "vmsum4fp128 vr5, vr8, vr13");
+fn test_vmx_vmulfp128() {
+    assert_asm!(0x1498DCBF, "vmulfp128 v100, v120, v123");
 }

 #[test]
-fn test_vmx_vmulfp128(){
-    assert_asm!(0x1498DCBF, "vmulfp128 vr100, vr120, vr123");
+fn test_vmx_vnmsubfp128() {
+    assert_asm!(0x17DBCD53, "vnmsubfp128 v30, v91, v121");
 }

 #[test]
-fn test_vmx_vnmsubfp128(){
-    assert_asm!(0x17DBCD53, "vnmsubfp128 vr30, vr91, vr121");
+fn test_vmx_vnor128() {
+    assert_asm!(0x176A6290, "vnor128 v27, v10, v12");
 }

 #[test]
-fn test_vmx_vnor128(){
-    assert_asm!(0x176A6290, "vnor128 vr27, vr10, vr12");
+fn test_vmx_vor128() {
+    assert_asm!(0x17EC3ADC, "vor128 v127, v12, v7");
 }

 #[test]
-fn test_vmx_vor128(){
-    assert_asm!(0x17EC3ADC, "vor128 vr127, vr12, vr7");
+fn test_vmx_vperm128() {
+    assert_asm!(0x1661158F, "vperm128 v115, v65, v98, v6");
 }

 #[test]
-fn test_vmx_vperm128(){
-    assert_asm!(0x1661158F, "vperm128 vr115, vr65, vr98, vr6");
+fn test_vmx_vpermwi128() {
+    assert_asm!(0x19C342DE, "vpermwi128 v110, v72, 99");
 }

 #[test]
-fn test_vmx_vpermwi128(){
-    assert_asm!(0x19C342DE, "vpermwi128 vr110, vr72, 99");
+fn test_vmx_vpkd3d128() {
+    assert_asm!(0x1935DEDC, "vpkd3d128 v105, v27, 5, 1, 3");
 }

 #[test]
-fn test_vmx_vpkd3d128(){
-    assert_asm!(0x1935DEDC, "vpkd3d128 vr105, vr27, 5, 1, 3");
+fn test_vmx_vpkshss128() {
+    assert_asm!(0x16C0F62B, "vpkshss128 v86, v96, v126");
 }

 #[test]
-fn test_vmx_vpkshss128(){
-    assert_asm!(0x16C0F62B, "vpkshss128 vr86, vr96, vr126");
+fn test_vmx_vpkshus128() {
+    assert_asm!(0x153D6E48, "vpkshus128 v73, v93, v13");
 }

 #[test]
-fn test_vmx_vpkshus128(){
-    assert_asm!(0x153D6E48, "vpkshus128 vr73, vr93, vr13");
+fn test_vmx_vpkswss128() {
+    assert_asm!(0x16FE7280, "vpkswss128 v23, v30, v14");
 }

 #[test]
-fn test_vmx_vpkswss128(){
-    assert_asm!(0x16FE7280, "vpkswss128 vr23, vr30, vr14");
+fn test_vmx_vpkswus128() {
+    assert_asm!(0x161836C3, "vpkswus128 v16, v88, v102");
 }

 #[test]
-fn test_vmx_vpkswus128(){
-    assert_asm!(0x161836C3, "vpkswus128 vr16, vr88, vr102");
+fn test_vmx_vpkuhum128() {
+    assert_asm!(0x14E3BF02, "vpkuhum128 v7, v67, v87");
 }

 #[test]
-fn test_vmx_vpkuhum128(){
-    assert_asm!(0x14E3BF02, "vpkuhum128 vr7, vr67, vr87");
+fn test_vmx_vpkuhus128() {
+    assert_asm!(0x1600A348, "vpkuhus128 v80, v0, v20");
 }

 #[test]
-fn test_vmx_vpkuhus128(){
-    assert_asm!(0x1600A348, "vpkuhus128 vr80, vr0, vr20");
+fn test_vmx_vpkuwum128() {
+    assert_asm!(0x16EACB83, "vpkuwum128 v23, v10, v121");
 }

 #[test]
-fn test_vmx_vpkuwum128(){
-    assert_asm!(0x16EACB83, "vpkuwum128 vr23, vr10, vr121");
+fn test_vmx_vpkuwus128() {
+    assert_asm!(0x17E72FC3, "vpkuwus128 v31, v71, v101");
 }

 #[test]
-fn test_vmx_vpkuwus128(){
-    assert_asm!(0x17E72FC3, "vpkuwus128 vr31, vr71, vr101");
+fn test_vmx_vrefp128() {
+    assert_asm!(0x1800F638, "vrefp128 v64, v30");
 }

 #[test]
-fn test_vmx_vrefp128(){
-    assert_asm!(0x1800F638, "vrefp128 vr64, vr30");
+fn test_vmx_vrfim128() {
+    assert_asm!(0x18802B30, "vrfim128 v4, v5");
 }

 #[test]
-fn test_vmx_vrfim128(){
-    assert_asm!(0x18802B30, "vrfim128 vr4, vr5");
+fn test_vmx_vrfin128() {
+    assert_asm!(0x1A200B73, "vrfin128 v17, v97");
 }

 #[test]
-fn test_vmx_vrfin128(){
-    assert_asm!(0x1A200B73, "vrfin128 vr17, vr97");
+fn test_vmx_vrfip128() {
+    assert_asm!(0x1B605BB2, "vrfip128 v27, v75");
 }

 #[test]
-fn test_vmx_vrfip128(){
-    assert_asm!(0x1B605BB2, "vrfip128 vr27, vr75");
+fn test_vmx_vrfiz128() {
+    assert_asm!(0x1A8053F0, "vrfiz128 v20, v10");
 }

 #[test]
-fn test_vmx_vrfiz128(){
-    assert_asm!(0x1A8053F0, "vrfiz128 vr20, vr10");
+fn test_vmx_vrlimi128() {
+    assert_asm!(0x18796798, "vrlimi128 v67, v12, 0x19, 2")
 }

 #[test]
-fn test_vmx_vrlimi128(){
-    assert_asm!(0x18796798, "vrlimi128 vr67, vr12, 0x19, 2")
+fn test_vmx_vrlw128() {
+    assert_asm!(0x1B002050, "vrlw128 v24, v0, v4");
 }

 #[test]
-fn test_vmx_vrlw128(){
-    assert_asm!(0x1B002050, "vrlw128 vr24, vr0, vr4");
+fn test_vmx_vrsqrtefp128() {
+    assert_asm!(0x19800673, "vrsqrtefp128 v12, v96");
 }

 #[test]
-fn test_vmx_vrsqrtefp128(){
-    assert_asm!(0x19800673, "vrsqrtefp128 vr12, vr96");
+fn test_vmx_vsel128() {
+    assert_asm!(0x146CDF5A, "vsel128 v67, v76, v91");
 }

 #[test]
-fn test_vmx_vsel128(){
-    assert_asm!(0x146CDF5A, "vsel128 vr67, vr76, vr91");
+fn test_vmx_vsldoi128() {
+    assert_asm!(0x130BFF30, "vsldoi128 v24, v107, v31, 12");
 }

 #[test]
-fn test_vmx_vsldoi128(){
-    assert_asm!(0x130BFF30, "vsldoi128 vr24, vr107, vr31, 12");
+fn test_vmx_vslo128() {
+    assert_asm!(0x14E08B90, "vslo128 v7, v0, v17");
 }

 #[test]
-fn test_vmx_vslo128(){
-    assert_asm!(0x14E08B90, "vslo128 vr7, vr0, vr17");
+fn test_vmx_vslw128() {
+    assert_asm!(0x1A1AC0D2, "vslw128 v16, v26, v88");
 }

 #[test]
-fn test_vmx_vslw128(){
-    assert_asm!(0x1A1AC0D2, "vslw128 vr16, vr26, vr88");
+fn test_vmx_vspltisw128() {
+    assert_asm!(0x1B68A772, "vspltisw128 v27, v84, 0x8");
 }

 #[test]
-fn test_vmx_vspltisw128(){
-    assert_asm!(0x1B68A772, "vspltisw128 vr27, vr84, 0x8");
+fn test_vmx_vspltw128() {
+    assert_asm!(0x1996EF32, "vspltw128 v12, v93, 0x16");
 }

 #[test]
-fn test_vmx_vspltw128(){
-    assert_asm!(0x1996EF32, "vspltw128 vr12, vr93, 0x16");
+fn test_vmx_vsraw128() {
+    assert_asm!(0x19B71950, "vsraw128 v13, v23, v3");
 }

 #[test]
-fn test_vmx_vsraw128(){
-    assert_asm!(0x19B71950, "vsraw128 vr13, vr23, vr3");
+fn test_vmx_vsro128() {
+    assert_asm!(0x17C3E3D3, "vsro128 v30, v3, v124");
 }

 #[test]
-fn test_vmx_vsro128(){
-    assert_asm!(0x17C3E3D3, "vsro128 vr30, vr3, vr124");
+fn test_vmx_vsrw128() {
+    assert_asm!(0x1B9271D3, "vsrw128 v28, v18, v110");
 }

 #[test]
-fn test_vmx_vsrw128(){
-    assert_asm!(0x1B9271D3, "vsrw128 vr28, vr18, vr110");
+fn test_vmx_vsubfp128() {
+    assert_asm!(0x17692C50, "vsubfp128 v27, v73, v5");
 }

 #[test]
-fn test_vmx_vsubfp128(){
-    assert_asm!(0x17692C50, "vsubfp128 vr27, vr73, vr5");
+fn test_vmx_vupkd3d128() {
+    assert_asm!(0x19FECFF0, "vupkd3d128 v15, v25, 0x1e");
 }

 #[test]
-fn test_vmx_vupkd3d128(){
-    assert_asm!(0x19FECFF0, "vupkd3d128 vr15, vr25, 0x1e");
+fn test_vmx_vupkhsb128() {
+    assert_asm!(0x1B60FB83, "vupkhsb128 v27, v127");
 }

 #[test]
-fn test_vmx_vupkhsb128(){
-    assert_asm!(0x1B60FB83, "vupkhsb128 vr27, vr127");
+fn test_vmx_vupkhsh128() {
+    assert_asm!(0x186017a0, "vupkhsh128 v3, v2");
 }

 #[test]
-fn test_vmx_vupklsb128(){
-    assert_asm!(0x1A00A3C3, "vupklsb128 vr16, vr116");
+fn test_vmx_vupklsb128() {
+    assert_asm!(0x1A00A3C3, "vupklsb128 v16, v116");
 }

 #[test]
-fn test_vmx_vxor128(){
-    assert_asm!(0x17E3EF32, "vxor128 vr31, vr99, vr93");
-}
+fn test_vmx_vupklsh128() {
+    assert_asm!(0x186017e0, "vupklsh128 v3, v2");
+}
+
+#[test]
+fn test_vmx_vxor128() {
+    assert_asm!(0x17E3EF32, "vxor128 v31, v99, v93");
+}
--- a/fuzz/src/main.rs
+++ b/fuzz/src/main.rs
@ -65,7 +65,7 @@ impl MultiFuzzer {
                last = now;
                let progress = 100f32 * ((now as f32) / (0x1_0000_0000u64 as f32));
                let avg = now as f32 / elapsed.as_secs_f32() / this.threads.len() as f32;
-                println!("{}/s\t{:05.2}%\tn=0x{:08x} (avg {}/s)", per_second, progress, now, avg);
+                println!("{per_second}/s\t{progress:05.2}%\tn=0x{now:08x} (avg {avg}/s)");
            }
        });
    }
@ -104,7 +104,7 @@ impl Fuzzer {
            let mut parsed = ppc750cl::ParsedIns::default();
            for x in range.clone() {
                ppc750cl::Ins::new(x).parse_simplified(&mut parsed);
-                writeln!(&mut devnull, "{}", parsed).unwrap();
+                writeln!(&mut devnull, "{parsed}").unwrap();
                if x % (1 << 19) == 0 {
                    counter.store(x, Ordering::Relaxed);
                }
--- a/genisa/src/asm.rs
+++ b/genisa/src/asm.rs
@ -94,7 +94,7 @@ pub fn gen_asm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
            pattern |= modifier.mask();
        }
        let name = format!("{}{}", mnemonic.name(), suffix);
-        func_map.entry(name, &format!("(gen_{}, {:#x})", to_ident(&mnemonic.name()), pattern));
+        func_map.entry(name, &format!("(gen_{}, {:#x})", to_ident(mnemonic.name()), pattern));
    }

    let func_map = syn::parse_str::<TokenStream>(&func_map.build().to_string())?;
@ -219,7 +219,7 @@ fn gen_mnemonic(mnemonic: &Mnemonic, isa: &Isa, check_arg_count: bool) -> Result
    };
    let mut args = TokenStream::new();
    for (i, arg) in mnemonic.args.iter().enumerate() {
-        let comment = format!(" {}", arg);
+        let comment = format!(" {arg}");
        let operations = gen_argument(&mnemonic.args, i, isa, mnemonic.replace_assemble.get(arg))?;
        args.extend(quote! {
            #[comment = #comment]
--- a/genisa/src/condition.rs
+++ b/genisa/src/condition.rs
@ -74,7 +74,7 @@ pub fn parse_conditions<'a>(condition: &'a str, isa: &'a Isa) -> Result<Vec<Cond
        };
        let field = isa
            .find_field(field)
-            .with_context(|| format!("Condition  references unknown field {}", field))?;
+            .with_context(|| format!("Condition references unknown field {field}"))?;
        let value = if let Ok(value) = parse_unsigned(value) {
            ConditionValue::ConstantUnsigned(value)
        } else if let Ok(value) = parse_signed(value) {
--- a/genisa/src/disasm.rs
+++ b/genisa/src/disasm.rs
@ -40,7 +40,6 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
        entries.push(entry);
    }
    ensure!(sorted_ops.len() == isa.opcodes.len());
-    // ensure!(sorted_ops.len() <= 255);
    let opcode_max = Literal::u16_unsuffixed((sorted_ops.len() - 1) as u16);

    // Generate the opcode entries table
@ -383,12 +382,18 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
        static BASIC_MNEMONICS: [MnemonicFunction; #opcode_count] = [#basic_functions_ref];
        #[inline]
        pub fn parse_basic(out: &mut ParsedIns, ins: Ins) {
-            BASIC_MNEMONICS.get(ins.op as usize).copied().unwrap_or(mnemonic_illegal)(out, ins)
+            match BASIC_MNEMONICS.get(ins.op as usize) {
+                Some(f) => f(out, ins),
+                None => mnemonic_illegal(out, ins),
+            }
        }
        static SIMPLIFIED_MNEMONICS: [MnemonicFunction; #opcode_count] = [#simplified_functions_ref];
        #[inline]
        pub fn parse_simplified(out: &mut ParsedIns, ins: Ins) {
-            SIMPLIFIED_MNEMONICS.get(ins.op as usize).copied().unwrap_or(mnemonic_illegal)(out, ins)
+            match SIMPLIFIED_MNEMONICS.get(ins.op as usize) {
+                Some(f) => f(out, ins),
+                None => mnemonic_illegal(out, ins),
+            }
        }

        type DefsUsesFunction = fn(&mut Arguments, Ins);
@ -396,12 +401,18 @@ pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
        static DEFS_FUNCTIONS: [DefsUsesFunction; #opcode_count] = [#defs_refs];
        #[inline]
        pub fn parse_defs(out: &mut Arguments, ins: Ins) {
-            DEFS_FUNCTIONS.get(ins.op as usize).copied().unwrap_or(defs_uses_empty)(out, ins)
+            match DEFS_FUNCTIONS.get(ins.op as usize) {
+                Some(f) => f(out, ins),
+                None => defs_uses_empty(out, ins),
+            }
        }
        static USES_FUNCTIONS: [DefsUsesFunction; #opcode_count] = [#uses_refs];
        #[inline]
        pub fn parse_uses(out: &mut Arguments, ins: Ins) {
-            USES_FUNCTIONS.get(ins.op as usize).copied().unwrap_or(defs_uses_empty)(out, ins)
+            match USES_FUNCTIONS.get(ins.op as usize) {
+                Some(f) => f(out, ins),
+                None => defs_uses_empty(out, ins),
+            }
        }
    })
 }
@ -474,7 +485,7 @@ fn gen_mnemonic(
        }
        let names_len = Literal::usize_unsuffixed(names.len());
        Ok(quote! { {
-            const MODIFIERS: [&str; #names_len] = [#(#names),*];
+            static MODIFIERS: [&str; #names_len] = [#(#names),*];
            ParsedIns { mnemonic: MODIFIERS[#bitset], args: #arguments }
        } })
    }
--- a/genisa/src/isa.rs
+++ b/genisa/src/isa.rs
@ -397,7 +397,7 @@ pub fn to_variant(key: &str) -> String {
        s.push(match c {
            'a'..='z' => c.to_ascii_uppercase(),
            'A'..='Z' => c,
-            _ => panic!("invalid identifier: {}", key),
+            _ => panic!("invalid identifier: {key}"),
        });
        loop {
            let c = match chars.next() {
@ -411,7 +411,7 @@ pub fn to_variant(key: &str) -> String {
                    s.push('_');
                    break;
                }
-                _ => panic!("invalid character in variant: {}", key),
+                _ => panic!("invalid character in variant: {key}"),
            }
        }
    }
@ -459,7 +459,7 @@ where
    T: std::fmt::LowerHex,
 {
    fn to_tokens(&self, tokens: &mut TokenStream) {
-        let s = format!("{:#x}", self);
+        let s = format!("{self:#x}");
        tokens.extend(TokenStream::from_str(&s).unwrap());
    }
 }
@ -486,7 +486,7 @@ where
    T: PrimInt + std::fmt::LowerHex,
 {
    fn to_tokens(&self, tokens: &mut TokenStream) {
-        let s = format!("{:#x}", self);
+        let s = format!("{self:#x}");
        tokens.extend(TokenStream::from_str(&s).unwrap());
    }
 }
--- a/genisa/src/main.rs
+++ b/genisa/src/main.rs
@ -22,9 +22,7 @@ fn main() -> Result<()> {
    simple_logger::SimpleLogger::new().env().init()?;

    let isa = load_isa(Path::new("isa.yaml"))?;
-    // Make sure we can fit the opcodes into a u8
-    // ensure!(isa.opcodes.len() <= 255);
-    log::info!("num opcodes: {}", isa.opcodes.len());
+    log::info!("Opcode count: {}", isa.opcodes.len());

    // Sanity check the opcodes and mnemonics
    // Calculate the bitmask for each opcode and compare it to the stored bitmask
--- a/isa.yaml
+++ b/isa.yaml
@ -2353,7 +2353,7 @@ opcodes:
    pattern: 0x7c00054e
    args: [ vS, rA, rB ]
    uses: [ rA.nz, rB ]
-    
+
  - name: stvrxl
    desc: Store Vector Right Indexed Last
    bitmask: 0xfc0007ff
@ -2528,6 +2528,7 @@ opcodes:
    uses: [ vA, vB ]

  - name: vcfsx
+    aliases: [ vcsxwfp ]
    desc: Vector Convert from Signed Fixed-Point Word
    bitmask: 0xfc0007ff
    pattern: 0x1000034a
@ -2536,6 +2537,7 @@ opcodes:
    uses: [ vB, vuimm ]

  - name: vcfux
+    aliases: [ vcuxwfp ]
    desc: Vector Convert from Unsigned Fixed-Point Word
    bitmask: 0xfc0007ff
    pattern: 0x1000030a
@ -2661,6 +2663,7 @@ opcodes:
    uses: [ vA, vB ]

  - name: vctsxs
+    aliases: [ vcfpsxws ]
    desc: Vector Convert to Signed Fixed-Point Word Saturate
    bitmask: 0xfc0007ff
    pattern: 0x100003ca
@ -2669,6 +2672,7 @@ opcodes:
    uses: [ vB, vuimm ]

  - name: vctuxs
+    aliases: [ vcfpuxws ]
    desc: Vector Convert to Unsigned Fixed-Point Word Saturate
    bitmask: 0xfc0007ff
    pattern: 0x1000038a
@ -3524,9 +3528,9 @@ opcodes:
    defs: [ vD ]
    uses: [ vA, vB ]

-# VMX128 exclusives
-# found here: https://github.com/xenia-project/xenia/blob/master/docs/ppc/vmx128.txt
-# and here: https://github.com/kakaroto/ps3ida/blob/master/plugins/PPCAltivec/src/main.cpp
+  # VMX128 exclusives
+  # found here: https://github.com/xenia-project/xenia/blob/master/docs/ppc/vmx128.txt
+  # and here: https://github.com/kakaroto/ps3ida/blob/master/plugins/PPCAltivec/src/main.cpp
  - name: lvewx128
    desc: Load Vector128 Element Word Indexed
    bitmask: 0xfc0007f3
@ -3672,16 +3676,18 @@ opcodes:
    defs: [ VDS128 ]
    uses: [ VA128, VB128 ]

-  - name: vcfpsxws128
-    desc: Vector128 Convert From Floating-Point to Signed Fixed-Point Word Saturate
+  - name: vctsxs128
+    aliases: [ vcfpsxws128 ]
+    desc: Vector128 Convert to Signed Fixed-Point Word Saturate
    bitmask: 0xfc0007f0
    pattern: 0x18000230
    args: [ VDS128, VB128, vsimm ]
    defs: [ VDS128 ]
    uses: [ VB128 ]

-  - name: vcfpuxws128
-    desc: Vector128 Convert From Floating-Point to Unsigned Fixed-Point Word Saturate
+  - name: vctuxs128
+    aliases: [ vcfpuxws128 ]
+    desc: Vector128 Convert to Unsigned Fixed-Point Word Saturate
    bitmask: 0xfc0007f0
    pattern: 0x18000270
    args: [ VDS128, VB128, vuimm ]
@ -3733,16 +3739,18 @@ opcodes:
    defs: [ VDS128 ]
    uses: [ VA128, VB128 ]

-  - name: vcsxwfp128
-    desc: Vector128 Convert From Signed Fixed-Point Word to Floating-Point
+  - name: vcfsx128
+    aliases: [ vcsxwfp128 ]
+    desc: Vector128 Convert From Signed Fixed-Point Word
    bitmask: 0xfc0007f0
    pattern: 0x180002b0
    args: [ VDS128, VB128, vsimm ]
    defs: [ VDS128 ]
    uses: [ VB128 ]

-  - name: vcuxwfp128
-    desc: Vector128 Convert From Unsigned Fixed-Point Word to Floating-Point
+  - name: vcfux128
+    aliases: [ vcuxwfp128 ]
+    desc: Vector128 Convert From Unsigned Fixed-Point Word
    bitmask: 0xfc0007f0
    pattern: 0x180002f0
    args: [ VDS128, VB128, vuimm ]
@ -4109,6 +4117,14 @@ opcodes:
    defs: [ VDS128 ]
    uses: [ VB128 ]

+  - name: vupkhsh128
+    desc: Vector128 Unpack High Signed Half Word
+    bitmask: 0xfc1f07f0
+    pattern: 0x180007a0
+    args: [ VDS128, VB128 ]
+    defs: [ VDS128 ]
+    uses: [ VB128 ]
+
  - name: vupklsb128
    desc: Vector128 Unpack Low Signed Byte
    bitmask: 0xfc1f07f0
@ -4117,6 +4133,14 @@ opcodes:
    defs: [ VDS128 ]
    uses: [ VB128 ]

+  - name: vupklsh128
+    desc: Vector128 Unpack Low Signed Half Word
+    bitmask: 0xfc1f07f0
+    pattern: 0x180007e0
+    args: [ VDS128, VB128 ]
+    defs: [ VDS128 ]
+    uses: [ VB128 ]
+
  - name: vxor128
    desc: Vector128 Logical XOR
    bitmask: 0xfc0003d0
@ -4799,7 +4823,7 @@ mnemonics:
    condition: ds_A == 0
  - name: dssall
    opcode: dss
-    condition: ds_A == 1
+    condition: ds_A == 1 && STRM == 0
  - name: vnot
    opcode: vnor
    args: [ vD, vA ]
@ -4808,16 +4832,3 @@ mnemonics:
    opcode: vor
    args: [ vD, vA ]
    condition: vB == vA
-
-# missing instructions (there seem to be no documentation on these anywhere)
-# vctsxs128
-# vcfpsxws
-# vctuxs128
-# vcfpuxws
-# vcsxwfp
-# vcfux128
-# vcuxwfp
-# vdot3fp
-# vdot4fp
-# vupkhsh128
-# vupklsh128