isa.yaml: use condition expressions instead of matchers
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@ -606,10 +606,6 @@ pub(crate) struct ModifiersExpr {
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}
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impl ModifiersExpr {
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fn new() -> Self {
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Self::default()
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}
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fn build(&self) -> Result<TokenStream> {
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if self.modifiers.is_empty() && self.side_effects.is_empty() {
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return Ok(Self::build_empty());
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190
isa.yaml
190
isa.yaml
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@ -1956,28 +1956,18 @@ mnemonics:
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- name: lis
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opcode: addis
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args: [ rD, uimm ]
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match:
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- arg: rA
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value: 0
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condition: rA == 0
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- name: li
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opcode: addi
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args: [ rD, simm ]
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match:
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- arg: rA
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value: 0
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condition: rA == 0
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- name: mr
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opcode: or
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args: [ rA, rS ]
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condition: rS == rB
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- name: nop
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opcode: ori
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match:
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- arg: rA
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value: 0
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- arg: rS
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value: 0
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- arg: uimm
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value: 0
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condition: rA == 0 && rS == 0 && uimm == 0
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# Rotates/Shifts
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- name: clrlwi
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@ -2033,180 +2023,122 @@ mnemonics:
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- name: twgti
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opcode: twi
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args: [ rA, simm ]
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match:
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- arg: TO
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value: 8
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condition: TO == 8
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- name: twllei
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opcode: twi
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args: [ rA, simm ]
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match:
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- arg: TO
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value: 6
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condition: TO == 6
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- name: twui
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args: [ rA, simm ]
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match:
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- arg: TO
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value: 31
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condition: TO == 31
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# Branches
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- name: blr
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opcode: bclr
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match:
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- arg: BO
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value: 20
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- arg: BI
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value: 0
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condition: BO == 20 && BI == 0
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# Move to special-purpose register
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- name: mtxer
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 1
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condition: spr == 1
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- name: mtlr
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 8
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condition: spr == 8
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- name: mtctr
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 9
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condition: spr == 9
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- name: mtdsisr
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 18
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condition: spr == 18
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- name: mtdbatu
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 397
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condition: spr == 397
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- name: mttdu
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opcode: mtspr
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args: [ rS ]
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match:
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- arg: spr
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value: 571
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condition: spr == 571
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# Move from special-purpose register
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- name: mfxer
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 1
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condition: spr == 1
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- name: mflr
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 8
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condition: spr == 8
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- name: mfctr
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 9
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condition: spr == 9
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- name: mfdsisr
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 18
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condition: spr == 18
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- name: mfdbatu
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 397
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condition: spr == 397
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- name: mftdu
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opcode: mfspr
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args: [ rD ]
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match:
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- arg: spr
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value: 571
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condition: spr == 571
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# Branch Conditional
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- name: blt
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: ble
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: beq
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bge
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bgt
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bne
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bso
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bns
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bdnz
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ BD ]
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match:
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- arg: BO
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value: 16
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- arg: BI
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value: 0
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condition: BO == 16 && BI == 0
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- name: bdz
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opcode: bc
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modifiers: [ AA, LK ]
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args: [ BD ]
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match:
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- arg: BO
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value: 18
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- arg: BI
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value: 0
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condition: BO == 18 && BI == 0
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# TODO support conditional bd...
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# Branch Conditional to Count Register
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@ -2214,113 +2146,81 @@ mnemonics:
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: blectr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: beqctr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bgectr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bgtctr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bnectr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bsoctr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bnsctr
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opcode: bcctr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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# Branch Conditional to Link Register
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- name: bltlr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: blelr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: beqlr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bgelr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bgtlr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bnelr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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- name: bsolr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 12
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condition: BO == 12
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- name: bnslr
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opcode: bclr
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modifiers: [ LK ]
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args: [ crfS, BD ]
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match:
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- arg: BO
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value: 4
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condition: BO == 4
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