Update README.md & version 0.3.2

This commit is contained in:
Luke Street 2024-09-26 23:21:28 -06:00
parent 0de65eb1b6
commit da09fa13a8
4 changed files with 22 additions and 23 deletions

8
Cargo.lock generated
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@ -253,18 +253,18 @@ checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391"
[[package]]
name = "ppc750cl"
version = "0.3.1"
version = "0.3.2"
[[package]]
name = "ppc750cl-asm"
version = "0.3.1"
version = "0.3.2"
dependencies = [
"phf",
]
[[package]]
name = "ppc750cl-fuzz"
version = "0.3.1"
version = "0.3.2"
dependencies = [
"clap",
"num_cpus",
@ -273,7 +273,7 @@ dependencies = [
[[package]]
name = "ppc750cl-genisa"
version = "0.3.1"
version = "0.3.2"
dependencies = [
"anyhow",
"log",

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@ -7,10 +7,10 @@ panic = "abort"
[profile.release-lto]
inherits = "release"
lto = "thin"
lto = true
[workspace.package]
version = "0.3.1"
version = "0.3.2"
edition = "2021"
authors = ["Luke Street <luke@street.dev>"]
license = "MIT OR Apache-2.0"

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@ -8,7 +8,7 @@
[rustdoc]: https://docs.rs/ppc750cl
[Rust Version]: https://img.shields.io/badge/rust-1.74+-blue.svg?maxAge=3600
Rust tools for working with the PowerPC 750CL family of processors.
Rust tools for working with the PowerPC 750CL / 750CXe family of processors.
### Building
@ -22,14 +22,14 @@ cargo build --release
For those unfamiliar with PowerPC, here are some basics.
- PowerPC 7xx is a family of RISC CPUs produced from 1997 to 2012.
- They operate with 32-bit words and every instruction is 32-bits wide.
- This project focuses (only) on compatibility with the PowerPC 750CL.
- This chip is famously packaged as codename "Broadway" for the Nintendo Wii.
- Its predecessor PowerPC 750CXe is used in the Nintendo GameCube.
- It adds a "paired-singles" SIMD unit and a bunch of other instructions.
- This project focuses (only) on compatibility with the PowerPC 750CL and 750CXe.
- PowerPC 750CL ("Broadway") is used in the Nintendo Wii.
- PowerPC 750CXe ("Gekko") is used in the Nintendo GameCube.
- They add a "paired-singles" SIMD unit and a bunch of other instructions.
### isa.yaml
The file [isa.yaml](./isa.yaml) contains a full definition of the PowerPC 750CL instruction set.
The file [isa.yaml](./isa.yaml) contains a full definition of the PowerPC 750CL / 750CXe instruction set.
It powers the disassembler and assembler.
@ -37,7 +37,6 @@ Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file
### Safety & Correctness
- This project does not use `unsafe` Rust code outside of testing utils.
- The disassembler has been fuzzed over all ~4.29 billion possible instructions (via `ppc750cl-fuzz`).
- It is safe to run the disassembler over untrusted byte arrays.
- However, no guarantees on correctness are made (yet). Expect bugs.
@ -46,5 +45,5 @@ Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file
With a single thread on Ryzen 9 3900X:
- Disassembling & printing: ~5M insn/s (~20 MB/s)
- Disassembling only: ~50M insn/s (~200 MB/s)
- Disassembling & printing: ~12M insn/s (~50 MB/s)
- Disassembling only: ~275M insn/s (~1 GB/s)

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@ -11,7 +11,7 @@ fn main() {
.arg(
clap::Arg::new("threads")
.short('t')
.long("--threads")
.long("threads")
.help("Number of threads to use (default num CPUs)"),
)
.get_matches();
@ -22,8 +22,8 @@ fn main() {
};
let start = Instant::now();
let fuzzer = MultiFuzzer::new(threads);
fuzzer.run();
println!("Finished in {:.2}s", start.elapsed().as_secs_f32());
let avg = fuzzer.run();
println!("Finished in {:.2}s (avg {}/s)", start.elapsed().as_secs_f32(), avg);
}
#[derive(Clone)]
@ -70,14 +70,17 @@ impl MultiFuzzer {
});
}
fn run(&self) {
fn run(&self) -> f32 {
self.dispatch_progress_monitor();
let start = Instant::now();
let handles: Vec<_> = self.threads.iter().map(|t| t.dispatch()).collect();
for handle in handles {
// TODO This doesn't panic immediately, since we'll block on thread zero
// for most of the time.
handle.join().expect("thread panicked");
}
let end = start.elapsed();
u32::MAX as f32 / end.as_secs_f32() / self.threads.len() as f32
}
}
@ -113,11 +116,8 @@ impl Fuzzer {
struct DevNull;
impl std::io::Write for DevNull {
impl Write for DevNull {
fn write(&mut self, buf: &[u8]) -> std::io::Result<usize> {
buf.iter().for_each(|b| unsafe {
std::ptr::read_volatile(b);
});
Ok(buf.len())
}
fn flush(&mut self) -> std::io::Result<()> {