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ppc750cl
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Various bitmask and modifier fixes

This commit is contained in:
Luke Street 2024-03-08 22:50:42 -07:00
parent 4a2bbbc6f8
commit f6e15052b1
4 changed files with 269 additions and 91 deletions
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4
disasm-py/src/lib.rs
View File

@ -105,10 +105,6 @@ impl Ins {
self.0.field_rB() as i64
}
#[getter]
fn rC(&self) -> i64 {
self.0.field_rC() as i64
}
#[getter]
fn sr(&self) -> i64 {
self.0.field_sr() as i64
}

260
disasm/src/generated.rs
View File

@ -455,13 +455,13 @@ impl Opcode {
}
}
pub(crate) fn _detect(code: u32) -> Self {
if code & 0xfc0007fe == 0x7c000214 {
if code & 0xfc0003fe == 0x7c000214 {
return Opcode::Add;
}
if code & 0xfc0007fe == 0x7c000014 {
if code & 0xfc0003fe == 0x7c000014 {
return Opcode::Addc;
}
if code & 0xfc0007fe == 0x7c000114 {
if code & 0xfc0003fe == 0x7c000114 {
return Opcode::Adde;
}
if code & 0xfc000000 == 0x38000000 {
@ -500,10 +500,10 @@ impl Opcode {
if code & 0xfc000000 == 0x40000000 {
return Opcode::Bc;
}
if code & 0xfc007ffe == 0x4c000420 {
if code & 0xfc00fffe == 0x4c000420 {
return Opcode::Bcctr;
}
if code & 0xfc007ffe == 0x4c000020 {
if code & 0xfc00fffe == 0x4c000020 {
return Opcode::Bclr;
}
if code & 0xfc4007ff == 0x7c000000 {
@ -581,7 +581,7 @@ impl Opcode {
if code & 0xffffffff == 0x7c0006ac {
return Opcode::Eieio;
}
if code & 0xfc0003fe == 0x7c000238 {
if code & 0xfc0007fe == 0x7c000238 {
return Opcode::Eqv;
}
if code & 0xfc00fffe == 0x7c000774 {
@ -674,7 +674,7 @@ impl Opcode {
if code & 0xfc0007fe == 0xec000028 {
return Opcode::Fsubs;
}
if code & 0xffe007ff == 0x7c0007ac {
if code & 0xffe007fe == 0x7c0007ac {
return Opcode::Icbi;
}
if code & 0xffffffff == 0x4c00012c {
@ -842,7 +842,7 @@ impl Opcode {
if code & 0xfc0007fe == 0x7c0003b8 {
return Opcode::Nand;
}
if code & 0xfc00fffe == 0x7c0000d0 {
if code & 0xfc00fbfe == 0x7c0000d0 {
return Opcode::Neg;
}
if code & 0xfc0007fe == 0x7c0000f8 {
@ -971,7 +971,7 @@ impl Opcode {
if code & 0xfc00003e == 0x10000016 {
return Opcode::PsSum1;
}
if code & 0xfffff801 == 0x4c000000 {
if code & 0xffffffff == 0x4c000064 {
return Opcode::Rfi;
}
if code & 0xfc000000 == 0x50000000 {
@ -1133,7 +1133,6 @@ pub enum Field {
ps_offset(Offset),
BO(OpaqueU),
BI(CRBit),
BH(OpaqueU),
BD(BranchDest),
LI(BranchDest),
SH(OpaqueU),
@ -1143,7 +1142,6 @@ pub enum Field {
rD(GPR),
rA(GPR),
rB(GPR),
rC(GPR),
sr(SR),
spr(SPR),
frS(FPR),
@ -1182,7 +1180,6 @@ impl Field {
Field::ps_offset(x) => Some(Argument::Offset(*x)),
Field::BO(x) => Some(Argument::OpaqueU(*x)),
Field::BI(x) => Some(Argument::CRBit(*x)),
Field::BH(x) => Some(Argument::OpaqueU(*x)),
Field::BD(x) => Some(Argument::BranchDest(*x)),
Field::LI(x) => Some(Argument::BranchDest(*x)),
Field::SH(x) => Some(Argument::OpaqueU(*x)),
@ -1192,7 +1189,6 @@ impl Field {
Field::rD(x) => Some(Argument::GPR(*x)),
Field::rA(x) => Some(Argument::GPR(*x)),
Field::rB(x) => Some(Argument::GPR(*x)),
Field::rC(x) => Some(Argument::GPR(*x)),
Field::sr(x) => Some(Argument::SR(*x)),
Field::spr(x) => Some(Argument::SPR(*x)),
Field::frS(x) => Some(Argument::FPR(*x)),
@ -1229,7 +1225,6 @@ impl Field {
Field::ps_offset(_) => "ps_offset",
Field::BO(_) => "BO",
Field::BI(_) => "BI",
Field::BH(_) => "BH",
Field::BD(_) => "BD",
Field::LI(_) => "LI",
Field::SH(_) => "SH",
@ -1239,7 +1234,6 @@ impl Field {
Field::rD(_) => "rD",
Field::rA(_) => "rA",
Field::rB(_) => "rB",
Field::rC(_) => "rC",
Field::sr(_) => "sr",
Field::spr(_) => "spr",
Field::frS(_) => "frS",
@ -1360,12 +1354,10 @@ impl Ins {
Opcode::Bcctr => vec![
Field::BO(OpaqueU(((self.code >> 21u8) & 0x1f) as _)),
Field::BI(CRBit(((self.code >> 16u8) & 0x1f) as _)),
Field::BH(OpaqueU(((self.code >> 11u8) & 0x3) as _)),
],
Opcode::Bclr => vec![
Field::BO(OpaqueU(((self.code >> 21u8) & 0x1f) as _)),
Field::BI(CRBit(((self.code >> 16u8) & 0x1f) as _)),
Field::BH(OpaqueU(((self.code >> 11u8) & 0x3) as _)),
],
Opcode::Cmp => vec![
Field::crfD(CRField(((self.code >> 23u8) & 0x7) as _)),
@ -4557,7 +4549,13 @@ impl Ins {
Opcode::Mcrfs => String::new(),
Opcode::Mcrxr => String::new(),
Opcode::Mfcr => String::new(),
Opcode::Mffs => String::new(),
Opcode::Mffs => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::Mfmsr => String::new(),
Opcode::Mfspr => String::new(),
Opcode::Mfsr => String::new(),
@ -4669,35 +4667,185 @@ impl Ins {
Opcode::PsqStu => String::new(),
Opcode::PsqStux => String::new(),
Opcode::PsqStx => String::new(),
Opcode::PsAbs => String::new(),
Opcode::PsAdd => String::new(),
Opcode::PsAbs => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsAdd => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsCmpo0 => String::new(),
Opcode::PsCmpo1 => String::new(),
Opcode::PsCmpu0 => String::new(),
Opcode::PsCmpu1 => String::new(),
Opcode::PsDiv => String::new(),
Opcode::PsMadd => String::new(),
Opcode::PsMadds0 => String::new(),
Opcode::PsMadds1 => String::new(),
Opcode::PsMerge00 => String::new(),
Opcode::PsMerge01 => String::new(),
Opcode::PsMerge10 => String::new(),
Opcode::PsMerge11 => String::new(),
Opcode::PsMr => String::new(),
Opcode::PsMsub => String::new(),
Opcode::PsMul => String::new(),
Opcode::PsMuls0 => String::new(),
Opcode::PsMuls1 => String::new(),
Opcode::PsNabs => String::new(),
Opcode::PsNeg => String::new(),
Opcode::PsNmadd => String::new(),
Opcode::PsNmsub => String::new(),
Opcode::PsRes => String::new(),
Opcode::PsRsqrte => String::new(),
Opcode::PsSel => String::new(),
Opcode::PsSub => String::new(),
Opcode::PsSum0 => String::new(),
Opcode::PsSum1 => String::new(),
Opcode::PsDiv => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMadd => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMadds0 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMadds1 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMerge00 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMerge01 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMerge10 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMerge11 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMr => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMsub => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMul => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMuls0 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsMuls1 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsNabs => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsNeg => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsNmadd => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsNmsub => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsRes => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsRsqrte => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsSel => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsSub => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsSum0 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::PsSum1 => {
let mut s = String::with_capacity(4);
if self.bit(31usize) {
s.push('.');
}
s
}
Opcode::Rfi => String::new(),
Opcode::Rlwimi => {
let mut s = String::with_capacity(4);
@ -6925,8 +7073,8 @@ impl Ins {
}
}
Opcode::Creqv => {
if ((self.code >> 21u8) & 0x1f) == ((self.code >> 16u8) & 0x1f)
&& ((self.code >> 21u8) & 0x1f) == ((self.code >> 11u8) & 0x1f)
if ((self.code >> 16u8) & 0x1f) == ((self.code >> 21u8) & 0x1f)
&& ((self.code >> 11u8) & 0x1f) == ((self.code >> 21u8) & 0x1f)
{
return SimplifiedIns {
mnemonic: "crset",
@ -6937,7 +7085,7 @@ impl Ins {
}
}
Opcode::Crnor => {
if ((self.code >> 16u8) & 0x1f) == ((self.code >> 11u8) & 0x1f) {
if ((self.code >> 11u8) & 0x1f) == ((self.code >> 16u8) & 0x1f) {
return SimplifiedIns {
mnemonic: "crnot",
suffix: String::new(),
@ -6950,7 +7098,7 @@ impl Ins {
}
}
Opcode::Cror => {
if ((self.code >> 16u8) & 0x1f) == ((self.code >> 11u8) & 0x1f) {
if ((self.code >> 11u8) & 0x1f) == ((self.code >> 16u8) & 0x1f) {
return SimplifiedIns {
mnemonic: "crmove",
suffix: String::new(),
@ -6963,8 +7111,8 @@ impl Ins {
}
}
Opcode::Crxor => {
if ((self.code >> 21u8) & 0x1f) == ((self.code >> 16u8) & 0x1f)
&& ((self.code >> 21u8) & 0x1f) == ((self.code >> 11u8) & 0x1f)
if ((self.code >> 16u8) & 0x1f) == ((self.code >> 21u8) & 0x1f)
&& ((self.code >> 11u8) & 0x1f) == ((self.code >> 21u8) & 0x1f)
{
return SimplifiedIns {
mnemonic: "crclr",
@ -7403,7 +7551,7 @@ impl Ins {
}
}
Opcode::Or => {
if ((self.code >> 21u8) & 0x1f) == ((self.code >> 11u8) & 0x1f) {
if ((self.code >> 11u8) & 0x1f) == ((self.code >> 21u8) & 0x1f) {
return SimplifiedIns {
mnemonic: "mr",
suffix: {
@ -7527,7 +7675,7 @@ impl Ins {
};
}
if ((self.code >> 6u8) & 0x1f) == 0
&& 31 - ((self.code >> 11u8) & 0x1f) == ((self.code >> 1u8) & 0x1f)
&& ((self.code >> 1u8) & 0x1f) == 31 - ((self.code >> 11u8) & 0x1f)
{
return SimplifiedIns {
mnemonic: "slwi",
@ -7549,7 +7697,7 @@ impl Ins {
};
}
if ((self.code >> 1u8) & 0x1f) == 31
&& 32 - ((self.code >> 6u8) & 0x1f) == ((self.code >> 11u8) & 0x1f)
&& ((self.code >> 11u8) & 0x1f) == 32 - ((self.code >> 6u8) & 0x1f)
{
return SimplifiedIns {
mnemonic: "srwi",
@ -7776,10 +7924,6 @@ impl Ins {
((self.code >> 16u8) & 0x1f) as _
}
#[inline(always)]
pub fn field_BH(&self) -> usize {
((self.code >> 11u8) & 0x3) as _
}
#[inline(always)]
pub fn field_BD(&self) -> isize {
((((((self.code >> 2u8) & 0x3fff) ^ 0x2000).wrapping_sub(0x2000)) as i32) << 2u8) as _
}
@ -7816,10 +7960,6 @@ impl Ins {
((self.code >> 11u8) & 0x1f) as _
}
#[inline(always)]
pub fn field_rC(&self) -> usize {
((self.code >> 6u8) & 0x1f) as _
}
#[inline(always)]
pub fn field_sr(&self) -> usize {
((self.code >> 16u8) & 0xf) as _
}

19
disasm/tests/test_disasm.rs
View File

@ -10,12 +10,24 @@ macro_rules! assert_asm {
}};
}
#[test]
fn test_ins_add() {
assert_asm!(0x7C432214, "add r2, r3, r4");
assert_asm!(0x7CE62A15, "add. r7, r6, r5");
assert_asm!(0x7FFFFE14, "addo r31, r31, r31");
assert_asm!(0x7F9DF615, "addo. r28, r29, r30");
}
#[test]
fn test_ins_addc() {
let ins = Ins::new(0x7c002014, 0x8000_0000u32);
assert_eq!(ins.op, Addc);
assert_eq!(ins.fields(), vec![rD(GPR(0)), rA(GPR(0)), rB(GPR(4))]);
assert_asm!(ins, "addc r0, r0, r4");
assert_asm!(0x7C432014, "addc r2, r3, r4");
assert_asm!(0x7CE62815, "addc. r7, r6, r5");
assert_asm!(0x7FFFFC14, "addco r31, r31, r31");
assert_asm!(0x7F9DF415, "addco. r28, r29, r30");
}
#[test]
@ -41,6 +53,10 @@ fn test_ins_addi() {
#[test]
fn test_ins_adde() {
assert_asm!(0x7c006114, "adde r0, r0, r12");
assert_asm!(0x7C432114, "adde r2, r3, r4");
assert_asm!(0x7CE62915, "adde. r7, r6, r5");
assert_asm!(0x7FFFFD14, "addeo r31, r31, r31");
assert_asm!(0x7F9DF515, "addeo. r28, r29, r30");
}
#[test]
@ -652,6 +668,9 @@ fn test_ins_nand() {
#[test]
fn test_ins_neg() {
assert_asm!(0x7C0600D0, "neg r0, r6");
assert_asm!(0x7C4A00D1, "neg. r2, r10");
assert_asm!(0x7CC104D0, "nego r6, r1");
assert_asm!(0x7DF004D1, "nego. r15, r16");
}
#[test]

77
isa.yaml
View File

@ -22,9 +22,6 @@ fields:
- name: BI
arg: CRBit
bits: 11..16
- name: BH
arg: OpaqueU
bits: 19..21
- name: BD
arg: BranchDest
bits: 16..30
@ -64,9 +61,6 @@ fields:
- name: rB
arg: GPR
bits: 16..21
- name: rC
arg: GPR
bits: 21..26
- name: sr
arg: SR
bits: 12..16
@ -161,17 +155,19 @@ fields:
- name: ctr
- name: lr
# TODO Add defs/uses for modifiers.
modifiers:
- name: OE
suffix: o
bit: 21
side_effects: [ xer ]
- name: Rc
suffix: .
bit: 31
side_effects: [ cr0 ]
- name: LK
suffix: l
bit: 31
side_effects: [ lr ]
- name: AA
suffix: a
bit: 30
@ -191,7 +187,7 @@ modifiers:
opcodes:
- name: add
desc: Add
bitmask: 0xfc0007fe
bitmask: 0xfc0003fe
pattern: 0x7c000214
modifiers: [ OE, Rc ]
args: [ rD, rA, rB ]
@ -200,7 +196,7 @@ opcodes:
- name: addc
desc: Add Carrying
bitmask: 0xfc0007fe
bitmask: 0xfc0003fe
pattern: 0x7c000014
modifiers: [ OE, Rc ]
args: [ rD, rA, rB ]
@ -209,7 +205,7 @@ opcodes:
- name: adde
desc: Add Extended
bitmask: 0xfc0007fe
bitmask: 0xfc0003fe
pattern: 0x7c000114
modifiers: [ OE, Rc ]
args: [ rD, rA, rB ]
@ -229,6 +225,7 @@ opcodes:
bitmask: 0xfc000000
pattern: 0x30000000
args: [ rD, rA, simm ]
side_effects: [ xer ]
defs: [ rD ]
uses: [ rA ]
@ -237,7 +234,7 @@ opcodes:
bitmask: 0xfc000000
pattern: 0x34000000
args: [ rD, rA, simm ]
side_effects: [ Rc ]
side_effects: [ xer, cr0 ]
defs: [ rD ]
uses: [ rA ]
@ -319,18 +316,18 @@ opcodes:
- name: bcctr
desc: Branch Conditional to Count Register
bitmask: 0xfc007ffe
bitmask: 0xfc00fffe
pattern: 0x4c000420
modifiers: [ LK, BP_ND ]
args: [ BO, BI, BH ]
args: [ BO, BI ]
uses: [ ctr ]
- name: bclr
desc: Branch Conditional to Link Register
bitmask: 0xfc007ffe
bitmask: 0xfc00fffe
pattern: 0x4c000020
modifiers: [ LK, BP_ND ]
args: [ BO, BI, BH ]
args: [ BO, BI ]
uses: [ lr ]
- name: cmp
@ -527,7 +524,7 @@ opcodes:
- name: eqv
desc: Equivalent
bitmask: 0xfc0003fe
bitmask: 0xfc0007fe
pattern: 0x7c000238
modifiers: [ Rc ]
args: [ rA, rS, rB ]
@ -804,7 +801,7 @@ opcodes:
- name: icbi
desc: Instruction Cache Block Invalidate
bitmask: 0xffe007ff
bitmask: 0xffe007fe
pattern: 0x7c0007ac
modifiers: [ Rc ]
args: [ rA, rB ]
@ -1090,6 +1087,7 @@ opcodes:
desc: Move from FPSCR
bitmask: 0xfc1ffffe
pattern: 0xfc00048e
modifiers: [ Rc ]
args: [ frD ]
defs: [ frD ]
@ -1242,7 +1240,7 @@ opcodes:
- name: neg
desc: Negate
bitmask: 0xfc00fffe
bitmask: 0xfc00fbfe
pattern: 0x7c0000d0
modifiers: [ OE, Rc ]
args: [ rD, rA ]
@ -1358,6 +1356,7 @@ opcodes:
desc: Paired Single Absolute Value
bitmask: 0xfc1f07fe
pattern: 0x10000210
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1366,6 +1365,7 @@ opcodes:
desc: Paired Single Add
bitmask: 0xfc0007fe
pattern: 0x1000002a
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1406,6 +1406,7 @@ opcodes:
desc: Paired Single Divide
bitmask: 0xfc0007fe
pattern: 0x10000024
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1414,6 +1415,7 @@ opcodes:
desc: Paired Single Multiply-Add
bitmask: 0xfc00003e
pattern: 0x1000003a
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1422,6 +1424,7 @@ opcodes:
desc: Paired Single Multiply-Add Scalar high
bitmask: 0xfc00003e
pattern: 0x1000001c
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1430,6 +1433,7 @@ opcodes:
desc: Paired Single Multiply-Add Scalar low
bitmask: 0xfc00003e
pattern: 0x1000001e
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1438,6 +1442,7 @@ opcodes:
desc: Paired Single MERGE high
bitmask: 0xfc0007fe
pattern: 0x10000420
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1446,6 +1451,7 @@ opcodes:
desc: Paired Single MERGE direct
bitmask: 0xfc0007fe
pattern: 0x10000460
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1454,6 +1460,7 @@ opcodes:
desc: Paired Single MERGE swapped
bitmask: 0xfc0007fe
pattern: 0x100004a0
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1462,6 +1469,7 @@ opcodes:
desc: Paired Single MERGE low
bitmask: 0xfc0007fe
pattern: 0x100004e0
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1470,6 +1478,7 @@ opcodes:
desc: Paired Single Move Register
bitmask: 0xfc1f07fe
pattern: 0x10000090
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1478,6 +1487,7 @@ opcodes:
desc: Paired Single Multiply-Subtract
bitmask: 0xfc00003e
pattern: 0x10000038
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1486,6 +1496,7 @@ opcodes:
desc: Paired Single Multiply
bitmask: 0xfc00f83e
pattern: 0x10000032
modifiers: [ Rc ]
args: [ frD, frA, frC ]
defs: [ frD ]
uses: [ frA, frC ]
@ -1494,6 +1505,7 @@ opcodes:
desc: Paired Single Multiply Scalar high
bitmask: 0xfc00f83e
pattern: 0x10000018
modifiers: [ Rc ]
args: [ frD, frA, frC ]
defs: [ frD ]
uses: [ frA, frC ]
@ -1502,6 +1514,7 @@ opcodes:
desc: Paired Single Multiply Scalar low
bitmask: 0xfc00f83e
pattern: 0x1000001a
modifiers: [ Rc ]
args: [ frD, frA, frC ]
defs: [ frD ]
uses: [ frA, frC ]
@ -1510,6 +1523,7 @@ opcodes:
desc: Paired Single Negative Absolute Value
bitmask: 0xfc1f07fe
pattern: 0x10000110
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1518,6 +1532,7 @@ opcodes:
desc: Paired Single Negate
bitmask: 0xfc1f07fe
pattern: 0x10000050
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1526,6 +1541,7 @@ opcodes:
desc: Paired Single Negative Multiply-Add
bitmask: 0xfc00003e
pattern: 0x1000003e
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1534,6 +1550,7 @@ opcodes:
desc: Paired Single Negative Multiply-Subtract
bitmask: 0xfc00003e
pattern: 0x1000003c
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1542,6 +1559,7 @@ opcodes:
desc: Paired Single Reciprocal Estimate
bitmask: 0xfc1f07fe
pattern: 0x10000030
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1550,6 +1568,7 @@ opcodes:
desc: Paired Single Reciprocal Square Root Estimate
bitmask: 0xfc1f07fe
pattern: 0x10000034
modifiers: [ Rc ]
args: [ frD, frB ]
defs: [ frD ]
uses: [ frB ]
@ -1558,6 +1577,7 @@ opcodes:
desc: Paired Single Select
bitmask: 0xfc00003e
pattern: 0x1000002e
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1566,6 +1586,7 @@ opcodes:
desc: Paired Single Subtract
bitmask: 0xfc0007fe
pattern: 0x10000028
modifiers: [ Rc ]
args: [ frD, frA, frB ]
defs: [ frD ]
uses: [ frA, frB ]
@ -1574,6 +1595,7 @@ opcodes:
desc: Paired Single vector SUM high
bitmask: 0xfc00003e
pattern: 0x10000014
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
@ -1582,14 +1604,15 @@ opcodes:
desc: Paired Single vector SUM low
bitmask: 0xfc00003e
pattern: 0x10000016
modifiers: [ Rc ]
args: [ frD, frA, frC, frB ]
defs: [ frD ]
uses: [ frA, frC, frB ]
- name: rfi
desc: Return from Interrupt
bitmask: 0xfffff801
pattern: 0x4c000000
bitmask: 0xffffffff
pattern: 0x4c000064
- name: rlwimi
desc: Rotate Left Word Immediate then Mask Insert
@ -1996,7 +2019,7 @@ mnemonics:
- name: mr
opcode: or
args: [ rA, rS ]
condition: rS == rB
condition: rB == rS
- name: nop
opcode: ori
condition: rA == 0 && rS == 0 && uimm == 0
@ -2029,11 +2052,11 @@ mnemonics:
- name: slwi
opcode: rlwinm
args: [ rA, rS, SH ]
condition: MB == 0 && 31 - SH == ME
condition: MB == 0 && ME == 31 - SH
- name: srwi
opcode: rlwinm
args: [ rA, rS, MB ]
condition: ME == 31 && 32 - MB == SH
condition: ME == 31 && SH == 32 - MB
- name: clrlslwi
opcode: rlwinm
args: [ rA, rS, MB=MB+SH, SH ]
@ -2119,19 +2142,19 @@ mnemonics:
- name: crset
opcode: creqv
args: [ crbD ]
condition: crbD == crbA && crbD == crbB
condition: crbA == crbD && crbB == crbD
- name: crclr
opcode: crxor
args: [ crbD ]
condition: crbD == crbA && crbD == crbB
condition: crbA == crbD && crbB == crbD
- name: crmove
opcode: cror
args: [ crbD, crbA ]
condition: crbA == crbB
condition: crbB == crbA
- name: crnot
opcode: crnor
args: [ crbD, crbA ]
condition: crbA == crbB
condition: crbB == crbA
# Misc
- name: tweq