2016-03-28 08:54:02 +00:00
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#include "SWHC.hpp"
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2017-12-29 08:08:12 +00:00
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namespace DataSpec::DNAParticle
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2016-03-28 08:54:02 +00:00
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{
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template <class IDType>
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void SWSH<IDType>::read(athena::io::YAMLDocReader& r)
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{
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for (const auto& elem : r.getCurNode()->m_mapChildren)
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{
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if (elem.first.size() < 4)
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{
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LogModule.report(logvisor::Warning, "short FourCC in element '%s'", elem.first.c_str());
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continue;
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}
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2017-02-12 23:56:03 +00:00
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if (auto rec = r.enterSubRecord(elem.first.c_str()))
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2016-03-28 08:54:02 +00:00
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{
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2017-02-12 23:56:03 +00:00
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switch(*reinterpret_cast<const uint32_t*>(elem.first.data()))
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{
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case SBIG('PSLT'):
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x0_PSLT.read(r);
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break;
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case SBIG('TIME'):
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x4_TIME.read(r);
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break;
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case SBIG('LRAD'):
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x8_LRAD.read(r);
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break;
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case SBIG('RRAD'):
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xc_RRAD.read(r);
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break;
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case SBIG('LENG'):
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x10_LENG.read(r);
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break;
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case SBIG('COLR'):
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x14_COLR.read(r);
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break;
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case SBIG('SIDE'):
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x18_SIDE.read(r);
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break;
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case SBIG('IROT'):
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x1c_IROT.read(r);
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break;
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case SBIG('ROTM'):
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x20_ROTM.read(r);
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break;
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case SBIG('POFS'):
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x24_POFS.read(r);
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break;
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case SBIG('IVEL'):
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x28_IVEL.read(r);
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break;
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case SBIG('NPOS'):
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x2c_NPOS.read(r);
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break;
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case SBIG('VELM'):
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x30_VELM.read(r);
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break;
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case SBIG('VLM2'):
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x34_VLM2.read(r);
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break;
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case SBIG('SPLN'):
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x38_SPLN.read(r);
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break;
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case SBIG('TEXR'):
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x3c_TEXR.read(r);
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break;
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case SBIG('TSPN'):
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x40_TSPN.read(r);
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break;
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case SBIG('LLRD'):
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x44_24_LLRD = r.readBool(nullptr);
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break;
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case SBIG('CROS'):
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x44_25_CROS = r.readBool(nullptr);
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break;
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case SBIG('VLS1'):
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x44_26_VLS1 = r.readBool(nullptr);
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break;
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case SBIG('VLS2'):
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x44_27_VLS2 = r.readBool(nullptr);
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break;
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case SBIG('SROT'):
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x44_28_SROT = r.readBool(nullptr);
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break;
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case SBIG('WIRE'):
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x44_29_WIRE = r.readBool(nullptr);
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break;
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case SBIG('TEXW'):
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x44_30_TEXW = r.readBool(nullptr);
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break;
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case SBIG('AALP'):
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x44_31_AALP = r.readBool(nullptr);
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break;
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case SBIG('ZBUF'):
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x45_24_ZBUF = r.readBool(nullptr);
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break;
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case SBIG('ORNT'):
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x45_25_ORNT = r.readBool(nullptr);
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break;
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case SBIG('CRND'):
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x45_26_CRND = r.readBool(nullptr);
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break;
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}
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2016-03-28 08:54:02 +00:00
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}
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}
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}
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template <class IDType>
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void SWSH<IDType>::write(athena::io::YAMLDocWriter& w) const
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{
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if (x0_PSLT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("PSLT"))
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x0_PSLT.write(w);
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2016-03-28 08:54:02 +00:00
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if (x4_TIME)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("TIME"))
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x4_TIME.write(w);
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2016-03-28 08:54:02 +00:00
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if (x8_LRAD)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("LRAD"))
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x8_LRAD.write(w);
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2016-03-28 08:54:02 +00:00
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if (xc_RRAD)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("RRAD"))
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xc_RRAD.write(w);
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2016-03-28 08:54:02 +00:00
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if (x10_LENG)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("LENG"))
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x10_LENG.write(w);
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2016-03-28 08:54:02 +00:00
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if (x14_COLR)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("COLR"))
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x14_COLR.write(w);
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2016-03-28 08:54:02 +00:00
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if (x18_SIDE)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("SIDE"))
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x18_SIDE.write(w);
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2016-03-28 08:54:02 +00:00
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if (x1c_IROT)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("IROT"))
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x1c_IROT.write(w);
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2016-03-28 08:54:02 +00:00
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if (x20_ROTM)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("ROTM"))
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x20_ROTM.write(w);
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2016-03-28 08:54:02 +00:00
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if (x24_POFS)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("POFS"))
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x24_POFS.write(w);
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2016-03-28 08:54:02 +00:00
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if (x28_IVEL)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("IVEL"))
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x28_IVEL.write(w);
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2016-03-28 08:54:02 +00:00
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if (x2c_NPOS)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("NPOS"))
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x2c_NPOS.write(w);
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2016-03-28 08:54:02 +00:00
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if (x30_VELM)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("VELM"))
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x30_VELM.write(w);
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2016-03-28 08:54:02 +00:00
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if (x34_VLM2)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("VLM2"))
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x34_VLM2.write(w);
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2016-03-28 08:54:02 +00:00
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if (x38_SPLN)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("SPLN"))
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x38_SPLN.write(w);
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2016-03-28 08:54:02 +00:00
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if (x3c_TEXR)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("TEXR"))
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x3c_TEXR.write(w);
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2016-03-28 08:54:02 +00:00
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if (x40_TSPN)
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2017-02-12 23:56:03 +00:00
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if (auto rec = w.enterSubRecord("TSPN"))
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x40_TSPN.write(w);
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2016-03-28 08:54:02 +00:00
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if (x44_24_LLRD)
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w.writeBool("LLRD", true);
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if (!x44_25_CROS)
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w.writeBool("CROS", false);
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if (x44_26_VLS1)
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w.writeBool("VLS1", true);
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if (x44_27_VLS2)
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w.writeBool("VLS2", true);
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if (x44_28_SROT)
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w.writeBool("SROT", true);
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if (x44_29_WIRE)
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w.writeBool("WIRE", true);
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if (x44_30_TEXW)
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w.writeBool("TEXW", true);
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if (x44_31_AALP)
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w.writeBool("AALP", true);
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if (x45_24_ZBUF)
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w.writeBool("ZBUF", true);
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if (x45_25_ORNT)
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w.writeBool("ORNT", true);
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if (x45_26_CRND)
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w.writeBool("CRND", true);
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}
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template <class IDType>
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size_t SWSH<IDType>::binarySize(size_t __isz) const
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{
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__isz += 4;
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if (x0_PSLT)
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__isz = x0_PSLT.binarySize(__isz + 4);
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if (x4_TIME)
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__isz = x4_TIME.binarySize(__isz + 4);
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if (x8_LRAD)
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__isz = x8_LRAD.binarySize(__isz + 4);
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if (xc_RRAD)
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__isz = xc_RRAD.binarySize(__isz + 4);
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if (x10_LENG)
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__isz = x10_LENG.binarySize(__isz + 4);
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if (x14_COLR)
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__isz = x14_COLR.binarySize(__isz + 4);
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if (x18_SIDE)
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__isz = x18_SIDE.binarySize(__isz + 4);
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if (x1c_IROT)
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__isz = x1c_IROT.binarySize(__isz + 4);
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if (x20_ROTM)
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__isz = x20_ROTM.binarySize(__isz + 4);
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if (x24_POFS)
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__isz = x24_POFS.binarySize(__isz + 4);
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if (x28_IVEL)
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__isz = x28_IVEL.binarySize(__isz + 4);
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if (x2c_NPOS)
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__isz = x2c_NPOS.binarySize(__isz + 4);
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if (x30_VELM)
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__isz = x30_VELM.binarySize(__isz + 4);
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if (x34_VLM2)
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__isz = x34_VLM2.binarySize(__isz + 4);
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if (x38_SPLN)
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__isz = x38_SPLN.binarySize(__isz + 4);
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if (x3c_TEXR)
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__isz = x3c_TEXR.binarySize(__isz + 4);
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if (x40_TSPN)
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__isz = x40_TSPN.binarySize(__isz + 4);
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if (x44_24_LLRD)
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__isz += 9;
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if (!x44_25_CROS)
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__isz += 9;
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if (x44_26_VLS1)
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__isz += 9;
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if (x44_27_VLS2)
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__isz += 9;
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if (x44_28_SROT)
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__isz += 9;
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if (x44_29_WIRE)
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__isz += 9;
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if (x44_30_TEXW)
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__isz += 9;
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if (x44_31_AALP)
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__isz += 9;
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if (x45_24_ZBUF)
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__isz += 9;
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if (x45_25_ORNT)
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__isz += 9;
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if (x45_26_CRND)
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__isz += 9;
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return __isz;
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}
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template <class IDType>
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void SWSH<IDType>::read(athena::io::IStreamReader& r)
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{
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uint32_t clsId;
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r.readBytesToBuf(&clsId, 4);
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if (clsId != SBIG('SWSH'))
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{
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LogModule.report(logvisor::Warning, "non SWSH provided to SWSH parser");
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return;
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}
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r.readBytesToBuf(&clsId, 4);
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while (clsId != SBIG('_END'))
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{
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switch(clsId)
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{
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case SBIG('PSLT'):
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x0_PSLT.read(r);
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break;
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case SBIG('TIME'):
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x4_TIME.read(r);
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break;
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case SBIG('LRAD'):
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x8_LRAD.read(r);
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break;
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case SBIG('RRAD'):
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xc_RRAD.read(r);
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break;
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case SBIG('LENG'):
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x10_LENG.read(r);
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break;
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case SBIG('COLR'):
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x14_COLR.read(r);
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break;
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case SBIG('SIDE'):
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x18_SIDE.read(r);
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break;
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case SBIG('IROT'):
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x1c_IROT.read(r);
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break;
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case SBIG('ROTM'):
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x20_ROTM.read(r);
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break;
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case SBIG('POFS'):
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x24_POFS.read(r);
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break;
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case SBIG('IVEL'):
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x28_IVEL.read(r);
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break;
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case SBIG('NPOS'):
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x2c_NPOS.read(r);
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break;
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case SBIG('VELM'):
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x30_VELM.read(r);
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break;
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case SBIG('VLM2'):
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x34_VLM2.read(r);
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break;
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case SBIG('SPLN'):
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x38_SPLN.read(r);
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break;
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case SBIG('TEXR'):
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x3c_TEXR.read(r);
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break;
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case SBIG('TSPN'):
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x40_TSPN.read(r);
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break;
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case SBIG('LLRD'):
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r.readUint32Big();
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x44_24_LLRD = r.readBool();
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break;
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case SBIG('CROS'):
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r.readUint32Big();
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x44_25_CROS = r.readBool();
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break;
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case SBIG('VLS1'):
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r.readUint32Big();
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x44_26_VLS1 = r.readBool();
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break;
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case SBIG('VLS2'):
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r.readUint32Big();
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x44_27_VLS2 = r.readBool();
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break;
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case SBIG('SROT'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x44_28_SROT = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('WIRE'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x44_29_WIRE = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('TEXW'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x44_30_TEXW = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('AALP'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x44_31_AALP = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('ZBUF'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x45_24_ZBUF = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('ORNT'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x45_25_ORNT = r.readBool();
|
|
|
|
break;
|
|
|
|
case SBIG('CRND'):
|
|
|
|
r.readUint32Big();
|
|
|
|
x45_26_CRND = r.readBool();
|
|
|
|
break;
|
|
|
|
default:
|
|
|
|
LogModule.report(logvisor::Fatal, "Unknown SWSH class %.4s @%" PRIi64, &clsId, r.position());
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
r.readBytesToBuf(&clsId, 4);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
template <class IDType>
|
|
|
|
void SWSH<IDType>::write(athena::io::IStreamWriter& w) const
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"SWSH", 4);
|
|
|
|
if (x0_PSLT)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"PSLT", 4);
|
|
|
|
x0_PSLT.write(w);
|
|
|
|
}
|
|
|
|
if (x4_TIME)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"TIME", 4);
|
|
|
|
x4_TIME.write(w);
|
|
|
|
}
|
|
|
|
if (x8_LRAD)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"LRAD", 4);
|
|
|
|
x8_LRAD.write(w);
|
|
|
|
}
|
|
|
|
if (xc_RRAD)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"RRAD", 4);
|
|
|
|
xc_RRAD.write(w);
|
|
|
|
}
|
|
|
|
if (x10_LENG)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"LENG", 4);
|
|
|
|
x10_LENG.write(w);
|
|
|
|
}
|
|
|
|
if (x14_COLR)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"COLR", 4);
|
|
|
|
x14_COLR.write(w);
|
|
|
|
}
|
|
|
|
if (x18_SIDE)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"SIDE", 4);
|
|
|
|
x18_SIDE.write(w);
|
|
|
|
}
|
|
|
|
if (x1c_IROT)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"IROT", 4);
|
|
|
|
x1c_IROT.write(w);
|
|
|
|
}
|
|
|
|
if (x20_ROTM)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"ROTM", 4);
|
|
|
|
x20_ROTM.write(w);
|
|
|
|
}
|
|
|
|
if (x24_POFS)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"POFS", 4);
|
|
|
|
x24_POFS.write(w);
|
|
|
|
}
|
|
|
|
if (x28_IVEL)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"IVEL", 4);
|
|
|
|
x28_IVEL.write(w);
|
|
|
|
}
|
|
|
|
if (x2c_NPOS)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"NPOS", 4);
|
|
|
|
x2c_NPOS.write(w);
|
|
|
|
}
|
|
|
|
if (x30_VELM)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"VELM", 4);
|
|
|
|
x30_VELM.write(w);
|
|
|
|
}
|
|
|
|
if (x34_VLM2)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"VLM2", 4);
|
|
|
|
x34_VLM2.write(w);
|
|
|
|
}
|
|
|
|
if (x38_SPLN)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"SPLN", 4);
|
|
|
|
x38_SPLN.write(w);
|
|
|
|
}
|
|
|
|
if (x3c_TEXR)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"TEXR", 4);
|
|
|
|
x3c_TEXR.write(w);
|
|
|
|
}
|
|
|
|
if (x40_TSPN)
|
|
|
|
{
|
|
|
|
w.writeBytes((atInt8*)"TSPN", 4);
|
|
|
|
x40_TSPN.write(w);
|
|
|
|
}
|
|
|
|
|
|
|
|
if (x44_24_LLRD)
|
|
|
|
w.writeBytes("LLRDCNST\x01", 9);
|
|
|
|
if (!x44_25_CROS)
|
|
|
|
w.writeBytes("CROSCNST\x00", 9);
|
|
|
|
if (x44_26_VLS1)
|
|
|
|
w.writeBytes("VLS1CNST\x01", 9);
|
|
|
|
if (x44_27_VLS2)
|
|
|
|
w.writeBytes("VLS2CNST\x01", 9);
|
|
|
|
if (x44_28_SROT)
|
|
|
|
w.writeBytes("SROTCNST\x01", 9);
|
|
|
|
if (x44_29_WIRE)
|
|
|
|
w.writeBytes("WIRECNST\x01", 9);
|
|
|
|
if (x44_30_TEXW)
|
|
|
|
w.writeBytes("TEXWCNST\x01", 9);
|
|
|
|
if (x44_31_AALP)
|
|
|
|
w.writeBytes("AALPCNST\x01", 9);
|
|
|
|
if (x45_24_ZBUF)
|
|
|
|
w.writeBytes("ZBUFCNST\x01", 9);
|
|
|
|
if (x45_25_ORNT)
|
|
|
|
w.writeBytes("ORNTCNST\x01", 9);
|
|
|
|
if (x45_26_CRND)
|
|
|
|
w.writeBytes("CRNDCNST\x01", 9);
|
2016-03-28 09:25:50 +00:00
|
|
|
w.writeBytes("_END", 4);
|
2016-03-28 08:54:02 +00:00
|
|
|
}
|
|
|
|
|
2016-10-02 22:41:36 +00:00
|
|
|
template <class IDType>
|
|
|
|
void SWSH<IDType>::gatherDependencies(std::vector<hecl::ProjectPath>& pathsOut) const
|
|
|
|
{
|
|
|
|
if (x3c_TEXR.m_elem)
|
|
|
|
x3c_TEXR.m_elem->gatherDependencies(pathsOut);
|
|
|
|
}
|
|
|
|
|
2016-03-28 08:54:02 +00:00
|
|
|
template struct SWSH<UniqueID32>;
|
|
|
|
template struct SWSH<UniqueID64>;
|
|
|
|
|
|
|
|
template <class IDType>
|
|
|
|
bool ExtractSWSH(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath)
|
|
|
|
{
|
2016-08-22 03:47:48 +00:00
|
|
|
athena::io::FileWriter writer(outPath.getAbsolutePath());
|
|
|
|
if (writer.isOpen())
|
2016-03-28 08:54:02 +00:00
|
|
|
{
|
|
|
|
SWSH<IDType> swsh;
|
|
|
|
swsh.read(rs);
|
2016-08-22 03:47:48 +00:00
|
|
|
swsh.toYAMLStream(writer);
|
2016-03-28 08:54:02 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
template bool ExtractSWSH<UniqueID32>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
|
|
|
|
template bool ExtractSWSH<UniqueID64>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
|
|
|
|
|
|
|
|
template <class IDType>
|
|
|
|
bool WriteSWSH(const SWSH<IDType>& swsh, const hecl::ProjectPath& outPath)
|
|
|
|
{
|
|
|
|
athena::io::FileWriter w(outPath.getAbsolutePath(), true, false);
|
|
|
|
if (w.hasError())
|
|
|
|
return false;
|
|
|
|
swsh.write(w);
|
|
|
|
int64_t rem = w.position() % 32;
|
|
|
|
if (rem)
|
|
|
|
for (int64_t i=0 ; i<32-rem ; ++i)
|
2017-10-22 06:11:22 +00:00
|
|
|
w.writeUByte(0xff);
|
2016-03-28 08:54:02 +00:00
|
|
|
return true;
|
|
|
|
}
|
|
|
|
template bool WriteSWSH<UniqueID32>(const SWSH<UniqueID32>& swsh, const hecl::ProjectPath& outPath);
|
|
|
|
template bool WriteSWSH<UniqueID64>(const SWSH<UniqueID64>& swsh, const hecl::ProjectPath& outPath);
|
|
|
|
|
|
|
|
}
|