2015-10-10 06:59:40 +00:00
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#ifndef HECLBACKEND_GX_HPP
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#define HECLBACKEND_GX_HPP
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#include "Backend.hpp"
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2015-10-17 02:06:27 +00:00
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#include <Athena/DNA.hpp>
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2015-10-10 06:59:40 +00:00
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#include <stdint.h>
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#include <stdlib.h>
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#include <algorithm>
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namespace HECL
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{
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namespace Backend
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{
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struct GX : IBackend
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{
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enum AttrType
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{
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NONE,
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DIRECT,
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INDEX8,
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INDEX16
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};
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enum TevOp
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{
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TEV_ADD = 0,
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TEV_SUB = 1,
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TEV_COMP_R8_GT = 8,
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TEV_COMP_R8_EQ = 9,
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TEV_COMP_GR16_GT = 10,
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TEV_COMP_GR16_EQ = 11,
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TEV_COMP_BGR24_GT = 12,
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TEV_COMP_BGR24_EQ = 13,
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TEV_COMP_RGB8_GT = 14,
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TEV_COMP_RGB8_EQ = 15,
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TEV_COMP_A8_GT = TEV_COMP_RGB8_GT, // for alpha channel
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TEV_COMP_A8_EQ = TEV_COMP_RGB8_EQ // for alpha channel
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};
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enum TevBias
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{
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TB_ZERO = 0,
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TB_ADDHALF = 1,
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TB_SUBHALF = 2,
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};
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enum TevScale
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{
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CS_SCALE_1 = 0,
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CS_SCALE_2 = 1,
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CS_SCALE_4 = 2,
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CS_DIVIDE_2 = 3
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};
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enum TexGenType
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{
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TG_MTX3x4 = 0,
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TG_MTX2x4,
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TG_BUMP0,
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TG_BUMP1,
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TG_BUMP2,
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TG_BUMP3,
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TG_BUMP4,
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TG_BUMP5,
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TG_BUMP6,
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TG_BUMP7,
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TG_SRTG
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};
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enum TevRegID
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{
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TEVPREV = 0,
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TEVREG0 = 1,
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TEVREG1 = 2,
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TEVREG2 = 3,
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TEVLAZY = 5
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};
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enum TevColorArg
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{
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CC_CPREV = 0, /*!< Use the color value from previous TEV stage */
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CC_APREV = 1, /*!< Use the alpha value from previous TEV stage */
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CC_C0 = 2, /*!< Use the color value from the color/output register 0 */
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CC_A0 = 3, /*!< Use the alpha value from the color/output register 0 */
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CC_C1 = 4, /*!< Use the color value from the color/output register 1 */
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CC_A1 = 5, /*!< Use the alpha value from the color/output register 1 */
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CC_C2 = 6, /*!< Use the color value from the color/output register 2 */
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CC_A2 = 7, /*!< Use the alpha value from the color/output register 2 */
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CC_TEXC = 8, /*!< Use the color value from texture */
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CC_TEXA = 9, /*!< Use the alpha value from texture */
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CC_RASC = 10, /*!< Use the color value from rasterizer */
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CC_RASA = 11, /*!< Use the alpha value from rasterizer */
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CC_ONE = 12,
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CC_HALF = 13,
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CC_KONST = 14,
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CC_ZERO = 15, /*!< Use to pass zero value */
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/* Non-GX */
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CC_LAZY /*!< Lazy register allocation */
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};
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enum TevAlphaArg
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{
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CA_APREV = 0, /*!< Use the alpha value from previous TEV stage */
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CA_A0 = 1, /*!< Use the alpha value from the color/output register 0 */
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CA_A1 = 2, /*!< Use the alpha value from the color/output register 1 */
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CA_A2 = 3, /*!< Use the alpha value from the color/output register 2 */
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CA_TEXA = 4, /*!< Use the alpha value from texture */
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CA_RASA = 5, /*!< Use the alpha value from rasterizer */
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CA_KONST = 6,
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CA_ZERO = 7, /*!< Use to pass zero value */
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/* Non-GX */
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CA_LAZY /*!< Lazy register allocation */
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};
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enum TevKColorSel
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{
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TEV_KCSEL_8_8 = 0x00,
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TEV_KCSEL_7_8 = 0x01,
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TEV_KCSEL_6_8 = 0x02,
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TEV_KCSEL_5_8 = 0x03,
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TEV_KCSEL_4_8 = 0x04,
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TEV_KCSEL_3_8 = 0x05,
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TEV_KCSEL_2_8 = 0x06,
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TEV_KCSEL_1_8 = 0x07,
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TEV_KCSEL_1 = TEV_KCSEL_8_8,
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TEV_KCSEL_3_4 = TEV_KCSEL_6_8,
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TEV_KCSEL_1_2 = TEV_KCSEL_4_8,
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TEV_KCSEL_1_4 = TEV_KCSEL_2_8,
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TEV_KCSEL_K0 = 0x0C,
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TEV_KCSEL_K1 = 0x0D,
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TEV_KCSEL_K2 = 0x0E,
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TEV_KCSEL_K3 = 0x0F,
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TEV_KCSEL_K0_R = 0x10,
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TEV_KCSEL_K1_R = 0x11,
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TEV_KCSEL_K2_R = 0x12,
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TEV_KCSEL_K3_R = 0x13,
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TEV_KCSEL_K0_G = 0x14,
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TEV_KCSEL_K1_G = 0x15,
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TEV_KCSEL_K2_G = 0x16,
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TEV_KCSEL_K3_G = 0x17,
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TEV_KCSEL_K0_B = 0x18,
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TEV_KCSEL_K1_B = 0x19,
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TEV_KCSEL_K2_B = 0x1A,
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TEV_KCSEL_K3_B = 0x1B,
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TEV_KCSEL_K0_A = 0x1C,
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TEV_KCSEL_K1_A = 0x1D,
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TEV_KCSEL_K2_A = 0x1E,
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TEV_KCSEL_K3_A = 0x1F
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};
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enum TevKAlphaSel
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{
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TEV_KASEL_8_8 = 0x00,
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TEV_KASEL_7_8 = 0x01,
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TEV_KASEL_6_8 = 0x02,
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TEV_KASEL_5_8 = 0x03,
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TEV_KASEL_4_8 = 0x04,
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TEV_KASEL_3_8 = 0x05,
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TEV_KASEL_2_8 = 0x06,
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TEV_KASEL_1_8 = 0x07,
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TEV_KASEL_1 = TEV_KASEL_8_8,
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TEV_KASEL_3_4 = TEV_KASEL_6_8,
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TEV_KASEL_1_2 = TEV_KASEL_4_8,
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TEV_KASEL_1_4 = TEV_KASEL_2_8,
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TEV_KASEL_K0_R = 0x10,
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TEV_KASEL_K1_R = 0x11,
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TEV_KASEL_K2_R = 0x12,
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TEV_KASEL_K3_R = 0x13,
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TEV_KASEL_K0_G = 0x14,
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TEV_KASEL_K1_G = 0x15,
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TEV_KASEL_K2_G = 0x16,
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TEV_KASEL_K3_G = 0x17,
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TEV_KASEL_K0_B = 0x18,
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TEV_KASEL_K1_B = 0x19,
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TEV_KASEL_K2_B = 0x1A,
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TEV_KASEL_K3_B = 0x1B,
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TEV_KASEL_K0_A = 0x1C,
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TEV_KASEL_K1_A = 0x1D,
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TEV_KASEL_K2_A = 0x1E,
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TEV_KASEL_K3_A = 0x1F
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};
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enum TexGenSrc
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{
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TG_POS = 0,
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TG_NRM,
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TG_BINRM,
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TG_TANGENT,
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TG_TEX0,
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TG_TEX1,
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TG_TEX2,
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TG_TEX3,
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TG_TEX4,
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TG_TEX5,
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TG_TEX6,
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TG_TEX7,
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TG_TEXCOORD0,
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TG_TEXCOORD1,
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TG_TEXCOORD2,
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TG_TEXCOORD3,
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TG_TEXCOORD4,
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TG_TEXCOORD5,
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TG_TEXCOORD6,
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TG_COLOR0,
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TG_COLOR1
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};
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enum TexMtx
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{
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TEXMTX0 = 30,
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TEXMTX1 = 33,
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TEXMTX2 = 36,
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TEXMTX3 = 39,
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TEXMTX4 = 42,
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TEXMTX5 = 45,
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TEXMTX6 = 48,
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TEXMTX7 = 51,
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TEXMTX8 = 54,
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TEXMTX9 = 57,
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IDENTITY = 60
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};
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2015-10-17 02:06:27 +00:00
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enum PTTexMtx
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{
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PTTEXMTX0 = 64,
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PTTEXMTX1 = 67,
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PTTEXMTX2 = 70,
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PTTEXMTX3 = 73,
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PTTEXMTX4 = 76,
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PTTEXMTX5 = 79,
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PTTEXMTX6 = 82,
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PTTEXMTX7 = 85,
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PTTEXMTX8 = 88,
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PTTEXMTX9 = 91,
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PTTEXMTX10 = 94,
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PTTEXMTX11 = 97,
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PTTEXMTX12 = 100,
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PTTEXMTX13 = 103,
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PTTEXMTX14 = 106,
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PTTEXMTX15 = 109,
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PTTEXMTX16 = 112,
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PTTEXMTX17 = 115,
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PTTEXMTX18 = 118,
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PTTEXMTX19 = 121,
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PTIDENTITY = 125
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};
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enum DiffuseFn
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{
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DF_NONE = 0,
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DF_SIGN,
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DF_CLAMP
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};
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enum AttnFn
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{
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AF_SPEC = 0,
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AF_SPOT = 1,
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AF_NONE
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};
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enum Primitive
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{
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POINTS = 0xb8,
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LINES = 0xa8,
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LINESTRIP = 0xb0,
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TRIANGLES = 0x90,
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TRIANGLESTRIP = 0x98,
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TRIANGLEFAN = 0xa0,
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QUADS = 0x80
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};
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2015-10-10 06:59:40 +00:00
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struct TexCoordGen
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{
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2015-10-14 02:16:21 +00:00
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TexGenSrc m_src = TG_TEX0;
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TexMtx m_mtx = IDENTITY;
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/* Not actually part of GX, but a way to relate out-of-band
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* texmtx animation parameters */
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std::string m_gameFunction;
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std::vector<atVec4f> m_gameArgs;
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};
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unsigned m_tcgCount = 0;
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TexCoordGen m_tcgs[8];
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unsigned m_texMtxCount = 0;
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TexCoordGen* m_texMtxRefs[8];
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struct TEVStage
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{
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2015-10-17 02:06:27 +00:00
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TevOp m_cop = TEV_ADD;
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TevOp m_aop = TEV_ADD;
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2015-10-14 23:06:47 +00:00
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TevColorArg m_color[4] = {CC_ZERO, CC_ZERO, CC_ZERO, CC_ZERO};
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TevAlphaArg m_alpha[4] = {CA_ZERO, CA_ZERO, CA_ZERO, CA_ZERO};
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2015-10-14 02:16:21 +00:00
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TevKColorSel m_kColor = TEV_KCSEL_1;
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TevKAlphaSel m_kAlpha = TEV_KASEL_1;
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TevRegID m_cRegOut = TEVPREV;
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TevRegID m_aRegOut = TEVPREV;
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2015-10-16 00:34:47 +00:00
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int m_lazyCInIdx = -1;
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int m_lazyAInIdx = -1;
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2015-10-17 02:06:27 +00:00
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int m_lazyCOutIdx = -1;
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int m_lazyAOutIdx = -1;
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2015-10-14 02:16:21 +00:00
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int m_texMapIdx = -1;
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int m_texGenIdx = -1;
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/* Convenience Links */
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TEVStage* m_prev = nullptr;
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TEVStage* m_next = nullptr;
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2015-10-16 03:08:01 +00:00
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/* Remember this for debugging */
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SourceLocation m_loc;
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};
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unsigned m_tevCount = 0;
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2015-10-14 02:16:21 +00:00
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TEVStage m_tevs[16];
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2015-10-16 08:02:59 +00:00
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int getStageIdx(const TEVStage* stage) const
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{
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2015-10-16 21:52:18 +00:00
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for (int i=0 ; i<int(m_tevCount) ; ++i)
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2015-10-16 08:02:59 +00:00
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if (&m_tevs[i] == stage)
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return i;
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return -1;
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}
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2015-10-16 00:34:47 +00:00
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int m_cRegMask = 0;
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int m_cRegLazy = 0;
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2015-10-17 02:06:27 +00:00
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int m_aRegMask = 0;
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int m_aRegLazy = 0;
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2015-10-16 08:02:59 +00:00
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int pickCLazy(Diagnostics& diag, const SourceLocation& loc, int stageIdx) const
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2015-10-16 00:34:47 +00:00
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{
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2015-10-16 08:02:59 +00:00
|
|
|
int regMask = m_cRegMask;
|
2015-10-16 21:52:18 +00:00
|
|
|
for (int i=stageIdx+1 ; i<int(m_tevCount) ; ++i)
|
2015-10-16 00:34:47 +00:00
|
|
|
{
|
2015-10-16 08:02:59 +00:00
|
|
|
const TEVStage& stage = m_tevs[i];
|
|
|
|
for (int c=0 ; c<4 ; ++c)
|
2015-10-16 00:34:47 +00:00
|
|
|
{
|
2015-10-17 02:06:27 +00:00
|
|
|
if (stage.m_color[c] == CC_C0)
|
|
|
|
regMask |= 1;
|
|
|
|
if (stage.m_color[c] == CC_C1)
|
|
|
|
regMask |= 2;
|
|
|
|
if (stage.m_color[c] == CC_C2)
|
|
|
|
regMask |= 4;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (int i=0 ; i<3 ; ++i)
|
|
|
|
if (!(regMask & (1 << i)))
|
|
|
|
return i;
|
|
|
|
|
|
|
|
diag.reportBackendErr(loc, "TEV C Register overflow");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
int pickALazy(Diagnostics& diag, const SourceLocation& loc, int stageIdx) const
|
|
|
|
{
|
|
|
|
int regMask = m_aRegMask;
|
|
|
|
for (int i=stageIdx+1 ; i<int(m_tevCount) ; ++i)
|
|
|
|
{
|
|
|
|
const TEVStage& stage = m_tevs[i];
|
|
|
|
for (int c=0 ; c<4 ; ++c)
|
|
|
|
{
|
|
|
|
if (stage.m_color[c] == CC_A0 ||
|
2015-10-16 08:02:59 +00:00
|
|
|
stage.m_alpha[c] == CA_A0)
|
|
|
|
regMask |= 1;
|
2015-10-17 02:06:27 +00:00
|
|
|
if (stage.m_color[c] == CC_A1 ||
|
2015-10-16 08:02:59 +00:00
|
|
|
stage.m_alpha[c] == CA_A1)
|
|
|
|
regMask |= 2;
|
2015-10-17 02:06:27 +00:00
|
|
|
if (stage.m_color[c] == CC_A2 ||
|
2015-10-16 08:02:59 +00:00
|
|
|
stage.m_alpha[c] == CA_A2)
|
|
|
|
regMask |= 4;
|
2015-10-16 00:34:47 +00:00
|
|
|
}
|
|
|
|
}
|
2015-10-16 08:02:59 +00:00
|
|
|
|
|
|
|
for (int i=0 ; i<3 ; ++i)
|
|
|
|
if (!(regMask & (1 << i)))
|
|
|
|
return i;
|
|
|
|
|
2015-10-17 02:06:27 +00:00
|
|
|
diag.reportBackendErr(loc, "TEV A Register overflow");
|
2015-10-16 00:34:47 +00:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2015-10-10 06:59:40 +00:00
|
|
|
enum BlendFactor
|
|
|
|
{
|
|
|
|
BL_ZERO,
|
|
|
|
BL_ONE,
|
|
|
|
BL_SRCCLR,
|
|
|
|
BL_INVSRCCLR,
|
|
|
|
BL_SRCALPHA,
|
|
|
|
BL_INVSRCALPHA,
|
|
|
|
BL_DSTALPHA,
|
|
|
|
BL_INVDSTALPHA
|
|
|
|
};
|
|
|
|
BlendFactor m_blendSrc;
|
|
|
|
BlendFactor m_blendDst;
|
|
|
|
|
2015-10-17 02:06:27 +00:00
|
|
|
struct Color : Athena::io::DNA<Athena::BigEndian>
|
2015-10-10 06:59:40 +00:00
|
|
|
{
|
|
|
|
union
|
|
|
|
{
|
|
|
|
uint8_t color[4];
|
|
|
|
uint32_t num = 0;
|
|
|
|
};
|
|
|
|
Color() = default;
|
|
|
|
Color& operator=(const atVec4f& vec)
|
|
|
|
{
|
|
|
|
color[0] = uint8_t(std::min(std::max(vec.vec[0] * 255.f, 0.f), 255.f));
|
|
|
|
color[1] = uint8_t(std::min(std::max(vec.vec[1] * 255.f, 0.f), 255.f));
|
|
|
|
color[2] = uint8_t(std::min(std::max(vec.vec[2] * 255.f, 0.f), 255.f));
|
2015-10-19 03:27:58 +00:00
|
|
|
color[3] = uint8_t(std::min(std::max(vec.vec[3] * 255.f, 0.f), 255.f));
|
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
Color& operator=(const atVec3f& vec)
|
|
|
|
{
|
|
|
|
color[0] = uint8_t(std::min(std::max(vec.vec[0] * 255.f, 0.f), 255.f));
|
|
|
|
color[1] = uint8_t(std::min(std::max(vec.vec[1] * 255.f, 0.f), 255.f));
|
|
|
|
color[2] = uint8_t(std::min(std::max(vec.vec[2] * 255.f, 0.f), 255.f));
|
|
|
|
color[3] = 0xff;
|
2015-10-14 02:16:21 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
Color& operator=(uint8_t val)
|
|
|
|
{
|
|
|
|
color[0] = val;
|
|
|
|
color[1] = val;
|
|
|
|
color[2] = val;
|
|
|
|
color[3] = val;
|
2015-10-10 06:59:40 +00:00
|
|
|
return *this;
|
|
|
|
}
|
|
|
|
Color(const atVec4f& vec) {*this = vec;}
|
2015-10-19 03:27:58 +00:00
|
|
|
Color(const atVec3f& vec) {*this = vec;}
|
2015-10-14 02:16:21 +00:00
|
|
|
Color(uint8_t val) {*this = val;}
|
2015-10-10 06:59:40 +00:00
|
|
|
bool operator==(const Color& other) const {return num == other.num;}
|
|
|
|
bool operator!=(const Color& other) const {return num != other.num;}
|
|
|
|
uint8_t operator[](size_t idx) const {return color[idx];}
|
|
|
|
uint8_t& operator[](size_t idx) {return color[idx];}
|
2015-10-17 02:06:27 +00:00
|
|
|
|
|
|
|
void read(Athena::io::IStreamReader& reader)
|
|
|
|
{reader.readUBytesToBuf(&num, 4);}
|
|
|
|
void write(Athena::io::IStreamWriter& writer) const
|
|
|
|
{writer.writeUBytes(reinterpret_cast<const atUint8*>(&num), 4);}
|
2015-10-18 04:08:31 +00:00
|
|
|
size_t binarySize(size_t __isz) const
|
|
|
|
{return __isz + 4;}
|
2015-10-10 06:59:40 +00:00
|
|
|
};
|
|
|
|
unsigned m_kcolorCount = 0;
|
|
|
|
Color m_kcolors[4];
|
|
|
|
|
2015-10-14 02:16:21 +00:00
|
|
|
int m_alphaTraceStage = -1;
|
|
|
|
|
2015-10-19 03:27:58 +00:00
|
|
|
bool operator==(const GX& other) const
|
|
|
|
{
|
|
|
|
if (m_tcgCount != other.m_tcgCount)
|
|
|
|
return false;
|
|
|
|
if (m_tevCount != other.m_tevCount)
|
|
|
|
return false;
|
|
|
|
if (m_blendSrc != other.m_blendSrc)
|
|
|
|
return false;
|
|
|
|
if (m_blendDst != other.m_blendDst)
|
|
|
|
return false;
|
|
|
|
if (m_kcolorCount != other.m_kcolorCount)
|
|
|
|
return false;
|
|
|
|
for (unsigned i=0 ; i<m_tcgCount ; ++i)
|
|
|
|
{
|
|
|
|
const TexCoordGen& a = m_tcgs[i];
|
|
|
|
const TexCoordGen& b = other.m_tcgs[i];
|
|
|
|
if (a.m_src != b.m_src)
|
|
|
|
return false;
|
|
|
|
if (a.m_mtx != b.m_mtx)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
for (unsigned i=0 ; i<m_tevCount ; ++i)
|
|
|
|
{
|
|
|
|
const TEVStage& a = m_tevs[i];
|
|
|
|
const TEVStage& b = other.m_tevs[i];
|
|
|
|
for (unsigned j=0 ; j<4 ; ++j)
|
|
|
|
if (a.m_color[j] != b.m_color[j])
|
|
|
|
return false;
|
|
|
|
for (unsigned j=0 ; j<4 ; ++j)
|
|
|
|
if (a.m_alpha[j] != b.m_alpha[j])
|
|
|
|
return false;
|
|
|
|
if (a.m_cop != b.m_cop)
|
|
|
|
return false;
|
|
|
|
if (a.m_aop != b.m_aop)
|
|
|
|
return false;
|
|
|
|
if (a.m_kColor != b.m_kColor)
|
|
|
|
return false;
|
|
|
|
if (a.m_kAlpha != b.m_kAlpha)
|
|
|
|
return false;
|
|
|
|
if (a.m_cRegOut != b.m_cRegOut)
|
|
|
|
return false;
|
|
|
|
if (a.m_aRegOut != b.m_aRegOut)
|
|
|
|
return false;
|
|
|
|
if (a.m_texMapIdx != b.m_texMapIdx)
|
|
|
|
return false;
|
|
|
|
if (a.m_texGenIdx != b.m_texGenIdx)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
for (unsigned i=0 ; i<m_kcolorCount ; ++i)
|
|
|
|
{
|
|
|
|
const Color& a = m_kcolors[i];
|
|
|
|
const Color& b = other.m_kcolors[i];
|
|
|
|
if (a.num != b.num)
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
bool operator!=(const GX& other) const
|
|
|
|
{
|
|
|
|
return !(*this == other);
|
|
|
|
}
|
|
|
|
|
2015-10-14 02:16:21 +00:00
|
|
|
void reset(const IR& ir, Diagnostics& diag);
|
2015-10-10 06:59:40 +00:00
|
|
|
|
|
|
|
private:
|
2015-10-14 02:16:21 +00:00
|
|
|
struct TraceResult
|
|
|
|
{
|
|
|
|
enum
|
|
|
|
{
|
|
|
|
TraceInvalid,
|
|
|
|
TraceTEVStage,
|
|
|
|
TraceTEVColorArg,
|
|
|
|
TraceTEVAlphaArg,
|
|
|
|
TraceTEVKColorSel,
|
|
|
|
TraceTEVKAlphaSel
|
|
|
|
} type;
|
|
|
|
union
|
|
|
|
{
|
|
|
|
GX::TEVStage* tevStage;
|
|
|
|
GX::TevColorArg tevColorArg;
|
|
|
|
GX::TevAlphaArg tevAlphaArg;
|
|
|
|
GX::TevKColorSel tevKColorSel;
|
|
|
|
GX::TevKAlphaSel tevKAlphaSel;
|
|
|
|
};
|
|
|
|
TraceResult() : type(TraceInvalid) {}
|
|
|
|
TraceResult(GX::TEVStage* stage) : type(TraceTEVStage), tevStage(stage) {}
|
|
|
|
TraceResult(GX::TevColorArg arg) : type(TraceTEVColorArg), tevColorArg(arg) {}
|
|
|
|
TraceResult(GX::TevAlphaArg arg) : type(TraceTEVAlphaArg), tevAlphaArg(arg) {}
|
|
|
|
TraceResult(GX::TevKColorSel arg) : type(TraceTEVKColorSel), tevKColorSel(arg) {}
|
|
|
|
TraceResult(GX::TevKAlphaSel arg) : type(TraceTEVKAlphaSel), tevKAlphaSel(arg) {}
|
|
|
|
};
|
|
|
|
|
|
|
|
unsigned addKColor(Diagnostics& diag, const SourceLocation& loc, const Color& color);
|
|
|
|
unsigned addKAlpha(Diagnostics& diag, const SourceLocation& loc, float alpha);
|
|
|
|
unsigned addTexCoordGen(Diagnostics& diag, const SourceLocation& loc,
|
|
|
|
TexGenSrc src, TexMtx mtx);
|
|
|
|
TEVStage& addTEVStage(Diagnostics& diag, const SourceLocation& loc);
|
|
|
|
TraceResult RecursiveTraceColor(const IR& ir, Diagnostics& diag,
|
2015-10-16 08:02:59 +00:00
|
|
|
const IR::Instruction& inst,
|
|
|
|
bool swizzleAlpha=false);
|
2015-10-14 02:16:21 +00:00
|
|
|
TraceResult RecursiveTraceAlpha(const IR& ir, Diagnostics& diag,
|
|
|
|
const IR::Instruction& inst);
|
2015-10-16 00:34:47 +00:00
|
|
|
unsigned RecursiveTraceTexGen(const IR& ir, Diagnostics& diag,
|
|
|
|
const IR::Instruction& inst,
|
|
|
|
TexMtx mtx);
|
2015-10-10 06:59:40 +00:00
|
|
|
};
|
|
|
|
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
#endif // HECLBACKEND_GX_HPP
|