2016-03-04 23:02:44 +00:00
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#include "hecl/Backend/GX.hpp"
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2015-10-10 06:59:40 +00:00
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2018-12-08 05:18:42 +00:00
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namespace hecl::Backend {
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2015-10-10 06:59:40 +00:00
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2018-02-22 07:23:15 +00:00
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template <>
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2018-12-08 05:18:42 +00:00
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void GX::Color::Enumerate<athena::io::DNA<athena::Big>::Read>(typename Read::StreamT& reader) {
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reader.readUBytesToBuf(&num, 4);
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}
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2018-02-22 07:23:15 +00:00
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template <>
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2018-12-08 05:18:42 +00:00
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void GX::Color::Enumerate<athena::io::DNA<athena::Big>::Write>(typename Write::StreamT& writer) {
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writer.writeUBytes(reinterpret_cast<const atUint8*>(&num), 4);
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}
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2018-02-22 07:23:15 +00:00
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template <>
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2018-12-08 05:18:42 +00:00
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void GX::Color::Enumerate<athena::io::DNA<athena::Big>::BinarySize>(typename BinarySize::StreamT& s) {
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s += 4;
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2015-10-10 06:59:40 +00:00
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}
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2018-12-08 05:18:42 +00:00
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unsigned GX::addKColor(Diagnostics& diag, const SourceLocation& loc, const Color& color) {
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for (unsigned i = 0; i < m_kcolorCount; ++i)
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if (m_kcolors[i] == color)
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return i;
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if (m_kcolorCount >= 4)
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diag.reportBackendErr(loc, "GX KColor overflow");
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m_kcolors[m_kcolorCount] = color;
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m_kcolors[m_kcolorCount].color[3] = 0;
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return m_kcolorCount++;
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2015-10-14 02:16:21 +00:00
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}
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2018-12-08 05:18:42 +00:00
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unsigned GX::addKAlpha(Diagnostics& diag, const SourceLocation& loc, float alpha) {
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uint8_t ai = uint8_t(std::min(std::max(alpha * 255.f, 0.f), 255.f));
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for (unsigned i = 0; i < m_kcolorCount; ++i) {
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if (m_kcolors[i].color[3] == ai)
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return i;
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else if (m_kcolors[i].color[3] == 0) {
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m_kcolors[i].color[3] = ai;
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return i;
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2015-10-14 02:16:21 +00:00
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}
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2018-12-08 05:18:42 +00:00
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}
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if (m_kcolorCount >= 4)
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diag.reportBackendErr(loc, "GX KColor overflow");
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m_kcolors[m_kcolorCount] = ai;
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return m_kcolorCount++;
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2015-10-14 02:16:21 +00:00
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}
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2018-12-08 05:18:42 +00:00
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unsigned GX::addTexCoordGen(Diagnostics& diag, const SourceLocation& loc, TexGenSrc src, TexMtx mtx, bool norm,
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PTTexMtx pmtx) {
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for (unsigned i = 0; i < m_tcgCount; ++i) {
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TexCoordGen& tcg = m_tcgs[i];
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if (tcg.m_src == src && tcg.m_mtx == mtx && tcg.m_norm == norm && tcg.m_pmtx == pmtx)
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return i;
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}
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if (m_tcgCount >= 8)
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diag.reportBackendErr(loc, "GX TexCoordGen overflow");
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GX::TexCoordGen& newTcg = m_tcgs[m_tcgCount];
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newTcg.m_src = src;
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newTcg.m_mtx = mtx;
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newTcg.m_norm = norm;
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newTcg.m_pmtx = pmtx;
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return m_tcgCount++;
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2015-10-14 02:16:21 +00:00
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}
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2018-12-08 05:18:42 +00:00
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GX::TEVStage& GX::addTEVStage(Diagnostics& diag, const SourceLocation& loc) {
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if (m_tevCount >= 16)
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diag.reportBackendErr(loc, "GX TEV stage overflow");
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GX::TEVStage& newTEV = m_tevs[m_tevCount];
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newTEV.m_loc = loc;
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if (m_tevCount) {
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newTEV.m_prev = &m_tevs[m_tevCount - 1];
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newTEV.m_prev->m_next = &newTEV;
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}
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++m_tevCount;
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return newTEV;
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}
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GX::TEVStage& GX::addAlphaTEVStage(Diagnostics& diag, const SourceLocation& loc) {
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++m_alphaTraceStage;
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while (m_tevCount < m_alphaTraceStage + 1) {
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TEVStage& stage = addTEVStage(diag, loc);
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stage.m_color[3] = CC_CPREV;
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stage.m_alpha[3] = CA_APREV;
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}
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return m_tevs[m_alphaTraceStage];
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2018-04-02 04:26:21 +00:00
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}
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2016-07-19 03:41:55 +00:00
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unsigned GX::RecursiveTraceTexGen(const IR& ir, Diagnostics& diag, const IR::Instruction& inst, TexMtx mtx,
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2018-12-08 05:18:42 +00:00
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bool normalize, PTTexMtx pmtx) {
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if (inst.m_op != IR::OpType::Call)
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diag.reportBackendErr(inst.m_loc, "TexCoordGen resolution requires function");
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const std::string& tcgName = inst.m_call.m_name;
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if (!tcgName.compare("UV")) {
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if (inst.getChildCount() < 1)
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diag.reportBackendErr(inst.m_loc, "TexCoordGen UV(layerIdx) requires one argument");
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const IR::Instruction& idxInst = inst.getChildInst(ir, 0);
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auto& idxImm = idxInst.getImmVec();
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return addTexCoordGen(diag, inst.m_loc, TexGenSrc(TG_TEX0 + unsigned(idxImm.simd[0])), mtx, normalize, pmtx);
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} else if (!tcgName.compare("Normal"))
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return addTexCoordGen(diag, inst.m_loc, TG_NRM, mtx, normalize, pmtx);
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else if (!tcgName.compare("View"))
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return addTexCoordGen(diag, inst.m_loc, TG_POS, mtx, normalize, pmtx);
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/* Otherwise treat as game-specific function */
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const IR::Instruction& tcgSrcInst = inst.getChildInst(ir, 0);
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bool doNorm = normalize || tcgName.back() == 'N';
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unsigned idx = RecursiveTraceTexGen(ir, diag, tcgSrcInst, TexMtx(TEXMTX0 + m_texMtxCount * 3), doNorm,
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doNorm ? PTTexMtx(PTTEXMTX0 + m_texMtxCount * 3) : PTIDENTITY);
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GX::TexCoordGen& tcg = m_tcgs[idx];
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m_texMtxRefs[m_texMtxCount] = &tcg;
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++m_texMtxCount;
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tcg.m_gameFunction = tcgName;
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tcg.m_gameArgs.clear();
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for (int i = 1; i < inst.getChildCount(); ++i) {
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const IR::Instruction& ci = inst.getChildInst(ir, i);
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tcg.m_gameArgs.push_back(ci.getImmVec());
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}
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return idx;
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2015-10-14 02:16:21 +00:00
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}
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2015-10-16 08:02:59 +00:00
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GX::TraceResult GX::RecursiveTraceColor(const IR& ir, Diagnostics& diag, const IR::Instruction& inst,
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2018-12-08 05:18:42 +00:00
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bool swizzleAlpha) {
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switch (inst.m_op) {
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case IR::OpType::Call: {
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const std::string& name = inst.m_call.m_name;
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bool normalize = false;
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if (!name.compare("Texture") || (normalize = true && !name.compare("TextureN"))) {
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TEVStage& newStage = addTEVStage(diag, inst.m_loc);
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if (inst.getChildCount() < 2)
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diag.reportBackendErr(inst.m_loc, "Texture(map, texgen) requires 2 arguments");
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const IR::Instruction& mapInst = inst.getChildInst(ir, 0);
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auto& mapImm = mapInst.getImmVec();
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newStage.m_texMapIdx = unsigned(mapImm.simd[0]);
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newStage.m_color[0] = swizzleAlpha ? CC_TEXA : CC_TEXC;
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const IR::Instruction& tcgInst = inst.getChildInst(ir, 1);
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newStage.m_texGenIdx = RecursiveTraceTexGen(ir, diag, tcgInst, IDENTITY, normalize, PTIDENTITY);
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return TraceResult(&newStage);
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} else if (!name.compare("ColorReg")) {
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const IR::Instruction& idxInst = inst.getChildInst(ir, 0);
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unsigned idx = unsigned(idxInst.getImmVec().simd[0]);
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if (swizzleAlpha)
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m_aRegMask |= 1 << idx;
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else
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m_cRegMask |= 1 << idx;
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return TraceResult(TevColorArg((swizzleAlpha ? CC_A0 : CC_C0) + idx * 2));
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} else if (!name.compare("Lighting")) {
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return TraceResult(swizzleAlpha ? CC_RASA : CC_RASC);
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} else
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diag.reportBackendErr(inst.m_loc, "GX backend unable to interpret '%s'", name.c_str());
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break;
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}
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case IR::OpType::LoadImm: {
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const atVec4f& vec = inst.m_loadImm.m_immVec;
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if (vec.simd[0] == 0.f && vec.simd[1] == 0.f && vec.simd[2] == 0.f)
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return TraceResult(CC_ZERO);
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else if (vec.simd[0] == 1.f && vec.simd[1] == 1.f && vec.simd[2] == 1.f)
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return TraceResult(CC_ONE);
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unsigned idx = addKColor(diag, inst.m_loc, vec);
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return TraceResult(TevKColorSel(TEV_KCSEL_K0 + idx));
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}
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case IR::OpType::Arithmetic: {
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ArithmeticOp op = inst.m_arithmetic.m_op;
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const IR::Instruction& aInst = inst.getChildInst(ir, 0);
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const IR::Instruction& bInst = inst.getChildInst(ir, 1);
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TraceResult aTrace;
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TraceResult bTrace;
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if (aInst.m_op != IR::OpType::Arithmetic && bInst.m_op == IR::OpType::Arithmetic) {
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bTrace = RecursiveTraceColor(ir, diag, bInst);
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aTrace = RecursiveTraceColor(ir, diag, aInst);
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} else {
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aTrace = RecursiveTraceColor(ir, diag, aInst);
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bTrace = RecursiveTraceColor(ir, diag, bInst);
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2015-10-14 02:16:21 +00:00
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}
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2018-12-08 05:18:42 +00:00
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if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage &&
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getStageIdx(aTrace.tevStage) > getStageIdx(bTrace.tevStage))
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std::swap(aTrace, bTrace);
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TevKColorSel newKColor = TEV_KCSEL_1;
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if (aTrace.type == TraceResult::Type::TEVKColorSel && bTrace.type == TraceResult::Type::TEVKColorSel)
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diag.reportBackendErr(inst.m_loc, "unable to handle 2 KColors in one stage");
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else if (aTrace.type == TraceResult::Type::TEVKColorSel) {
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newKColor = aTrace.tevKColorSel;
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aTrace.type = TraceResult::Type::TEVColorArg;
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aTrace.tevColorArg = CC_KONST;
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} else if (bTrace.type == TraceResult::Type::TEVKColorSel) {
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newKColor = bTrace.tevKColorSel;
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bTrace.type = TraceResult::Type::TEVColorArg;
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bTrace.tevColorArg = CC_KONST;
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2015-10-14 02:16:21 +00:00
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}
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2015-10-11 05:55:53 +00:00
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2018-12-08 05:18:42 +00:00
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switch (op) {
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case ArithmeticOp::Add: {
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if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
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TEVStage* a = aTrace.tevStage;
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TEVStage* b = bTrace.tevStage;
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if (b->m_prev != a) {
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a->m_cRegOut = TEVLAZY;
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b->m_color[3] = CC_LAZY;
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b->m_lazyCInIdx = m_cRegLazy;
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a->m_lazyCOutIdx = m_cRegLazy++;
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} else if (b == &m_tevs[m_tevCount - 1] && a->m_texMapIdx == b->m_texMapIdx &&
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a->m_texGenIdx == b->m_texGenIdx && a->m_color[3] == CC_ZERO && b->m_color[0] != CC_ZERO) {
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a->m_color[3] = b->m_color[0];
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--m_tevCount;
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return TraceResult(a);
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} else
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b->m_color[3] = CC_CPREV;
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return TraceResult(b);
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} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVColorArg) {
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TEVStage* a = aTrace.tevStage;
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if (a->m_color[3] != CC_ZERO)
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diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for add combine");
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a->m_color[3] = bTrace.tevColorArg;
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a->m_kColor = newKColor;
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return TraceResult(a);
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} else if (aTrace.type == TraceResult::Type::TEVColorArg && bTrace.type == TraceResult::Type::TEVStage) {
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TEVStage* b = bTrace.tevStage;
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if (b->m_color[3] != CC_ZERO)
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diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for add combine");
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b->m_color[3] = aTrace.tevColorArg;
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b->m_kColor = newKColor;
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return TraceResult(b);
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} else if (aTrace.type == TraceResult::Type::TEVColorArg && bTrace.type == TraceResult::Type::TEVColorArg) {
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TEVStage& stage = addTEVStage(diag, inst.m_loc);
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stage.m_color[0] = aTrace.tevColorArg;
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stage.m_color[3] = bTrace.tevColorArg;
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stage.m_kColor = newKColor;
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return TraceResult(&stage);
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}
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break;
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2015-10-11 05:55:53 +00:00
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}
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2018-12-08 05:18:42 +00:00
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case ArithmeticOp::Subtract: {
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if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
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TEVStage* a = aTrace.tevStage;
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TEVStage* b = bTrace.tevStage;
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if (b->m_prev != a) {
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a->m_cRegOut = TEVLAZY;
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b->m_color[3] = CC_LAZY;
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b->m_lazyCInIdx = m_cRegLazy;
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a->m_lazyCOutIdx = m_cRegLazy++;
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} else
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b->m_color[3] = CC_CPREV;
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b->m_cop = TEV_SUB;
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return TraceResult(b);
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} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVColorArg) {
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TEVStage* a = aTrace.tevStage;
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if (a->m_color[3] != CC_ZERO)
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diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for subtract combine");
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a->m_color[3] = bTrace.tevColorArg;
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a->m_kColor = newKColor;
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a->m_cop = TEV_SUB;
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return TraceResult(a);
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} else if (aTrace.type == TraceResult::Type::TEVColorArg && bTrace.type == TraceResult::Type::TEVColorArg) {
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TEVStage& stage = addTEVStage(diag, inst.m_loc);
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stage.m_color[0] = aTrace.tevColorArg;
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stage.m_color[3] = bTrace.tevColorArg;
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stage.m_kColor = newKColor;
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stage.m_cop = TEV_SUB;
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return TraceResult(&stage);
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}
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break;
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}
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case ArithmeticOp::Multiply: {
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if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
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TEVStage* a = aTrace.tevStage;
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TEVStage* b = bTrace.tevStage;
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if (b->m_color[2] != CC_ZERO)
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diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
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if (b->m_prev != a) {
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a->m_cRegOut = TEVLAZY;
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b->m_color[2] = CC_LAZY;
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b->m_lazyCInIdx = m_cRegLazy;
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a->m_lazyCOutIdx = m_cRegLazy++;
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} else
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b->m_color[2] = CC_CPREV;
|
|
|
|
b->m_color[1] = b->m_color[0];
|
|
|
|
b->m_color[0] = CC_ZERO;
|
|
|
|
b->m_color[3] = CC_ZERO;
|
|
|
|
return TraceResult(b);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVColorArg && bTrace.type == TraceResult::Type::TEVColorArg) {
|
|
|
|
TEVStage& stage = addTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_color[1] = aTrace.tevColorArg;
|
|
|
|
stage.m_color[2] = bTrace.tevColorArg;
|
|
|
|
stage.m_kColor = newKColor;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVColorArg) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
if (a->m_color[1] != CC_ZERO) {
|
|
|
|
if (a->m_cRegOut != TEVPREV)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
|
|
|
|
TEVStage& stage = addTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_color[1] = CC_CPREV;
|
|
|
|
stage.m_color[2] = bTrace.tevColorArg;
|
|
|
|
stage.m_kColor = newKColor;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
}
|
|
|
|
a->m_color[1] = a->m_color[0];
|
|
|
|
a->m_color[0] = CC_ZERO;
|
|
|
|
a->m_color[2] = bTrace.tevColorArg;
|
|
|
|
a->m_kColor = newKColor;
|
|
|
|
return TraceResult(a);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVColorArg && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_color[1] != CC_ZERO) {
|
|
|
|
if (b->m_cRegOut != TEVPREV)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
|
|
|
|
TEVStage& stage = addTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_color[1] = aTrace.tevColorArg;
|
|
|
|
stage.m_color[2] = CC_CPREV;
|
|
|
|
stage.m_kColor = newKColor;
|
|
|
|
return TraceResult(&stage);
|
2015-10-14 23:06:47 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
b->m_color[1] = b->m_color[0];
|
|
|
|
b->m_color[0] = CC_ZERO;
|
|
|
|
b->m_color[2] = bTrace.tevColorArg;
|
|
|
|
b->m_kColor = newKColor;
|
|
|
|
return TraceResult(b);
|
|
|
|
}
|
|
|
|
break;
|
2015-10-14 23:06:47 +00:00
|
|
|
}
|
2015-10-11 05:55:53 +00:00
|
|
|
default:
|
2018-12-08 05:18:42 +00:00
|
|
|
diag.reportBackendErr(inst.m_loc, "invalid arithmetic op");
|
2015-10-11 05:55:53 +00:00
|
|
|
}
|
2015-10-14 02:16:21 +00:00
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to convert arithmetic to TEV stage");
|
2019-02-18 05:44:46 +00:00
|
|
|
break;
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
case IR::OpType::Swizzle: {
|
|
|
|
if (inst.m_swizzle.m_idxs[0] == 3 && inst.m_swizzle.m_idxs[1] == 3 && inst.m_swizzle.m_idxs[2] == 3 &&
|
|
|
|
inst.m_swizzle.m_idxs[3] == -1) {
|
|
|
|
const IR::Instruction& cInst = inst.getChildInst(ir, 0);
|
|
|
|
if (cInst.m_op != IR::OpType::Call)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "only functions accepted for alpha swizzle");
|
|
|
|
return RecursiveTraceColor(ir, diag, cInst, true);
|
|
|
|
} else
|
|
|
|
diag.reportBackendErr(inst.m_loc, "only alpha extract may be performed with swizzle operation");
|
2019-02-18 05:44:46 +00:00
|
|
|
break;
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
default:
|
|
|
|
diag.reportBackendErr(inst.m_loc, "invalid color op");
|
|
|
|
}
|
|
|
|
|
|
|
|
return TraceResult();
|
2015-10-11 05:55:53 +00:00
|
|
|
}
|
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
GX::TraceResult GX::RecursiveTraceAlpha(const IR& ir, Diagnostics& diag, const IR::Instruction& inst) {
|
|
|
|
switch (inst.m_op) {
|
|
|
|
case IR::OpType::Call: {
|
|
|
|
const std::string& name = inst.m_call.m_name;
|
|
|
|
bool normalize = false;
|
|
|
|
if (!name.compare("Texture") || (normalize = true && !name.compare("TextureN"))) {
|
|
|
|
if (inst.getChildCount() < 2)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "Texture(map, texgen) requires 2 arguments");
|
|
|
|
|
|
|
|
const IR::Instruction& mapInst = inst.getChildInst(ir, 0);
|
|
|
|
const atVec4f& mapImm = mapInst.getImmVec();
|
|
|
|
unsigned mapIdx = unsigned(mapImm.simd[0]);
|
|
|
|
|
|
|
|
int foundStage = -1;
|
|
|
|
for (int i = m_alphaTraceStage + 1; i < int(m_tevCount); ++i) {
|
|
|
|
TEVStage& testStage = m_tevs[i];
|
|
|
|
if (testStage.m_texMapIdx == mapIdx) {
|
|
|
|
foundStage = i;
|
|
|
|
break;
|
2015-10-14 02:16:21 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (foundStage >= 0) {
|
|
|
|
m_alphaTraceStage = foundStage;
|
|
|
|
TEVStage& stage = m_tevs[foundStage];
|
|
|
|
stage.m_alpha[0] = CA_TEXA;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
}
|
|
|
|
|
|
|
|
TEVStage& newStage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
newStage.m_color[3] = CC_CPREV;
|
|
|
|
|
|
|
|
newStage.m_texMapIdx = mapIdx;
|
|
|
|
newStage.m_alpha[0] = CA_TEXA;
|
|
|
|
|
|
|
|
const IR::Instruction& tcgInst = inst.getChildInst(ir, 1);
|
|
|
|
newStage.m_texGenIdx = RecursiveTraceTexGen(ir, diag, tcgInst, IDENTITY, normalize, PTIDENTITY);
|
|
|
|
|
|
|
|
return TraceResult(&newStage);
|
|
|
|
} else if (!name.compare("ColorReg")) {
|
|
|
|
const IR::Instruction& idxInst = inst.getChildInst(ir, 0);
|
|
|
|
unsigned idx = unsigned(idxInst.getImmVec().simd[0]);
|
|
|
|
m_aRegMask |= 1 << idx;
|
|
|
|
return TraceResult(TevAlphaArg(CA_A0 + idx));
|
|
|
|
} else if (!name.compare("Lighting")) {
|
|
|
|
return TraceResult(CA_RASA);
|
|
|
|
} else
|
|
|
|
diag.reportBackendErr(inst.m_loc, "GX backend unable to interpret '%s'", name.c_str());
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case IR::OpType::LoadImm: {
|
|
|
|
const atVec4f& vec = inst.m_loadImm.m_immVec;
|
|
|
|
if (vec.simd[0] == 0.f)
|
|
|
|
return TraceResult(CA_ZERO);
|
|
|
|
else if (vec.simd[0] == 1.f)
|
|
|
|
return TraceResult(TEV_KASEL_1);
|
|
|
|
unsigned idx = addKAlpha(diag, inst.m_loc, vec.simd[0]);
|
|
|
|
return TraceResult(TevKAlphaSel(TEV_KASEL_K0_A + idx));
|
|
|
|
}
|
|
|
|
case IR::OpType::Arithmetic: {
|
|
|
|
ArithmeticOp op = inst.m_arithmetic.m_op;
|
|
|
|
const IR::Instruction& aInst = inst.getChildInst(ir, 0);
|
|
|
|
const IR::Instruction& bInst = inst.getChildInst(ir, 1);
|
|
|
|
TraceResult aTrace;
|
|
|
|
TraceResult bTrace;
|
|
|
|
if (aInst.m_op != IR::OpType::Arithmetic && bInst.m_op == IR::OpType::Arithmetic) {
|
|
|
|
bTrace = RecursiveTraceAlpha(ir, diag, bInst);
|
|
|
|
aTrace = RecursiveTraceAlpha(ir, diag, aInst);
|
|
|
|
} else {
|
|
|
|
aTrace = RecursiveTraceAlpha(ir, diag, aInst);
|
|
|
|
bTrace = RecursiveTraceAlpha(ir, diag, bInst);
|
2015-10-14 02:16:21 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage &&
|
|
|
|
getStageIdx(aTrace.tevStage) > getStageIdx(bTrace.tevStage))
|
|
|
|
std::swap(aTrace, bTrace);
|
|
|
|
|
|
|
|
TevKAlphaSel newKAlpha = TEV_KASEL_1;
|
|
|
|
if (aTrace.type == TraceResult::Type::TEVKAlphaSel && bTrace.type == TraceResult::Type::TEVKAlphaSel)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to handle 2 KAlphas in one stage");
|
|
|
|
else if (aTrace.type == TraceResult::Type::TEVKAlphaSel) {
|
|
|
|
newKAlpha = aTrace.tevKAlphaSel;
|
|
|
|
aTrace.type = TraceResult::Type::TEVAlphaArg;
|
|
|
|
aTrace.tevAlphaArg = CA_KONST;
|
|
|
|
} else if (bTrace.type == TraceResult::Type::TEVKAlphaSel) {
|
|
|
|
newKAlpha = bTrace.tevKAlphaSel;
|
|
|
|
bTrace.type = TraceResult::Type::TEVAlphaArg;
|
|
|
|
bTrace.tevAlphaArg = CA_KONST;
|
2015-10-14 02:16:21 +00:00
|
|
|
}
|
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
switch (op) {
|
|
|
|
case ArithmeticOp::Add: {
|
|
|
|
if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_prev != a) {
|
|
|
|
a->m_aRegOut = TEVLAZY;
|
|
|
|
b->m_alpha[3] = CA_LAZY;
|
|
|
|
if (a->m_lazyAOutIdx != -1)
|
|
|
|
b->m_lazyAInIdx = a->m_lazyAOutIdx;
|
|
|
|
else {
|
|
|
|
b->m_lazyAInIdx = m_aRegLazy;
|
|
|
|
a->m_lazyAOutIdx = m_aRegLazy++;
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
b->m_alpha[3] = CA_APREV;
|
|
|
|
return TraceResult(b);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
if (a->m_alpha[3] != CA_ZERO)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for add combine");
|
|
|
|
a->m_alpha[3] = bTrace.tevAlphaArg;
|
|
|
|
a->m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(a);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVAlphaArg && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_alpha[3] != CA_ZERO)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for add combine");
|
|
|
|
b->m_alpha[3] = aTrace.tevAlphaArg;
|
|
|
|
b->m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(b);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVAlphaArg && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_alpha[0] = aTrace.tevAlphaArg;
|
|
|
|
stage.m_alpha[3] = bTrace.tevAlphaArg;
|
|
|
|
stage.m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
}
|
|
|
|
break;
|
2015-10-14 02:16:21 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
case ArithmeticOp::Subtract: {
|
|
|
|
if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_aop != TEV_SUB)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to integrate alpha subtraction into stage chain");
|
|
|
|
if (b->m_prev != a) {
|
|
|
|
a->m_aRegOut = TEVLAZY;
|
|
|
|
b->m_alpha[3] = CA_LAZY;
|
|
|
|
if (a->m_lazyAOutIdx != -1)
|
|
|
|
b->m_lazyAInIdx = a->m_lazyAOutIdx;
|
|
|
|
else {
|
|
|
|
b->m_lazyAInIdx = m_aRegLazy;
|
|
|
|
a->m_lazyAOutIdx = m_aRegLazy++;
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
b->m_alpha[3] = CA_APREV;
|
|
|
|
return TraceResult(b);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
if (a->m_aop != TEV_SUB)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to integrate alpha subtraction into stage chain");
|
|
|
|
if (a->m_alpha[3] != CA_ZERO)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for add combine");
|
|
|
|
a->m_alpha[3] = bTrace.tevAlphaArg;
|
|
|
|
a->m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(a);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVAlphaArg && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_alpha[0] = aTrace.tevAlphaArg;
|
|
|
|
stage.m_alpha[3] = bTrace.tevAlphaArg;
|
|
|
|
stage.m_kAlpha = newKAlpha;
|
|
|
|
stage.m_aop = TEV_SUB;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case ArithmeticOp::Multiply: {
|
|
|
|
if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_alpha[2] != CA_ZERO)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
|
|
|
|
if (b->m_prev != a) {
|
|
|
|
a->m_aRegOut = TEVLAZY;
|
|
|
|
b->m_alpha[2] = CA_LAZY;
|
|
|
|
b->m_lazyAInIdx = m_aRegLazy;
|
|
|
|
a->m_lazyAOutIdx = m_aRegLazy++;
|
|
|
|
} else
|
|
|
|
b->m_alpha[2] = CA_APREV;
|
|
|
|
b->m_alpha[1] = b->m_alpha[0];
|
|
|
|
b->m_alpha[0] = CA_ZERO;
|
|
|
|
b->m_alpha[3] = CA_ZERO;
|
|
|
|
return TraceResult(b);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVAlphaArg && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_color[3] = CC_CPREV;
|
|
|
|
stage.m_alpha[1] = aTrace.tevAlphaArg;
|
|
|
|
stage.m_alpha[2] = bTrace.tevAlphaArg;
|
|
|
|
stage.m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVStage && bTrace.type == TraceResult::Type::TEVAlphaArg) {
|
|
|
|
TEVStage* a = aTrace.tevStage;
|
|
|
|
if (a->m_alpha[1] != CA_ZERO) {
|
|
|
|
if (a->m_aRegOut != TEVPREV)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_alpha[1] = CA_APREV;
|
|
|
|
stage.m_alpha[2] = bTrace.tevAlphaArg;
|
|
|
|
stage.m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(&stage);
|
|
|
|
}
|
|
|
|
a->m_alpha[1] = a->m_alpha[0];
|
|
|
|
a->m_alpha[0] = CA_ZERO;
|
|
|
|
a->m_alpha[2] = bTrace.tevAlphaArg;
|
|
|
|
a->m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(a);
|
|
|
|
} else if (aTrace.type == TraceResult::Type::TEVAlphaArg && bTrace.type == TraceResult::Type::TEVStage) {
|
|
|
|
TEVStage* b = bTrace.tevStage;
|
|
|
|
if (b->m_alpha[1] != CA_ZERO) {
|
|
|
|
if (b->m_aRegOut != TEVPREV)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to modify TEV stage for multiply combine");
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, inst.m_loc);
|
|
|
|
stage.m_alpha[1] = aTrace.tevAlphaArg;
|
|
|
|
stage.m_alpha[2] = CA_APREV;
|
|
|
|
stage.m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(&stage);
|
2015-10-16 08:02:59 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
b->m_alpha[1] = b->m_alpha[0];
|
|
|
|
b->m_alpha[0] = CA_ZERO;
|
|
|
|
b->m_alpha[2] = bTrace.tevAlphaArg;
|
|
|
|
b->m_kAlpha = newKAlpha;
|
|
|
|
return TraceResult(b);
|
|
|
|
}
|
|
|
|
break;
|
2015-10-16 08:02:59 +00:00
|
|
|
}
|
2015-10-14 02:16:21 +00:00
|
|
|
default:
|
2018-12-08 05:18:42 +00:00
|
|
|
diag.reportBackendErr(inst.m_loc, "invalid arithmetic op");
|
2015-10-14 02:16:21 +00:00
|
|
|
}
|
2015-10-11 05:55:53 +00:00
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
diag.reportBackendErr(inst.m_loc, "unable to convert arithmetic to TEV stage");
|
2019-02-18 05:44:46 +00:00
|
|
|
break;
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
case IR::OpType::Swizzle: {
|
|
|
|
if (inst.m_swizzle.m_idxs[0] == 3 && inst.m_swizzle.m_idxs[1] == 3 && inst.m_swizzle.m_idxs[2] == 3 &&
|
|
|
|
inst.m_swizzle.m_idxs[3] == -1) {
|
|
|
|
const IR::Instruction& cInst = inst.getChildInst(ir, 0);
|
|
|
|
if (cInst.m_op != IR::OpType::Call)
|
|
|
|
diag.reportBackendErr(inst.m_loc, "only functions accepted for alpha swizzle");
|
|
|
|
return RecursiveTraceAlpha(ir, diag, cInst);
|
|
|
|
} else
|
|
|
|
diag.reportBackendErr(inst.m_loc, "only alpha extract may be performed with swizzle operation");
|
2019-02-18 05:44:46 +00:00
|
|
|
break;
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
default:
|
|
|
|
diag.reportBackendErr(inst.m_loc, "invalid alpha op");
|
|
|
|
}
|
|
|
|
|
|
|
|
return TraceResult();
|
2015-10-11 05:55:53 +00:00
|
|
|
}
|
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
void GX::reset(const IR& ir, Diagnostics& diag) {
|
|
|
|
diag.setBackend("GX");
|
|
|
|
|
|
|
|
m_tevCount = 0;
|
|
|
|
m_tcgCount = 0;
|
|
|
|
m_texMtxCount = 0;
|
|
|
|
m_kcolorCount = 0;
|
|
|
|
m_cRegMask = 0;
|
|
|
|
m_cRegLazy = 0;
|
|
|
|
m_aRegMask = 0;
|
|
|
|
m_aRegLazy = 0;
|
|
|
|
m_alphaTraceStage = -1;
|
|
|
|
|
|
|
|
/* Final instruction is the root call by hecl convention */
|
|
|
|
const IR::Instruction& rootCall = ir.m_instructions.back();
|
|
|
|
if (!rootCall.m_call.m_name.compare("HECLOpaque")) {
|
|
|
|
m_blendSrc = BL_ONE;
|
|
|
|
m_blendDst = BL_ZERO;
|
|
|
|
} else if (!rootCall.m_call.m_name.compare("HECLAlpha")) {
|
|
|
|
m_blendSrc = BL_SRCALPHA;
|
|
|
|
m_blendDst = BL_INVSRCALPHA;
|
|
|
|
} else if (!rootCall.m_call.m_name.compare("HECLAdditive")) {
|
|
|
|
m_blendSrc = BL_SRCALPHA;
|
|
|
|
m_blendDst = BL_ONE;
|
|
|
|
} else {
|
|
|
|
diag.reportBackendErr(rootCall.m_loc, "GX backend doesn't handle '%s' root", rootCall.m_call.m_name.c_str());
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Follow Color Chain */
|
|
|
|
const IR::Instruction& colorRoot = ir.m_instructions.at(rootCall.m_call.m_argInstIdxs.at(0));
|
|
|
|
TraceResult result = RecursiveTraceColor(ir, diag, colorRoot);
|
|
|
|
switch (result.type) {
|
|
|
|
case TraceResult::Type::TEVColorArg: {
|
|
|
|
TEVStage& stage = addTEVStage(diag, colorRoot.m_loc);
|
|
|
|
stage.m_color[3] = result.tevColorArg;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
case TraceResult::Type::TEVKColorSel: {
|
|
|
|
TEVStage& stage = addTEVStage(diag, colorRoot.m_loc);
|
|
|
|
stage.m_color[3] = CC_KONST;
|
|
|
|
stage.m_kColor = result.tevKColorSel;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Follow Alpha Chain */
|
|
|
|
if (rootCall.m_call.m_argInstIdxs.size() > 1) {
|
|
|
|
const IR::Instruction& alphaRoot = ir.m_instructions.at(rootCall.m_call.m_argInstIdxs.at(1));
|
|
|
|
TraceResult result = RecursiveTraceAlpha(ir, diag, alphaRoot);
|
|
|
|
switch (result.type) {
|
|
|
|
case TraceResult::Type::TEVAlphaArg: {
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, alphaRoot.m_loc);
|
|
|
|
stage.m_alpha[3] = result.tevAlphaArg;
|
|
|
|
break;
|
2015-10-10 06:59:40 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
case TraceResult::Type::TEVKAlphaSel: {
|
|
|
|
TEVStage& stage = addAlphaTEVStage(diag, alphaRoot.m_loc);
|
|
|
|
stage.m_alpha[3] = CA_KONST;
|
|
|
|
stage.m_kAlpha = result.tevKAlphaSel;
|
|
|
|
break;
|
2015-10-10 06:59:40 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
default:
|
|
|
|
break;
|
2018-04-02 04:26:21 +00:00
|
|
|
}
|
2015-10-11 05:55:53 +00:00
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
/* Ensure Alpha reaches end of chain */
|
|
|
|
if (m_alphaTraceStage >= 0)
|
|
|
|
for (unsigned i = m_alphaTraceStage + 1; i < m_tevCount; ++i)
|
|
|
|
m_tevs[i].m_alpha[3] = CA_APREV;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Resolve lazy color/alpha regs */
|
|
|
|
if (m_cRegLazy) {
|
|
|
|
for (int i = 0; i < int(m_tevCount); ++i) {
|
|
|
|
TEVStage& stage = m_tevs[i];
|
|
|
|
if (stage.m_cRegOut == TEVLAZY) {
|
|
|
|
int picked = pickCLazy(diag, stage.m_loc, i);
|
|
|
|
stage.m_cRegOut = TevRegID(TEVREG0 + picked);
|
|
|
|
for (int j = i + 1; j < int(m_tevCount); ++j) {
|
|
|
|
TEVStage& nstage = m_tevs[j];
|
|
|
|
if (nstage.m_lazyCInIdx == stage.m_lazyCOutIdx)
|
|
|
|
for (int c = 0; c < 4; ++c)
|
|
|
|
if (nstage.m_color[c] == CC_LAZY)
|
|
|
|
nstage.m_color[c] = TevColorArg(CC_C0 + picked * 2);
|
2018-04-02 04:26:21 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (stage.m_aRegOut == TEVLAZY) {
|
|
|
|
int picked = pickALazy(diag, stage.m_loc, i);
|
|
|
|
stage.m_aRegOut = TevRegID(TEVREG0 + picked);
|
|
|
|
for (int j = i + 1; j < int(m_tevCount); ++j) {
|
|
|
|
TEVStage& nstage = m_tevs[j];
|
|
|
|
if (nstage.m_lazyAInIdx == stage.m_lazyAOutIdx)
|
|
|
|
for (int c = 0; c < 4; ++c)
|
|
|
|
if (nstage.m_alpha[c] == CA_LAZY)
|
|
|
|
nstage.m_alpha[c] = TevAlphaArg(CA_A0 + picked);
|
2015-10-16 00:34:47 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
2015-10-16 00:34:47 +00:00
|
|
|
}
|
2018-12-08 05:18:42 +00:00
|
|
|
}
|
2015-10-10 06:59:40 +00:00
|
|
|
}
|
|
|
|
|
2018-12-08 05:18:42 +00:00
|
|
|
} // namespace hecl::Backend
|