mirror of https://github.com/AxioDL/metaforce.git
432 lines
11 KiB
C++
432 lines
11 KiB
C++
#include "ELSC.hpp"
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namespace DataSpec
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{
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namespace DNAParticle
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{
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template <class IDType>
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void ELSM<IDType>::read(athena::io::YAMLDocReader& r)
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{
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for (const auto& elem : r.getCurNode()->m_mapChildren)
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{
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if (elem.first.size() < 4)
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{
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LogModule.report(logvisor::Warning, "short FourCC in element '%s'", elem.first.c_str());
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continue;
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}
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switch(*reinterpret_cast<const uint32_t*>(elem.first.data()))
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{
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case SBIG('LIFE'):
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x0_LIFE.read(r);
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break;
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case SBIG('SLIF'):
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x4_SLIF.read(r);
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break;
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case SBIG('GRAT'):
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x8_GRAT.read(r);
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break;
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case SBIG('SCNT'):
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xc_SCNT.read(r);
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break;
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case SBIG('SSEG'):
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x10_SSEG.read(r);
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break;
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case SBIG('COLR'):
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x14_COLR.read(r);
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break;
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case SBIG('IEMT'):
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x18_IEMT.read(r);
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break;
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case SBIG('FEMT'):
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x1c_FEMT.read(r);
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break;
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case SBIG('AMPL'):
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x20_AMPL.read(r);
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break;
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case SBIG('AMPD'):
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x24_AMPD.read(r);
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break;
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case SBIG('LWD1'):
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x28_LWD1.read(r);
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break;
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case SBIG('LWD2'):
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x2c_LWD2.read(r);
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break;
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case SBIG('LWD3'):
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x30_LWD3.read(r);
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break;
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case SBIG('LCL1'):
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x34_LCL1.read(r);
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break;
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case SBIG('LCL2'):
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x38_LCL2.read(r);
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break;
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case SBIG('LCL3'):
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x3c_LCL3.read(r);
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break;
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case SBIG('SSWH'):
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x40_SSWH.read(r);
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break;
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case SBIG('GPSM'):
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x50_GPSM.read(r);
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break;
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case SBIG('EPSM'):
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x60_EPSM.read(r);
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break;
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case SBIG('ZERY'):
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x70_ZERY.read(r);
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break;
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}
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}
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}
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template <class IDType>
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void ELSM<IDType>::write(athena::io::YAMLDocWriter& w) const
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{
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if (x0_LIFE)
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if (auto rec = w.enterSubRecord("LIFE"))
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x0_LIFE.write(w);
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if (x4_SLIF)
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if (auto rec = w.enterSubRecord("SLIF"))
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x4_SLIF.write(w);
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if (x8_GRAT)
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if (auto rec = w.enterSubRecord("GRAT"))
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x8_GRAT.write(w);
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if (xc_SCNT)
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if (auto rec = w.enterSubRecord("SCNT"))
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xc_SCNT.write(w);
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if (x10_SSEG)
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if (auto rec = w.enterSubRecord("SSEG"))
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x10_SSEG.write(w);
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if (x14_COLR)
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if (auto rec = w.enterSubRecord("COLR"))
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x14_COLR.write(w);
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if (x18_IEMT)
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if (auto rec = w.enterSubRecord("IEMT"))
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x18_IEMT.write(w);
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if (x1c_FEMT)
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if (auto rec = w.enterSubRecord("FEMT"))
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x1c_FEMT.write(w);
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if (x20_AMPL)
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if (auto rec = w.enterSubRecord("AMPL"))
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x20_AMPL.write(w);
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if (x24_AMPD)
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if (auto rec = w.enterSubRecord("AMPD"))
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x24_AMPD.write(w);
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if (x28_LWD1)
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if (auto rec = w.enterSubRecord("LWD1"))
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x28_LWD1.write(w);
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if (x2c_LWD2)
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if (auto rec = w.enterSubRecord("LWD2"))
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x2c_LWD2.write(w);
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if (x30_LWD3)
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if (auto rec = w.enterSubRecord("LWD3"))
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x30_LWD3.write(w);
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if (x34_LCL1)
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if (auto rec = w.enterSubRecord("LCL1"))
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x34_LCL1.write(w);
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if (x38_LCL2)
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if (auto rec = w.enterSubRecord("LCL2"))
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x38_LCL2.write(w);
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if (x3c_LCL3)
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if (auto rec = w.enterSubRecord("LCL3"))
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x3c_LCL3.write(w);
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if (x40_SSWH)
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if (auto rec = w.enterSubRecord("SSWH"))
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x40_SSWH.write(w);
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if (x50_GPSM)
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if (auto rec = w.enterSubRecord("GPSM"))
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x50_GPSM.write(w);
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if (x60_EPSM)
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if (auto rec = w.enterSubRecord("EPSM"))
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x60_EPSM.write(w);
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if (x70_ZERY)
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if (auto rec = w.enterSubRecord("ZERY"))
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x70_ZERY.write(w);
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}
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template <class IDType>
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size_t ELSM<IDType>::binarySize(size_t __isz) const
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{
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__isz += 4;
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if (x0_LIFE)
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__isz = x0_LIFE.binarySize(__isz + 4);
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if (x4_SLIF)
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__isz = x4_SLIF.binarySize(__isz + 4);
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if (x8_GRAT)
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__isz = x8_GRAT.binarySize(__isz + 4);
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if (xc_SCNT)
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__isz = xc_SCNT.binarySize(__isz + 4);
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if (x10_SSEG)
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__isz = x10_SSEG.binarySize(__isz + 4);
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if (x14_COLR)
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__isz = x14_COLR.binarySize(__isz + 4);
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if (x18_IEMT)
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__isz = x18_IEMT.binarySize(__isz + 4);
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if (x1c_FEMT)
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__isz = x1c_FEMT.binarySize(__isz + 4);
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if (x20_AMPL)
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__isz = x20_AMPL.binarySize(__isz + 4);
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if (x24_AMPD)
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__isz = x24_AMPD.binarySize(__isz + 4);
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if (x28_LWD1)
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__isz = x28_LWD1.binarySize(__isz + 4);
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if (x2c_LWD2)
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__isz = x2c_LWD2.binarySize(__isz + 4);
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if (x30_LWD3)
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__isz = x30_LWD3.binarySize(__isz + 4);
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if (x34_LCL1)
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__isz = x34_LCL1.binarySize(__isz + 4);
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if (x38_LCL2)
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__isz = x38_LCL2.binarySize(__isz + 4);
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if (x3c_LCL3)
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__isz = x3c_LCL3.binarySize(__isz + 4);
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if (x40_SSWH)
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__isz = x40_SSWH.binarySize(__isz + 4);
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if (x50_GPSM)
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__isz = x50_GPSM.binarySize(__isz + 4);
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if (x60_EPSM)
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__isz = x60_EPSM.binarySize(__isz + 4);
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if (x70_ZERY)
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__isz = x70_ZERY.binarySize(__isz + 4);
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return __isz;
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}
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template <class IDType>
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void ELSM<IDType>::read(athena::io::IStreamReader& r)
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{
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uint32_t clsId;
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r.readBytesToBuf(&clsId, 4);
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if (clsId != SBIG('ELSM'))
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{
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LogModule.report(logvisor::Warning, "non ELSM provided to ELSM parser");
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return;
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}
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r.readBytesToBuf(&clsId, 4);
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while (clsId != SBIG('_END'))
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{
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switch(clsId)
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{
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case SBIG('LIFE'):
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x0_LIFE.read(r);
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break;
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case SBIG('SLIF'):
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x4_SLIF.read(r);
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break;
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case SBIG('GRAT'):
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x8_GRAT.read(r);
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break;
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case SBIG('SCNT'):
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xc_SCNT.read(r);
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break;
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case SBIG('SSEG'):
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x10_SSEG.read(r);
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break;
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case SBIG('COLR'):
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x14_COLR.read(r);
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break;
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case SBIG('IEMT'):
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x18_IEMT.read(r);
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break;
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case SBIG('FEMT'):
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x1c_FEMT.read(r);
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break;
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case SBIG('AMPL'):
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x20_AMPL.read(r);
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break;
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case SBIG('AMPD'):
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x24_AMPD.read(r);
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break;
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case SBIG('LWD1'):
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x28_LWD1.read(r);
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break;
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case SBIG('LWD2'):
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x2c_LWD2.read(r);
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break;
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case SBIG('LWD3'):
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x30_LWD3.read(r);
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break;
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case SBIG('LCL1'):
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x34_LCL1.read(r);
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break;
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case SBIG('LCL2'):
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x38_LCL2.read(r);
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break;
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case SBIG('LCL3'):
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x3c_LCL3.read(r);
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break;
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case SBIG('SSWH'):
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x40_SSWH.read(r);
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break;
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case SBIG('GPSM'):
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x50_GPSM.read(r);
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break;
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case SBIG('EPSM'):
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x60_EPSM.read(r);
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break;
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case SBIG('ZERY'):
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x70_ZERY.read(r);
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break;
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default:
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LogModule.report(logvisor::Fatal, "Unknown ELSM class %.4s @%" PRIi64, &clsId, r.position());
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break;
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}
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r.readBytesToBuf(&clsId, 4);
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}
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}
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template <class IDType>
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void ELSM<IDType>::write(athena::io::IStreamWriter& w) const
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{
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w.writeBytes((atInt8*)"ELSM", 4);
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if (x0_LIFE)
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{
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w.writeBytes((atInt8*)"LIFE", 4);
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x0_LIFE.write(w);
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}
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if (x4_SLIF)
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{
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w.writeBytes((atInt8*)"SLIF", 4);
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x4_SLIF.write(w);
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}
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if (x8_GRAT)
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{
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w.writeBytes((atInt8*)"GRAT", 4);
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x8_GRAT.write(w);
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}
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if (xc_SCNT)
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{
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w.writeBytes((atInt8*)"SCNT", 4);
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xc_SCNT.write(w);
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}
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if (x10_SSEG)
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{
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w.writeBytes((atInt8*)"SSEG", 4);
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x10_SSEG.write(w);
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}
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if (x14_COLR)
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{
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w.writeBytes((atInt8*)"COLR", 4);
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x14_COLR.write(w);
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}
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if (x18_IEMT)
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{
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w.writeBytes((atInt8*)"IEMT", 4);
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x18_IEMT.write(w);
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}
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if (x1c_FEMT)
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{
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w.writeBytes((atInt8*)"FEMT", 4);
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x1c_FEMT.write(w);
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}
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if (x20_AMPL)
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{
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w.writeBytes((atInt8*)"AMPL", 4);
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x20_AMPL.write(w);
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}
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if (x24_AMPD)
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{
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w.writeBytes((atInt8*)"AMPD", 4);
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x24_AMPD.write(w);
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}
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if (x28_LWD1)
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{
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w.writeBytes((atInt8*)"LWD1", 4);
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x28_LWD1.write(w);
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}
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if (x2c_LWD2)
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{
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w.writeBytes((atInt8*)"LWD2", 4);
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x2c_LWD2.write(w);
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}
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if (x30_LWD3)
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{
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w.writeBytes((atInt8*)"LWD3", 4);
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x30_LWD3.write(w);
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}
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if (x34_LCL1)
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{
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w.writeBytes((atInt8*)"LCL1", 4);
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x34_LCL1.write(w);
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}
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if (x38_LCL2)
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{
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w.writeBytes((atInt8*)"LCL2", 4);
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x38_LCL2.write(w);
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}
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if (x3c_LCL3)
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{
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w.writeBytes((atInt8*)"LCL3", 4);
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x3c_LCL3.write(w);
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}
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if (x40_SSWH)
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{
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w.writeBytes((atInt8*)"SSWH", 4);
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x40_SSWH.write(w);
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}
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if (x50_GPSM)
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{
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w.writeBytes((atInt8*)"GPSM", 4);
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x50_GPSM.write(w);
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}
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if (x60_EPSM)
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{
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w.writeBytes((atInt8*)"EPSM", 4);
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x60_EPSM.write(w);
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}
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if (x70_ZERY)
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{
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w.writeBytes((atInt8*)"ZERY", 4);
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x70_ZERY.write(w);
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}
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w.writeBytes("_END", 4);
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}
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template <class IDType>
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void ELSM<IDType>::gatherDependencies(std::vector<hecl::ProjectPath>& pathsOut) const
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{
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g_curSpec->flattenDependencies(x40_SSWH.id, pathsOut);
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g_curSpec->flattenDependencies(x50_GPSM.id, pathsOut);
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g_curSpec->flattenDependencies(x60_EPSM.id, pathsOut);
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}
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template struct ELSM<UniqueID32>;
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template struct ELSM<UniqueID64>;
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template <class IDType>
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bool ExtractELSM(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath)
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{
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athena::io::FileWriter writer(outPath.getAbsolutePath());
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if (writer.isOpen())
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{
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ELSM<IDType> elsm;
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elsm.read(rs);
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elsm.toYAMLStream(writer);
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return true;
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}
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return false;
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}
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template bool ExtractELSM<UniqueID32>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
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template bool ExtractELSM<UniqueID64>(PAKEntryReadStream& rs, const hecl::ProjectPath& outPath);
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template <class IDType>
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bool WriteELSM(const ELSM<IDType>& elsm, const hecl::ProjectPath& outPath)
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{
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athena::io::FileWriter w(outPath.getAbsolutePath(), true, false);
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if (w.hasError())
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return false;
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elsm.write(w);
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int64_t rem = w.position() % 32;
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if (rem)
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for (int64_t i=0 ; i<32-rem ; ++i)
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w.writeUByte(0xff);
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return true;
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}
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template bool WriteELSM<UniqueID32>(const ELSM<UniqueID32>& gpsm, const hecl::ProjectPath& outPath);
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template bool WriteELSM<UniqueID64>(const ELSM<UniqueID64>& gpsm, const hecl::ProjectPath& outPath);
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}
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}
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