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Fixed bug 5429 - spinlock implements PAUSE_INSTRUCTION for PPC platforms 

David Carlier

This form of 'or' provides a hint that performance
will probably be improved if shared resources dedicated
to the executing processor are released for use by other
processors
This commit is contained in:
Sam Lantinga 2021-01-02 10:06:22 -08:00
parent f0b6c78733
commit d25eff6505
1 changed files with 2 additions and 0 deletions
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2
src/atomic/SDL_spinlock.c
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@ -140,6 +140,8 @@ SDL_AtomicTryLock(SDL_SpinLock *lock)
#define PAUSE_INSTRUCTION() __asm__ __volatile__("pause\n") /* Some assemblers can't do REP NOP, so go with PAUSE. */
#elif (defined(__arm__) && __ARM_ARCH__ >= 7) || defined(__aarch64__)
#define PAUSE_INSTRUCTION() __asm__ __volatile__("yield" ::: "memory")
#elif (defined(__powerpc__) || defined(__powerpc64__))
#define PAUSE_INSTRUCTION() __asm__ __volatile__("or 27,27,27");
#elif defined(_MSC_VER) && (defined(_M_IX86) || defined(_M_X64))
#define PAUSE_INSTRUCTION() _mm_pause() /* this is actually "rep nop" and not a SIMD instruction. No inline asm in MSVC x86-64! */
#elif defined(__WATCOMC__) && defined(__386__)