Delete tests with invalid SPIR-V inputs

The structured CFG rule was revised/clarified in SPIR-V 1.6 Rev2
Validation now rejects a few cases.

SpvParserTest, ValueFromBlockNotInBlockOrder
SpvParserFunctionVarTest, EmitStatement_Phi_ValueFromBlockNotInBlockOrderIgnored
SpvParserFunctionVarTest_EmitStatement_Phi_ValueFromBlockNotInBlockOrderIgnored
  - Originally from crbug.com/tint/804
    Invalid by SPIR-V 1.6 Rev2 update to validation rules:
     - Block 80 is a structurally reachable continue target
     - Block 25 is not structually reachable, and not part of the loop,
       but branches to 80.

vk-gl-cts/graphicsfuzz/cov-dead-branch-func-return-arg/0-opt.*
  -  The continue construct with the continue target 37[%37]
     is not structurally post dominated by the back-edge block 64[%64]
  - The SPIRV-Tools inliner no longer creates such cases.  It splits the
    single-block loop and pushes the continue target down.

vk-gl-cts/graphicsfuzz/nested-for-loops-with-return/0-opt.spvasm
  - The loop headed at block 46 does not structurally dominate its merge
    block 44.  There is a continue-target edge from 41 to 44.

SpvParserCFGTest_ClassifyCFGEdges_BackEdge_MultiBlockLoop_MultiBlockContinueConstruct_ContinueIsHeader.spvasm
SpvParserCFGTest_EmitBody_Loop_MultiBlockContinueIsEntireLoop.spvasm
SpvParserCFGTest_LabelControlFlowConstructs_MultiBlockLoop_HeaderIsContinue.spvasm
SpvParserCFGTest_SiblingLoopConstruct_ContinueIsWholeMultiBlockLoop.spvasm
SpvParserCFGTest, ClassifyCFGEdges_BackEdge_MultiBlockLoop_MultiBlockContinueConstruct_ContinueIsHeader
SpvParserCFGTest, EmitBody_Loop_MultiBlockContinueIsEntireLoop
SpvParserCFGTest, LabelControlFlowConstructs_MultiBlockLoop_HeaderIsContinue
SpvParserCFGTest, SiblingLoopConstruct_ContinueIsWholeMultiBlockLoop
 - Continue target 20 also its own loop header, but is not structurally
   post-dominated by the backedge block.
 - Delete the end-to-end test.
 - Keep the unit test because it's about classifying edges, but disable dumping
   into the end2end suites.

Change-Id: I9ec2504aadd2fec9ea463901af7dc1b5f47481b5
Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/95580
Kokoro: Kokoro <noreply+kokoro@google.com>
Reviewed-by: Dan Sinclair <dsinclair@chromium.org>
Commit-Queue: David Neto <dneto@google.com>

src/tint/reader/spirv/function_cfg_test.cc

@@ -3188,6 +3188,9 @@ TEST_F(SpvParserCFGTest, LabelControlFlowConstructs_MultiBlockLoop_HeaderIsConti
     EXPECT_EQ(fe.GetBlockInfo(40)->construct, constructs[1].get());
     EXPECT_EQ(fe.GetBlockInfo(50)->construct, constructs[1].get());
     EXPECT_EQ(fe.GetBlockInfo(99)->construct, constructs[0].get());
+    
+    // SPIR-V 1.6 Rev 2 made this invalid SPIR-V.
+    p->DeliberatelyInvalidSpirv();
 }
 
 TEST_F(SpvParserCFGTest, LabelControlFlowConstructs_MergeBlockIsAlsoSingleBlockLoop) {
@@ -4726,6 +4729,12 @@ TEST_F(
     ASSERT_NE(bi50, nullptr);
     EXPECT_EQ(bi50->succ_edge.count(20), 1u);
     EXPECT_EQ(bi50->succ_edge[20], EdgeKind::kBack);
+
+    // SPIR-V 1.6 Rev 2 made this invalid SPIR-V.
+    // The continue target also has the LoopMerge in it, but the continue
+    // target 20 is not structurally post-dominated by the back-edge block 50.
+    // Don't dump this as an end-to-end test.
+    p->DeliberatelyInvalidSpirv();
 }
 
 TEST_F(SpvParserCFGTest, ClassifyCFGEdges_PrematureExitFromContinueConstruct) {
@@ -8640,6 +8649,9 @@ var_1 = 3u;
 return;
 )";
     ASSERT_EQ(expect, got);
+
+    // Continue target does not structurally dominate the backedge block.
+    p->DeliberatelyInvalidSpirv();
 }
 
 TEST_F(SpvParserCFGTest, EmitBody_Loop_Never) {
@@ -12608,6 +12620,11 @@ TEST_F(SpvParserCFGTest, SiblingLoopConstruct_ContinueIsWholeMultiBlockLoop) {
     const Construct* c = fe.GetBlockInfo(20)->construct;
     EXPECT_EQ(c->kind, Construct::kContinue);
     EXPECT_EQ(fe.SiblingLoopConstruct(c), nullptr);
+
+    // SPIR-V 1.6 Rev 2 made this invalid SPIR-V.
+    // Continue target is not structurally post dominated by the backedge block.
+    // Don't dump this as an end-to-end test.
+    p->DeliberatelyInvalidSpirv();
 }
 
 TEST_F(SpvParserCFGTest, SiblingLoopConstruct_HasSiblingLoop) {

src/tint/reader/spirv/function_misc_test.cc

@@ -290,51 +290,6 @@ INSTANTIATE_TEST_SUITE_P(ValidIndex,
                              {4, "", "vector component index is larger than 3: 4"},
                              {99999, "", "vector component index is larger than 3: 99999"}}));
 
-TEST_F(SpvParserTest, ValueFromBlockNotInBlockOrder) {
-    // crbug.com/tint/804
-    const auto assembly = Preamble() + CommonTypes() + R"(
-     %float_42 = OpConstant %float 42.0
-     %cond = OpUndef %bool
-
-     %100 = OpFunction %void None %voidfn
-     %10 = OpLabel
-     OpBranch %30
-
-     ; unreachable
-     %20 = OpLabel
-     %499 = OpFAdd %float %float_42 %float_42
-     %500 = OpFAdd %float %499 %float_42
-     OpBranch %25
-
-     %25 = OpLabel
-     OpBranch %80
-
-
-     %30 = OpLabel
-     OpLoopMerge %90 %80 None
-     OpBranchConditional %cond %90 %40
-
-     %40 = OpLabel
-     OpBranch %90
-
-     %80 = OpLabel ; unreachable continue target
-                ; but "dominated" by %20 and %25
-     %81 = OpFMul %float %500 %float_42 ; %500 is defined in %20
-     OpBranch %30 ; backedge
-
-     %90 = OpLabel
-     OpReturn
-     OpFunctionEnd
-)";
-    auto p = parser(test::Assemble(assembly));
-    ASSERT_TRUE(p->BuildAndParseInternalModuleExceptFunctions()) << p->error();
-    auto fe = p->function_emitter(100);
-    EXPECT_TRUE(fe.EmitBody()) << p->error();
-    auto ast_body = fe.ast_body();
-    const auto got = test::ToString(p->program(), ast_body);
-    EXPECT_THAT(got, HasSubstr("let x_81 : f32 = (0.0f * 42.0f);"));
-}
-
 // TODO(dneto): OpSizeof : requires Kernel (OpenCL)
 
 }  // namespace

src/tint/reader/spirv/function_var_test.cc

@@ -1418,65 +1418,6 @@ return;
     EXPECT_EQ(expect, got);
 }
 
-TEST_F(SpvParserFunctionVarTest, EmitStatement_Phi_ValueFromBlockNotInBlockOrderIgnored) {
-    // From crbug.com/tint/804
-    const auto assembly = Preamble() + R"(
-     %float_42 = OpConstant %float 42.0
-     %cond = OpUndef %bool
-
-     %100 = OpFunction %void None %voidfn
-     %10 = OpLabel
-     OpBranch %30
-
-     ; unreachable
-     %20 = OpLabel
-     %499 = OpFAdd %float %float_42 %float_42
-     %500 = OpFAdd %float %499 %float_42
-     OpBranch %25
-
-     %25 = OpLabel
-     OpBranch %80
-
-
-     %30 = OpLabel
-     OpLoopMerge %90 %80 None
-     OpBranchConditional %cond %90 %40
-
-     %40 = OpLabel
-     OpBranch %90
-
-     %80 = OpLabel ; unreachable continue target
-                ; but "dominated" by %20 and %25
-     %81 = OpPhi %float %500 %25
-     OpBranch %30 ; backedge
-
-     %90 = OpLabel
-     OpReturn
-     OpFunctionEnd
-)";
-    auto p = parser(test::Assemble(assembly));
-    ASSERT_TRUE(p->BuildAndParseInternalModule()) << p->error() << assembly;
-    auto fe = p->function_emitter(100);
-    EXPECT_TRUE(fe.EmitBody()) << p->error();
-
-    const auto* expected = R"(loop {
-  if (false) {
-    break;
-  }
-  break;
-
-  continuing {
-    var x_81_phi_1 : f32;
-    let x_81 : f32 = x_81_phi_1;
-  }
-}
-return;
-)";
-    auto ast_body = fe.ast_body();
-    const auto got = test::ToString(p->program(), ast_body);
-    EXPECT_EQ(got, expected);
-}
-
 TEST_F(SpvParserFunctionVarTest, EmitStatement_Hoist_CompositeInsert) {
     // From crbug.com/tint/804
     const auto assembly = Preamble() + R"(