[ir] Add conditions to if and switch nodes.
This CL updates the if and switch nodes to store the condition value in a register. The EmitExpression is updated to return a Register and the builder updated to emit the expressions for the if, break-if, while, and switch expressions. Bug: tint:1718 Change-Id: Ie710812c74e8b9423a4aa997db451d9cdf304feb Reviewed-on: https://dawn-review.googlesource.com/c/dawn/+/110784 Reviewed-by: Ben Clayton <bclayton@google.com> Kokoro: Kokoro <noreply+kokoro@google.com> Commit-Queue: Dan Sinclair <dsinclair@chromium.org>
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@ -234,7 +234,12 @@ bool BuilderImpl::EmitBlock(const ast::BlockStatement* block) {
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bool BuilderImpl::EmitIf(const ast::IfStatement* stmt) {
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auto* if_node = builder.CreateIf(stmt);
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// TODO(dsinclair): Emit the condition expression into the current block
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// Emit the if condition into the end of the preceeding block
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auto reg = EmitExpression(stmt->condition);
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if (!reg) {
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return false;
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}
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if_node->condition = reg.Get();
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BranchTo(if_node);
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@ -243,8 +248,6 @@ bool BuilderImpl::EmitIf(const ast::IfStatement* stmt) {
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{
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FlowStackScope scope(this, if_node);
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// TODO(dsinclair): set if condition register into if flow node
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current_flow_block = if_node->true_target;
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if (!EmitStatement(stmt->body)) {
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return false;
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@ -323,13 +326,17 @@ bool BuilderImpl::EmitWhile(const ast::WhileStatement* stmt) {
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current_flow_block = loop_node->start_target;
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// TODO(dsinclair): Emit the instructions for the condition
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// Emit the while condition into the start target of the loop
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auto reg = EmitExpression(stmt->condition);
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if (!reg) {
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return false;
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}
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// Create an if (cond) {} else {break;} control flow
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auto* if_node = builder.CreateIf(nullptr);
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builder.Branch(if_node->true_target, if_node->merge_target);
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builder.Branch(if_node->false_target, loop_node->merge_target);
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// TODO(dsinclair): set if condition register into if flow node
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if_node->condition = reg.Get();
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BranchTo(if_node);
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@ -367,13 +374,17 @@ bool BuilderImpl::EmitForLoop(const ast::ForLoopStatement* stmt) {
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current_flow_block = loop_node->start_target;
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if (stmt->condition) {
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// TODO(dsinclair): Emit the instructions for the condition
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// Emit the condition into the target target of the loop
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auto reg = EmitExpression(stmt->condition);
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if (!reg) {
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return false;
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}
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// Create an if (cond) {} else {break;} control flow
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auto* if_node = builder.CreateIf(nullptr);
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builder.Branch(if_node->true_target, if_node->merge_target);
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builder.Branch(if_node->false_target, loop_node->merge_target);
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// TODO(dsinclair): set if condition register into if flow node
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if_node->condition = reg.Get();
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BranchTo(if_node);
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current_flow_block = if_node->merge_target;
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@ -401,7 +412,12 @@ bool BuilderImpl::EmitForLoop(const ast::ForLoopStatement* stmt) {
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bool BuilderImpl::EmitSwitch(const ast::SwitchStatement* stmt) {
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auto* switch_node = builder.CreateSwitch(stmt);
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// TODO(dsinclair): Emit the condition expression into the current block
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// Emit the condition into the preceeding block
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auto reg = EmitExpression(stmt->condition);
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if (!reg) {
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return false;
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}
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switch_node->condition = reg.Get();
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BranchTo(switch_node);
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@ -466,7 +482,12 @@ bool BuilderImpl::EmitContinue(const ast::ContinueStatement*) {
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bool BuilderImpl::EmitBreakIf(const ast::BreakIfStatement* stmt) {
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auto* if_node = builder.CreateIf(stmt);
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// TODO(dsinclair): Emit the condition expression into the current block
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// Emit the break-if condition into the end of the preceeding block
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auto reg = EmitExpression(stmt->condition);
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if (!reg) {
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return false;
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}
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if_node->condition = reg.Get();
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BranchTo(if_node);
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@ -478,8 +499,6 @@ bool BuilderImpl::EmitBreakIf(const ast::BreakIfStatement* stmt) {
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auto* loop = current_control->As<Loop>();
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// TODO(dsinclair): set if condition register into if flow node
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current_flow_block = if_node->true_target;
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BranchTo(loop->merge_target);
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@ -496,7 +515,7 @@ bool BuilderImpl::EmitBreakIf(const ast::BreakIfStatement* stmt) {
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return true;
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}
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bool BuilderImpl::EmitExpression(const ast::Expression* expr) {
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utils::Result<Register> BuilderImpl::EmitExpression(const ast::Expression* expr) {
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return tint::Switch(
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expr,
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// [&](const ast::IndexAccessorExpression* a) { return EmitIndexAccessor(a); },
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@ -512,7 +531,7 @@ bool BuilderImpl::EmitExpression(const ast::Expression* expr) {
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diagnostics_.add_warning(
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tint::diag::System::IR,
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"unknown expression type: " + std::string(expr->TypeInfo().name), expr->source);
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return false;
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return utils::Failure;
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});
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}
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@ -139,7 +139,7 @@ class BuilderImpl {
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/// Emits an expression
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/// @param expr the expression to emit
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/// @returns true if successful, false otherwise
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bool EmitExpression(const ast::Expression* expr);
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utils::Result<Register> EmitExpression(const ast::Expression* expr);
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/// Emits a variable
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/// @param var the variable to emit
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@ -80,8 +80,6 @@ TEST_F(IR_BuilderImplTest, IfStatement) {
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ASSERT_NE(ir_if, nullptr);
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EXPECT_TRUE(ir_if->Is<ir::If>());
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// TODO(dsinclair): check condition
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auto* flow = ir_if->As<ir::If>();
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ASSERT_NE(flow->true_target, nullptr);
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ASSERT_NE(flow->false_target, nullptr);
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@ -101,6 +99,11 @@ TEST_F(IR_BuilderImplTest, IfStatement) {
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EXPECT_EQ(flow->true_target->branch_target, flow->merge_target);
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EXPECT_EQ(flow->false_target->branch_target, flow->merge_target);
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EXPECT_EQ(flow->merge_target->branch_target, func->end_target);
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// Check condition
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auto op = flow->condition;
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ASSERT_TRUE(op.IsBool());
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EXPECT_TRUE(op.AsBool());
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}
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TEST_F(IR_BuilderImplTest, IfStatement_TrueReturns) {
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@ -497,6 +500,11 @@ TEST_F(IR_BuilderImplTest, Loop_WithReturn) {
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EXPECT_EQ(func->start_target->branch_target, ir_loop);
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EXPECT_EQ(loop_flow->merge_target->branch_target, nullptr);
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// Check condition
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auto op = if_flow->condition;
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ASSERT_TRUE(op.IsBool());
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EXPECT_TRUE(op.AsBool());
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}
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TEST_F(IR_BuilderImplTest, Loop_WithOnlyReturn) {
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@ -937,6 +945,11 @@ TEST_F(IR_BuilderImplTest, While) {
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EXPECT_EQ(if_flow->merge_target->branch_target, flow->continuing_target);
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EXPECT_EQ(flow->continuing_target->branch_target, flow->start_target);
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EXPECT_EQ(flow->merge_target->branch_target, func->end_target);
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// Check condition
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auto op = if_flow->condition;
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ASSERT_TRUE(op.IsBool());
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EXPECT_FALSE(op.AsBool());
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}
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TEST_F(IR_BuilderImplTest, While_Return) {
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@ -1056,6 +1069,11 @@ TEST_F(IR_BuilderImplTest, DISABLED_For) {
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EXPECT_EQ(if_flow->merge_target->branch_target, flow->continuing_target);
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EXPECT_EQ(flow->continuing_target->branch_target, flow->start_target);
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EXPECT_EQ(flow->merge_target->branch_target, func->end_target);
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// Check condition
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auto op = if_flow->condition;
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ASSERT_TRUE(op.IsBool());
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EXPECT_FALSE(op.AsBool());
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}
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TEST_F(IR_BuilderImplTest, For_NoInitCondOrContinuing) {
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@ -1151,6 +1169,11 @@ TEST_F(IR_BuilderImplTest, Switch) {
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EXPECT_EQ(flow->cases[1].start_target->branch_target, flow->merge_target);
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EXPECT_EQ(flow->cases[2].start_target->branch_target, flow->merge_target);
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EXPECT_EQ(flow->merge_target->branch_target, func->end_target);
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// Check condition
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auto op = flow->condition;
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ASSERT_TRUE(op.IsI32());
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EXPECT_EQ(1_i, op.AsI32());
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}
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TEST_F(IR_BuilderImplTest, Switch_OnlyDefault) {
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@ -221,7 +221,7 @@ std::string Debug::AsString(const Module* mod) {
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Walk(b->branch_target);
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},
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[&](const ir::Switch* s) {
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indent() << "Switch" << std::endl;
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indent() << "Switch (" << s->condition.AsString() << ")" << std::endl;
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{
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ScopedIndent switch_indent(&indent_size);
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@ -237,15 +237,15 @@ std::string Debug::AsString(const Module* mod) {
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Walk(s->merge_target);
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},
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[&](const ir::If* i) {
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indent() << "if" << std::endl;
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indent() << "if (" << i->condition.AsString() << ")" << std::endl;
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{
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ScopedIndent if_indent(&indent_size);
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ScopedStopNode scope(&stop_nodes, i->merge_target);
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indent() << "If true" << std::endl;
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indent() << "true branch" << std::endl;
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Walk(i->true_target);
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indent() << "If false" << std::endl;
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indent() << "false branch" << std::endl;
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Walk(i->false_target);
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}
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@ -17,6 +17,7 @@
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#include "src/tint/ast/if_statement.h"
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#include "src/tint/ir/flow_node.h"
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#include "src/tint/ir/register.h"
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// Forward declarations
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namespace tint::ir {
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@ -43,6 +44,8 @@ class If : public Castable<If, FlowNode> {
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/// An block to reconvert the true/false barnches. The block always exists, but there maybe no
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/// branches into it. (e.g. if both branches `return`)
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Block* merge_target = nullptr;
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/// Register holding the condition result
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Register condition;
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};
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} // namespace tint::ir
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@ -16,6 +16,8 @@
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namespace tint::ir {
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Register::Register() : kind_(Kind::kUninitialized), data_(Id(0)) {}
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Register::Register(Id id) : kind_(Kind::kTemp), data_(id) {}
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Register::Register(f32 f) : kind_(Kind::kF32), data_(f) {}
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@ -57,6 +59,8 @@ std::string Register::AsString() const {
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return "%v" + std::to_string(AsVarData().id);
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case Kind::kBool:
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return AsBool() ? "true" : "false";
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case Kind::kUninitialized:
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break;
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}
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return "unknown register";
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}
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@ -43,6 +43,10 @@ class Register {
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// TODO(dsinclair): Should var type data be stored here along side the variable info?
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};
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/// Constructor
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/// Creates a uninitialized register
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Register();
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/// Constructor
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/// @param id the id for the register
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explicit Register(Id id);
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@ -134,6 +138,8 @@ class Register {
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private:
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/// The type of the register
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enum class Kind {
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/// A uninitialized register
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kUninitialized,
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/// A temporary allocated register
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kTemp,
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/// A f32 register
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@ -132,5 +132,17 @@ TEST_F(IR_RegisterTest, var) {
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EXPECT_FALSE(r.IsBool());
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}
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TEST_F(IR_RegisterTest, uninitialized) {
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Register r;
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EXPECT_FALSE(r.IsF32());
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EXPECT_FALSE(r.IsF16());
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EXPECT_FALSE(r.IsI32());
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EXPECT_FALSE(r.IsU32());
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EXPECT_FALSE(r.IsTemp());
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EXPECT_FALSE(r.IsVar());
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EXPECT_FALSE(r.IsBool());
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}
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} // namespace
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} // namespace tint::ir
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@ -17,6 +17,7 @@
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#include "src/tint/ir/block.h"
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#include "src/tint/ir/flow_node.h"
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#include "src/tint/ir/register.h"
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// Forward declarations
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namespace tint::ast {
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@ -50,6 +51,9 @@ class Switch : public Castable<Switch, FlowNode> {
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/// The switch case statements
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utils::Vector<Case, 4> cases;
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/// Register holding the condition result
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Register condition;
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};
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} // namespace tint::ir
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