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Support PowerPC COFF (Xenon, Xbox 360)

Browse Source 
ppc750cl is superseded by the powerpc crate, which
supports PPC64, AltiVec and VMX128 extensions.
This commit is contained in:
Luke Street 2025-07-17 13:32:50 -06:00
parent 127ae5ae44
commit 60b227f45e
13 changed files with 636 additions and 547 deletions
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16
Cargo.lock generated
View File

@ -466,7 +466,7 @@ dependencies = [
"cfg-if", "cfg-if",
"libc", "libc",
"miniz_oxide", "miniz_oxide",
"object 0.36.7 (registry+https://github.com/rust-lang/crates.io-index)", "object 0.36.7",
"rustc-demangle", "rustc-demangle",
"windows-targets 0.52.6", "windows-targets 0.52.6",
] ]
@ -3419,10 +3419,10 @@ dependencies = [
"notify-debouncer-full", "notify-debouncer-full",
"num-traits", "num-traits",
"objdiff-core", "objdiff-core",
"object 0.36.7 (git+https://github.com/gimli-rs/object?rev=a74579249e21ab8fcd3a86be588de336f18297cb)", "object 0.37.1",
"pbjson", "pbjson",
"pbjson-build", "pbjson-build",
"ppc750cl", "powerpc",
"prettyplease", "prettyplease",
"proc-macro2", "proc-macro2",
"prost", "prost",
@ -3508,8 +3508,8 @@ dependencies = [
[[package]] [[package]]
name = "object" name = "object"
version = "0.36.7" version = "0.37.1"
source = "git+https://github.com/gimli-rs/object?rev=a74579249e21ab8fcd3a86be588de336f18297cb#a74579249e21ab8fcd3a86be588de336f18297cb" source = "git+https://github.com/gimli-rs/object?rev=16ff70aa6fbd97d6bb7b92375929f4d72414c32b#16ff70aa6fbd97d6bb7b92375929f4d72414c32b"
dependencies = [ dependencies = [
"memchr", "memchr",
] ]
@ -3862,10 +3862,10 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391" checksum = "439ee305def115ba05938db6eb1644ff94165c5ab5e9420d1c1bcedbba909391"
[[package]] [[package]]
name = "ppc750cl" name = "powerpc"
version = "0.3.2" version = "0.4.1"
source = "registry+https://github.com/rust-lang/crates.io-index" source = "registry+https://github.com/rust-lang/crates.io-index"
checksum = "be8e5b9d48ab30323e8ece6d655d20fc16a570e4f1af0de6890d3e9ebd284ba0" checksum = "f9cac36a8d92f3c9d38ebfa606e3bbbbec229a8d757f03de0999898522856e33"
[[package]] [[package]]
name = "ppv-lite86" name = "ppv-lite86"

2
README.md
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@ -19,7 +19,7 @@ Supports:
- ARM (GBA, DS, 3DS) - ARM (GBA, DS, 3DS)
- ARM64 (Switch) - ARM64 (Switch)
- MIPS (N64, PS1, PS2, PSP) - MIPS (N64, PS1, PS2, PSP)
- PowerPC (GameCube, Wii) - PowerPC (GameCube, Wii, Xbox 360)
- SuperH (Saturn, Dreamcast) - SuperH (Saturn, Dreamcast)
- x86, x86_64 (PC) - x86, x86_64 (PC)

6
objdiff-core/Cargo.toml
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@ -92,7 +92,7 @@ ppc = [
"any-arch", "any-arch",
"dep:cwdemangle", "dep:cwdemangle",
"dep:cwextab", "dep:cwextab",
"dep:ppc750cl", "dep:powerpc",
"dep:rlwinmdec", "dep:rlwinmdec",
] ]
x86 = [ x86 = [
@ -128,7 +128,7 @@ itertools = { version = "0.14", default-features = false, features = ["use_alloc
log = { version = "0.4", default-features = false, optional = true } log = { version = "0.4", default-features = false, optional = true }
memmap2 = { version = "0.9", optional = true } memmap2 = { version = "0.9", optional = true }
num-traits = { version = "0.2", default-features = false, optional = true } num-traits = { version = "0.2", default-features = false, optional = true }
object = { git = "https://github.com/gimli-rs/object", rev = "a74579249e21ab8fcd3a86be588de336f18297cb", default-features = false, features = ["read_core", "elf", "pe"] } object = { git = "https://github.com/gimli-rs/object", rev = "16ff70aa6fbd97d6bb7b92375929f4d72414c32b", default-features = false, features = ["read_core", "elf", "pe"] }
pbjson = { version = "0.7", default-features = false, optional = true } pbjson = { version = "0.7", default-features = false, optional = true }
prost = { version = "0.13", default-features = false, features = ["prost-derive"], optional = true } prost = { version = "0.13", default-features = false, features = ["prost-derive"], optional = true }
regex = { version = "1.11", default-features = false, features = [], optional = true } regex = { version = "1.11", default-features = false, features = [], optional = true }
@ -147,7 +147,7 @@ gimli = { version = "0.31", default-features = false, features = ["read"], optio
# ppc # ppc
cwdemangle = { version = "1.0", optional = true } cwdemangle = { version = "1.0", optional = true }
cwextab = { version = "1.0", optional = true } cwextab = { version = "1.0", optional = true }
ppc750cl = { version = "0.3", optional = true } powerpc = { version = "0.4", optional = true }
rlwinmdec = { version = "1.1", optional = true } rlwinmdec = { version = "1.1", optional = true }
# mips # mips

2
objdiff-core/README.md
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@ -11,6 +11,6 @@ objdiff-core contains the core functionality of [objdiff](https://github.com/enc
- **`arm64`**: Enables the ARM64 backend powered by [yaxpeax-arm](https://github.com/iximeow/yaxpeax-arm). - **`arm64`**: Enables the ARM64 backend powered by [yaxpeax-arm](https://github.com/iximeow/yaxpeax-arm).
- **`arm`**: Enables the ARM backend powered by [unarm](https://github.com/AetiasHax/unarm). - **`arm`**: Enables the ARM backend powered by [unarm](https://github.com/AetiasHax/unarm).
- **`mips`**: Enables the MIPS backend powered by [rabbitizer](https://github.com/Decompollaborate/rabbitizer). - **`mips`**: Enables the MIPS backend powered by [rabbitizer](https://github.com/Decompollaborate/rabbitizer).
- **`ppc`**: Enables the PowerPC backend powered by [ppc750cl](https://github.com/encounter/ppc750cl). - **`ppc`**: Enables the PowerPC backend powered by [powerpc](https://github.com/encounter/powerpc-rs).
- **`superh`**: Enables the SuperH backend powered by an included disassembler. - **`superh`**: Enables the SuperH backend powered by an included disassembler.
- **`x86`**: Enables the x86 backend powered by [iced-x86](https://crates.io/crates/iced-x86). - **`x86`**: Enables the x86 backend powered by [iced-x86](https://crates.io/crates/iced-x86).

20
objdiff-core/src/arch/mod.rs
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@ -55,16 +55,16 @@ pub enum DataType {
impl fmt::Display for DataType { impl fmt::Display for DataType {
fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result { fn fmt(&self, f: &mut fmt::Formatter<'_>) -> fmt::Result {
match self { f.write_str(match self {
DataType::Int8 => f.write_str("Int8"), DataType::Int8 => "Int8",
DataType::Int16 => f.write_str("Int16"), DataType::Int16 => "Int16",
DataType::Int32 => f.write_str("Int32"), DataType::Int32 => "Int32",
DataType::Int64 => f.write_str("Int64"), DataType::Int64 => "Int64",
DataType::Float => f.write_str("Float"), DataType::Float => "Float",
DataType::Double => f.write_str("Double"), DataType::Double => "Double",
DataType::Bytes => f.write_str("Bytes"), DataType::Bytes => "Bytes",
DataType::String => f.write_str("String"), DataType::String => "String",
} })
} }
} }

87
objdiff-core/src/arch/ppc/flow_analysis.rs
View File

@ -11,7 +11,7 @@ use core::{
}; };
use itertools::Itertools; use itertools::Itertools;
use ppc750cl::Simm; use powerpc::{Extensions, Simm};
use crate::{ use crate::{
arch::DataType, arch::DataType,
@ -19,8 +19,8 @@ use crate::{
util::{RawDouble, RawFloat}, util::{RawDouble, RawFloat},
}; };
fn is_store_instruction(op: ppc750cl::Opcode) -> bool { fn is_store_instruction(op: powerpc::Opcode) -> bool {
use ppc750cl::Opcode; use powerpc::Opcode;
matches!( matches!(
op, op,
Opcode::Stbux Opcode::Stbux
@ -52,8 +52,8 @@ fn is_store_instruction(op: ppc750cl::Opcode) -> bool {
) )
} }
pub fn guess_data_type_from_load_store_inst_op(inst_op: ppc750cl::Opcode) -> Option<DataType> { pub fn guess_data_type_from_load_store_inst_op(inst_op: powerpc::Opcode) -> Option<DataType> {
use ppc750cl::Opcode; use powerpc::Opcode;
match inst_op { match inst_op {
Opcode::Lbz | Opcode::Lbzu | Opcode::Lbzux | Opcode::Lbzx => Some(DataType::Int8), Opcode::Lbz | Opcode::Lbzu | Opcode::Lbzux | Opcode::Lbzx => Some(DataType::Int8),
Opcode::Lhz | Opcode::Lhzu | Opcode::Lhzux | Opcode::Lhzx => Some(DataType::Int16), Opcode::Lhz | Opcode::Lhzu | Opcode::Lhzux | Opcode::Lhzx => Some(DataType::Int16),
@ -118,12 +118,12 @@ impl RegisterState {
// During a function call, these registers must be assumed trashed. // During a function call, these registers must be assumed trashed.
fn clear_volatile(&mut self) { fn clear_volatile(&mut self) {
self[ppc750cl::GPR(0)] = RegisterContent::Unknown; self[powerpc::GPR(0)] = RegisterContent::Unknown;
for i in 0..=13 { for i in 0..=13 {
self[ppc750cl::GPR(i)] = RegisterContent::Unknown; self[powerpc::GPR(i)] = RegisterContent::Unknown;
} }
for i in 0..=13 { for i in 0..=13 {
self[ppc750cl::FPR(i)] = RegisterContent::Unknown; self[powerpc::FPR(i)] = RegisterContent::Unknown;
} }
} }
@ -132,10 +132,10 @@ impl RegisterState {
// they get overwritten with another value before getting read. // they get overwritten with another value before getting read.
fn set_potential_inputs(&mut self) { fn set_potential_inputs(&mut self) {
for g_reg in 3..=13 { for g_reg in 3..=13 {
self[ppc750cl::GPR(g_reg)] = RegisterContent::InputRegister(g_reg); self[powerpc::GPR(g_reg)] = RegisterContent::InputRegister(g_reg);
} }
for f_reg in 1..=13 { for f_reg in 1..=13 {
self[ppc750cl::FPR(f_reg)] = RegisterContent::InputRegister(f_reg); self[powerpc::FPR(f_reg)] = RegisterContent::InputRegister(f_reg);
} }
} }
@ -172,34 +172,34 @@ impl RegisterState {
} }
} }
impl Index<ppc750cl::GPR> for RegisterState { impl Index<powerpc::GPR> for RegisterState {
type Output = RegisterContent; type Output = RegisterContent;
fn index(&self, gpr: ppc750cl::GPR) -> &Self::Output { &self.gpr[gpr.0 as usize] } fn index(&self, gpr: powerpc::GPR) -> &Self::Output { &self.gpr[gpr.0 as usize] }
} }
impl IndexMut<ppc750cl::GPR> for RegisterState { impl IndexMut<powerpc::GPR> for RegisterState {
fn index_mut(&mut self, gpr: ppc750cl::GPR) -> &mut Self::Output { fn index_mut(&mut self, gpr: powerpc::GPR) -> &mut Self::Output {
&mut self.gpr[gpr.0 as usize] &mut self.gpr[gpr.0 as usize]
} }
} }
impl Index<ppc750cl::FPR> for RegisterState { impl Index<powerpc::FPR> for RegisterState {
type Output = RegisterContent; type Output = RegisterContent;
fn index(&self, fpr: ppc750cl::FPR) -> &Self::Output { &self.fpr[fpr.0 as usize] } fn index(&self, fpr: powerpc::FPR) -> &Self::Output { &self.fpr[fpr.0 as usize] }
} }
impl IndexMut<ppc750cl::FPR> for RegisterState { impl IndexMut<powerpc::FPR> for RegisterState {
fn index_mut(&mut self, fpr: ppc750cl::FPR) -> &mut Self::Output { fn index_mut(&mut self, fpr: powerpc::FPR) -> &mut Self::Output {
&mut self.fpr[fpr.0 as usize] &mut self.fpr[fpr.0 as usize]
} }
} }
fn execute_instruction( fn execute_instruction(
registers: &mut RegisterState, registers: &mut RegisterState,
op: &ppc750cl::Opcode, op: &powerpc::Opcode,
args: &ppc750cl::Arguments, args: &powerpc::Arguments,
) { ) {
use ppc750cl::{Argument, GPR, Opcode}; use powerpc::{Argument, GPR, Opcode};
match (op, args[0], args[1], args[2]) { match (op, args[0], args[1], args[2]) {
(Opcode::Or, Argument::GPR(a), Argument::GPR(b), Argument::GPR(c)) => { (Opcode::Or, Argument::GPR(a), Argument::GPR(b), Argument::GPR(c)) => {
// Move is implemented as or with self for ints // Move is implemented as or with self for ints
@ -270,11 +270,11 @@ fn execute_instruction(
} }
} }
fn get_branch_offset(args: &ppc750cl::Arguments) -> i32 { fn get_branch_offset(args: &powerpc::Arguments) -> i32 {
for arg in args.iter() { for arg in args.iter() {
match arg { match arg {
ppc750cl::Argument::BranchDest(dest) => return dest.0 / 4, powerpc::Argument::BranchDest(dest) => return dest.0 / 4,
ppc750cl::Argument::None => break, powerpc::Argument::None => break,
_ => {} _ => {}
} }
} }
@ -316,7 +316,7 @@ fn clamp_text_length(s: String, max: usize) -> String {
fn get_register_content_from_reloc( fn get_register_content_from_reloc(
reloc: &Relocation, reloc: &Relocation,
obj: &Object, obj: &Object,
op: ppc750cl::Opcode, op: powerpc::Opcode,
) -> RegisterContent { ) -> RegisterContent {
if let Some(bytes) = obj.symbol_data(reloc.target_symbol) { if let Some(bytes) = obj.symbol_data(reloc.target_symbol) {
match guess_data_type_from_load_store_inst_op(op) { match guess_data_type_from_load_store_inst_op(op) {
@ -354,18 +354,18 @@ fn fill_registers_from_relocation(
reloc: &Relocation, reloc: &Relocation,
current_state: &mut RegisterState, current_state: &mut RegisterState,
obj: &Object, obj: &Object,
op: ppc750cl::Opcode, op: powerpc::Opcode,
args: &ppc750cl::Arguments, args: &powerpc::Arguments,
) { ) {
// Only update the register state for loads. We may store to a reloc // Only update the register state for loads. We may store to a reloc
// address but that doesn't update register contents. // address but that doesn't update register contents.
if !is_store_instruction(op) { if !is_store_instruction(op) {
match (op, args[0]) { match (op, args[0]) {
// Everything else is a load of some sort // Everything else is a load of some sort
(_, ppc750cl::Argument::GPR(gpr)) => { (_, powerpc::Argument::GPR(gpr)) => {
current_state[gpr] = get_register_content_from_reloc(reloc, obj, op); current_state[gpr] = get_register_content_from_reloc(reloc, obj, op);
} }
(_, ppc750cl::Argument::FPR(fpr)) => { (_, powerpc::Argument::FPR(fpr)) => {
current_state[fpr] = get_register_content_from_reloc(reloc, obj, op); current_state[fpr] = get_register_content_from_reloc(reloc, obj, op);
} }
_ => {} _ => {}
@ -384,11 +384,12 @@ pub fn ppc_data_flow_analysis(
func_symbol: &Symbol, func_symbol: &Symbol,
code: &[u8], code: &[u8],
relocations: &[Relocation], relocations: &[Relocation],
extensions: Extensions,
) -> Box<dyn FlowAnalysisResult> { ) -> Box<dyn FlowAnalysisResult> {
use alloc::collections::VecDeque; use alloc::collections::VecDeque;
use ppc750cl::InsIter; use powerpc::InsIter;
let instructions = InsIter::new(code, func_symbol.address as u32) let instructions = InsIter::new(code, func_symbol.address as u32, extensions)
.map(|(_addr, ins)| (ins.op, ins.basic().args)) .map(|(_addr, ins)| (ins.op, ins.basic().args))
.collect_vec(); .collect_vec();
@ -449,7 +450,7 @@ pub fn ppc_data_flow_analysis(
// Only take a given (address, register state) combination once. If // Only take a given (address, register state) combination once. If
// the known register state is different we have to take the branch // the known register state is different we have to take the branch
// again to stabilize the known values for backwards branches. // again to stabilize the known values for backwards branches.
if op == &ppc750cl::Opcode::Bc { if op == &powerpc::Opcode::Bc {
let branch_state = (index, current_state.clone()); let branch_state = (index, current_state.clone());
if !taken_branches.contains(&branch_state) { if !taken_branches.contains(&branch_state) {
let offset = get_branch_offset(args); let offset = get_branch_offset(args);
@ -468,7 +469,7 @@ pub fn ppc_data_flow_analysis(
} }
// Update index // Update index
if op == &ppc750cl::Opcode::B { if op == &powerpc::Opcode::B {
// Unconditional branch // Unconditional branch
let offset = get_branch_offset(args); let offset = get_branch_offset(args);
if offset > 0 { if offset > 0 {
@ -502,7 +503,14 @@ pub fn ppc_data_flow_analysis(
} }
// Store the relevant data flow values for simplified instructions // Store the relevant data flow values for simplified instructions
generate_flow_analysis_result(obj, func_address, code, register_state_at, relocations) generate_flow_analysis_result(
obj,
func_address,
code,
register_state_at,
relocations,
extensions,
)
} }
fn get_string_data(obj: &Object, symbol_index: usize, offset: Simm) -> Option<&str> { fn get_string_data(obj: &Object, symbol_index: usize, offset: Simm) -> Option<&str> {
@ -530,14 +538,15 @@ fn generate_flow_analysis_result(
code: &[u8], code: &[u8],
register_state_at: Vec<RegisterState>, register_state_at: Vec<RegisterState>,
relocations: &[Relocation], relocations: &[Relocation],
extensions: Extensions,
) -> Box<PPCFlowAnalysisResult> { ) -> Box<PPCFlowAnalysisResult> {
use ppc750cl::{Argument, InsIter}; use powerpc::{Argument, InsIter};
let mut analysis_result = PPCFlowAnalysisResult::new(); let mut analysis_result = PPCFlowAnalysisResult::new();
let default_register_state = RegisterState::new(); let default_register_state = RegisterState::new();
for (addr, ins) in InsIter::new(code, 0) { for (addr, ins) in InsIter::new(code, 0, extensions) {
let ins_address = base_address + (addr as u64); let ins_address = base_address + (addr as u64);
let index = addr / 4; let index = addr / 4;
let ppc750cl::ParsedIns { mnemonic: _, args } = ins.simplified(); let powerpc::ParsedIns { mnemonic: _, args } = ins.simplified();
// If we're already showing relocations on a line don't also show data flow // If we're already showing relocations on a line don't also show data flow
let reloc = relocations.iter().find(|r| (r.address & !3) == ins_address); let reloc = relocations.iter().find(|r| (r.address & !3) == ins_address);
@ -546,7 +555,7 @@ fn generate_flow_analysis_result(
// they are being loaded. // they are being loaded.
// We need to do this before we break out on showing relocations in the // We need to do this before we break out on showing relocations in the
// subsequent if statement. // subsequent if statement.
if let (ppc750cl::Opcode::Lfs | ppc750cl::Opcode::Lfd, Some(reloc)) = (ins.op, reloc) { if let (powerpc::Opcode::Lfs | powerpc::Opcode::Lfd, Some(reloc)) = (ins.op, reloc) {
let content = get_register_content_from_reloc(reloc, obj, ins.op); let content = get_register_content_from_reloc(reloc, obj, ins.op);
if matches!( if matches!(
content, content,
@ -566,7 +575,7 @@ fn generate_flow_analysis_result(
// Special case to show string constants on the line where they are // Special case to show string constants on the line where they are
// being indexed to. This will typically be "addi t, stringbase, offset" // being indexed to. This will typically be "addi t, stringbase, offset"
let registers = register_state_at.get(index as usize).unwrap_or(&default_register_state); let registers = register_state_at.get(index as usize).unwrap_or(&default_register_state);
if let (ppc750cl::Opcode::Addi, Argument::GPR(rel), Argument::Simm(offset)) = if let (powerpc::Opcode::Addi, Argument::GPR(rel), Argument::Simm(offset)) =
(ins.op, args[1], args[2]) (ins.op, args[1], args[2])
{ {
if let RegisterContent::Symbol(sym_index) = registers[rel] { if let RegisterContent::Symbol(sym_index) = registers[rel] {

173
objdiff-core/src/arch/ppc/mod.rs
View File

@ -9,7 +9,7 @@ use alloc::{
use anyhow::{Result, bail, ensure}; use anyhow::{Result, bail, ensure};
use cwextab::{ExceptionTableData, decode_extab}; use cwextab::{ExceptionTableData, decode_extab};
use flagset::Flags; use flagset::Flags;
use object::{Object as _, ObjectSection as _, ObjectSymbol as _, elf}; use object::{Endian as _, Object as _, ObjectSection as _, ObjectSymbol as _, elf, pe};
use crate::{ use crate::{
arch::{Arch, DataType}, arch::{Arch, DataType},
@ -27,58 +27,79 @@ use crate::{
mod flow_analysis; mod flow_analysis;
// Relative relocation, can be Simm, Offset or BranchDest // Relative relocation, can be Simm, Offset or BranchDest
fn is_relative_arg(arg: &ppc750cl::Argument) -> bool { fn is_relative_arg(arg: &powerpc::Argument) -> bool {
matches!( matches!(
arg, arg,
ppc750cl::Argument::Simm(_) powerpc::Argument::Simm(_)
| ppc750cl::Argument::Offset(_) | powerpc::Argument::Offset(_)
| ppc750cl::Argument::BranchDest(_) | powerpc::Argument::BranchDest(_)
) )
} }
// Relative or absolute relocation, can be Uimm, Simm or Offset // Relative or absolute relocation, can be Uimm, Simm or Offset
fn is_rel_abs_arg(arg: &ppc750cl::Argument) -> bool { fn is_rel_abs_arg(arg: &powerpc::Argument) -> bool {
matches!( matches!(
arg, arg,
ppc750cl::Argument::Uimm(_) | ppc750cl::Argument::Simm(_) | ppc750cl::Argument::Offset(_) powerpc::Argument::Uimm(_) | powerpc::Argument::Simm(_) | powerpc::Argument::Offset(_)
) )
} }
fn is_offset_arg(arg: &ppc750cl::Argument) -> bool { matches!(arg, ppc750cl::Argument::Offset(_)) } fn is_offset_arg(arg: &powerpc::Argument) -> bool { matches!(arg, powerpc::Argument::Offset(_)) }
#[derive(Debug)] #[derive(Debug)]
pub struct ArchPpc { pub struct ArchPpc {
pub extensions: powerpc::Extensions,
/// Exception info /// Exception info
pub extab: Option<BTreeMap<usize, ExceptionInfo>>, pub extab: Option<BTreeMap<usize, ExceptionInfo>>,
} }
impl ArchPpc { impl ArchPpc {
pub fn new(file: &object::File) -> Result<Self> { pub fn new(file: &object::File) -> Result<Self> {
Ok(Self { extab: decode_exception_info(file)? }) let extensions = match file.flags() {
object::FileFlags::Coff { .. } => powerpc::Extensions::xenon(),
object::FileFlags::Elf { e_flags, .. }
if (e_flags & elf::EF_PPC_EMB) == elf::EF_PPC_EMB =>
{
powerpc::Extensions::gekko_broadway()
}
_ => {
if file.is_64() {
powerpc::Extension::Ppc64 | powerpc::Extension::AltiVec
} else {
powerpc::Extension::AltiVec.into()
}
}
};
let extab = decode_exception_info(file)?;
Ok(Self { extensions, extab })
} }
fn parse_ins_ref(&self, resolved: ResolvedInstructionRef) -> Result<ppc750cl::Ins> { fn parse_ins_ref(&self, resolved: ResolvedInstructionRef) -> Result<powerpc::Ins> {
let mut code = u32::from_be_bytes(resolved.code.try_into()?); let mut code = u32::from_be_bytes(resolved.code.try_into()?);
if let Some(reloc) = resolved.relocation { if let Some(reloc) = resolved.relocation {
code = zero_reloc(code, reloc.relocation); code = zero_reloc(code, reloc.relocation);
} }
let op = ppc750cl::Opcode::from(resolved.ins_ref.opcode as u8); let op = powerpc::Opcode::from(resolved.ins_ref.opcode);
Ok(ppc750cl::Ins { code, op }) Ok(powerpc::Ins { code, op })
} }
fn find_reloc_arg( fn find_reloc_arg(
&self, &self,
ins: &ppc750cl::ParsedIns, ins: &powerpc::ParsedIns,
resolved: Option<ResolvedRelocation>, resolved: Option<ResolvedRelocation>,
) -> Option<usize> { ) -> Option<usize> {
match resolved?.relocation.flags { match resolved?.relocation.flags {
RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => Some(1), RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => Some(1),
RelocationFlags::Elf(elf::R_PPC_REL24 | elf::R_PPC_REL14) => { RelocationFlags::Elf(elf::R_PPC_REL24 | elf::R_PPC_REL14)
| RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24 | pe::IMAGE_REL_PPC_REL14) => {
ins.args.iter().rposition(is_relative_arg) ins.args.iter().rposition(is_relative_arg)
} }
RelocationFlags::Elf( RelocationFlags::Elf(
elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO, elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO,
) => ins.args.iter().rposition(is_rel_abs_arg), )
| RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI | pe::IMAGE_REL_PPC_REFLO) => {
ins.args.iter().rposition(is_rel_abs_arg)
}
_ => None, _ => None,
} }
} }
@ -96,11 +117,11 @@ impl Arch for ArchPpc {
ensure!(code.len() & 3 == 0, "Code length must be a multiple of 4"); ensure!(code.len() & 3 == 0, "Code length must be a multiple of 4");
let ins_count = code.len() / 4; let ins_count = code.len() / 4;
let mut insts = Vec::<InstructionRef>::with_capacity(ins_count); let mut insts = Vec::<InstructionRef>::with_capacity(ins_count);
for (cur_addr, ins) in ppc750cl::InsIter::new(code, address as u32) { for (cur_addr, ins) in powerpc::InsIter::new(code, address as u32, self.extensions) {
insts.push(InstructionRef { insts.push(InstructionRef {
address: cur_addr as u64, address: cur_addr as u64,
size: 4, size: 4,
opcode: u8::from(ins.op) as u16, opcode: u16::from(ins.op),
branch_dest: ins.branch_dest(cur_addr).map(u64::from), branch_dest: ins.branch_dest(cur_addr).map(u64::from),
}); });
} }
@ -131,16 +152,16 @@ impl Arch for ArchPpc {
// For @sda21, we can omit the register argument // For @sda21, we can omit the register argument
if matches!(reloc.relocation.flags, RelocationFlags::Elf(elf::R_PPC_EMB_SDA21)) if matches!(reloc.relocation.flags, RelocationFlags::Elf(elf::R_PPC_EMB_SDA21))
// Sanity check: the next argument should be r0 // Sanity check: the next argument should be r0
&& matches!(ins.args.get(idx + 1), Some(ppc750cl::Argument::GPR(ppc750cl::GPR(0)))) && matches!(ins.args.get(idx + 1), Some(powerpc::Argument::GPR(powerpc::GPR(0))))
{ {
break; break;
} }
} else { } else {
match arg { match arg {
ppc750cl::Argument::Simm(simm) => cb(InstructionPart::signed(simm.0)), powerpc::Argument::Simm(simm) => cb(InstructionPart::signed(simm.0)),
ppc750cl::Argument::Uimm(uimm) => cb(InstructionPart::unsigned(uimm.0)), powerpc::Argument::Uimm(uimm) => cb(InstructionPart::unsigned(uimm.0)),
ppc750cl::Argument::Offset(offset) => cb(InstructionPart::signed(offset.0)), powerpc::Argument::Offset(offset) => cb(InstructionPart::signed(offset.0)),
ppc750cl::Argument::BranchDest(dest) => cb(InstructionPart::branch_dest( powerpc::Argument::BranchDest(dest) => cb(InstructionPart::branch_dest(
(resolved.ins_ref.address as u32).wrapping_add_signed(dest.0), (resolved.ins_ref.address as u32).wrapping_add_signed(dest.0),
)), )),
_ => cb(InstructionPart::opaque(arg.to_string())), _ => cb(InstructionPart::opaque(arg.to_string())),
@ -168,7 +189,13 @@ impl Arch for ArchPpc {
relocations: &[Relocation], relocations: &[Relocation],
symbols: &[Symbol], symbols: &[Symbol],
) -> Vec<Relocation> { ) -> Vec<Relocation> {
generate_fake_pool_relocations_for_function(address, code, relocations, symbols) generate_fake_pool_relocations_for_function(
address,
code,
relocations,
symbols,
self.extensions,
)
} }
fn data_flow_analysis( fn data_flow_analysis(
@ -178,22 +205,48 @@ impl Arch for ArchPpc {
code: &[u8], code: &[u8],
relocations: &[Relocation], relocations: &[Relocation],
) -> Option<Box<dyn FlowAnalysisResult>> { ) -> Option<Box<dyn FlowAnalysisResult>> {
Some(flow_analysis::ppc_data_flow_analysis(obj, symbol, code, relocations)) Some(flow_analysis::ppc_data_flow_analysis(obj, symbol, code, relocations, self.extensions))
} }
fn implcit_addend( fn implcit_addend(
&self, &self,
_file: &object::File<'_>, file: &object::File<'_>,
_section: &object::Section, section: &object::Section,
address: u64, address: u64,
_relocation: &object::Relocation, _relocation: &object::Relocation,
flags: RelocationFlags, flags: RelocationFlags,
) -> Result<i64> { ) -> Result<i64> {
bail!("Unsupported PPC implicit relocation {:#x}:{:?}", address, flags) let section_data = section.data()?;
let address = address as usize;
let data = section_data
.get(address..address + 4)
.ok_or_else(|| anyhow::anyhow!("Invalid address {address} for section data"))?
.try_into()?;
let code = file.endianness().read_u32_bytes(data);
Ok(match flags {
RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI)
| RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFLO) => (code & 0xffff) as i16 as i32,
RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24) => {
// let addend = (((code & 0x3fffffc) << 6) as i32) >> 6;
// println!("PPC_REL24 addend: {data:?} => {addend}");
// addend
0
}
RelocationFlags::Coff(pe::IMAGE_REL_PPC_ADDR32) => code as i32,
RelocationFlags::Coff(pe::IMAGE_REL_PPC_PAIR) => 0,
flags => bail!("Unsupported PPC implicit relocation {flags:?}"),
} as i64)
} }
fn demangle(&self, name: &str) -> Option<String> { fn demangle(&self, name: &str) -> Option<String> {
cwdemangle::demangle(name, &cwdemangle::DemangleOptions::default()) if name.starts_with('?') {
msvc_demangler::demangle(name, msvc_demangler::DemangleFlags::llvm()).ok()
} else {
cpp_demangle::Symbol::new(name)
.ok()
.and_then(|s| s.demangle(&cpp_demangle::DemangleOptions::default()).ok())
.or_else(|| cwdemangle::demangle(name, &cwdemangle::DemangleOptions::default()))
}
} }
fn reloc_name(&self, flags: RelocationFlags) -> Option<&'static str> { fn reloc_name(&self, flags: RelocationFlags) -> Option<&'static str> {
@ -238,7 +291,7 @@ impl Arch for ArchPpc {
// Pooled string. // Pooled string.
return Some(DataType::String); return Some(DataType::String);
} }
let opcode = ppc750cl::Opcode::from(resolved.ins_ref.opcode as u8); let opcode = powerpc::Opcode::from(resolved.ins_ref.opcode);
if let Some(ty) = flow_analysis::guess_data_type_from_load_store_inst_op(opcode) { if let Some(ty) = flow_analysis::guess_data_type_from_load_store_inst_op(opcode) {
// Numeric type. // Numeric type.
return Some(ty); return Some(ty);
@ -336,11 +389,18 @@ impl ArchPpc {
fn zero_reloc(code: u32, reloc: &Relocation) -> u32 { fn zero_reloc(code: u32, reloc: &Relocation) -> u32 {
match reloc.flags { match reloc.flags {
RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => code & !0x1FFFFF, RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => code & !0x1FFFFF,
RelocationFlags::Elf(elf::R_PPC_REL24) => code & !0x3FFFFFC, RelocationFlags::Elf(elf::R_PPC_REL24) | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL24) => {
RelocationFlags::Elf(elf::R_PPC_REL14) => code & !0xFFFC, code & !0x3FFFFFC
}
RelocationFlags::Elf(elf::R_PPC_REL14) | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REL14) => {
code & !0xFFFC
}
RelocationFlags::Elf( RelocationFlags::Elf(
elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO, elf::R_PPC_ADDR16_HI | elf::R_PPC_ADDR16_HA | elf::R_PPC_ADDR16_LO,
) => code & !0xFFFF, )
| RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI | pe::IMAGE_REL_PPC_REFLO) => {
code & !0xFFFF
}
_ => code, _ => code,
} }
} }
@ -350,35 +410,39 @@ fn display_reloc(
cb: &mut dyn FnMut(InstructionPart) -> Result<()>, cb: &mut dyn FnMut(InstructionPart) -> Result<()>,
) -> Result<()> { ) -> Result<()> {
match resolved.relocation.flags { match resolved.relocation.flags {
RelocationFlags::Elf(r_type) => match r_type { RelocationFlags::Elf(elf::R_PPC_ADDR16_LO)
elf::R_PPC_ADDR16_LO => { | RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFLO) => {
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
cb(InstructionPart::basic("@l"))?; cb(InstructionPart::basic("@l"))?;
} }
elf::R_PPC_ADDR16_HI => { RelocationFlags::Elf(elf::R_PPC_ADDR16_HI)
| RelocationFlags::Coff(pe::IMAGE_REL_PPC_REFHI) => {
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
cb(InstructionPart::basic("@h"))?; cb(InstructionPart::basic("@h"))?;
} }
elf::R_PPC_ADDR16_HA => { RelocationFlags::Elf(elf::R_PPC_ADDR16_HA) => {
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
cb(InstructionPart::basic("@ha"))?; cb(InstructionPart::basic("@ha"))?;
} }
elf::R_PPC_EMB_SDA21 => { RelocationFlags::Elf(elf::R_PPC_EMB_SDA21) => {
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
cb(InstructionPart::basic("@sda21"))?; cb(InstructionPart::basic("@sda21"))?;
} }
elf::R_PPC_ADDR32 | elf::R_PPC_UADDR32 | elf::R_PPC_REL24 | elf::R_PPC_REL14 => { RelocationFlags::Elf(
elf::R_PPC_ADDR32 | elf::R_PPC_UADDR32 | elf::R_PPC_REL24 | elf::R_PPC_REL14,
)
| RelocationFlags::Coff(
pe::IMAGE_REL_PPC_ADDR32 | pe::IMAGE_REL_PPC_REL24 | pe::IMAGE_REL_PPC_REL14,
) => {
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
} }
elf::R_PPC_NONE => { RelocationFlags::Elf(elf::R_PPC_NONE) => {
// Fake pool relocation. // Fake pool relocation.
cb(InstructionPart::basic("<"))?; cb(InstructionPart::basic("<"))?;
cb(InstructionPart::reloc())?; cb(InstructionPart::reloc())?;
cb(InstructionPart::basic(">"))?; cb(InstructionPart::basic(">"))?;
} }
_ => cb(InstructionPart::reloc())?, _ => cb(InstructionPart::reloc())?,
},
_ => cb(InstructionPart::reloc())?,
}; };
Ok(()) Ok(())
} }
@ -515,19 +579,19 @@ fn make_symbol_ref(symbol: &object::Symbol) -> Result<ExtabSymbolRef> {
#[derive(Debug)] #[derive(Debug)]
struct PoolReference { struct PoolReference {
addr_src_gpr: ppc750cl::GPR, addr_src_gpr: powerpc::GPR,
addr_offset: i16, addr_offset: i16,
addr_dst_gpr: Option<ppc750cl::GPR>, addr_dst_gpr: Option<powerpc::GPR>,
} }
// Given an instruction, check if it could be accessing pooled data at the address in a register. // Given an instruction, check if it could be accessing pooled data at the address in a register.
// If so, return information pertaining to where the instruction is getting that address from and // If so, return information pertaining to where the instruction is getting that address from and
// what it's doing with the address (e.g. copying it into another register, adding an offset, etc). // what it's doing with the address (e.g. copying it into another register, adding an offset, etc).
fn get_pool_reference_for_inst( fn get_pool_reference_for_inst(
opcode: ppc750cl::Opcode, opcode: powerpc::Opcode,
simplified: &ppc750cl::ParsedIns, simplified: &powerpc::ParsedIns,
) -> Option<PoolReference> { ) -> Option<PoolReference> {
use ppc750cl::{Argument, Opcode}; use powerpc::{Argument, Opcode};
let args = &simplified.args; let args = &simplified.args;
if flow_analysis::guess_data_type_from_load_store_inst_op(opcode).is_some() { if flow_analysis::guess_data_type_from_load_store_inst_op(opcode).is_some() {
match (args[1], args[2]) { match (args[1], args[2]) {
@ -592,15 +656,15 @@ fn get_pool_reference_for_inst(
// Remove the relocation we're keeping track of in a particular register when an instruction reuses // Remove the relocation we're keeping track of in a particular register when an instruction reuses
// that register to hold some other value, unrelated to pool relocation addresses. // that register to hold some other value, unrelated to pool relocation addresses.
fn clear_overwritten_gprs(ins: ppc750cl::Ins, gpr_pool_relocs: &mut BTreeMap<u8, Relocation>) { fn clear_overwritten_gprs(ins: powerpc::Ins, gpr_pool_relocs: &mut BTreeMap<u8, Relocation>) {
use ppc750cl::{Argument, Arguments, Opcode}; use powerpc::{Argument, Arguments, Opcode};
let mut def_args = Arguments::default(); let mut def_args = Arguments::default();
ins.parse_defs(&mut def_args); ins.parse_defs(&mut def_args);
for arg in def_args { for arg in def_args {
if let Argument::GPR(gpr) = arg { if let Argument::GPR(gpr) = arg {
if ins.op == Opcode::Lmw { if ins.op == Opcode::Lmw {
// `lmw` overwrites all registers from rd to r31. // `lmw` overwrites all registers from rd to r31.
// ppc750cl only returns rd itself, so we manually clear the rest of them. // powerpc only returns rd itself, so we manually clear the rest of them.
for reg in gpr.0..31 { for reg in gpr.0..31 {
gpr_pool_relocs.remove(&reg); gpr_pool_relocs.remove(&reg);
} }
@ -682,12 +746,13 @@ fn generate_fake_pool_relocations_for_function(
code: &[u8], code: &[u8],
relocations: &[Relocation], relocations: &[Relocation],
symbols: &[Symbol], symbols: &[Symbol],
extensions: powerpc::Extensions,
) -> Vec<Relocation> { ) -> Vec<Relocation> {
use ppc750cl::{Argument, InsIter, Opcode}; use powerpc::{Argument, InsIter, Opcode};
let mut visited_ins_addrs = BTreeSet::new(); let mut visited_ins_addrs = BTreeSet::new();
let mut pool_reloc_for_addr = BTreeMap::new(); let mut pool_reloc_for_addr = BTreeMap::new();
let mut ins_iters_with_gpr_state = let mut ins_iters_with_gpr_state =
vec![(InsIter::new(code, func_address as u32), BTreeMap::new())]; vec![(InsIter::new(code, func_address as u32, extensions), BTreeMap::new())];
let mut gpr_state_at_bctr = BTreeMap::new(); let mut gpr_state_at_bctr = BTreeMap::new();
while let Some((ins_iter, mut gpr_pool_relocs)) = ins_iters_with_gpr_state.pop() { while let Some((ins_iter, mut gpr_pool_relocs)) = ins_iters_with_gpr_state.pop() {
for (cur_addr, ins) in ins_iter { for (cur_addr, ins) in ins_iter {
@ -719,7 +784,7 @@ fn generate_fake_pool_relocations_for_function(
// Conditional branch. // Conditional branch.
// Add the branch destination to the queue to do later. // Add the branch destination to the queue to do later.
ins_iters_with_gpr_state.push(( ins_iters_with_gpr_state.push((
InsIter::new(dest_code_slice, branch_dest), InsIter::new(dest_code_slice, branch_dest, extensions),
gpr_pool_relocs.clone(), gpr_pool_relocs.clone(),
)); ));
// Then continue on with the current iterator. // Then continue on with the current iterator.
@ -729,7 +794,7 @@ fn generate_fake_pool_relocations_for_function(
// Unconditional branch. // Unconditional branch.
// Add the branch destination to the queue. // Add the branch destination to the queue.
ins_iters_with_gpr_state.push(( ins_iters_with_gpr_state.push((
InsIter::new(dest_code_slice, branch_dest), InsIter::new(dest_code_slice, branch_dest, extensions),
gpr_pool_relocs.clone(), gpr_pool_relocs.clone(),
)); ));
// Break out of the current iterator so we can do the newly added one. // Break out of the current iterator so we can do the newly added one.
@ -837,7 +902,7 @@ fn generate_fake_pool_relocations_for_function(
let dest_offset_into_func = unseen_addr - func_address as u32; let dest_offset_into_func = unseen_addr - func_address as u32;
let dest_code_slice = &code[dest_offset_into_func as usize..]; let dest_code_slice = &code[dest_offset_into_func as usize..];
ins_iters_with_gpr_state.push(( ins_iters_with_gpr_state.push((
InsIter::new(dest_code_slice, unseen_addr), InsIter::new(dest_code_slice, unseen_addr, extensions),
gpr_pool_relocs.clone(), gpr_pool_relocs.clone(),
)); ));
break; break;

12
objdiff-core/src/obj/mod.rs
View File

@ -114,7 +114,17 @@ impl Section {
ins_ref: InstructionRef, ins_ref: InstructionRef,
) -> Option<ResolvedRelocation<'obj>> { ) -> Option<ResolvedRelocation<'obj>> {
match self.relocations.binary_search_by_key(&ins_ref.address, |r| r.address) { match self.relocations.binary_search_by_key(&ins_ref.address, |r| r.address) {
Ok(i) => self.relocations.get(i), Ok(mut i) => {
// Find the first relocation at the address
while i
.checked_sub(1)
.and_then(|n| self.relocations.get(n))
.is_some_and(|r| r.address == ins_ref.address)
{
i -= 1;
}
self.relocations.get(i)
}
Err(i) => self Err(i) => self
.relocations .relocations
.get(i) .get(i)

556
objdiff-core/tests/snapshots/arch_ppc__diff_ppc-2.snap
View File

File diff suppressed because it is too large Load Diff

3
objdiff-core/tests/snapshots/arch_ppc__read_extab.snap
View File

@ -4,6 +4,9 @@ expression: obj
--- ---
Object { Object {
arch: ArchPpc { arch: ArchPpc {
extensions: Extensions(
2,
),
extab: Some( extab: Some(
{ {
10: ExceptionInfo { 10: ExceptionInfo {

132
objdiff-core/tests/snapshots/arch_ppc__read_ppc-2.snap
View File

@ -8,7 +8,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 0, address: 0,
size: 4, size: 4,
opcode: 60, opcode: 283,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -22,7 +22,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 4, address: 4,
size: 4, size: 4,
opcode: 38, opcode: 260,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -36,7 +36,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 8, address: 8,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
20, 20,
), ),
@ -57,7 +57,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 12, address: 12,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -71,7 +71,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 16, address: 16,
size: 4, size: 4,
opcode: 45, opcode: 267,
branch_dest: Some( branch_dest: Some(
32, 32,
), ),
@ -92,7 +92,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 20, address: 20,
size: 4, size: 4,
opcode: 42, opcode: 264,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -113,7 +113,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 24, address: 24,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -127,7 +127,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 28, address: 28,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -141,7 +141,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 32, address: 32,
size: 4, size: 4,
opcode: 60, opcode: 283,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -162,7 +162,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 36, address: 36,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -176,7 +176,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 40, address: 40,
size: 4, size: 4,
opcode: 38, opcode: 260,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -190,7 +190,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 44, address: 44,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
56, 56,
), ),
@ -211,7 +211,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 48, address: 48,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -225,7 +225,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 52, address: 52,
size: 4, size: 4,
opcode: 45, opcode: 267,
branch_dest: Some( branch_dest: Some(
68, 68,
), ),
@ -246,7 +246,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 56, address: 56,
size: 4, size: 4,
opcode: 42, opcode: 264,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -267,7 +267,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 60, address: 60,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -281,7 +281,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 64, address: 64,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -295,7 +295,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 68, address: 68,
size: 4, size: 4,
opcode: 60, opcode: 283,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -316,7 +316,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 72, address: 72,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -330,7 +330,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 76, address: 76,
size: 4, size: 4,
opcode: 38, opcode: 260,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -344,7 +344,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 80, address: 80,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -358,7 +358,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 84, address: 84,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
96, 96,
), ),
@ -379,7 +379,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 88, address: 88,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -393,7 +393,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 92, address: 92,
size: 4, size: 4,
opcode: 45, opcode: 267,
branch_dest: Some( branch_dest: Some(
108, 108,
), ),
@ -414,7 +414,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 96, address: 96,
size: 4, size: 4,
opcode: 42, opcode: 264,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -435,7 +435,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 100, address: 100,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -449,7 +449,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 104, address: 104,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -463,7 +463,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 108, address: 108,
size: 4, size: 4,
opcode: 60, opcode: 283,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -484,7 +484,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 112, address: 112,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -498,7 +498,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 116, address: 116,
size: 4, size: 4,
opcode: 38, opcode: 260,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -512,7 +512,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 120, address: 120,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -526,7 +526,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 124, address: 124,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
136, 136,
), ),
@ -547,7 +547,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 128, address: 128,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -561,7 +561,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 132, address: 132,
size: 4, size: 4,
opcode: 45, opcode: 267,
branch_dest: Some( branch_dest: Some(
148, 148,
), ),
@ -582,7 +582,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 136, address: 136,
size: 4, size: 4,
opcode: 42, opcode: 264,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -603,7 +603,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 140, address: 140,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -617,7 +617,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 144, address: 144,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -631,7 +631,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 148, address: 148,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -652,7 +652,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 152, address: 152,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -666,7 +666,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 156, address: 156,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -680,7 +680,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 160, address: 160,
size: 4, size: 4,
opcode: 42, opcode: 264,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -694,7 +694,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 164, address: 164,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -708,7 +708,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 168, address: 168,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -722,7 +722,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 172, address: 172,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -736,7 +736,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 176, address: 176,
size: 4, size: 4,
opcode: 162, opcode: 441,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -750,7 +750,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 180, address: 180,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -764,7 +764,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 184, address: 184,
size: 4, size: 4,
opcode: 66, opcode: 289,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -778,7 +778,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 188, address: 188,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
196, 196,
), ),
@ -799,7 +799,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 192, address: 192,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -813,7 +813,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 196, address: 196,
size: 4, size: 4,
opcode: 163, opcode: 442,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -834,7 +834,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 200, address: 200,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -848,7 +848,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 204, address: 204,
size: 4, size: 4,
opcode: 66, opcode: 289,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -862,7 +862,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 208, address: 208,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
216, 216,
), ),
@ -883,7 +883,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 212, address: 212,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -897,7 +897,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 216, address: 216,
size: 4, size: 4,
opcode: 163, opcode: 442,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -918,7 +918,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 220, address: 220,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -932,7 +932,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 224, address: 224,
size: 4, size: 4,
opcode: 66, opcode: 289,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -946,7 +946,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 228, address: 228,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
236, 236,
), ),
@ -967,7 +967,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 232, address: 232,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -981,7 +981,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 236, address: 236,
size: 4, size: 4,
opcode: 163, opcode: 442,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -1002,7 +1002,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 240, address: 240,
size: 4, size: 4,
opcode: 94, opcode: 323,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -1016,7 +1016,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 244, address: 244,
size: 4, size: 4,
opcode: 66, opcode: 289,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -1030,7 +1030,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 248, address: 248,
size: 4, size: 4,
opcode: 43, opcode: 265,
branch_dest: Some( branch_dest: Some(
256, 256,
), ),
@ -1051,7 +1051,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 252, address: 252,
size: 4, size: 4,
opcode: 166, opcode: 445,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -1065,7 +1065,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 256, address: 256,
size: 4, size: 4,
opcode: 41, opcode: 263,
branch_dest: None, branch_dest: None,
}, },
), ),
@ -1086,7 +1086,7 @@ expression: diff.instruction_rows
InstructionRef { InstructionRef {
address: 260, address: 260,
size: 4, size: 4,
opcode: 47, opcode: 269,
branch_dest: None, branch_dest: None,
}, },
), ),

133
objdiff-core/tests/snapshots/arch_ppc__read_ppc-3.snap
View File

@ -1,71 +1,70 @@
--- ---
source: objdiff-core/tests/arch_ppc.rs source: objdiff-core/tests/arch_ppc.rs
assertion_line: 20
expression: output expression: output
--- ---
[(Address(0), Normal, 5), (Spacing(4), Normal, 0), (Opcode("srwi", 60), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)] [(Address(0), Normal, 5), (Spacing(4), Normal, 0), (Opcode("srwi", 283), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)]
[(Address(4), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(4), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 260), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(8), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(20), Normal, 0), (Basic(" ~>"), Rotating(0), 0), (Eol, Normal, 0)] [(Address(8), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(20), Normal, 0), (Basic(" ~>"), Rotating(0), 0), (Eol, Normal, 0)]
[(Address(12), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(12), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(16), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(32), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)] [(Address(16), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 267), Normal, 10), (BranchDest(32), Normal, 0), (Basic(" ~>"), Rotating(1), 0), (Eol, Normal, 0)]
[(Address(20), Normal, 5), (Basic(" ~> "), Rotating(0), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] [(Address(20), Normal, 5), (Basic(" ~> "), Rotating(0), 0), (Opcode("lis", 264), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)]
[(Address(24), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] [(Address(24), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 263), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)]
[(Address(28), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(28), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r0")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(32), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode("extrwi", 60), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Eol, Normal, 0)] [(Address(32), Normal, 5), (Basic(" ~> "), Rotating(1), 0), (Opcode("extrwi", 283), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Eol, Normal, 0)]
[(Address(36), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(36), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(40), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(40), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 260), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(44), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(56), Normal, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)] [(Address(44), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(56), Normal, 0), (Basic(" ~>"), Rotating(2), 0), (Eol, Normal, 0)]
[(Address(48), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(48), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(52), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(68), Normal, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)] [(Address(52), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 267), Normal, 10), (BranchDest(68), Normal, 0), (Basic(" ~>"), Rotating(3), 0), (Eol, Normal, 0)]
[(Address(56), Normal, 5), (Basic(" ~> "), Rotating(2), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] [(Address(56), Normal, 5), (Basic(" ~> "), Rotating(2), 0), (Opcode("lis", 264), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)]
[(Address(60), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] [(Address(60), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 263), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)]
[(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(64), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(68), Normal, 5), (Basic(" ~> "), Rotating(3), 0), (Opcode("extrwi", 60), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("16")), Normal, 0), (Eol, Normal, 0)] [(Address(68), Normal, 5), (Basic(" ~> "), Rotating(3), 0), (Opcode("extrwi", 283), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("8")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("16")), Normal, 0), (Eol, Normal, 0)]
[(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(72), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(76), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 260), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(80), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(96), Normal, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)] [(Address(84), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(96), Normal, 0), (Basic(" ~>"), Rotating(4), 0), (Eol, Normal, 0)]
[(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(88), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(92), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(108), Normal, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)] [(Address(92), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 267), Normal, 10), (BranchDest(108), Normal, 0), (Basic(" ~>"), Rotating(5), 0), (Eol, Normal, 0)]
[(Address(96), Normal, 5), (Basic(" ~> "), Rotating(4), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] [(Address(96), Normal, 5), (Basic(" ~> "), Rotating(4), 0), (Opcode("lis", 264), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)]
[(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] [(Address(100), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 263), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)]
[(Address(104), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(104), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(108), Normal, 5), (Basic(" ~> "), Rotating(5), 0), (Opcode("clrlwi", 60), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)] [(Address(108), Normal, 5), (Basic(" ~> "), Rotating(5), 0), (Opcode("clrlwi", 283), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("24")), Normal, 0), (Eol, Normal, 0)]
[(Address(112), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(112), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(116), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 38), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(116), Normal, 5), (Spacing(4), Normal, 0), (Opcode("cmpwi", 260), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(120), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(2)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(120), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(2)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(124), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(136), Normal, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)] [(Address(124), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(136), Normal, 0), (Basic(" ~>"), Rotating(6), 0), (Eol, Normal, 0)]
[(Address(128), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)] [(Address(128), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(-1)), Normal, 0), (Eol, Normal, 0)]
[(Address(132), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 45), Normal, 10), (BranchDest(148), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)] [(Address(132), Normal, 5), (Spacing(4), Normal, 0), (Opcode("b", 267), Normal, 10), (BranchDest(148), Normal, 0), (Basic(" ~>"), Rotating(7), 0), (Eol, Normal, 0)]
[(Address(136), Normal, 5), (Basic(" ~> "), Rotating(6), 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] [(Address(136), Normal, 5), (Basic(" ~> "), Rotating(6), 0), (Opcode("lis", 264), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)]
[(Address(140), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] [(Address(140), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 263), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)]
[(Address(144), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(144), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__upper_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(148), Normal, 5), (Basic(" ~> "), Rotating(7), 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(148), Normal, 5), (Basic(" ~> "), Rotating(7), 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r5")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(152), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Eol, Normal, 0)] [(Address(152), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Eol, Normal, 0)]
[(Address(156), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(3)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(156), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(3)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(160), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lis", 42), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)] [(Address(160), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lis", 264), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@ha"), Normal, 0), (Eol, Normal, 0)]
[(Address(164), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 41), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)] [(Address(164), Normal, 5), (Spacing(4), Normal, 0), (Opcode("addi", 263), Normal, 10), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic("@l"), Normal, 0), (Eol, Normal, 0)]
[(Address(168), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(4)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(168), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(4)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(172), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(45)), Normal, 0), (Eol, Normal, 0)] [(Address(172), Normal, 5), (Spacing(4), Normal, 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(45)), Normal, 0), (Eol, Normal, 0)]
[(Address(176), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbz", 162), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(176), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbz", 441), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(180), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(180), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(184), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] [(Address(184), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)]
[(Address(188), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(196), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)] [(Address(188), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(196), Normal, 0), (Basic(" ~>"), Rotating(8), 0), (Eol, Normal, 0)]
[(Address(192), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(192), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(196), Normal, 5), (Basic(" ~> "), Rotating(8), 0), (Opcode("lbzu", 163), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(196), Normal, 5), (Basic(" ~> "), Rotating(8), 0), (Opcode("lbzu", 442), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(200), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(200), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(204), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] [(Address(204), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)]
[(Address(208), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(216), Normal, 0), (Basic(" ~>"), Rotating(9), 0), (Eol, Normal, 0)] [(Address(208), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(216), Normal, 0), (Basic(" ~>"), Rotating(9), 0), (Eol, Normal, 0)]
[(Address(212), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(212), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(216), Normal, 5), (Basic(" ~> "), Rotating(9), 0), (Opcode("lbzu", 163), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(216), Normal, 5), (Basic(" ~> "), Rotating(9), 0), (Opcode("lbzu", 442), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(220), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(220), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(224), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] [(Address(224), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)]
[(Address(228), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(236), Normal, 0), (Basic(" ~>"), Rotating(10), 0), (Eol, Normal, 0)] [(Address(228), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(236), Normal, 0), (Basic(" ~>"), Rotating(10), 0), (Eol, Normal, 0)]
[(Address(232), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(232), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(236), Normal, 5), (Basic(" ~> "), Rotating(10), 0), (Opcode("lbzu", 163), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(236), Normal, 5), (Basic(" ~> "), Rotating(10), 0), (Opcode("lbzu", 442), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(1)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(240), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 94), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)] [(Address(240), Normal, 5), (Spacing(4), Normal, 0), (Opcode("lbzx", 323), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r4")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(" <"), Normal, 0), (Symbol(Symbol { name: "__ctype_map", demangled_name: None, address: 0, size: 0, kind: Unknown, section: None, flags: FlagSet(Global), align: None, virtual_address: Some(0) }), Bright, 0), (Basic(">"), Normal, 0), (Eol, Normal, 0)]
[(Address(244), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 66), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)] [(Address(244), Normal, 5), (Spacing(4), Normal, 0), (Opcode("andi.", 289), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Unsigned(220)), Normal, 0), (Eol, Normal, 0)]
[(Address(248), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 43), Normal, 10), (BranchDest(256), Normal, 0), (Basic(" ~>"), Rotating(11), 0), (Eol, Normal, 0)] [(Address(248), Normal, 5), (Spacing(4), Normal, 0), (Opcode("bne", 265), Normal, 10), (BranchDest(256), Normal, 0), (Basic(" ~>"), Rotating(11), 0), (Eol, Normal, 0)]
[(Address(252), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 166), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)] [(Address(252), Normal, 5), (Spacing(4), Normal, 0), (Opcode("stb", 445), Normal, 10), (Argument(Opaque("r0")), Normal, 0), (Basic(", "), Normal, 0), (Argument(Signed(0)), Normal, 0), (Basic("("), Normal, 0), (Argument(Opaque("r5")), Normal, 0), (Basic(")"), Normal, 0), (Eol, Normal, 0)]
[(Address(256), Normal, 5), (Basic(" ~> "), Rotating(11), 0), (Opcode("li", 41), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)] [(Address(256), Normal, 5), (Basic(" ~> "), Rotating(11), 0), (Opcode("li", 263), Normal, 10), (Argument(Opaque("r3")), Normal, 0), (Basic(", "), Normal, 0), (Symbol(Symbol { name: "text$52", demangled_name: None, address: 8, size: 5, kind: Object, section: Some(2), flags: FlagSet(Local), align: None, virtual_address: Some(2153420056) }), Bright, 0), (Basic("@sda21"), Normal, 0), (Eol, Normal, 0)]
[(Address(260), Normal, 5), (Spacing(4), Normal, 0), (Opcode("blr", 47), Normal, 10), (Eol, Normal, 0)] [(Address(260), Normal, 5), (Spacing(4), Normal, 0), (Opcode("blr", 269), Normal, 10), (Eol, Normal, 0)]

3
objdiff-core/tests/snapshots/arch_ppc__read_ppc.snap
View File

@ -4,6 +4,9 @@ expression: obj
--- ---
Object { Object {
arch: ArchPpc { arch: ArchPpc {
extensions: Extensions(
2,
),
extab: None, extab: None,
}, },
endianness: Big, endianness: Big,