Rewrite the entire crate, add assembler

- 10x faster disassembly performance
- Nearly feature-complete assembler
- `no_std` compatible
- Relicense to MIT/Apache-2.0
- Remove old crates (dol, flow-graph, etc)
- Remove Python bindings (for now, at least)
This commit is contained in:
Luke Street 2024-03-14 00:52:36 -06:00
parent f6e15052b1
commit c4af15ddc2
39 changed files with 18608 additions and 11531 deletions

580
Cargo.lock generated
View File

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View File

@ -5,35 +5,10 @@ Rust tools for working with the PowerPC 750CL family of processors.
### Rust crates
```shell
rustup components add rustfmt
cargo run --package ppc750cl-genisa
cargo build --release
```
### Python module
```shell
python -m venv env
source ./env/bin/activate
pip install maturin
maturin build -m ./disasm-py/Cargo.toml
```
Install module in dev env
```
maturin develop -m ./disasm-py/Cargo.toml
python
>>> import ppc750cl
>>> ins = ppc750cl.Ins(addr=0x80006969, code=0x10400420)
>>> str(ins)
'ps_merge00 f2, f0, f0'
>>> ins.fields()
[('frD', 2), ('frA', 0), ('frB', 0)]
>>> ins.frD
2
```
### Instruction Set
For those unfamiliar with PowerPC, here are some basics.
@ -48,7 +23,7 @@ For those unfamiliar with PowerPC, here are some basics.
The file [isa.yaml](./isa.yaml) contains a full definition of the PowerPC 750CL instruction set.
It powers the disassembler, assembler, and Rust/Python bindings code analysis tools.
It powers the disassembler and assembler.
Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file implementing an instruction decoder.
@ -57,10 +32,11 @@ Similarly to LLVM TableGen, the program `ppc750cl-genisa` generates a Rust file
- This project does not use `unsafe` Rust code outside of testing utils.
- The disassembler has been fuzzed over all ~4.29 billion possible instructions (via `ppc750cl-fuzz`).
- It is safe to run the disassembler over untrusted byte arrays.
- However no guarantees on correctness are made (yet). Expect bugs.
- However, no guarantees on correctness are made (yet). Expect bugs.
### Performance
- Performance isn't great but acceptable.
- Disassembling & printing: 600k insn/s (2.4 MB/s)
- Disassembling only: 6M insn/s (24 MB/s)
With a single thread on Ryzen 9 3900X:
- Disassembling & printing: ~5M insn/s (~20 MB/s)
- Disassembling only: ~50M insn/s (~200 MB/s)

View File

@ -1,174 +0,0 @@
---
date: 2022-04-10
status: draft
---
# Control-flow analysis
CFA analyses the entire `.text` section with linear complexity.
It has the following goals:
- Detect function boundaries
- Create the control-flow graph of each function
## Pass 1: Find control-flow intrinsics
Input:
- `.text` section
Output:
- Locations of compiler intrinsics
Rules
*savegpr/restgpr detection* (CodeWarrior only)
Find the following instructions in `.text`
```asm
_save_gpr:
stw r14, -0x48(r11)
stw r15, -0x44(r11)
stw r16, -0x40(r11)
stw r17, -0x3c(r11)
stw r18, -0x38(r11)
stw r19, -0x34(r11)
stw r20, -0x30(r11)
stw r21, -0x2c(r11)
stw r22, -0x28(r11)
stw r23, -0x24(r11)
stw r24, -0x20(r11)
stw r25, -0x1c(r11)
stw r26, -0x18(r11)
stw r27, -0x14(r11)
stw r28, -0x10(r11)
stw r29, -0xc(r11)
stw r30, -0x8(r11)
stw r31, -0x4(r11)
blr
_load_gpr:
lwz r14, -0x48(r11)
lwz r15, -0x44(r11)
lwz r16, -0x40(r11)
lwz r17, -0x3c(r11)
lwz r18, -0x38(r11)
lwz r19, -0x34(r11)
lwz r20, -0x30(r11)
lwz r21, -0x2c(r11)
lwz r22, -0x28(r11)
lwz r23, -0x24(r11)
lwz r24, -0x20(r11)
lwz r25, -0x1c(r11)
lwz r26, -0x18(r11)
lwz r27, -0x14(r11)
lwz r28, -0x10(r11)
lwz r29, -0xc(r11)
lwz r30, -0x8(r11)
lwz r31, -0x4(r11)
blr
```
## Pass 2: Branch analysis
Input:
- `.text` section
Output:
- Slices (cuts) from which basic blocks can be derived
- Forward edges between basic blocks
- Initial set of function boundaries
#### Branch instruction hints
- Iterate over all branch opcodes (b, bc, bcctr, bclr)
- Assume that branches with link register save …
- point to the start of another function;
- eventually return back to the call site.
- Assume that branches without link register save are …
- tail calls if their target precedes the function start of the call site;
- probably jumps to basic blocks within the function otherwise (might be wrong)
- Skip indirect local branches (bcctr, bclr) for now.
#### Stack frame detection (CodeWarrior only)
Detect patterns matching stack frames. They might be reordered due to instruction scheduling.
Since CodeWarrior will only emit one function epilogue and prologue per function,
we can use this hint (if present) to reliably detect function bounds.
- On function entry point:
- Execute instructions up to next branch
- Derive stack frame from changes in machine state
- If the stack changed, we found an epilog
- When a `blr` (function return) is encountered:
- Execute instructions in basic block of `blr`
- If stack-related machine state got reverted, assume this BB to contain the prolog
Example 0x80045de0 from RMCP01 (savegpr/restgpr sled):
```asm
# Stack
# +0x04..+0x08: ret addr to caller
# 0x00..+0x04: caller backchain <- caller r1
# -0x30.. 0x00: callee saved gprs <- callee r11
# -0x68..-0x30: callee stack
# -0x6c..-0x68: ret addr to callee
# -0x70..-0x6c: callee backchain <- callee r1
_alloc_stack_frame:
stwu r1, -0x70(r1) # store callee backchain & alloc stack frame
mflr r0
stw r0, 0x74(r1) # store ret addr to caller
la r11, 0x40(r1) # load ptr to callee saved gprs
bl _savegpr_22 # save gprs
mr r31, r1
_free_stack_frame:
mr r10, r31
la r11, 0x40(r10) # load ptr to callee saved gprs
bl _restgpr_22 # restore gprs
lwz r10, 0x0(r1) # load ptr to caller stack frame
lwz r0, 0x4(r10) # load ret addr to caller
mr r1, r10 # free stack frame
mtlr r0
blr # return to caller
```
Example 0x80228490 from RMCP01 (stmw/lmw):
```asm
# Stack
# +0x04..+0x08: ret addr to caller
# 0x00..+0x04: caller backchain <- caller r1
# -0x30.. 0x00: callee saved gprs <- callee r11
# -0x38..-0x30: callee stack
# -0x3c..-0x38: ret addr to callee
# -0x40..-0x3c: callee backchain <- callee r1
_alloc_stack_frame:
stwu r1, -0x40(r1) # store callee backchain & alloc stack frame
mflr r0
stw r0, 0x44(r1) # store ret addr to caller
stmw r20, -0x30(r1) # save gprs
_free_stack_frame:
lmw r20, -0x30(r1) # restore gprs
lwz r0, 0x44(r1) # load ret addr to caller
mtlr r0
la r1, 0x40(r1) # free stack frame
blr # return to caller
```
## TODO
Add the following rules:
- follow indirect local branches
- destructor detection
- vtable detection

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[package]
name = "ppc750cl-asm"
version = "0.3.0"
edition = "2021"
authors = ["Luke Street <luke@street.dev>"]
license = "MIT OR Apache-2.0"
description = "Assembler for PowerPC 750CL"
keywords = ["powerpc", "wii", "gamecube"]
repository = "https://github.com/encounter/ppc750cl"
[features]
default = ["std"]
std = []
[dependencies]
phf = "0.11"

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asm/src/generated.rs Normal file

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6
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#![cfg_attr(not(feature = "std"), no_std)]
mod generated;
mod types;
pub use generated::*;
pub use types::{Argument, ArgumentError};

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use crate::Arguments;
use core::fmt::Formatter;
#[derive(Debug)]
pub enum ArgumentError {
ArgOutOfRangeUnsigned { index: usize, value: u32, start: u32, end: u32 },
ArgOutOfRangeSigned { index: usize, value: i32, start: i32, end: i32 },
ArgCount { value: usize, expected: usize },
UnknownMnemonic,
}
impl core::fmt::Display for ArgumentError {
fn fmt(&self, _f: &mut Formatter<'_>) -> core::fmt::Result {
todo!()
}
}
#[cfg(feature = "std")]
impl std::error::Error for ArgumentError {}
#[derive(Debug, Default, Clone, Copy, Eq, PartialEq)]
pub enum Argument {
#[default]
None,
Unsigned(u32),
Signed(i32),
}
pub const fn parse_unsigned(
args: &Arguments,
index: usize,
start: u32,
end: u32,
) -> Result<u32, ArgumentError> {
match args[index] {
Argument::Unsigned(value) => {
if value >= start && value <= end {
Ok(value)
} else {
Err(ArgumentError::ArgOutOfRangeUnsigned { index, value, start, end })
}
}
Argument::Signed(value) => {
if value >= start as i32 && value <= end as i32 {
Ok(value as u32)
} else {
Err(ArgumentError::ArgOutOfRangeUnsigned { index, value: value as u32, start, end })
}
}
Argument::None => Err(ArgumentError::ArgCount { value: index, expected: index + 1 }),
}
}
pub const fn parse_signed(
args: &Arguments,
index: usize,
start: i32,
end: i32,
) -> Result<i32, ArgumentError> {
match args[index] {
Argument::Unsigned(value) => {
if (start < 0 || value >= start as u32) && value <= end as u32 {
Ok(value as i32)
} else {
Err(ArgumentError::ArgOutOfRangeSigned { index, value: value as i32, start, end })
}
}
Argument::Signed(value) => {
if value >= start && value <= end {
Ok(value)
} else {
Err(ArgumentError::ArgOutOfRangeSigned { index, value, start, end })
}
}
Argument::None => Err(ArgumentError::ArgCount { value: index, expected: index + 1 }),
}
}
pub const fn arg_count(args: &Arguments) -> usize {
let mut i = 0;
while i < args.len() && !matches!(args[i], Argument::None) {
i += 1;
}
i
}
pub const fn check_arg_count(args: &Arguments, expected: usize) -> Result<(), ArgumentError> {
let value = arg_count(args);
if value == expected {
Ok(())
} else {
Err(ArgumentError::ArgCount { value, expected })
}
}

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use ppc750cl_asm::*;
use Argument::{None, Signed as S, Unsigned as U};
macro_rules! assert_asm {
($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $arg4:expr, $arg5: expr, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, $arg4, $arg5]).unwrap(), $code)
}};
($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $arg4:expr, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, $arg4, None]).unwrap(), $code)
}};
($mnemonic:literal, $arg1:expr, $arg2:expr, $arg3:expr, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[$arg1, $arg2, $arg3, None, None]).unwrap(), $code)
}};
($mnemonic:literal, $arg1:expr, $arg2:expr, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[$arg1, $arg2, None, None, None]).unwrap(), $code)
}};
($mnemonic:literal, $arg1:expr, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[$arg1, None, None, None, None]).unwrap(), $code)
}};
($mnemonic:literal, $code:literal) => {{
assert_eq!(assemble($mnemonic, &[None, None, None, None, None]).unwrap(), $code)
}};
}
#[test]
fn test_ins_add() {
assert_asm!("add", U(2), U(3), U(4), 0x7C432214); // add r2, r3, r4
assert_asm!("add.", U(7), U(6), U(5), 0x7CE62A15); // add. r7, r6, r5
assert_asm!("addo", U(31), U(31), U(31), 0x7FFFFE14); // addo r31, r31, r31
assert_asm!("addo.", U(28), U(29), U(30), 0x7F9DF615); // addo. r28, r29, r30
}
#[test]
fn test_ins_addc() {
assert_asm!("addc", U(2), U(3), U(4), 0x7C432014); // addc r2, r3, r4
assert_asm!("addc.", U(7), U(6), U(5), 0x7CE62815); // addc. r7, r6, r5
assert_asm!("addco", U(31), U(31), U(31), 0x7FFFFC14); // addco r31, r31, r31
assert_asm!("addco.", U(28), U(29), U(30), 0x7F9DF415); // addco. r28, r29, r30
}
#[test]
fn test_ins_addi() {
assert_asm!("addi", U(0), U(1), U(0x140), 0x38010140); // addi r0, r1, 0x140
assert_asm!("addi", U(0), U(4), S(-0x7000), 0x38049000); // addi r0, r4, -0x7000
assert_asm!("subi", U(0), U(4), S(0x7000), 0x38049000); // subi r0, r4, 0x7000
assert_asm!("li", U(5), U(0), 0x38A00000); // li r5, 0
}
#[test]
fn test_ins_b() {
assert_asm!("b", U(0), 0x48000000); // b 0x0
assert_asm!("b", U(4), 0x48000004); // b 0x4
assert_asm!("bl", U(0xA5C8), 0x4800A5C9); // bl 0xa5c8
assert_asm!("bl", U(0x23B4D8), 0x4823B4D9); // bl 0x23b4d8
assert_asm!("bl", S(-0x1FC368), 0x4BE03C99); // bl -0x1fc368
assert_asm!("bl", S(-0x23E5A8), 0x4BDC1A59); // bl -0x23e5a8
assert_asm!("bla", U(0x60), 0x48000063); // bla 0x60
assert_asm!("ba", U(0), 0x48000002); // ba 0x0
}
#[test]
fn test_ins_bc() {
assert_asm!("bge", U(0x8), 0x40800008); // bge 0x8
assert_asm!("bge", U(0x2350), 0x40802350); // bge 0x2350
assert_asm!("bge", S(-0x384), 0x4080FC7C); // bge -0x384
assert_asm!("ble", U(0xac), 0x408100AC); // ble 0xac
assert_asm!("ble", S(-0x878), 0x4081F788); // ble -0x878
assert_asm!("bne", U(0x1ba0), 0x40821BA0); // bne 0x1ba0
assert_asm!("bne", S(-0x1c3c), 0x4082E3C4); // bne -0x1c3c
assert_asm!("bne", U(1), U(0xd8), 0x408600D8); // bne cr1, 0xd8
assert_asm!("bne", U(1), S(-0x134), 0x4086FECC); // bne cr1, -0x134
assert_asm!("bge", U(7), U(0xc), 0x409C000C); // bge cr7, 0xc
assert_asm!("blt", U(0xc), 0x4180000C); // blt 0xc
assert_asm!("blt", S(-0x640), 0x4180F9C0); // blt -0x640
assert_asm!("bgt", U(0x21c), 0x4181021C); // bgt 0x21c
assert_asm!("bgt", S(-0x280), 0x4181FD80); // bgt -0x280
assert_asm!("beq", U(0x2304), 0x41822304); // beq 0x2304
assert_asm!("beq", S(-0x1c4), 0x4182FE3C); // beq -0x1c4
assert_asm!("blt", U(1), U(0x1ac), 0x418401AC); // blt cr1, 0x1ac
assert_asm!("blt", U(1), S(-0x31c), 0x4184FCE4); // blt cr1, -0x31c
assert_asm!("bgt", U(1), U(0xc0), 0x418500C0); // bgt cr1, 0xc0
assert_asm!("bgt", U(1), U(0x2e4), 0x418502E4); // bgt cr1, 0x2e4
assert_asm!("beq", U(6), U(0x138), 0x419A0138); // beq cr6, 0x138
assert_asm!("blt", U(7), U(0x8), 0x419C0008); // blt cr7, 0x8
assert_asm!("bdz", S(-0x10), 0x4240FFF0); // bdz -0x10
assert_asm!("bdnz", S(-0xaa0), 0x4200F560); // bdnz -0xaa0
assert_asm!("bdnzf", U(1), U(0x14), 0x40010014); // bdnzf gt, 0x14
assert_asm!("bdzfl", U(1), U(0x34), 0x40410035); // bdzfl gt, 0x34
assert_asm!("bdztla", U(3), U(0x20), 0x41430023); // bdztla un, 0x20
assert_asm!("bdnztla", U(8), S(-0x20), 0x4108FFE3); // bdnztla cr2lt, -0x20
assert_asm!("bne+", U(0x8), 0x40A20008); // bne+ 0x8
}
#[test]
fn test_ins_bcctr() {
assert_asm!("bctr", 0x4E800420); // bctr
assert_asm!("bctrl", 0x4E800421); // bctrl
assert_asm!("beqctr", 0x4D820420); // beqctr
assert_asm!("bgtctrl", U(3), 0x4D8D0421); // bgtctrl cr3
assert_asm!("beqctr+", 0x4DA20420); // beqctr+
assert_asm!("bgtctrl+", U(6), 0x4DB90421); // bgtctrl+ cr6
}
#[test]
fn test_ins_bclr() {
assert_asm!("bgelr", 0x4C800020); // bgelr
assert_asm!("bgelr+", 0x4CA00020); // bgelr+
assert_asm!("blelr", 0x4C810020); // blelr
assert_asm!("bnelr", 0x4C820020); // bnelr
assert_asm!("bnelr", U(7), 0x4C9E0020); // bnelr cr7
assert_asm!("bltlr", 0x4D800020); // bltlr
assert_asm!("bgtlr", 0x4D810020); // bgtlr
assert_asm!("beqlr", 0x4D820020); // beqlr
assert_asm!("beqlr", U(1), 0x4D860020); // beqlr cr1
assert_asm!("blr", 0x4E800020); // blr
assert_asm!("blrl", 0x4E800021); // blrl
assert_asm!("bdnztlr", U(0), 0x4D000020); // bdnztlr lt
assert_asm!("bdnzflrl", U(31), 0x4C1F0021); // bdnzflrl cr7un
}
#[test]
fn test_ins_cmpi() {
assert_asm!("cmpi", U(6), U(0), U(31), U(0), 0x2F1F0000); // cmpi r6, 0, 31, 0
assert_asm!("cmpwi", U(5), U(0xd00), 0x2C050D00); // cmpwi r5, 0xd00
assert_asm!("cmpwi", U(6), U(31), U(0), 0x2F1F0000); // cmpwi r6, 0
}
#[test]
fn test_ins_mfspr() {
assert_asm!("mfsrr0", U(16), 0x7E1A02A6); // mfsrr0 r16
assert_asm!("mfspr", U(3), U(1008), 0x7C70FAA6); // mfspr r3, HID0
assert_asm!("mfibatu", U(3), U(2), 0x7C7482A6); // mfibatu r3, 2
assert_asm!("mfibatl", U(3), U(3), 0x7C7782A6); // mfibatl r3, 3
}
#[test]
fn test_ins_rlwimi() {
assert_asm!("rlwimi", U(3), U(0), U(0), U(27), U(31), 0x500306FE); // rlwimi r3, r0, 0, 27, 31
assert_asm!("rlwimi", U(3), U(0), U(5), U(21), U(26), 0x50032D74); // rlwimi r3, r0, 5, 21, 26
assert_asm!("clrrwi.", U(0), U(0), U(0), 0x5400003F); // clrrwi. r0, r0, 0
}
#[test]
fn test_ins_rlwinm() {
assert_asm!("rlwinm", U(0), U(0), U(0), U(16), U(25), 0x54000432); // rlwinm r0, r0, 0, 16, 25
assert_asm!("rlwinm", U(9), U(0), U(12), U(8), U(19), 0x54096226); // rlwinm r9, r0, 12, 8, 19
assert_asm!("rlwinm.", U(0), U(0), U(0), U(16), U(17), 0x54000423); // rlwinm. r0, r0, 0, 16, 17
assert_asm!("slwi", U(5), U(31), U(2), 0x57E5103A); // slwi r5, r31, 2
assert_asm!("extlwi", U(3), U(4), U(20), U(4), 0x54832026); // extlwi r3, r4, 20, 4
assert_asm!("extrwi", U(3), U(4), U(20), U(1), 0x5483AB3E); // extrwi r3, r4, 20, 1
assert_asm!("extrwi", U(0), U(0), U(2), U(2), 0x540027BE); // extrwi r0, r0, 2, 2
assert_asm!("rlwinm", U(3), U(4), U(19), U(12), U(31), 0x54839B3E); // rlwinm r3, r4, 19, 12, 31
assert_asm!("rotlwi", U(3), U(4), U(4), 0x5483203E); // rotlwi r3, r4, 4
assert_asm!("rotrwi", U(3), U(4), U(4), 0x5483E03E); // rotrwi r3, r4, 4
assert_asm!("clrlwi", U(4), U(3), U(16), 0x5464043E); // clrlwi r4, r3, 16
assert_asm!("clrrwi", U(3), U(4), U(4), 0x54830036); // clrrwi r3, r4, 4
assert_asm!("clrlslwi", U(4), U(3), U(31), U(1), 0x54640FBC); // clrlslwi r4, r3, 31, 1
assert_asm!("clrlslwi", U(9), U(0), U(27), U(5), 0x54092DB4); // clrlslwi r9, r0, 27, 5
assert_asm!("clrlslwi", U(9), U(0), U(20), U(12), 0x54096226); // clrlslwi r9, r0, 20, 12
}
#[test]
fn test_tw() {
assert_asm!("tw", U(0), U(6), U(7), 0x7C063808); // tw 0, r6, r7
assert_asm!("tweq", U(4), U(5), 0x7C842808); // tweq r4, r5
assert_asm!("twlge", U(4), U(5), 0x7CA42808); // twlge r4, r5
assert_asm!("trap", 0x7FE00008); // trap
}
#[test]
fn test_twi() {
assert_asm!("twi", U(0), U(0), U(0), 0x0C000000); // twi 0, r0, 0x0
assert_asm!("twgti", U(7), S(-0x1), 0x0D07FFFF); // twgti r7, -0x1
assert_asm!("twllei", U(4), S(-0xff), 0x0CC4FF01); // twllei r4, -0xff
assert_asm!("twui", U(4), U(0x3), 0x0FE40003); // twui r4, 0x3
}
#[test]
fn test_ins_xor() {
assert_asm!("xor", U(5), U(0), U(5), 0x7C052A78); // xor r5, r0, r5
assert_asm!("xor.", U(7), U(9), U(10), 0x7D275279); // xor. r7, r9, r10
}

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@ -1,20 +0,0 @@
[package]
name = "ppc750cl-py"
version = "0.2.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
description = "Python bindings for PowerPC 750CL Disassembler"
repository = "https://github.com/terorie/ppc750cl"
[lib]
name = "ppc750cl"
crate-type = ["cdylib"]
[features]
extension-module = ["pyo3/extension-module"]
default = ["extension-module"]
[dependencies]
pyo3 = { version = "0.16", features = ["multiple-pymethods"] }
ppc750cl = { version = "0.2.0", path = "../disasm" }

View File

@ -1,257 +0,0 @@
use pyo3::prelude::*;
use pyo3::types::PyBytes;
use ppc750cl::formatter::FormattedIns;
#[pyclass]
struct Ins(ppc750cl::Ins);
#[pymethods]
impl Ins {
#[new]
fn new(code: u32, addr: u32) -> Self {
Ins(ppc750cl::Ins::new(code, addr))
}
#[getter]
fn code(&self) -> u32 {
self.0.code
}
#[getter]
fn addr(&self) -> u32 {
self.0.addr
}
#[getter]
fn opcode(&self) -> &'static str {
self.0.op.mnemonic()
}
fn __str__(&self) -> String {
FormattedIns(self.0.clone()).to_string()
}
fn fields(&self) -> Vec<(&'static str, i64)> {
self.0
.fields()
.iter()
.flat_map(|field| field.argument().map(|arg| (field.name(), arg.into())))
.collect()
}
}
#[allow(non_snake_case)]
#[pymethods]
impl Ins {
#[getter]
fn simm(&self) -> i64 {
self.0.field_simm() as i64
}
#[getter]
fn uimm(&self) -> i64 {
self.0.field_uimm() as i64
}
#[getter]
fn offset(&self) -> i64 {
self.0.field_offset() as i64
}
#[getter]
fn ps_offset(&self) -> i64 {
self.0.field_ps_offset() as i64
}
#[getter]
fn BO(&self) -> i64 {
self.0.field_BO() as i64
}
#[getter]
fn BI(&self) -> i64 {
self.0.field_BI() as i64
}
#[getter]
fn BD(&self) -> i64 {
self.0.field_BD() as i64
}
#[getter]
fn LI(&self) -> i64 {
self.0.field_LI() as i64
}
#[getter]
fn SH(&self) -> i64 {
self.0.field_SH() as i64
}
#[getter]
fn MB(&self) -> i64 {
self.0.field_SH() as i64
}
#[getter]
fn ME(&self) -> i64 {
self.0.field_SH() as i64
}
#[getter]
fn rS(&self) -> i64 {
self.0.field_rS() as i64
}
#[getter]
fn rD(&self) -> i64 {
self.0.field_rD() as i64
}
#[getter]
fn rA(&self) -> i64 {
self.0.field_rA() as i64
}
#[getter]
fn rB(&self) -> i64 {
self.0.field_rB() as i64
}
#[getter]
fn sr(&self) -> i64 {
self.0.field_sr() as i64
}
#[getter]
fn spr(&self) -> i64 {
self.0.field_spr() as i64
}
#[getter]
fn frS(&self) -> i64 {
self.0.field_frS() as i64
}
#[getter]
fn frD(&self) -> i64 {
self.0.field_frD() as i64
}
#[getter]
fn frA(&self) -> i64 {
self.0.field_frA() as i64
}
#[getter]
fn frB(&self) -> i64 {
self.0.field_frB() as i64
}
#[getter]
fn frC(&self) -> i64 {
self.0.field_frC() as i64
}
#[getter]
fn crbD(&self) -> i64 {
self.0.field_crbD() as i64
}
#[getter]
fn crbA(&self) -> i64 {
self.0.field_crbA() as i64
}
#[getter]
fn crbB(&self) -> i64 {
self.0.field_crbB() as i64
}
#[getter]
fn crfD(&self) -> i64 {
self.0.field_crfD() as i64
}
#[getter]
fn crfS(&self) -> i64 {
self.0.field_crfS() as i64
}
#[getter]
fn crm(&self) -> i64 {
self.0.field_crm() as i64
}
#[getter]
fn ps_I(&self) -> i64 {
self.0.field_ps_I() as i64
}
#[getter]
fn ps_IX(&self) -> i64 {
self.0.field_ps_IX() as i64
}
#[getter]
fn ps_W(&self) -> i64 {
self.0.field_ps_W() as i64
}
#[getter]
fn ps_WX(&self) -> i64 {
self.0.field_ps_WX() as i64
}
#[getter]
fn ps_NB(&self) -> i64 {
self.0.field_NB() as i64
}
#[getter]
fn tbr(&self) -> i64 {
self.0.field_tbr() as i64
}
#[getter]
fn mtfsf_FM(&self) -> i64 {
self.0.field_mtfsf_FM() as i64
}
#[getter]
fn mtfsf_IMM(&self) -> i64 {
self.0.field_mtfsf_IMM() as i64
}
#[getter]
fn TO(&self) -> i64 {
self.0.field_TO() as i64
}
}
impl From<ppc750cl::Ins> for Ins {
fn from(ins: ppc750cl::Ins) -> Self {
Self(ins)
}
}
#[pyclass]
struct DisasmIterator {
bytes: Py<PyBytes>,
addr: u32,
offset: u32,
left: usize,
}
#[pymethods]
impl DisasmIterator {
fn __iter__(slf: PyRef<Self>) -> PyRef<DisasmIterator> {
slf
}
fn __next__(mut slf: PyRefMut<Self>) -> PyResult<Option<Ins>> {
if slf.left < 4 {
return Ok(None);
}
let bytes = slf.bytes.as_ref(slf.py());
let code = ((bytes[(slf.offset) as usize] as u32) << 24)
| ((bytes[(slf.offset + 1) as usize] as u32) << 16)
| ((bytes[(slf.offset + 2) as usize] as u32) << 8)
| (bytes[(slf.offset + 3) as usize] as u32);
slf.offset += 4;
slf.left -= 4;
let ins = Ins::new(code, slf.addr);
slf.addr += 4;
Ok(Some(ins))
}
}
#[pyfunction(code, addr, offset = "0", size = "None")]
fn disasm_iter(
code: &PyBytes,
addr: u32,
offset: u32,
size: Option<u32>,
) -> PyResult<DisasmIterator> {
let left = match size {
None => code.as_bytes().len().saturating_sub(offset as usize),
Some(v) => v as usize,
};
Ok(DisasmIterator {
bytes: code.into(),
addr,
offset,
left,
})
}
#[pymodule]
fn ppc750cl(_: Python, m: &PyModule) -> PyResult<()> {
m.add_class::<Ins>()?;
m.add_wrapped(wrap_pyfunction!(disasm_iter))?;
Ok(())
}

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@ -1,13 +1,12 @@
[package]
name = "ppc750cl"
version = "0.2.0"
version = "0.3.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
authors = ["Luke Street <luke@street.dev>"]
license = "MIT OR Apache-2.0"
description = "Disassembler for PowerPC 750CL"
keywords = ["powerpc", "wii", "gamecube"]
repository = "https://github.com/terorie/ppc750cl"
repository = "https://github.com/encounter/ppc750cl"
[dependencies]
num-traits = "0.2"
serde = "1.0"
# Intentionally left blank.

368
disasm/src/disasm.rs Normal file
View File

@ -0,0 +1,368 @@
use core::{
fmt,
fmt::{Display, Formatter, LowerHex},
};
use crate::generated::{
Arguments, Opcode, BASE_MNEMONICS, DEFS_FUNCTIONS, SIMPLIFIED_MNEMONICS, USES_FUNCTIONS,
};
/// A PowerPC 750CL instruction.
#[derive(Default, Clone, Debug, Eq, PartialEq)]
pub struct Ins {
pub code: u32,
pub op: Opcode,
}
impl Ins {
/// Create a new instruction from its raw code.
pub fn new(code: u32) -> Self {
Self { code, op: Opcode::_detect(code) }
}
/// Parse the instruction into a simplified mnemonic, if any match.
pub fn simplified(self) -> SimplifiedIns {
SimplifiedIns::new(self)
}
/// Parse the instruction into its basic form.
pub fn basic_form(self) -> SimplifiedIns {
SimplifiedIns::basic_form(self)
}
/// Returns all registers defined by the instruction.
pub fn defs(&self) -> Arguments {
DEFS_FUNCTIONS[self.op as usize](self)
}
/// Returns all registers used by the instruction.
pub fn uses(&self) -> Arguments {
USES_FUNCTIONS[self.op as usize](self)
}
/// Returns the relative branch offset of the instruction, if any.
pub fn branch_offset(&self) -> Option<i32> {
match self.op {
Opcode::B => Some(self.field_li()),
Opcode::Bc => Some(self.field_bd() as i32),
_ => None,
}
}
/// Returns the absolute branch destination of the instruction, if any.
pub fn branch_dest(&self, addr: u32) -> Option<u32> {
self.branch_offset().and_then(|offset| {
if self.field_aa() {
Some(offset as u32)
} else {
addr.checked_add_signed(offset)
}
})
}
/// Whether the instruction is any kind of branch.
pub fn is_branch(&self) -> bool {
matches!(self.op, Opcode::B | Opcode::Bc | Opcode::Bcctr | Opcode::Bclr)
}
/// Whether the instruction is a direct branch.
pub fn is_direct_branch(&self) -> bool {
matches!(self.op, Opcode::B | Opcode::Bc)
}
/// Whether the instruction is an unconditional branch.
pub fn is_unconditional_branch(&self) -> bool {
match self.op {
Opcode::B => true,
Opcode::Bc | Opcode::Bcctr | Opcode::Bclr => {
self.field_bo() == 20 && self.field_bi() == 0
}
_ => false,
}
}
/// Whether the instruction is a conditional branch.
pub fn is_conditional_branch(&self) -> bool {
self.is_branch() && !self.is_unconditional_branch()
}
/// Whether the instruction is a branch with link. (blr)
#[inline]
pub fn is_blr(&self) -> bool {
self.code == 0x4e800020
}
}
macro_rules! field_arg_no_display {
($name:ident, $typ:ident) => {
#[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)]
pub struct $name(pub $typ);
impl From<$name> for Argument {
fn from(x: $name) -> Argument {
Argument::$name(x)
}
}
impl From<$typ> for $name {
fn from(x: $typ) -> $name {
$name(x)
}
}
};
}
macro_rules! field_arg {
($name:ident, $typ:ident) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
write!(f, "{}", self.0)
}
}
};
($name:ident, $typ:ident, $format:literal) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
write!(f, $format, self.0)
}
}
};
($name:ident, $typ:ident, $format:literal, $format_arg:expr) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
write!(f, $format, $format_arg(self.0))
}
}
};
}
// General-purpose register.
field_arg!(GPR, u8, "r{}");
// Floating-point register (direct or paired-singles mode).
field_arg!(FPR, u8, "f{}");
// Segment register.
field_arg!(SR, u8);
// Special-purpose register.
field_arg_no_display!(SPR, u16);
impl Display for SPR {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
f.write_str(match self.0 {
1 => "XER",
8 => "LR",
9 => "CTR",
18 => "DSISR",
19 => "DAR",
22 => "DEC",
25 => "SDR1",
26 => "SRR0",
27 => "SRR1",
272 => "SPRG0",
273 => "SPRG1",
274 => "SPRG2",
275 => "SPRG3",
282 => "EAR",
287 => "PVR",
528 => "IBAT0U",
529 => "IBAT0L",
530 => "IBAT1U",
531 => "IBAT1L",
532 => "IBAT2U",
533 => "IBAT2L",
534 => "IBAT3U",
535 => "IBAT3L",
536 => "DBAT0U",
537 => "DBAT0L",
538 => "DBAT1U",
539 => "DBAT1L",
540 => "DBAT2U",
541 => "DBAT2L",
542 => "DBAT3U",
543 => "DBAT3L",
912 => "GQR0",
913 => "GQR1",
914 => "GQR2",
915 => "GQR3",
916 => "GQR4",
917 => "GQR5",
918 => "GQR6",
919 => "GQR7",
920 => "HID2",
921 => "WPAR",
922 => "DMA_U",
923 => "DMA_L",
936 => "UMMCR0",
937 => "UPMC1",
938 => "UPMC2",
939 => "USIA",
940 => "UMMCR1",
941 => "UPMC3",
942 => "UPMC4",
943 => "USDA",
952 => "MMCR0",
953 => "PMC1",
954 => "PMC2",
955 => "SIA",
956 => "MMCR1",
957 => "PMC3",
958 => "PMC4",
959 => "SDA",
1008 => "HID0",
1009 => "HID1",
1010 => "IABR",
1013 => "DABR",
1017 => "L2CR",
1019 => "ICTC",
1020 => "THRM1",
1021 => "THRM2",
1022 => "THRM3",
_ => return write!(f, "{}", self.0),
})
}
}
// Condition register field.
field_arg!(CRField, u8, "cr{}");
// Condition register bit (index + condition case).
field_arg_no_display!(CRBit, u8);
impl Display for CRBit {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
let cr = self.0 >> 2;
let cc = self.0 & 3;
if cr != 0 {
write!(f, "{}", CRField(cr))?;
}
const CR_NAMES: [&str; 4] = ["lt", "gt", "eq", "un"];
f.write_str(CR_NAMES[cc as usize])
}
}
// Paired-single graphics quantization register
field_arg!(GQR, u8, "qr{}");
// Unsigned immediate.
field_arg!(Uimm, u16, "{:#x}");
// Signed immediate.
field_arg!(Simm, i16, "{:#x}", SignedHexLiteral);
// Offset for indirect memory reference.
field_arg!(Offset, i16, "{:#x}", SignedHexLiteral);
// Branch destination.
field_arg!(BranchDest, i32, "{:#x}", SignedHexLiteral);
impl From<i16> for BranchDest {
fn from(x: i16) -> BranchDest {
BranchDest(x as i32)
}
}
// Unsigned opaque argument.
field_arg!(OpaqueU, u16);
impl From<u8> for OpaqueU {
fn from(x: u8) -> OpaqueU {
OpaqueU(x as u16)
}
}
#[derive(Debug, Default, Clone, Eq, PartialEq)]
pub enum Argument {
#[default]
None,
GPR(GPR),
FPR(FPR),
SR(SR),
SPR(SPR),
CRField(CRField),
CRBit(CRBit),
GQR(GQR),
Uimm(Uimm),
Simm(Simm),
Offset(Offset),
BranchDest(BranchDest),
OpaqueU(OpaqueU),
}
impl Display for Argument {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
match self {
Argument::None => Ok(()),
Argument::GPR(x) => x.fmt(f),
Argument::FPR(x) => x.fmt(f),
Argument::SR(x) => x.fmt(f),
Argument::SPR(x) => x.fmt(f),
Argument::CRField(x) => x.fmt(f),
Argument::CRBit(x) => x.fmt(f),
Argument::GQR(x) => x.fmt(f),
Argument::Uimm(x) => x.fmt(f),
Argument::Simm(x) => x.fmt(f),
Argument::Offset(x) => x.fmt(f),
Argument::BranchDest(x) => x.fmt(f),
Argument::OpaqueU(x) => x.fmt(f),
}
}
}
/// A simplified PowerPC 750CL instruction.
pub struct SimplifiedIns {
pub ins: Ins,
pub mnemonic: &'static str,
pub args: Arguments,
}
impl SimplifiedIns {
pub fn new(ins: Ins) -> Self {
let (mnemonic, args) = SIMPLIFIED_MNEMONICS[ins.op as usize](&ins);
Self { ins, mnemonic, args }
}
pub fn basic_form(ins: Ins) -> Self {
let (mnemonic, args) = BASE_MNEMONICS[ins.op as usize](&ins);
Self { ins, mnemonic, args }
}
}
impl Display for SimplifiedIns {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
write!(f, "{}", self.mnemonic)?;
let mut writing_offset = false;
for (i, argument) in self.args.iter().enumerate() {
if matches!(argument, Argument::None) {
break;
}
if i == 0 {
write!(f, " ")?;
} else if !writing_offset {
write!(f, ", ")?;
}
write!(f, "{}", argument)?;
if let Argument::Offset(_) = argument {
write!(f, "(")?;
writing_offset = true;
continue;
}
if writing_offset {
write!(f, ")")?;
writing_offset = false;
}
}
Ok(())
}
}
pub struct SignedHexLiteral<T>(pub T);
impl LowerHex for SignedHexLiteral<i16> {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
if self.0 < 0 {
write!(f, "-")?;
LowerHex::fmt(&-(self.0 as i32), f)
} else {
LowerHex::fmt(&self.0, f)
}
}
}
impl LowerHex for SignedHexLiteral<i32> {
fn fmt(&self, f: &mut Formatter<'_>) -> fmt::Result {
if self.0 < 0 {
write!(f, "-")?;
LowerHex::fmt(&-(self.0 as i64), f)
} else {
LowerHex::fmt(&self.0, f)
}
}
}

View File

@ -1,33 +0,0 @@
use std::fmt::{Display, Formatter};
use crate::prelude::*;
pub struct FormattedIns(pub Ins);
impl Display for FormattedIns {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
let simple = self.0.clone().simplified();
write!(f, "{}{}", simple.mnemonic, simple.suffix)?;
let mut writing_offset = false;
for (i, arg) in simple.args.iter().enumerate() {
if i == 0 {
write!(f, " ")?;
}
if i > 0 && !writing_offset {
write!(f, ", ")?;
}
if let Argument::Offset(val) = arg {
write!(f, "{}(", val)?;
writing_offset = true;
continue;
} else {
write!(f, "{}", arg)?;
}
if writing_offset {
write!(f, ")")?;
writing_offset = false;
}
}
Ok(())
}
}

File diff suppressed because it is too large Load Diff

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@ -1,34 +0,0 @@
use crate::Ins;
/// Returns an iterator of instructions in the given byte slice.
pub fn disasm_iter(code: &[u8], addr: u32) -> DisasmIterator {
DisasmIterator { code, addr }
}
pub struct DisasmIterator<'a> {
code: &'a [u8],
addr: u32,
}
impl<'a> Iterator for DisasmIterator<'a> {
type Item = Ins;
fn next(&mut self) -> Option<Self::Item> {
if self.code.len() < 4 {
return None;
}
let code = ((self.code[0] as u32) << 24)
| ((self.code[1] as u32) << 16)
| ((self.code[2] as u32) << 8)
| (self.code[3] as u32);
self.code = &self.code[4..];
let addr = self.addr;
self.addr += 4;
Some(Ins::new(code, addr))
}
fn size_hint(&self) -> (usize, Option<usize>) {
let count = self.code.len() / 4;
(count, Some(count))
}
}

View File

@ -1,458 +1,9 @@
use std::fmt::{Display, Formatter, LowerHex, UpperHex, Write};
use std::ops::Range;
use num_traits::{AsPrimitive, PrimInt};
pub use crate::iter::{disasm_iter, DisasmIterator};
pub mod formatter;
#![no_std]
mod disasm;
mod generated;
mod iter;
pub use generated::*;
pub mod prelude {
pub use crate::formatter::FormattedIns;
pub use crate::Argument;
pub use crate::Field::*;
pub use crate::Ins;
pub use crate::Opcode::*;
pub use crate::SimplifiedIns;
pub use crate::{
Bit, BranchDest, CRBit, CRField, Offset, OpaqueU, Simm, Uimm, FPR, GPR, GQR, SPR, SR,
};
}
macro_rules! field_arg_no_display {
($name:ident, $typ:ident) => {
#[derive(Debug, Copy, Clone, Ord, PartialOrd, Eq, PartialEq)]
pub struct $name(pub $typ);
impl std::convert::From<$name> for Argument {
fn from(x: $name) -> Argument {
Argument::$name(x)
}
}
};
}
macro_rules! field_arg {
($name:ident, $typ:ident) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
write!(f, "{}", self.0)
}
}
};
($name:ident, $typ:ident, $format:literal) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
write!(f, $format, self.0)
}
}
};
($name:ident, $typ:ident, $format:literal, $format_arg:expr) => {
field_arg_no_display!($name, $typ);
impl Display for $name {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
write!(f, $format, $format_arg(self.0))
}
}
};
}
#[inline(always)]
fn bit(x: u32, idx: usize) -> bool {
((x >> (32 - idx - 1)) & 1) == 1
}
#[inline(always)]
fn bits<F>(x: u32, range: Range<usize>) -> F
where
F: 'static + std::marker::Copy,
u32: AsPrimitive<F>,
{
let masked: u32 = (x >> (32 - range.end)) & ((1 << range.len()) - 1);
masked.as_()
}
// https://stackoverflow.com/questions/44711012/how-do-i-format-a-signed-integer-to-a-sign-aware-hexadecimal-representation
struct ReallySigned<N: PrimInt>(N);
impl<N: PrimInt> LowerHex for ReallySigned<N> {
fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result {
let num = self.0.to_i32().unwrap();
let prefix = if f.alternate() { "0x" } else { "" };
let bare_hex = format!("{:x}", num.abs());
f.pad_integral(num >= 0, prefix, &bare_hex)
}
}
impl<N: PrimInt> UpperHex for ReallySigned<N> {
fn fmt(&self, f: &mut std::fmt::Formatter) -> std::fmt::Result {
let num = self.0.to_i32().unwrap();
let prefix = if f.alternate() { "0x" } else { "" };
let bare_hex = format!("{:X}", num.abs());
f.pad_integral(num >= 0, prefix, &bare_hex)
}
}
// General-purpose register.
field_arg!(GPR, u8, "r{}");
// Floating-point register (direct or paired-singles mode).
field_arg!(FPR, u8, "f{}");
// Segment register.
field_arg!(SR, u8);
// Special-purpose register.
field_arg_no_display!(SPR, u16);
impl Display for SPR {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
f.write_str(match self.0 {
1 => "XER",
8 => "LR",
9 => "CTR",
18 => "DSISR",
19 => "DAR",
22 => "DEC",
25 => "SDR1",
26 => "SRR0",
27 => "SRR1",
272 => "SPRG0",
273 => "SPRG1",
274 => "SPRG2",
275 => "SPRG3",
282 => "EAR",
287 => "PVR",
528 => "IBAT0U",
529 => "IBAT0L",
530 => "IBAT1U",
531 => "IBAT1L",
532 => "IBAT2U",
533 => "IBAT2L",
534 => "IBAT3U",
535 => "IBAT3L",
536 => "DBAT0U",
537 => "DBAT0L",
538 => "DBAT1U",
539 => "DBAT1L",
540 => "DBAT2U",
541 => "DBAT2L",
542 => "DBAT3U",
543 => "DBAT3L",
912 => "GQR0",
913 => "GQR1",
914 => "GQR2",
915 => "GQR3",
916 => "GQR4",
917 => "GQR5",
918 => "GQR6",
919 => "GQR7",
920 => "HID2",
921 => "WPAR",
922 => "DMA_U",
923 => "DMA_L",
936 => "UMMCR0",
937 => "UPMC1",
938 => "UPMC2",
939 => "USIA",
940 => "UMMCR1",
941 => "UPMC3",
942 => "UPMC4",
943 => "USDA",
952 => "MMCR0",
953 => "PMC1",
954 => "PMC2",
955 => "SIA",
956 => "MMCR1",
957 => "PMC3",
958 => "PMC4",
959 => "SDA",
1008 => "HID0",
1009 => "HID1",
1010 => "IABR",
1013 => "DABR",
1017 => "L2CR",
1019 => "ICTC",
1020 => "THRM1",
1021 => "THRM2",
1022 => "THRM3",
_ => return write!(f, "{}", self.0),
})
}
}
// Condition register field.
field_arg!(CRField, u8, "cr{}");
// Condition register bit (index + condition case).
field_arg_no_display!(CRBit, u8);
impl Display for CRBit {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
let cr = self.0 >> 2;
let cc = self.0 & 3;
if cr != 0 {
write!(f, "{}", CRField(cr))?;
}
const CR_NAMES: [&str; 4] = ["lt", "gt", "eq", "un"];
f.write_str(CR_NAMES[cc as usize])
}
}
// Paired-single graphics quantization register
field_arg!(GQR, u8, "qr{}");
// Unsigned immediate.
field_arg!(Uimm, u16, "{:#x}");
// Signed immediate.
field_arg!(Simm, i16, "{:#x}", ReallySigned);
// Offset for indirect memory reference.
field_arg!(Offset, i16, "{:#x}", ReallySigned);
// Branch destination.
field_arg!(BranchDest, i32, "{:#x}", ReallySigned);
// Opaque zero or one argument.
field_arg_no_display!(Bit, bool);
impl Display for Bit {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
f.write_char(if self.0 { '1' } else { '0' })
}
}
// Unsigned opaque argument.
field_arg!(OpaqueU, u32);
#[derive(Debug, Clone, Eq, PartialEq)]
pub enum Argument {
GPR(GPR),
FPR(FPR),
SR(SR),
SPR(SPR),
CRField(CRField),
CRBit(CRBit),
GQR(GQR),
Uimm(Uimm),
Simm(Simm),
Offset(Offset),
BranchDest(BranchDest),
Bit(Bit),
OpaqueU(OpaqueU),
}
impl Display for Argument {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
match self {
Argument::GPR(x) => x.fmt(f),
Argument::FPR(x) => x.fmt(f),
Argument::SR(x) => x.fmt(f),
Argument::SPR(x) => x.fmt(f),
Argument::CRField(x) => x.fmt(f),
Argument::CRBit(x) => x.fmt(f),
Argument::GQR(x) => x.fmt(f),
Argument::Uimm(x) => x.fmt(f),
Argument::Simm(x) => x.fmt(f),
Argument::Offset(x) => x.fmt(f),
Argument::BranchDest(x) => x.fmt(f),
Argument::Bit(x) => x.fmt(f),
Argument::OpaqueU(x) => x.fmt(f),
}
}
}
impl From<Argument> for i64 {
fn from(arg: Argument) -> Self {
match arg {
Argument::GPR(x) => x.0 as i64,
Argument::FPR(x) => x.0 as i64,
Argument::SR(x) => x.0 as i64,
Argument::SPR(x) => x.0 as i64,
Argument::CRField(x) => x.0 as i64,
Argument::CRBit(x) => x.0 as i64,
Argument::GQR(x) => x.0 as i64,
Argument::Uimm(x) => x.0 as i64,
Argument::Simm(x) => x.0 as i64,
Argument::Offset(x) => x.0 as i64,
Argument::BranchDest(x) => x.0 as i64,
Argument::Bit(x) => x.0 as i64,
Argument::OpaqueU(x) => x.0 as i64,
}
}
}
impl TryInto<Argument> for &Field {
type Error = ();
fn try_into(self) -> Result<Argument, Self::Error> {
self.argument().ok_or(())
}
}
impl Opcode {
/// Detects the opcode of a machine code instruction.
pub fn detect(code: u32) -> Self {
Self::_detect(code) // auto-generated
}
/// Prints the basic mnemonic of an opcode.
pub fn mnemonic(self) -> &'static str {
self._mnemonic() // auto-generated
}
}
impl Default for Opcode {
fn default() -> Self {
Opcode::Illegal
}
}
impl std::string::ToString for Opcode {
fn to_string(&self) -> String {
let mnemonic = self.mnemonic();
mnemonic.to_owned()
}
}
/// A PowerPC 750CL instruction.
#[derive(Default, Clone, Debug, Eq, PartialEq)]
pub struct Ins {
pub code: u32,
pub addr: u32,
pub op: Opcode,
}
impl Ins {
const BLR: u32 = 0x4e800020;
/// Constructs an instruction from the given machine code and address.
pub fn new(code: u32, addr: u32) -> Self {
Self {
code,
addr,
op: Opcode::detect(code),
}
}
/// Returns the simplified representation of an instruction.
pub fn simplified(self) -> SimplifiedIns {
self._simplified() // auto-generated
}
/// Gets the fields of an instruction.
pub fn fields(&self) -> Vec<Field> {
self._fields() // auto-generated
}
/// Gets the suffix of an instruction mnemonic.
pub fn suffix(&self) -> String {
self._suffix() // auto-generated
}
/// Gets the defs of an instruction.
pub fn defs(&self) -> Vec<Field> {
self._defs() // auto-generated
}
/// Gets the uses of an instruction.
pub fn uses(&self) -> Vec<Field> {
self._uses() // auto-generated
}
/// Gets the given bit from the machine code instruction.
pub fn bit(&self, idx: usize) -> bool {
bit(self.code, idx)
}
/// Gets the given range of btis from the machine code instruction.
pub fn bits(&self, range: Range<usize>) -> u32 {
bits(self.code, range)
}
pub fn branch_offset(&self) -> Option<i32> {
match self.op {
Opcode::B => Some(self.field_LI() as i32),
Opcode::Bc => Some(self.field_BD() as i32),
_ => None,
}
}
pub fn branch_dest(&self) -> Option<u32> {
self.branch_offset().and_then(|offset| {
if self.field_AA() {
Some(offset as u32)
} else if offset < 0 {
self.addr.checked_sub((-offset) as u32)
} else {
self.addr.checked_add(offset as u32)
}
})
}
pub fn is_branch(&self) -> bool {
matches!(
self.op,
Opcode::B | Opcode::Bc | Opcode::Bcctr | Opcode::Bclr
)
}
pub fn is_direct_branch(&self) -> bool {
matches!(self.op, Opcode::B | Opcode::Bc)
}
pub fn is_unconditional_branch(&self) -> bool {
match self.op {
Opcode::B => true,
Opcode::Bc | Opcode::Bcctr | Opcode::Bclr => {
self.field_BO() == 20 && self.field_BI() == 0
}
_ => false,
}
}
pub fn is_conditional_branch(&self) -> bool {
self.is_branch() && !self.is_unconditional_branch()
}
#[inline]
pub fn is_blr(&self) -> bool {
// self.op == Opcode::Bclr && self.is_unconditional_branch() && !self.field_LK()
self.code == Ins::BLR
}
}
/// A simplified PowerPC 750CL instruction.
pub struct SimplifiedIns {
pub ins: Ins,
pub mnemonic: &'static str,
pub suffix: String,
pub args: Vec<Argument>,
}
impl Display for SimplifiedIns {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
write!(f, "{}{} ", self.mnemonic, self.suffix)?;
let mut writing_offset = false;
for (i, argument) in self.args.iter().enumerate() {
write!(f, "{}", argument)?;
if let Argument::Offset(_) = argument {
write!(f, "(")?;
writing_offset = true;
continue;
}
if writing_offset {
write!(f, ")")?;
writing_offset = false;
}
if i != self.args.len() - 1 {
write!(f, ", ")?;
}
}
Ok(())
}
}
impl SimplifiedIns {
pub fn basic_form(ins: Ins) -> Self {
Self {
mnemonic: ins.op.mnemonic(),
suffix: ins.suffix(),
args: ins
.fields()
.iter()
.flat_map(|field| field.argument())
.collect(),
ins,
}
}
}
pub use disasm::{
Argument, BranchDest, CRBit, CRField, Ins, Offset, OpaqueU, Simm, SimplifiedIns, Uimm, FPR,
GPR, GQR, SPR, SR,
};
pub use generated::{Arguments, Opcode};

View File

@ -1,12 +1,22 @@
use ppc750cl::prelude::*;
use ppc750cl::{Argument, Ins, Opcode, SimplifiedIns, FPR, GPR};
macro_rules! assert_asm {
($ins:ident, $disasm:literal) => {{
assert_eq!(format!("{}", FormattedIns($ins)), $disasm)
assert_eq!(format!("{}", SimplifiedIns::new($ins)), $disasm)
}};
($code:literal, $disasm:literal) => {{
let ins = Ins::new($code, 0x8000_0000);
assert_eq!(format!("{}", FormattedIns(ins)), $disasm)
let ins = Ins::new($code);
assert_eq!(format!("{}", SimplifiedIns::new(ins)), $disasm)
}};
}
macro_rules! assert_basic {
($ins:ident, $disasm:literal) => {{
assert_eq!(format!("{}", SimplifiedIns::basic_form($ins)), $disasm)
}};
($code:literal, $disasm:literal) => {{
let ins = Ins::new($code);
assert_eq!(format!("{}", SimplifiedIns::basic_form(ins)), $disasm)
}};
}
@ -20,9 +30,9 @@ fn test_ins_add() {
#[test]
fn test_ins_addc() {
let ins = Ins::new(0x7c002014, 0x8000_0000u32);
assert_eq!(ins.op, Addc);
assert_eq!(ins.fields(), vec![rD(GPR(0)), rA(GPR(0)), rB(GPR(4))]);
let ins = Ins::new(0x7c002014);
assert_eq!(ins.op, Opcode::Addc);
// assert_eq!(ins.fields(), vec![rD(GPR(0)), rA(GPR(0)), rB(GPR(4))]);
assert_asm!(ins, "addc r0, r0, r4");
assert_asm!(0x7C432014, "addc r2, r3, r4");
assert_asm!(0x7CE62815, "addc. r7, r6, r5");
@ -32,14 +42,20 @@ fn test_ins_addc() {
#[test]
fn test_ins_addi() {
let ins = Ins::new(0x38010140, 0x8000_0000u32);
assert_eq!(ins.op, Addi);
let ins = Ins::new(0x38010140);
assert_eq!(ins.op, Opcode::Addi);
// assert_eq!(
// ins.fields(),
// vec![rD(GPR(0)), rA(GPR(1)), simm(Simm(0x140))]
// );
assert_eq!(
ins.fields(),
vec![rD(GPR(0)), rA(GPR(1)), simm(Simm(0x140))]
ins.defs(),
[Argument::GPR(GPR(0)), Argument::None, Argument::None, Argument::None, Argument::None]
);
assert_eq!(
ins.uses(),
[Argument::GPR(GPR(1)), Argument::None, Argument::None, Argument::None, Argument::None]
);
assert_eq!(ins.defs(), vec![rD(GPR(0))]);
assert_eq!(ins.uses(), vec![rA(GPR(1))]);
assert_asm!(ins, "addi r0, r1, 0x140");
assert_asm!(0x38010008, "addi r0, r1, 0x8");
@ -48,6 +64,7 @@ fn test_ins_addi() {
assert_asm!(0x38010140, "addi r0, r1, 0x140");
assert_asm!(0x38049000, "subi r0, r4, 0x7000");
assert_asm!(0x38a00000, "li r5, 0x0");
assert_basic!(0x38a00000, "addi r5, r0, 0x0");
}
#[test]
@ -710,20 +727,26 @@ fn test_ins_psq_lu() {
#[test]
fn test_ins_psq_lx() {
let ins = Ins::new(0x1000000C, 0x8000_0000u32);
assert_eq!(ins.op, PsqLx);
let ins = Ins::new(0x1000000C);
assert_eq!(ins.op, Opcode::PsqLx);
// assert_eq!(
// ins.fields(),
// vec![
// frD(FPR(0)),
// rA(GPR(0)),
// rB(GPR(0)),
// ps_WX(OpaqueU(0)),
// ps_IX(GQR(0)),
// ]
// );
assert_eq!(
ins.fields(),
vec![
frD(FPR(0)),
rA(GPR(0)),
rB(GPR(0)),
ps_WX(OpaqueU(0)),
ps_IX(GQR(0)),
]
ins.defs(),
[Argument::FPR(FPR(0)), Argument::None, Argument::None, Argument::None, Argument::None]
);
assert_eq!(
ins.uses(),
[Argument::None, Argument::GPR(GPR(0)), Argument::None, Argument::None, Argument::None]
);
assert_eq!(ins.defs(), vec![frD(FPR(0))]);
assert_eq!(ins.uses(), vec![rB(GPR(0))]);
assert_asm!(0x1000000C, "psq_lx f0, r0, r0, 0, qr0");
}
@ -885,6 +908,7 @@ fn test_ins_rlwimi() {
fn test_ins_rlwinm() {
assert_asm!(0x54000423, "rlwinm. r0, r0, 0, 16, 17");
assert_asm!(0x54000432, "rlwinm r0, r0, 0, 16, 25");
assert_basic!(0x54096226, "rlwinm r9, r0, 12, 8, 19");
// mnemonics
assert_asm!(0x57E5103A, "slwi r5, r31, 2");

View File

@ -1,13 +0,0 @@
[package]
name = "dol"
version = "0.1.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
description = "Deserializer for the DOL executable format"
repository = "https://github.com/terorie/ppc750cl"
[dependencies]
bincode = "1.3"
serde = { version = "1.0", features = ["derive"] }
thiserror = "1.0"

View File

@ -1,237 +0,0 @@
use std::io::{Read, Seek, SeekFrom};
use bincode::Options;
use serde::{Deserialize, Serialize};
use thiserror::Error;
/// A loaded DOL executable.
pub struct Dol {
pub header: DolHeader,
pub memory: Vec<u8>,
pub memory_offset: u32,
}
/// An error that can be raised during DOL parsing.
#[derive(Error, Debug)]
pub enum Error {
#[error("{0}")]
BincodeError(bincode::Error),
#[error("{0}")]
IOError(std::io::Error),
#[error("No sections in DOL")]
NoSections,
#[error("Overlapping sections: {0:8>X} {1:8>X}")]
OverlappingSections(u32, u32),
#[error("Section sizes too large")]
SectionsTooLarge,
#[error("Attempted to access {0:08X} past DOL bounds")]
OutOfBounds(u32),
}
impl From<bincode::Error> for Error {
fn from(e: bincode::Error) -> Self {
Self::BincodeError(e)
}
}
impl From<std::io::Error> for Error {
fn from(e: std::io::Error) -> Self {
Self::IOError(e)
}
}
/// The result of a DOL parsing.
pub type Result<V> = std::result::Result<V, Error>;
impl Dol {
/// Reads a DOL executable from a `Reader`.
pub fn read_from<R>(mut r: R) -> Result<Self>
where
R: Read + Seek,
{
// Read header.
let header_data = DolHeaderData::read_from(&mut r)?;
let header: DolHeader = (&header_data).into();
Dol::read_with_header(r, header)
}
/// Reads a DOL body from a `Reader` given a header.
pub fn read_with_header<R>(mut r: R, header: DolHeader) -> Result<Self>
where
R: Read + Seek,
{
let dol_start = r.stream_position()? - DolHeaderData::SERIALIZED_SIZE;
if header.sections.is_empty() {
return Err(Error::NoSections);
}
/*
// Verify that sections are not overlapping.
let mut end_target_addr = 0u32;
for section in &header.sections {
if section.target < end_target_addr {
return Err(Error::OverlappingSections(end_target_addr, section.target));
}
end_target_addr = section.target + section.size
}
*/
// Remember the memory offset of the first section.
// Then shift all sections to the beginning of memory.
let memory_offset = header.sections[0].target;
// Get the size of all sections combined.
let mut total_size = 0usize;
for section in &header.sections {
if let Some(sum) = total_size.checked_add(section.size as usize) {
total_size = sum;
} else {
return Err(Error::SectionsTooLarge);
}
}
// Cannot be larger than 24 MiB.
if total_size > 0x180_0000 {
return Err(Error::SectionsTooLarge);
}
// Create memory.
let mut memory = vec![0u8; total_size];
// Read sections into memory.
for section in &header.sections {
if section.kind == DolSectionType::Bss {
continue;
}
r.seek(SeekFrom::Start(dol_start + section.offset as u64))?;
let mem_start = (section.target - memory_offset) as usize;
let mem_end = mem_start + section.size as usize;
r.read_exact(&mut memory[mem_start..mem_end])?;
}
Ok(Self {
header,
memory,
memory_offset,
})
}
pub fn section_data(&self, section: &DolSection) -> &[u8] {
self.virtual_data_at(section.target, section.size).unwrap()
}
/// Returns a slice of DOL data. Does not support bss.
pub fn virtual_data_at(&self, virtual_addr: u32, read_len: u32) -> Result<&[u8]> {
if virtual_addr < self.memory_offset {
return Err(Error::OutOfBounds(virtual_addr));
}
let offset = (virtual_addr - self.memory_offset) as usize;
if offset + (read_len as usize) < self.memory.len() {
Ok(&self.memory[offset..offset + (read_len as usize)])
} else {
Err(Error::OutOfBounds(virtual_addr + read_len))
}
}
/// Reads bytes into a destination buffer given a virtual address.
pub fn virtual_read(&self, data: &mut [u8], virtual_addr: u32) -> Result<()> {
if virtual_addr < self.memory_offset {
return Err(Error::OutOfBounds(virtual_addr));
}
let offset = (virtual_addr - self.memory_offset) as usize;
let read_len = data.len();
if offset + read_len < self.memory.len() {
data.copy_from_slice(&self.memory[offset..offset + data.len()]);
Ok(())
} else {
Err(Error::OutOfBounds(virtual_addr + (read_len as u32)))
}
}
}
#[derive(Debug, Clone, Copy, Eq, PartialEq)]
pub enum DolSectionType {
Text,
Data,
Bss,
}
#[derive(Debug, Clone)]
pub struct DolSection {
pub kind: DolSectionType,
pub index: usize,
pub offset: u32,
pub target: u32,
pub size: u32,
}
pub struct DolHeader {
pub sections: Vec<DolSection>,
pub entry_point: u32,
}
impl From<&DolHeaderData> for DolHeader {
fn from(header: &DolHeaderData) -> Self {
let mut sections = Vec::with_capacity(DolHeaderData::SECTION_COUNT);
for i in 0..DolHeaderData::SECTION_COUNT {
let kind = if i < 7 {
DolSectionType::Text
} else {
DolSectionType::Data
};
if header.section_sizes[i] > 0 {
sections.push(DolSection {
kind,
index: i,
offset: header.section_offsets[i],
target: header.section_targets[i],
size: header.section_sizes[i],
});
}
}
if header.bss_target > 0 {
sections.push(DolSection {
kind: DolSectionType::Bss,
index: 0,
offset: 0,
target: header.bss_target,
size: header.bss_size,
})
}
// Sort sections by target address to prepare them for mapping.
sections.sort_by_key(|s| s.target);
Self {
sections,
entry_point: header.entry_point,
}
}
}
impl DolHeader {
pub fn section_at(&self, addr: u32) -> Option<&DolSection> {
self.sections
.iter()
.find(|&section| (section.target..(section.target + section.size)).contains(&addr))
}
}
#[derive(Debug, Serialize, Deserialize)]
pub struct DolHeaderData {
pub section_offsets: [u32; Self::SECTION_COUNT],
pub section_targets: [u32; Self::SECTION_COUNT],
pub section_sizes: [u32; Self::SECTION_COUNT],
pub bss_target: u32,
pub bss_size: u32,
pub entry_point: u32,
pub padding: [u8; 0x1c],
}
impl DolHeaderData {
const SECTION_COUNT: usize = 18;
const SERIALIZED_SIZE: u64 = 0x100;
/// Reads the DOL header from a `Reader`.
pub fn read_from<R: Read + Seek>(mut r: R) -> bincode::Result<Self> {
bincode::DefaultOptions::new()
.with_big_endian()
.allow_trailing_bytes()
.with_fixint_encoding()
.deserialize_from(&mut r)
}
}

View File

@ -1,16 +0,0 @@
[package]
name = "ppc750cl-flow-graph"
version = "0.2.0"
edition = "2021"
authors = ["riidefi <riidefi@rii.dev>", "Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
description = "Control flow graph analysis for PowerPC 750CL"
repository = "https://github.com/terorie/ppc750cl"
[dependencies]
clap = "3"
dol = { version = "0.1.0", path = "../dol" }
itertools = "0.10"
parse_int = "0.6"
petgraph = "0.6"
ppc750cl = { version = "0.2.0", path = "../disasm" }

View File

@ -1,178 +0,0 @@
use std::collections::{BTreeMap, HashMap};
use std::fmt::{Debug, Display, Formatter};
use std::hash::{Hash, Hasher};
use std::ops::{Index, Range};
use itertools::Itertools;
use petgraph::algo::dominators::Dominators;
use petgraph::graph::{DefaultIx, NodeIndex};
use petgraph::Graph;
use ppc750cl::formatter::FormattedIns;
use ppc750cl::{Ins, Opcode};
use crate::slices::{BasicSlices, CodeIdx};
#[derive(Default)]
pub struct BasicBlock<'a> {
pub range: Range<CodeIdx>,
pub code: &'a [Ins],
pub data_refs: HashMap<CodeIdx, u32>,
}
impl<'a> PartialEq for BasicBlock<'a> {
fn eq(&self, other: &Self) -> bool {
self.range == other.range
}
}
impl<'a> Eq for BasicBlock<'a> {}
impl<'a> Hash for BasicBlock<'a> {
fn hash<H: Hasher>(&self, state: &mut H) {
self.range.hash(state)
}
}
impl<'a> BasicBlock<'a> {
pub fn from_code_slice(range: Range<CodeIdx>, complete_code: &'a [Ins]) -> BasicBlock {
let start_idx = complete_code.first().unwrap().addr / 4;
assert!(start_idx <= range.start);
let offset = (range.start - start_idx) as usize;
let code = &complete_code[offset..(offset + (range.len() as usize))];
BasicBlock {
range,
code,
data_refs: Self::detect_data_refs(code),
}
}
/// Very simple algorithm to detect data references.
fn detect_data_refs(code: &[Ins]) -> HashMap<CodeIdx, u32> {
let mut defs = HashMap::<u8, u16>::new();
let mut data_refs = HashMap::<CodeIdx, u32>::new();
for ins in code {
match ins.op {
Opcode::Addis => {
if ins.field_rA() == 0 {
// lis
defs.insert(ins.field_rD() as u8, ins.field_uimm() as u16);
} else {
defs.remove(&(ins.field_rD() as u8));
}
}
Opcode::Addi => {
if let Some(hi) = defs.get(&(ins.field_rA() as u8)) {
data_refs.insert(
ins.addr / 4,
((*hi as u32) << 16) + (ins.field_uimm() as u32),
);
}
defs.remove(&(ins.field_rD() as u8));
}
_ => (),
}
}
data_refs
}
}
impl<'a> Display for BasicBlock<'a> {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
write!(f, "{:0>#8x}", self.range.start * 4)
}
}
impl<'a> Debug for BasicBlock<'a> {
fn fmt(&self, f: &mut Formatter<'_>) -> std::fmt::Result {
writeln!(
f,
"// {:0>#8x}..{:0>#8x}",
self.range.start * 4,
self.range.end * 4
)?;
for ins in self.code {
writeln!(f, "{}", FormattedIns(ins.clone()))?;
if let Some(addr) = self.data_refs.get(&(ins.addr / 4)) {
writeln!(f, " ref: {:0>#8x}", addr)?;
}
}
Ok(())
}
}
/// A control-flow graph of a function.
pub struct FlowGraph<'a> {
pub graph: Graph<BasicBlock<'a>, ()>,
pub root_idx: NodeIndex,
}
impl<'a> FlowGraph<'a> {
/// Creates a control-flow graph from basic slices.
pub fn from_basic_slices(slices: &BasicSlices, code: &'a [Ins]) -> Self {
assert!(!code.is_empty(), "Attempt to create empty flow graph");
// Walk set cuts and create basic blocks.
let mut graph = Graph::new();
let mut node_by_addr = BTreeMap::<u32, NodeIndex<DefaultIx>>::new();
let mut block_start: CodeIdx = code[0].addr / 4;
for cut in &slices.cuts {
if *cut > block_start {
node_by_addr.insert(
block_start,
graph.add_node(BasicBlock::from_code_slice(block_start..*cut, code)),
);
}
block_start = *cut;
}
// Last block.
let func_end: CodeIdx = (code.last().unwrap().addr / 4) + 1;
if func_end > block_start {
node_by_addr.insert(
block_start,
graph.add_node(BasicBlock::from_code_slice(block_start..func_end, code)),
);
}
// Walk set of branches and connect graph.
for branch in &slices.branches {
let src_node_idx = match node_by_addr.range(..branch.0 + 1).last() {
None => continue,
Some(idx) => *idx.1,
};
debug_assert!(graph[src_node_idx].range.contains(&branch.0));
let dst_node_idx = match node_by_addr.range(..branch.1 + 1).last() {
None => continue,
Some(idx) => *idx.1,
};
debug_assert!(graph[dst_node_idx].range.contains(&branch.1));
graph.add_edge(src_node_idx, dst_node_idx, ());
}
// Walk blocks and re-connect nodes that were split off.
for (src_node_idx, dst_node_idx) in node_by_addr.values().tuple_windows::<(_, _)>() {
// Get pairs of two blocks as a sliding window.
let src_block: &BasicBlock = &graph[*src_node_idx];
let dst_block: &BasicBlock = &graph[*dst_node_idx];
assert_eq!(src_block.range.end, dst_block.range.start);
// Get last instruction of left block.
// Unless it's an unconditional branch, we can connect the blocks.
let last_ins = &src_block.code.last().unwrap();
if last_ins.code == 0x4E800020
|| (last_ins.op == Opcode::B && last_ins.field_BO() == 0b10100)
{
continue;
}
// Execution can continue past the last instruction of a block,
// so re-connect two blocks that were split off.
if !graph.contains_edge(*src_node_idx, *dst_node_idx) {
graph.add_edge(*src_node_idx, *dst_node_idx, ());
}
}
Self {
graph,
root_idx: *node_by_addr.index(node_by_addr.keys().next().unwrap()),
}
}
pub fn dominators(&self) -> Dominators<NodeIndex> {
petgraph::algo::dominators::simple_fast(&self.graph, self.root_idx)
}
}

View File

@ -1,69 +0,0 @@
use petgraph::dot::{Config as DotConfig, Dot};
use ppc750cl::{disasm_iter, Ins};
pub mod flow;
pub mod slices;
use crate::flow::FlowGraph;
use crate::slices::BasicSlices;
use dol::Dol;
fn main() {
let matches = clap::Command::new("ppc750cl-flow-graph")
.version("0.2.0")
.about("Control flow graph analysis for PowerPC 750CL")
.arg(
clap::Arg::new("START")
.long("--start")
.required(true)
.takes_value(true)
.help("Start address"),
)
.arg(
clap::Arg::new("STOP")
.long("--stop")
.required(true)
.takes_value(true)
.help("Stop address"),
)
.arg(
clap::Arg::new("INPUT")
.required(true)
.help("Binary input file"),
)
.get_matches();
let start_addr = matches.value_of("START").unwrap();
let start_addr: u32 = ::parse_int::parse(start_addr).expect("Invalid address flag");
let stop_addr = matches.value_of("STOP").unwrap();
let stop_addr: u32 = ::parse_int::parse(stop_addr).expect("Invalid address flag");
let file_path = matches.value_of("INPUT").unwrap();
let dol_file = std::fs::File::open(file_path).expect("Failed to read file");
let dol = Dol::read_from(&dol_file).expect("Invalid DOL file");
drop(dol_file);
let mut bytes = vec![0u8; (stop_addr - start_addr) as usize];
dol.virtual_read(&mut bytes, start_addr)
.expect("Invalid address range");
// Create control flow graph.
let ins_list: Vec<Ins> = disasm_iter(&bytes, start_addr).collect();
let basic_slices = BasicSlices::from_code(&ins_list);
let graph = FlowGraph::from_basic_slices(&basic_slices, &ins_list);
// Output graphviz.
let graphviz = Dot::with_config(
&graph.graph,
&[DotConfig::EdgeNoLabel, DotConfig::GraphContentOnly],
);
println!(
concat!(
"digraph func {{\n",
"node [shape=record fontname=Arial];\n",
"{:?}\n",
"}}"
),
graphviz
);
}

View File

@ -1,62 +0,0 @@
use std::collections::{BTreeSet, HashSet};
use ppc750cl::{Ins, Opcode};
/// The instruction address divided by four.
pub type CodeIdx = u32;
pub struct BasicSlices {
/// The indexes separating instructions into basic blocks.
/// Used to create a list of consecutive basic blocks.
pub cuts: BTreeSet<CodeIdx>,
/// The possible branches from one instruction to another.
/// Used to link together basic blocks into a directed graph.
pub branches: HashSet<(CodeIdx, CodeIdx)>,
}
impl BasicSlices {
/// Computes basic slices from instructions.
pub fn from_code(code: &[Ins]) -> Self {
let mut cuts = BTreeSet::<CodeIdx>::new();
let mut branches = HashSet::<(CodeIdx, CodeIdx)>::new();
for ins in code {
let cur_index = ins.addr / 4;
let is_control_flow_ins = match ins.op {
// Direct branches are control flow instructions if they don't save the link register.
// If they do, we encountered a function call.
Opcode::B | Opcode::Bc => !ins.field_LK(),
// Switch table
Opcode::Bcctr => panic!("jump tables not supported yet"),
_ => false,
};
if !is_control_flow_ins {
continue;
}
// We encountered some kind of control flow instruction.
if ins.field_BO() == 20 && ins.field_BI() == 0 {
// There's a possibility that branch can be taken.
// Branch destinations are always the first instruction of a block.
// Thus, we also found the end of another block.
let new_index = ins.branch_dest().unwrap() / 4;
cuts.insert(new_index);
branches.insert((cur_index, new_index));
}
if is_conditional_branch(ins) {
// There's a possibility that branch is not taken.
// End block anyways.
cuts.insert(cur_index + 1);
branches.insert((cur_index, cur_index + 1));
}
}
Self { cuts, branches }
}
}
fn is_conditional_branch(ins: &Ins) -> bool {
match ins.op {
Opcode::Bc | Opcode::Bcctr | Opcode::Bclr => (),
_ => return false,
};
// Check whether bits "branch always".
ins.field_BO() & 0b10100 != 0b10100
}

View File

@ -1,13 +1,14 @@
[package]
name = "ppc750cl-fuzz"
version = "0.2.0"
version = "0.3.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
description = "Complete fuzzer for ppc750cl"
repository = "https://github.com/terorie/ppc750cl"
publish = false
[dependencies]
clap = "3"
num_cpus = "1.13"
ppc750cl = { path = "../disasm", version = "0.2.0" }
ppc750cl = { path = "../disasm" }

View File

@ -5,7 +5,6 @@ use std::sync::atomic::{AtomicU32, Ordering};
use std::sync::Arc;
use std::time::{Duration, Instant};
use ppc750cl::formatter::FormattedIns;
use ppc750cl::Ins;
fn main() {
@ -91,10 +90,7 @@ struct Fuzzer {
impl Fuzzer {
fn new(range: Range<u32>) -> Self {
Self {
range,
counter: Arc::new(AtomicU32::new(0)),
}
Self { range, counter: Arc::new(AtomicU32::new(0)) }
}
fn dispatch(&self) -> std::thread::JoinHandle<()> {
@ -104,8 +100,8 @@ impl Fuzzer {
let range = self.range.clone();
std::thread::spawn(move || {
for x in range.clone() {
let ins = Ins::new(x, 0x8000_0000);
writeln!(&mut devnull, "{}", FormattedIns(ins)).unwrap();
let ins = Ins::new(x);
writeln!(&mut devnull, "{}", ins.simplified()).unwrap();
if x % (1 << 19) == 0 {
counter.store(x, Ordering::Relaxed);
}

View File

@ -1,17 +1,23 @@
[package]
name = "ppc750cl-genisa"
version = "0.2.0"
version = "0.3.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
authors = ["Luke Street <luke@street.dev>"]
license = "MIT OR Apache-2.0"
description = "Rust code generator for ppc750cl"
repository = "https://github.com/terorie/ppc750cl"
repository = "https://github.com/encounter/ppc750cl"
publish = false
[dependencies]
itertools = "0.10"
anyhow = "1.0"
log = "0.4"
num-traits = "0.2"
prettyplease = "0.2"
proc-macro2 = "1.0"
quote = "1.0"
syn = "1.0"
serde = { version = "1.0", features = ["derive"] }
serde_yaml = "0.8"
serde_yaml = "0.9"
simple_logger = "4.3"
syn = { version = "2", default-features = false, features = ["full", "parsing"] }
phf = "0.11"
phf_codegen = "0.11"

306
genisa/src/asm.rs Normal file
View File

@ -0,0 +1,306 @@
use crate::condition::{parse_conditions, replace_fields, ConditionOp, ConditionValue};
use crate::isa::{
modifiers_iter, modifiers_valid, to_ident, Field, HexLiteral, Isa, Mnemonic, Opcode,
SignedHexLiteral,
};
use anyhow::{bail, Context, Result};
use proc_macro2::{Literal, TokenStream};
use quote::{format_ident, quote};
use std::collections::HashMap;
pub fn gen_asm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
let mut functions = TokenStream::new();
let mut func_map = phf_codegen::Map::new();
for opcode in &isa.opcodes {
let name = format_ident!("gen_{}", opcode.ident());
let inner = gen_opcode(opcode, isa)?;
functions.extend(quote! {
fn #name(args: &Arguments, modifiers: u32) -> Result<u32, ArgumentError> { #inner }
});
}
let mut mnemonic_map = HashMap::<String, Vec<Mnemonic>>::new();
for mnemonic in &isa.mnemonics {
mnemonic_map.entry(mnemonic.name.clone()).or_default().push(mnemonic.clone());
}
for (name, mnemonics) in &mnemonic_map {
let fn_name = format!("gen_{}", to_ident(name));
let fn_ident = format_ident!("{}", fn_name);
let mut inner;
if mnemonics.len() > 1 {
inner = TokenStream::new();
let mut max_args = 0;
for mnemonic in mnemonics {
let gen = gen_mnemonic(mnemonic, isa, false)?;
let arg_n = Literal::usize_unsuffixed(mnemonic.args.len());
inner.extend(quote! {
#arg_n => { #gen }
});
max_args = max_args.max(mnemonic.args.len());
}
let max_args = Literal::usize_unsuffixed(max_args);
inner.extend(quote! {
value => Err(ArgumentError::ArgCount { value, expected: #max_args })
});
inner = quote! { match arg_count(args) { #inner } };
} else {
inner = gen_mnemonic(mnemonics.first().unwrap(), isa, true)?;
}
functions.extend(quote! {
fn #fn_ident(args: &Arguments, modifiers: u32) -> Result<u32, ArgumentError> { #inner }
});
}
for (opcode, modifiers) in isa.opcodes.iter().flat_map(|o| {
modifiers_iter(&o.modifiers, isa).filter(|m| modifiers_valid(m)).map(move |m| (o, m))
}) {
let suffix = modifiers.iter().map(|m| m.suffix).collect::<String>();
let mut pattern = 0;
for modifier in &modifiers {
pattern |= modifier.mask();
}
func_map.entry(
format!("{}{}", opcode.name, suffix),
&format!("(gen_{}, {:#x})", opcode.ident(), pattern),
);
}
for (mnemonic, modifiers) in mnemonic_map.iter().flat_map(|(_, mnemonics)| {
let mnemonic = mnemonics.first().unwrap();
let opcode = isa.find_opcode(&mnemonic.opcode).unwrap();
let modifiers = mnemonic.modifiers.as_deref().unwrap_or(&opcode.modifiers);
modifiers_iter(modifiers, isa).filter(|m| modifiers_valid(m)).map(move |m| (mnemonic, m))
}) {
let suffix = modifiers.iter().map(|m| m.suffix).collect::<String>();
let mut pattern = 0;
for modifier in &modifiers {
pattern |= modifier.mask();
}
func_map.entry(
format!("{}{}", mnemonic.name, suffix),
&format!("(gen_{}, {:#x})", to_ident(&mnemonic.name), pattern),
);
}
let func_map = syn::parse_str::<TokenStream>(&func_map.build().to_string())?;
let max_args = Literal::usize_unsuffixed(max_args);
Ok(quote! {
#![allow(unused)]
#![cfg_attr(rustfmt, rustfmt_skip)]
use crate::types::*;
pub type Arguments = [Argument; #max_args];
#functions
type MnemonicFn = fn(&Arguments, u32) -> Result<u32, ArgumentError>;
const MNEMONIC_MAP: phf::Map<&'static str, (MnemonicFn, u32)> = #func_map;
pub fn assemble(mnemonic: &str, args: &Arguments) -> Result<u32, ArgumentError> {
if let Some(&(fn_ptr, modifiers)) = MNEMONIC_MAP.get(mnemonic) {
fn_ptr(args, modifiers)
} else {
Err(ArgumentError::UnknownMnemonic)
}
}
})
}
fn gen_parse_field(field: &Field, i: usize) -> Result<(TokenStream, bool)> {
let Some(bits) = field.bits else { bail!("Field {} has no bits", field.name) };
let i = Literal::usize_unsuffixed(i);
Ok(if field.signed {
let max_value = 1 << (bits.len() - 1 + field.shift_left);
let min_value = SignedHexLiteral(-max_value);
let max_value = SignedHexLiteral(max_value);
(quote! { parse_signed(args, #i, #min_value, #max_value)? }, true)
} else {
let min_value = HexLiteral(0);
let max_value = HexLiteral(bits.max_value() << field.shift_left);
(quote! { parse_unsigned(args, #i, #min_value, #max_value)? }, false)
})
}
fn gen_field(
field: &Field,
mut accessor: TokenStream,
finalize: fn(TokenStream) -> TokenStream,
signed: bool,
) -> Result<TokenStream> {
let Some(bits) = field.bits else { bail!("Field {} has no bits", field.name) };
let mut shift_right = bits.shift();
let mut shift_left = field.shift_left;
if shift_right == shift_left {
// Optimization: these cancel each other out
// Adjust subsequent operations to operate on the full value
shift_right = 0;
shift_left = 0;
}
// Handle the operations (in reverse order from disassembly)
let mut operations = TokenStream::new();
let mut inner;
if signed {
accessor = quote! { #accessor as u32 };
}
// Swap 5-bit halves (SPR, TBR)
if field.split {
operations.extend(quote! {
value = ((value & 0b11111_00000) >> 5) | ((value & 0b00000_11111) << 5);
});
inner = quote! { value };
} else {
inner = accessor.clone();
}
// Handle left shift
if shift_left > 0 {
let shift_left = Literal::u8_unsuffixed(shift_left);
inner = quote! { (#inner >> #shift_left) };
}
// Mask
let mask = HexLiteral(bits.mask() >> shift_right);
inner = quote! { #inner & #mask };
// Shift right
if shift_right > 0 {
let shift = Literal::u8_unsuffixed(shift_right);
inner = quote! { (#inner) << #shift };
}
if operations.is_empty() {
Ok(finalize(inner))
} else {
inner = finalize(inner);
Ok(quote! {{
let mut value = #accessor;
#operations
#inner
}})
}
}
fn gen_opcode(opcode: &Opcode, isa: &Isa) -> Result<TokenStream> {
let mut args = TokenStream::new();
for (i, arg) in opcode.args.iter().enumerate() {
let field = isa.find_field(arg).unwrap();
let comment = format!(" {}", field.name);
let (accessor, signed) = gen_parse_field(field, i)?;
let value = gen_field(field, accessor, |s| s, signed)?;
args.extend(quote! {
#[comment = #comment]
code |= #value;
});
}
let arg_count = Literal::usize_unsuffixed(opcode.args.len());
let pattern = HexLiteral(opcode.pattern);
Ok(quote! {
check_arg_count(args, #arg_count)?;
let mut code = #pattern | modifiers;
#args
Ok(code)
})
}
fn gen_mnemonic(mnemonic: &Mnemonic, isa: &Isa, check_arg_count: bool) -> Result<TokenStream> {
let Some(opcode) = isa.find_opcode(&mnemonic.opcode) else {
bail!("Unknown opcode {}", mnemonic.opcode)
};
let mut args = TokenStream::new();
for (i, arg) in mnemonic.args.iter().enumerate() {
let comment = format!(" {}", arg);
let arg = gen_argument(&mnemonic.args, i, isa, mnemonic.replace_assemble.get(arg))?;
args.extend(quote! {
#[comment = #comment]
code |= #arg;
});
}
let mut pattern = opcode.pattern;
for condition in parse_conditions(&mnemonic.condition, isa)? {
if condition.op == ConditionOp::Eq {
match condition.value {
ConditionValue::ConstantUnsigned(value) => {
pattern |= condition.field.shift_value(value);
}
ConditionValue::ConstantSigned(value) => {
pattern |= condition.field.shift_value(value as u32);
}
ConditionValue::Field(in_field) => {
let comment = format!(" {}", condition.field.name);
let arg_n = mnemonic
.args
.iter()
.position(|a| a == &in_field.name)
.with_context(|| {
format!("Mnemonic {}: unknown field {}", mnemonic.name, in_field.name)
})?;
let (accessor, signed) = gen_parse_field(in_field, arg_n)?;
let arg = gen_field(condition.field, accessor, |s| s, signed)?;
args.extend(quote! {
#[comment = #comment]
code |= #arg;
});
}
ConditionValue::Complex(c) => {
let comment = format!(" {}", condition.field.name);
let mut any_signed = false;
let arg = replace_fields(c, isa, |f| {
let arg_n =
mnemonic.args.iter().position(|a| a == &f.name).with_context(|| {
format!("Mnemonic {}: unknown field {}", mnemonic.name, f.name)
})?;
let (s, signed) = gen_parse_field(f, arg_n)?;
any_signed |= signed;
Ok(s)
})?;
let arg = gen_field(condition.field, quote! { (#arg) }, |s| s, any_signed)?;
args.extend(quote! {
#[comment = #comment]
code |= #arg;
});
}
}
}
}
let arg_count = Literal::usize_unsuffixed(mnemonic.args.len());
let mut result = TokenStream::new();
if check_arg_count {
result.extend(quote! { check_arg_count(args, #arg_count)?; });
}
let pattern = HexLiteral(pattern);
result.extend(quote! {
let mut code = #pattern | modifiers;
#args
Ok(code)
});
Ok(result)
}
fn gen_argument(
args: &[String],
arg_n: usize,
isa: &Isa,
replace: Option<&String>,
) -> Result<TokenStream> {
let field = &args[arg_n];
let Some(field) = isa.find_field(field) else { bail!("Unknown field {}", field) };
if let Some(replace) = replace {
let mut any_signed = false;
let stream = replace_fields(replace, isa, |f| {
let arg_n = args.iter().position(|a| a == &f.name).with_context(|| {
format!("Field {} references unknown argument {}", field.name, f.name)
})?;
let (parse, signed) = gen_parse_field(field, arg_n)?;
any_signed |= signed;
Ok(parse)
})?;
gen_field(field, quote! { (#stream) }, |s| s, any_signed)
} else {
let (accessor, signed) = gen_parse_field(field, arg_n)?;
gen_field(field, accessor, |s| s, signed)
}
}

166
genisa/src/condition.rs Normal file
View File

@ -0,0 +1,166 @@
use std::str::FromStr;
use anyhow::{anyhow, Context, Result};
use proc_macro2::{Group, Ident, TokenStream, TokenTree};
use quote::quote;
use crate::isa::{parse_signed, parse_unsigned, Field, HexLiteral, Isa, SignedHexLiteral};
/// A condition that must be met for a modifier to be applied
/// or for a simplified mnemonic to be matched.
#[derive(Clone, Debug)]
pub struct Condition<'a> {
pub field: &'a Field,
pub field_mask: u32,
pub op: ConditionOp,
pub value: ConditionValue<'a>,
}
/// The operation of a complex condition.
#[derive(Copy, Clone, Debug, PartialEq, Eq)]
pub enum ConditionOp {
/// Equal to. (e.g. `MB == 0`)
Eq,
/// Not equal to. (e.g. `simm != -0x8000`)
Ne,
/// Less than. (e.g. `simm < 0`)
Lt,
/// Greater than. (e.g. `SH > 16`)
Gt,
/// Less than or equal to. (e.g. `SH <= 16`)
Lte,
/// Greater than or equal to. (e.g. `SH >= 32 - MB`)
Gte,
}
/// The value of a condition.
#[derive(Clone, Debug)]
pub enum ConditionValue<'a> {
/// A constant unsigned value. (e.g. `MB == 0`)
ConstantUnsigned(u32),
/// A constant signed value. (e.g. `simm != -0x8000`)
ConstantSigned(i32),
/// A field value. (e.g. `rB == rS`)
Field(&'a Field),
/// A complex condition. (e.g. `SH >= 32 - MB`)
Complex(&'a str),
}
/// Parse a condition string into a list of conditions. (e.g. `SH >= 32 - MB && MB == 0`)
/// Maybe turn this into a real lexer/parser if it gets more complex.
pub fn parse_conditions<'a>(condition: &'a str, isa: &'a Isa) -> Result<Vec<Condition<'a>>> {
let mut conditions = Vec::new();
for tok in condition.split(" && ") {
let (mut field, value, op) = if let Some((field, value)) = tok.split_once(" == ") {
(field, value, ConditionOp::Eq)
} else if let Some((field, value)) = tok.split_once(" != ") {
(field, value, ConditionOp::Ne)
} else if let Some((field, value)) = tok.split_once(" < ") {
(field, value, ConditionOp::Lt)
} else if let Some((field, value)) = tok.split_once(" > ") {
(field, value, ConditionOp::Gt)
} else if let Some((field, value)) = tok.split_once(" <= ") {
(field, value, ConditionOp::Lte)
} else if let Some((field, value)) = tok.split_once(" >= ") {
(field, value, ConditionOp::Gte)
} else {
log::error!("Invalid condition: {}", tok);
continue;
};
let mut field_mask = u32::MAX;
if let Some((n, mask)) = field.split_once(" & ") {
field = n;
field_mask = parse_unsigned(mask)?;
};
let field = isa
.find_field(field)
.with_context(|| format!("Condition references unknown field {}", field))?;
let value = if let Ok(value) = parse_unsigned(value) {
ConditionValue::ConstantUnsigned(value)
} else if let Ok(value) = parse_signed(value) {
ConditionValue::ConstantSigned(value)
} else if let Some(field) = isa.find_field(value) {
ConditionValue::Field(field)
} else {
ConditionValue::Complex(value)
};
conditions.push(Condition { field, field_mask, op, value });
}
Ok(conditions)
}
impl Condition<'_> {
pub fn to_token_stream(&self, isa: &Isa, self_ident: Ident) -> Result<TokenStream> {
// Accessor
let field = self.field;
let mut accessor = quote!(#self_ident.#field());
if self.field_mask != u32::MAX {
let mask = HexLiteral(self.field_mask);
accessor = quote! { (#accessor & #mask) };
}
// Operator
let op = match self.op {
ConditionOp::Eq => quote! { == },
ConditionOp::Ne => quote! { != },
ConditionOp::Lt => quote! { < },
ConditionOp::Gt => quote! { > },
ConditionOp::Lte => quote! { <= },
ConditionOp::Gte => quote! { >= },
};
// Value
let value = match self.value {
ConditionValue::ConstantUnsigned(v) => {
let v = HexLiteral(v);
quote! { #v }
}
ConditionValue::ConstantSigned(v) => {
let v = SignedHexLiteral(v);
quote! { #v }
}
ConditionValue::Field(f) => {
quote! { #self_ident.#f() }
}
ConditionValue::Complex(c) => {
replace_fields(c, isa, |f| Ok(quote! { #self_ident.#f() }))?
}
};
Ok(quote! { #accessor #op #value })
}
}
pub fn replace_fields(
s: &str,
isa: &Isa,
mut accessor: impl FnMut(&Field) -> Result<TokenStream>,
) -> Result<TokenStream> {
fn replace_inner(
s: TokenStream,
isa: &Isa,
accessor: &mut impl FnMut(&Field) -> Result<TokenStream>,
) -> Result<TokenStream> {
s.into_iter()
.map(|t| -> Result<TokenStream> {
match &t {
TokenTree::Ident(ident) => {
if let Some(field) = isa.find_field(&ident.to_string()) {
return accessor(field);
}
}
TokenTree::Group(g) => {
return Ok(TokenStream::from(TokenTree::Group(Group::new(
g.delimiter(),
replace_inner(g.stream(), isa, accessor)?,
))));
}
_ => {}
}
Ok(TokenStream::from(t))
})
.collect::<Result<TokenStream>>()
}
let stream = TokenStream::from_str(s).map_err(|e| anyhow!("{}", e))?;
replace_inner(stream, isa, &mut accessor)
}

416
genisa/src/disasm.rs Normal file
View File

@ -0,0 +1,416 @@
use crate::condition::{parse_conditions, replace_fields};
use crate::ident;
use crate::isa::{modifiers_iter, modifiers_valid, HexLiteral, Isa, Opcode};
use anyhow::{bail, ensure, Result};
use proc_macro2::{Literal, TokenStream};
use quote::{format_ident, quote};
use std::collections::HashMap;
pub fn gen_disasm(isa: &Isa, max_args: usize) -> Result<TokenStream> {
// The entry table allows us to quickly find the range of possible opcodes
// for a given 6-bit prefix. 2*64 bytes should fit in a cache line (or two).
struct OpcodeEntry {
start: u8,
count: u8,
}
let mut sorted_ops = Vec::<Opcode>::new();
let mut entries = Vec::<OpcodeEntry>::new();
for i in 0..64 {
let mut entry = OpcodeEntry { start: 0, count: 0 };
for opcode in &isa.opcodes {
if (opcode.pattern >> 26) as u8 == i {
if entry.count == 0 {
entry.start = sorted_ops.len() as u8;
}
// Sanity check for duplicate opcodes
if sorted_ops.iter().any(|op| op.name == opcode.name) {
bail!("Duplicate opcode: {}", opcode.name);
}
sorted_ops.push(opcode.clone());
entry.count += 1;
}
}
if entry.count > 1 {
log::info!("{:#X}: {} opcodes", i, entry.count);
} else if let Some(op) = (entry.count == 1).then(|| &sorted_ops[entry.start as usize]) {
log::info!("{:#X}: {}", i, op.name);
} else {
log::info!("{:#X}: <invalid>", i);
}
entries.push(entry);
}
ensure!(sorted_ops.len() == isa.opcodes.len());
// Generate the opcode entries table
let mut opcode_entries = TokenStream::new();
for entry in &entries {
let start = Literal::u8_unsuffixed(entry.start);
let end = Literal::u8_unsuffixed(entry.start + entry.count);
opcode_entries.extend(quote! { (#start, #end), });
}
// Generate the opcode tables
let mut opcode_patterns = TokenStream::new();
let mut opcode_enum = TokenStream::new();
let mut opcode_names = TokenStream::new();
for (idx, opcode) in sorted_ops.iter().enumerate() {
let bitmask = HexLiteral(opcode.mask(isa));
let pattern = HexLiteral(opcode.pattern);
let enum_idx = Literal::u8_unsuffixed(idx as u8);
let name = &opcode.name;
opcode_patterns.extend(quote! { (#bitmask, #pattern), });
opcode_names.extend(quote! { #name, });
let doc = opcode.doc();
let variant = opcode.variant();
opcode_enum.extend(quote! {
#[doc = #doc]
#variant = #enum_idx,
});
}
// Generate field and modifier accessors
let mut ins_fields = TokenStream::new();
for field in &isa.fields {
let Some(bits) = field.bits else {
continue;
};
// TODO get rid of .nz hack
if field.name.ends_with(".nz") {
continue;
}
let mut sign_bit = bits.len() - 1;
let mut shift_right = bits.shift();
let mut shift_left = field.shift_left;
if shift_right == shift_left {
// Optimization: these cancel each other out
// Adjust subsequent operations to operate on the full value
sign_bit += shift_left;
shift_right = 0;
shift_left = 0;
}
// Shift right and mask
let mut inner = quote! { self.code };
if shift_right > 0 {
let shift = Literal::u8_unsuffixed(shift_right);
inner = quote! { (#inner >> #shift) };
}
let mask = HexLiteral(bits.mask() >> shift_right);
inner = quote! { #inner & #mask };
// Determine the smallest integer type that can hold the value
let num_bits = bits.len() + field.shift_left;
let (out_type, cast) = match (num_bits, field.signed) {
(1..=8, false) => (ident!(u8), true),
(9..=16, false) => (ident!(u16), true),
(17..=32, false) => (ident!(u32), false),
(1..=8, true) => (ident!(i8), true),
(9..=16, true) => (ident!(i16), true),
(17..=32, true) => (ident!(i32), true),
(v, _) => bail!("Unsupported field size {v}"),
};
// Handle sign extension
if field.signed {
let sign_value = HexLiteral(1 << sign_bit);
inner = quote! { ((#inner) ^ #sign_value).wrapping_sub(#sign_value) as #out_type };
} else if cast {
inner = quote! { (#inner) as #out_type };
}
// Handle left shift
if shift_left > 0 {
let shift_left = Literal::u8_unsuffixed(shift_left);
inner = quote! { (#inner) << #shift_left };
}
// Swap 5-bit halves (SPR, TBR)
if field.split {
inner = quote! {
let value = #inner;
((value & 0b11111_00000) >> 5) | ((value & 0b00000_11111) << 5)
};
}
// Write the accessor
let doc = field.doc();
ins_fields.extend(quote! {
#[doc = #doc]
#[inline(always)]
pub const fn #field(&self) -> #out_type { #inner }
});
}
for modifier in &isa.modifiers {
let mask = HexLiteral(modifier.mask());
let mut inner = quote! { (self.code & #mask) == #mask };
if let Some(condition) = &modifier.condition {
for condition in parse_conditions(condition, isa)? {
let stream = condition.to_token_stream(isa, ident!(self))?;
inner.extend(quote! { && #stream });
}
};
// Write the accessor
let doc = modifier.doc();
ins_fields.extend(quote! {
#[doc = #doc]
#[inline(always)]
pub const fn #modifier(&self) -> bool { #inner }
});
}
// Generate simplified mnemonics
let mut mnemonic_functions = TokenStream::new();
let mut base_functions_ref = TokenStream::new();
let mut simplified_functions_ref = TokenStream::new();
for opcode in &sorted_ops {
let mnemonics =
isa.mnemonics.iter().filter(|m| m.opcode == opcode.name).collect::<Vec<_>>();
let mut mnemonic_conditions = TokenStream::new();
// Generate conditions for each simplified mnemonic
for mnemonic in &mnemonics {
let conditions = parse_conditions(&mnemonic.condition, isa)?
.iter()
.map(|c| c.to_token_stream(isa, ident!(ins)))
.collect::<Result<Vec<TokenStream>>>()?;
let modifiers = mnemonic.modifiers.as_deref().unwrap_or(&opcode.modifiers);
let inner = gen_mnemonic(
&mnemonic.name,
&mnemonic.args,
modifiers,
isa,
max_args,
Some(&mnemonic.replace),
)?;
mnemonic_conditions.extend(quote! {
if #(#conditions)&&* {
return #inner;
}
});
}
// Fallback to the base opcode name if no mnemonic matches
let inner =
gen_mnemonic(&opcode.name, &opcode.args, &opcode.modifiers, isa, max_args, None)?;
let base_name = format_ident!("base_{}", opcode.ident());
if mnemonics.is_empty() {
mnemonic_functions.extend(quote! {
const fn #base_name(ins: &Ins) -> (&'static str, Arguments) {
#inner
}
});
base_functions_ref.extend(quote! { #base_name, });
simplified_functions_ref.extend(quote! { #base_name, });
} else {
let simplified_name = format_ident!("simplified_{}", opcode.ident());
mnemonic_functions.extend(quote! {
#[inline(always)]
const fn #base_name(ins: &Ins) -> (&'static str, Arguments) {
#inner
}
const fn #simplified_name(ins: &Ins) -> (&'static str, Arguments) {
#mnemonic_conditions
#base_name(ins)
}
});
base_functions_ref.extend(quote! { #base_name, });
simplified_functions_ref.extend(quote! { #simplified_name, });
}
}
let mut none_args = TokenStream::new();
for _ in 0..max_args {
none_args.extend(quote! { Argument::None, });
}
mnemonic_functions.extend(quote! {
const fn mnemonic_illegal(_ins: &Ins) -> (&'static str, Arguments) {
("<illegal>", [#none_args])
}
});
// TODO rework defs/uses to account for modifiers and special registers (CTR, LR, etc)
let mut defs_uses_functions = TokenStream::new();
let mut defs_refs = TokenStream::new();
let mut uses_refs = TokenStream::new();
for opcode in &sorted_ops {
let mut defs = TokenStream::new();
let mut uses = TokenStream::new();
let mut defs_count = 0;
for def in &opcode.defs {
if isa.find_field(def).is_some_and(|f| f.arg.is_none()) {
continue;
}
let arg = gen_argument(def, isa, None)?;
defs.extend(quote! { #arg, });
defs_count += 1;
}
for _ in defs_count..max_args {
defs.extend(quote! { Argument::None, });
}
let mut use_count = 0;
for use_ in &opcode.uses {
if let Some(use_) = use_.strip_suffix(".nz") {
let Some(field) = isa.find_field(use_) else { bail!("Unknown field {}", use_) };
let ident = field.ident();
let arg = gen_argument(use_, isa, None)?;
uses.extend(quote! { if ins.#ident() != 0 { #arg } else { Argument::None }, });
use_count += 1;
continue;
} else if isa.find_field(use_).is_some_and(|f| f.arg.is_none()) {
continue;
}
let arg = gen_argument(use_, isa, None)?;
uses.extend(quote! { #arg, });
use_count += 1;
}
for _ in use_count..max_args {
uses.extend(quote! { Argument::None, });
}
let defs_name = format_ident!("defs_{}", opcode.ident());
let uses_name = format_ident!("uses_{}", opcode.ident());
defs_uses_functions.extend(quote! {
const fn #defs_name(ins: &Ins) -> Arguments { [#defs] }
const fn #uses_name(ins: &Ins) -> Arguments { [#uses] }
});
defs_refs.extend(quote! { #defs_name, });
uses_refs.extend(quote! { #uses_name, });
}
defs_uses_functions.extend(quote! {
const fn defs_uses_illegal(_ins: &Ins) -> Arguments { [#none_args] }
});
// Filling the tables to 256 entries to avoid bounds checks
for _ in sorted_ops.len()..256 {
opcode_patterns.extend(quote! { (0, 0), });
opcode_names.extend(quote! { "<illegal>", });
base_functions_ref.extend(quote! { mnemonic_illegal, });
simplified_functions_ref.extend(quote! { mnemonic_illegal, });
defs_refs.extend(quote! { defs_uses_illegal, });
uses_refs.extend(quote! { defs_uses_illegal, });
}
let max_args = Literal::usize_unsuffixed(max_args);
Ok(quote! {
#![allow(unused)]
#![cfg_attr(rustfmt, rustfmt_skip)]
use crate::disasm::*;
#[doc = " The entry table allows us to quickly find the range of possible opcodes for a"]
#[doc = " given 6-bit prefix. 2*64 bytes should fit in a cache line (or two)."]
const OPCODE_ENTRIES: [(u8, u8); 64] = [#opcode_entries];
#[doc = " The bitmask and pattern for each opcode."]
const OPCODE_PATTERNS: [(u32, u32); 256] = [#opcode_patterns];
#[doc = " The name of each opcode."]
const OPCODE_NAMES: [&str; 256] = [#opcode_names];
#[derive(Copy, Clone, Debug, Default, PartialEq, Eq)]
#[repr(u8)]
#[non_exhaustive]
pub enum Opcode {
#[doc = " An illegal or unknown opcode"]
#[default]
Illegal = u8::MAX,
#opcode_enum
}
impl Opcode {
#[inline]
pub const fn _mnemonic(self) -> &'static str {
OPCODE_NAMES[self as usize]
}
#[inline]
pub const fn _detect(code: u32) -> Self {
let entry = OPCODE_ENTRIES[(code >> 26) as usize];
let mut i = entry.0;
while i < entry.1 {
let pattern = OPCODE_PATTERNS[i as usize];
if (code & pattern.0) == pattern.1 {
#[comment = " Safety: The enum is repr(u8) and marked non_exhaustive"]
return unsafe { core::mem::transmute(i) };
}
i += 1;
}
Self::Illegal
}
}
impl Ins {
#ins_fields
}
pub type Arguments = [Argument; #max_args];
pub type MnemonicFunction = fn(&Ins) -> (&'static str, Arguments);
#mnemonic_functions
pub const BASE_MNEMONICS: [MnemonicFunction; 256] = [#base_functions_ref];
pub const SIMPLIFIED_MNEMONICS: [MnemonicFunction; 256] = [#simplified_functions_ref];
#defs_uses_functions
pub type DefsUsesFunction = fn(&Ins) -> Arguments;
pub const DEFS_FUNCTIONS: [DefsUsesFunction; 256] = [#defs_refs];
pub const USES_FUNCTIONS: [DefsUsesFunction; 256] = [#uses_refs];
})
}
fn modifier_names(name: &str, modifiers: &[String], isa: &Isa) -> Vec<String> {
// For every combination of modifiers, generate a name
let mut names = Vec::with_capacity(1 << modifiers.len());
for v in modifiers_iter(modifiers, isa) {
if modifiers_valid(&v) {
let mut name = name.to_string();
for modifier in &v {
name.push(modifier.suffix);
}
names.push(name);
} else {
names.push("<illegal>".to_string());
}
}
names
}
fn gen_argument(field: &str, isa: &Isa, replace: Option<&String>) -> Result<TokenStream> {
let Some(field) = isa.find_field(field) else { bail!("Unknown field {}", field) };
let Some(arg) = &field.arg else { bail!("Field {} has no argument", field.name) };
let value = if let Some(replace) = replace {
let stream = replace_fields(replace, isa, |f| Ok(quote! { ins.#f() }))?;
quote! { (#stream) }
} else {
quote! { ins.#field() }
};
let arg = format_ident!("{}", arg);
Ok(quote! { Argument::#arg(#arg(#value as _)) })
}
fn gen_mnemonic(
name: &str,
args: &[String],
modifiers: &[String],
isa: &Isa,
max_args: usize,
replace: Option<&HashMap<String, String>>,
) -> Result<TokenStream> {
let mut arguments = TokenStream::new();
for field in args {
let arg = gen_argument(field, isa, replace.and_then(|m| m.get(field)))?;
arguments.extend(quote! { #arg, });
}
for _ in args.len()..max_args {
arguments.extend(quote! { Argument::None, });
}
if modifiers.is_empty() {
Ok(quote! { (#name, [#arguments]) })
} else {
let names = modifier_names(name, modifiers, isa);
let mut bitset = quote! { 0 };
for (i, modifier) in modifiers.iter().enumerate() {
let modifier = isa.find_modifier(modifier).unwrap();
if i == 0 {
bitset = quote! { ins.#modifier() as usize };
} else {
let i = Literal::u8_unsuffixed(i as u8);
bitset.extend(quote! { | (ins.#modifier() as usize) << #i });
}
}
Ok(quote! { ([#(#names),*][#bitset], [#arguments]) })
}
}

416
genisa/src/isa.rs Normal file
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@ -0,0 +1,416 @@
use std::collections::HashMap;
use std::{fs::File, path::Path, str::FromStr};
use anyhow::{Context, Result};
use num_traits::PrimInt;
use proc_macro2::{Ident, Span, TokenStream};
use quote::{format_ident, ToTokens};
use serde::{Deserialize, Deserializer, Serialize};
pub fn load_isa(path: &Path) -> Result<Isa> {
let yaml_file =
File::open(path).with_context(|| format!("Failed to open file {}", path.display()))?;
let isa: Isa = serde_yaml::from_reader(yaml_file)
.with_context(|| format!("While parsing file {}", path.display()))?;
Ok(isa)
}
#[derive(Deserialize, Serialize, Clone, Debug, Default)]
#[serde(default)]
pub struct Isa {
pub fields: Vec<Field>,
pub modifiers: Vec<Modifier>,
pub opcodes: Vec<Opcode>,
pub mnemonics: Vec<Mnemonic>,
}
impl Isa {
pub fn find_field(&self, name: &str) -> Option<&Field> {
self.fields.iter().find(|f| f.name == name)
}
pub fn find_modifier(&self, name: &str) -> Option<&Modifier> {
self.modifiers.iter().find(|m| m.name == name)
}
pub fn find_opcode(&self, name: &str) -> Option<&Opcode> {
self.opcodes.iter().find(|o| o.name == name)
}
}
#[derive(Deserialize, Serialize, Clone, Debug, Default)]
#[serde(default)]
pub struct Field {
pub name: String,
pub desc: String,
#[serde(skip_serializing_if = "Option::is_none")]
pub bits: Option<BitRange>,
pub signed: bool,
pub split: bool,
#[serde(skip_serializing_if = "Option::is_none")]
pub arg: Option<String>,
pub shift_left: u8,
}
impl Field {
/// Calculate the field mask from its bit range
pub fn mask(&self) -> u32 {
self.bits.map(|b| b.mask()).unwrap_or(0)
}
/// Shift and mask a value according to the field
pub fn shift_value(&self, mut value: u32) -> u32 {
if self.split {
// Swap 5-bit halves (SPR, TBR)
value = ((value & 0b11111_00000u32) >> 5) | ((value & 0b00000_11111u32) << 5);
}
self.bits.map(|b| b.shift_value(value >> self.shift_left)).unwrap_or(0)
}
pub fn ident(&self) -> Ident {
format_ident!("field_{}", to_ident(&self.name))
}
pub fn doc(&self) -> String {
if self.desc.is_empty() {
format!(" {}", self.name)
} else {
format!(" {}: {}", self.name, self.desc)
}
}
}
impl ToTokens for Field {
fn to_tokens(&self, tokens: &mut TokenStream) {
self.ident().to_tokens(tokens)
}
}
#[derive(Deserialize, Serialize, Clone, Debug, Default)]
#[serde(default)]
pub struct Opcode {
pub name: String,
pub desc: String,
pub bitmask: u32,
pub pattern: u32,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub modifiers: Vec<String>,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub args: Vec<String>,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub defs: Vec<String>,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub uses: Vec<String>,
}
impl Opcode {
/// Calculate the opcode mask from its fields and modifiers
pub fn mask(&self, isa: &Isa) -> u32 {
let mut calc_bitmask = 0u32;
for arg_n in &self.args {
let Some(field) = isa.find_field(arg_n) else {
continue;
};
calc_bitmask |= field.mask();
}
for modifier_n in &self.modifiers {
let Some(modifier) = isa.find_modifier(modifier_n) else {
continue;
};
calc_bitmask |= modifier.mask();
}
!calc_bitmask
}
pub fn ident(&self) -> Ident {
Ident::new(&to_ident(&self.name), Span::call_site())
}
pub fn variant(&self) -> Ident {
Ident::new(&to_variant(&self.name), Span::call_site())
}
pub fn doc(&self) -> String {
if self.desc.is_empty() {
format!(" {}", self.name)
} else {
format!(" {}: {}", self.name, self.desc)
}
}
}
impl ToTokens for Opcode {
fn to_tokens(&self, tokens: &mut TokenStream) {
self.ident().to_tokens(tokens)
}
}
#[derive(Deserialize, Serialize, Clone, Debug, Default)]
#[serde(default)]
pub struct Mnemonic {
pub name: String,
pub desc: String,
pub opcode: String,
#[serde(skip_serializing_if = "Option::is_none")]
// Overrides modifier list from opcode
pub modifiers: Option<Vec<String>>,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub args: Vec<String>,
pub condition: String,
#[serde(skip_serializing_if = "HashMap::is_empty")]
pub replace: HashMap<String, String>,
#[serde(skip_serializing_if = "HashMap::is_empty")]
pub replace_assemble: HashMap<String, String>,
}
#[derive(Deserialize, Serialize, Clone, Debug, Default)]
#[serde(default)]
pub struct Modifier {
pub name: String,
pub desc: String,
pub suffix: char,
pub bit: u8,
#[serde(skip_serializing_if = "Vec::is_empty")]
pub defs: Vec<String>,
#[serde(skip_serializing_if = "Option::is_none")]
pub condition: Option<String>,
}
impl Modifier {
/// Calculate the modifier mask from its bit
pub fn mask(&self) -> u32 {
1 << (31 - self.bit)
}
pub fn ident(&self) -> Ident {
format_ident!("field_{}", to_ident(&self.name))
}
pub fn doc(&self) -> String {
if self.desc.is_empty() {
format!(" {}", self.name)
} else {
format!(" {}: {}", self.name, self.desc)
}
}
}
impl ToTokens for Modifier {
fn to_tokens(&self, tokens: &mut TokenStream) {
self.ident().to_tokens(tokens)
}
}
/// A collection of modifiers
type Modifiers<'a> = Vec<&'a Modifier>;
/// Whether a collection of modifiers is valid (all bits are unique)
pub fn modifiers_valid(modifiers: &Modifiers) -> bool {
let bits = modifiers.iter().map(|m| m.bit).collect::<Vec<_>>();
bits.iter().all(|&b| bits.iter().filter(|&&x| x == b).count() == 1)
}
/// Iterate over all possible combinations of modifiers
pub fn modifiers_iter<'a>(
modifiers: &'a [String],
isa: &'a Isa,
) -> impl Iterator<Item = Modifiers<'a>> {
(0..=(1 << modifiers.len()) - 1).map(move |b| {
modifiers
.iter()
.enumerate()
.filter(|(i, _)| b & (1 << i) != 0)
.map(|(_, m)| isa.find_modifier(m).unwrap())
.collect::<Vec<_>>()
})
}
#[derive(Copy, Clone, Debug, Default)]
pub struct BitRange(pub (u8, u8));
impl BitRange {
#[inline]
pub fn new(start: u8, end: u8) -> Self {
Self((start, end))
}
#[inline]
pub fn start(&self) -> u8 {
self.0 .0
}
#[inline]
pub fn end(&self) -> u8 {
self.0 .1
}
/// Calculate the mask from the range
#[inline]
pub fn mask(&self) -> u32 {
self.max_value() << self.shift()
}
/// Number of bits to shift
#[inline]
pub fn shift(&self) -> u8 {
32 - self.end()
}
/// Number of bits in the range
#[inline]
pub fn len(&self) -> u8 {
self.end() - self.start()
}
/// Shift and mask a value according to the range
#[inline]
pub fn shift_value(&self, value: u32) -> u32 {
(value & self.max_value()) << self.shift()
}
/// Calculate the maximum value that can be represented by the range
#[inline]
pub fn max_value(&self) -> u32 {
(1 << self.len()) - 1
}
}
impl<'de> Deserialize<'de> for BitRange {
fn deserialize<D>(deserializer: D) -> Result<Self, D::Error>
where
D: Deserializer<'de>,
{
let range_str: String = Deserialize::deserialize(deserializer)?;
if let Some((start_str, end_str)) = range_str.split_once("..") {
let start = start_str.parse::<u8>().map_err(serde::de::Error::custom)?;
let end = end_str.parse::<u8>().map_err(serde::de::Error::custom)?;
Ok(Self::new(start, end))
} else {
let bit_idx = range_str.parse::<u8>().map_err(serde::de::Error::custom)?;
Ok(Self::new(bit_idx, bit_idx))
}
}
}
impl Serialize for BitRange {
fn serialize<S>(&self, serializer: S) -> Result<S::Ok, S::Error>
where
S: serde::Serializer,
{
if self.start() == self.end() {
self.start().serialize(serializer)
} else {
format!("{}..{}", self.start(), self.end()).serialize(serializer)
}
}
}
pub fn to_ident(key: &str) -> String {
key.to_ascii_lowercase().replace('.', "_").replace('+', "p").replace('-', "m")
}
pub fn to_variant(key: &str) -> String {
let mut s = String::new();
let mut chars = key.chars();
loop {
// Make first char uppercase.
let c = match chars.next() {
None => return s,
Some(c) => c,
};
s.push(match c {
'a'..='z' => c.to_ascii_uppercase(),
'A'..='Z' => c,
_ => panic!("invalid identifier: {}", key),
});
loop {
let c = match chars.next() {
None => return s,
Some(c) => c,
};
match c.to_ascii_lowercase() {
'0'..='9' | 'a'..='z' => s.push(c),
'_' => break,
'.' => {
s.push('_');
break;
}
_ => panic!("invalid character in variant: {}", key),
}
}
}
}
/// Parse an unsigned number in decimal, binary, or hexadecimal format.
pub fn parse_unsigned(mask: &str) -> Result<u32, std::num::ParseIntError> {
if let Some(mask) = mask.strip_prefix("0b") {
u32::from_str_radix(mask, 2)
} else if let Some(mask) = mask.strip_prefix("0x") {
u32::from_str_radix(mask, 16)
} else {
mask.parse::<u32>()
}
}
/// Parse a signed number in decimal, binary, or hexadecimal format.
pub fn parse_signed(mask: &str) -> Result<i32, std::num::ParseIntError> {
if let Some(mask) = mask.strip_prefix('-') {
if let Some(mask) = mask.strip_prefix("0b") {
i32::from_str_radix(mask, 2).map(|n| -n)
} else if let Some(mask) = mask.strip_prefix("0x") {
i32::from_str_radix(mask, 16).map(|n| -n)
} else {
mask.parse::<i32>().map(|n| -n)
}
} else {
parse_unsigned(mask).map(|n| n as i32)
}
}
pub struct HexLiteral<T>(pub T);
impl<T> std::fmt::LowerHex for HexLiteral<T>
where
T: std::fmt::LowerHex,
{
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
std::fmt::LowerHex::fmt(&self.0, f)
}
}
impl<T> ToTokens for HexLiteral<T>
where
T: std::fmt::LowerHex,
{
fn to_tokens(&self, tokens: &mut TokenStream) {
let s = format!("{:#x}", self);
tokens.extend(TokenStream::from_str(&s).unwrap());
}
}
pub struct SignedHexLiteral<T>(pub T);
impl<T> std::fmt::LowerHex for SignedHexLiteral<T>
where
T: PrimInt + std::fmt::LowerHex,
{
fn fmt(&self, f: &mut std::fmt::Formatter<'_>) -> std::fmt::Result {
if self.0 < T::zero() {
write!(f, "-")?;
let int = self.0.to_i64().unwrap_or_default();
std::fmt::LowerHex::fmt(&-int, f)
} else {
std::fmt::LowerHex::fmt(&self.0, f)
}
}
}
impl<T> ToTokens for SignedHexLiteral<T>
where
T: PrimInt + std::fmt::LowerHex,
{
fn to_tokens(&self, tokens: &mut TokenStream) {
let s = format!("{:#x}", self);
tokens.extend(TokenStream::from_str(&s).unwrap());
}
}

View File

@ -1,771 +1,162 @@
use std::collections::HashMap;
use std::fs::File;
use std::io::Write;
use std::ops::Range;
use std::process::{Command, Stdio};
use std::str::FromStr;
mod asm;
mod condition;
mod disasm;
mod isa;
use itertools::Itertools;
use proc_macro2::{Group, Ident, Literal, Span, TokenStream, TokenTree};
use quote::quote;
use serde::{Deserialize, Deserializer};
use syn::{LitChar, LitInt, LitStr};
use crate::asm::gen_asm;
use crate::disasm::gen_disasm;
use anyhow::{ensure, Context, Result};
use condition::{parse_conditions, ConditionOp, ConditionValue};
use isa::load_isa;
use std::path::Path;
macro_rules! token_stream {
($stream:ident) => {
TokenStream::from_iter($stream.into_iter())
/// Identifier literal.
#[macro_export]
macro_rules! ident {
($name:ident) => {
proc_macro2::Ident::new(stringify!($name), proc_macro2::Span::call_site())
};
}
fn main() {
if let Err(err) = _main() {
eprintln!("{}", err);
std::process::exit(1);
}
}
fn main() -> Result<()> {
simple_logger::SimpleLogger::new().env().init().unwrap();
type Error = Box<dyn std::error::Error>;
type Result<T> = std::result::Result<T, Error>;
let isa = load_isa(Path::new("isa.yaml"))?;
// Make sure we can fit the opcodes into a u8
ensure!(isa.opcodes.len() <= 255);
fn _main() -> Result<()> {
let isa = load_isa()?;
let mut unformatted_code = Vec::<u8>::new();
writeln!(
&mut unformatted_code,
"{}",
quote! {
use crate::prelude::*;
// Sanity check the opcodes and mnemonics
// Calculate the bitmask for each opcode and compare it to the stored bitmask
let mut max_args = 0;
for opcode in &isa.opcodes {
let mut calc_bitmask = opcode.mask(&isa);
if opcode.bitmask != calc_bitmask {
log::warn!(
"Opcode {}: Calculated bitmask mismatch: {:#010X} != {:#010X} ({:032b} != {:032b})",
opcode.name,
opcode.bitmask,
calc_bitmask,
opcode.bitmask,
calc_bitmask
);
}
if opcode.pattern & !opcode.bitmask != 0 {
log::warn!(
"Opcode {}: Pattern has bits set outside of bitmask: {:#010X} & !{:#010X} != 0 ({:032b} & !{:032b} != 0)",
opcode.name,
opcode.pattern,
opcode.bitmask,
opcode.pattern,
opcode.bitmask
);
}
)?;
writeln!(&mut unformatted_code, "{}", isa.gen_opcode_enum()?)?;
writeln!(&mut unformatted_code, "{}", isa.gen_field_enum()?)?;
writeln!(&mut unformatted_code, "{}", isa.gen_field_impl()?)?;
writeln!(&mut unformatted_code, "{}", isa.gen_ins_impl()?)?;
let formatted_code = rustfmt(unformatted_code);
File::create("./disasm/src/generated.rs")?.write_all(&formatted_code)?;
// Make sure we can account for every bit with fields and modifiers
for arg in &opcode.args {
let field = isa
.find_field(arg)
.with_context(|| format!("Opcode {}: unknown field {}", opcode.name, arg))?;
calc_bitmask |= field.mask();
}
for modifier_name in &opcode.modifiers {
let modifier = isa.find_modifier(modifier_name).with_context(|| {
format!("Opcode {}: unknown modifier {}", opcode.name, modifier_name)
})?;
if let Some(condition) = &modifier.condition {
for condition in parse_conditions(condition, &isa)? {
// Only check constant conditions
if condition.op == ConditionOp::Eq
&& matches!(
condition.value,
ConditionValue::ConstantUnsigned(_) | ConditionValue::ConstantSigned(_)
)
{
calc_bitmask |= condition.field.shift_value(condition.field_mask);
}
}
} else {
calc_bitmask |= modifier.mask();
}
}
if calc_bitmask != u32::MAX {
log::warn!(
"Opcode {}: Calculated bitmask is non-exhaustive: {:#010X}, {:032b}",
opcode.name,
calc_bitmask,
calc_bitmask
);
}
max_args = max_args.max(opcode.args.len());
}
// Check each mnemonic, make sure we can account for every bit
// with fields, modifiers, and conditions
for mnemonic in &isa.mnemonics {
let opcode = isa.find_opcode(&mnemonic.opcode).with_context(|| {
format!("Mnemonic {}: unknown opcode {}", mnemonic.name, mnemonic.opcode)
})?;
let mut calc_bitmask = opcode.mask(&isa);
for arg in &mnemonic.args {
let field = isa
.find_field(arg)
.with_context(|| format!("Mnemonic {}: unknown field {}", mnemonic.name, arg))?;
calc_bitmask |= field.mask();
}
for modifier_name in mnemonic.modifiers.as_deref().unwrap_or(&opcode.modifiers) {
let modifier = isa.find_modifier(modifier_name).with_context(|| {
format!("Mnemonic {}: unknown modifier {}", mnemonic.name, modifier_name)
})?;
if let Some(condition) = &modifier.condition {
for condition in parse_conditions(condition, &isa)? {
// Only check constant conditions
if condition.op == ConditionOp::Eq
&& matches!(
condition.value,
ConditionValue::ConstantUnsigned(_) | ConditionValue::ConstantSigned(_)
)
{
calc_bitmask |= condition.field.shift_value(condition.field_mask);
}
}
} else {
calc_bitmask |= modifier.mask();
}
}
for condition in parse_conditions(&mnemonic.condition, &isa)? {
if condition.op != ConditionOp::Eq {
continue;
}
let field_bitmask = condition.field.shift_value(condition.field_mask);
if calc_bitmask & field_bitmask != 0 {
log::warn!(
"Mnmemonic {}: {:#010X} & {:#010X} != 0",
mnemonic.name,
calc_bitmask,
field_bitmask,
);
}
calc_bitmask |= field_bitmask;
}
if calc_bitmask != u32::MAX {
log::warn!(
"Mnemonic {}: Calculated bitmask is non-exhaustive: {:#010X}, {:032b}",
mnemonic.name,
calc_bitmask,
calc_bitmask
);
}
}
let tokens = gen_disasm(&isa, max_args)?;
let file = syn::parse2(tokens)?;
let formatted = prettyplease::unparse(&file);
std::fs::write("disasm/src/generated.rs", formatted)?;
let tokens = gen_asm(&isa, max_args)?;
let file = syn::parse2(tokens)?;
let formatted = prettyplease::unparse(&file);
std::fs::write("asm/src/generated.rs", formatted)?;
Ok(())
}
fn rustfmt(code: Vec<u8>) -> Vec<u8> {
let mut rustfmt = Command::new("rustfmt")
.stdin(Stdio::piped())
.stdout(Stdio::piped())
.spawn()
.expect("failed to spawn rustfmt");
let mut stdin = rustfmt.stdin.take().unwrap();
std::thread::spawn(move || {
let _ = stdin.write_all(&code);
});
let rustfmt_res = rustfmt.wait_with_output().expect("failed to run rustfmt");
if !rustfmt_res.status.success() {
panic!("rustfmt failed");
}
rustfmt_res.stdout
}
#[derive(Default)]
pub(crate) struct BitRange(Range<u8>);
impl<'de> Deserialize<'de> for BitRange {
fn deserialize<D>(deserializer: D) -> std::result::Result<Self, D::Error>
where
D: Deserializer<'de>,
{
let range_str: String = Deserialize::deserialize(deserializer)?;
if let Some((start_str, stop_str)) = range_str.split_once("..") {
let start = start_str.parse::<u8>().map_err(serde::de::Error::custom)?;
let stop = stop_str.parse::<u8>().map_err(serde::de::Error::custom)?;
Ok(Self(start..stop))
} else {
let bit_idx = range_str.parse::<u8>().map_err(serde::de::Error::custom)?;
Ok(Self(bit_idx..bit_idx))
}
}
}
#[derive(Deserialize, Default)]
#[serde(default)]
pub(crate) struct Field {
name: String,
desc: String,
bits: BitRange,
signed: bool,
split: bool,
arg: Option<String>,
shift_left: u8,
}
impl Field {
fn variant_identifier(&self) -> Option<TokenTree> {
self.identifier("")
}
fn identifier(&self, prefix: &str) -> Option<TokenTree> {
if self.name.strip_suffix(".nz").is_none() {
Some(to_rust_ident(prefix, &self.name))
} else {
None
}
}
fn express_value(&self, code: TokenStream) -> TokenStream {
let mut val = quote!(#code);
let shift = 32 - self.bits.0.end;
if shift > 0 {
val = quote!((#val >> #shift));
}
let mask = (1u32 << self.bits.0.len()) - 1;
if mask != 0xFFFF_FFFF {
let mask = LitInt::new(&format!("0x{:x}", mask), Span::call_site());
val = quote!((#val & #mask));
}
if self.split {
val = quote!((((#val & 0b11111_00000u32) >> 5u32) | ((#val & 0b00000_11111u32) << 5u32)) as u32);
}
// https://graphics.stanford.edu/~seander/bithacks.html#VariableSignExtend
if self.signed {
let mask2 = 1u32 << (self.bits.0.len() - 1);
let mask2 = LitInt::new(&format!("0x{:x}", mask2), Span::call_site());
val = quote!((((#val ^ #mask2).wrapping_sub(#mask2)) as i32))
}
let val_shift = self.shift_left;
if val_shift > 0 {
val = quote!((#val << #val_shift));
}
val
}
fn express_value_self(&self) -> TokenStream {
self.express_value(quote!(self.code))
}
fn enum_variant_definition(&self) -> Option<TokenStream> {
let ident = self.variant_identifier()?;
Some(if let Some(arg) = &self.arg {
let arg = TokenTree::Ident(Ident::new(arg, Span::call_site()));
quote! {
#ident(#arg),
}
} else {
quote! {
#ident,
}
})
}
pub(crate) fn construct_variant(&self, code: TokenStream) -> TokenStream {
let field_variant = self.variant_identifier();
if let Some(arg) = &self.arg {
let field_arg = TokenTree::Ident(Ident::new(arg, Span::call_site()));
let value = self.express_value(code);
quote! {
Field::#field_variant(#field_arg(#value as _))
}
} else {
quote! {
Field::#field_variant
}
}
}
fn construct_variant_self(&self) -> TokenStream {
self.construct_variant(quote!(self.code))
}
fn construct_accessor(&self) -> TokenStream {
let field_variant = match self.identifier("field_") {
Some(v) => v,
None => return TokenStream::new(),
};
if self.arg.is_none() {
return TokenStream::new();
}
let value = self.express_value_self();
let ret_type = if self.signed {
quote!(isize)
} else {
quote!(usize)
};
quote! {
#[inline(always)]
pub fn #field_variant(&self) -> #ret_type {
#value as _
}
}
}
}
#[derive(Deserialize, Default)]
#[serde(default)]
pub(crate) struct Opcode {
name: String,
desc: String,
bitmask: u32,
pattern: u32,
modifiers: Vec<String>,
side_effects: Vec<String>,
args: Vec<String>,
defs: Vec<String>,
uses: Vec<String>,
}
impl Opcode {
fn variant_identifier(&self) -> Result<TokenTree> {
to_rust_variant(&self.name)
}
}
#[derive(Deserialize, Default)]
#[serde(default)]
pub(crate) struct Mnemonic {
name: String,
opcode: String,
// Overrides modifier list from opcode
modifiers: Option<Vec<String>>,
args: Vec<String>,
condition: String,
}
#[derive(Deserialize, Default)]
#[serde(default)]
pub(crate) struct Modifier {
name: String,
suffix: char,
bit: u8,
condition: String,
}
impl Modifier {
fn express_value_self(&self, field_by_name: &HashMap<String, &Field>) -> Result<TokenStream> {
if self.condition.is_empty() {
let modifier_bit = self.bit as usize;
Ok(quote!(self.bit(#modifier_bit)))
} else {
compile_mnemonic_condition(field_by_name, &self.condition)
}
}
fn construct_accessor(&self, field_by_name: &HashMap<String, &Field>) -> Result<TokenStream> {
let field_variant = to_rust_ident("field_", &self.name);
let value = self.express_value_self(field_by_name)?;
Ok(quote! {
#[inline(always)]
pub fn #field_variant(&self) -> bool {
#value
}
})
}
}
#[derive(Deserialize, Default)]
#[serde(default)]
pub(crate) struct Isa {
fields: Vec<Field>,
modifiers: Vec<Modifier>,
opcodes: Vec<Opcode>,
mnemonics: Vec<Mnemonic>,
}
fn load_isa() -> Result<Isa> {
let yaml_file = File::open("isa.yaml")?;
let isa: Isa = serde_yaml::from_reader(yaml_file)?;
Ok(isa)
}
impl Isa {
fn gen_opcode_enum(&self) -> Result<TokenStream> {
// Create enum variants.
let enum_variants = self
.opcodes
.iter()
.map(|opcode| -> Result<TokenStream> {
let ident = opcode.variant_identifier()?;
Ok(quote! {
#ident,
})
})
.try_collect::<TokenStream, Vec<TokenStream>, Error>()?;
let enum_variants = token_stream!(enum_variants);
// Create functions.
let mnemonic_fn = self.gen_mnemonic_fn()?;
let detect_fn = self.gen_opcode_detect()?;
// Create final enum.
let opcode_enum = quote! {
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
pub enum Opcode {
Illegal = -1,
#enum_variants
}
#[allow(clippy::all)]
impl Opcode {
#mnemonic_fn
#detect_fn
}
};
Ok(opcode_enum)
}
fn gen_mnemonic_fn(&self) -> Result<TokenStream> {
// Create match arms.
let match_arms = self
.opcodes
.iter()
.map(|opcode| {
let variant = opcode.variant_identifier()?;
let literal = Literal::string(&opcode.name);
Ok(quote! {
Opcode::#variant => #literal,
})
})
.try_collect::<TokenStream, Vec<TokenStream>, Error>()?;
let match_arms = token_stream!(match_arms);
// Create final function.
let mnemonic_fn = quote! {
pub(crate) fn _mnemonic(self) -> &'static str {
match self {
Opcode::Illegal => "<illegal>",
#match_arms
}
}
};
Ok(mnemonic_fn)
}
fn gen_opcode_detect(&self) -> Result<TokenStream> {
// Generate if chain.
let if_chain = self
.opcodes
.iter()
.map(|opcode| {
let bitmask_str = format!("{:>#8x}", opcode.bitmask);
let bitmask = LitInt::new(&bitmask_str, Span::call_site());
let pattern_str = format!("{:>#8x}", opcode.pattern);
let pattern = LitInt::new(&pattern_str, Span::call_site());
let identifier = opcode.variant_identifier()?;
Ok(quote! {
if code & #bitmask == #pattern {
return Opcode::#identifier;
}
})
})
.try_collect::<TokenStream, Vec<TokenStream>, Error>()?;
let if_chain = token_stream!(if_chain);
// Generate function.
let func = quote! {
pub(crate) fn _detect(code: u32) -> Self {
#if_chain
Opcode::Illegal
}
};
Ok(func)
}
fn gen_field_enum(&self) -> Result<TokenStream> {
// Create enum variants.
let mut enum_variants = Vec::new();
for field in &self.fields {
if let Some(field) = field.enum_variant_definition() {
enum_variants.push(field);
}
}
let enum_variants = token_stream!(enum_variants);
// Create final enum.
let field_enum = quote! {
#[allow(non_camel_case_types)]
#[derive(Debug, Copy, Clone, Eq, PartialEq)]
pub enum Field {
#enum_variants
}
};
Ok(field_enum)
}
fn gen_field_argument(&self) -> Result<TokenStream> {
let mut match_arms = Vec::new();
for field in &self.fields {
if let Some(variant) = field.variant_identifier() {
if let Some(arg_str) = field.arg.as_ref() {
let arg = Ident::new(arg_str, Span::call_site());
match_arms.push(quote! { Field::#variant(x) => Some(Argument::#arg(*x)), });
}
}
}
let match_arms = token_stream!(match_arms);
Ok(quote! {
pub fn argument(&self) -> Option<Argument> {
match self {
#match_arms
_ => None,
}
}
})
}
fn gen_field_name(&self) -> Result<TokenStream> {
let mut match_arms = Vec::new();
for field in &self.fields {
if let Some(variant) = field.variant_identifier() {
let name = LitStr::new(&variant.to_string(), Span::call_site());
let arg = field.arg.as_ref().map(|_| quote!((_)));
match_arms.push(quote! { Field::#variant #arg => #name, });
}
}
let match_arms = token_stream!(match_arms);
Ok(quote! {
pub fn name(&self) -> &'static str {
match self {
#match_arms
}
}
})
}
fn gen_field_impl(&self) -> Result<TokenStream> {
let field_argument = self.gen_field_argument()?;
let field_name = self.gen_field_name()?;
Ok(quote! {
impl Field {
#field_argument
#field_name
}
})
}
fn gen_ins_impl(&self) -> Result<TokenStream> {
// Map fields by name.
let mut field_by_name = HashMap::<String, &Field>::new();
for field in &self.fields {
field_by_name.insert(field.name.clone(), field);
}
let mut modifier_by_name = HashMap::<String, &Modifier>::new();
for modifier in &self.modifiers {
modifier_by_name.insert(modifier.name.clone(), modifier);
}
// Map mnemonics by opcode.
let mut mnemonics_by_opcode = HashMap::<&String, Vec<&Mnemonic>>::new();
for simple in &self.mnemonics {
mnemonics_by_opcode
.entry(&simple.opcode)
.or_insert_with(Vec::new)
.push(simple)
}
// Generate match arms for each opcode.
let mut field_match_arms = Vec::new();
let mut def_match_arms = Vec::new();
let mut use_match_arms = Vec::new();
let mut suffix_match_arms = Vec::new();
let mut simplified_ins_match_arms = Vec::new();
for opcode in &self.opcodes {
// Generate fields of opcode.
let mut fields = Vec::new();
for arg in &opcode.args {
let field: &Field = field_by_name
.get(arg)
.ok_or_else(|| Error::from(format!("undefined field {}", arg)))?;
let variant = field.construct_variant_self();
fields.extend(quote! { #variant, })
}
let fields = token_stream!(fields);
// Emit match arm.
let ident = opcode.variant_identifier()?;
field_match_arms.push(quote! {
Opcode::#ident => vec![#fields],
});
// Generate modifiers.
let suffix = express_suffix(&modifier_by_name, &field_by_name, &opcode.modifiers)?;
suffix_match_arms.push(quote! {
Opcode::#ident => #suffix,
});
// Generate defs.
let mut defs = Vec::new();
for arg in &opcode.defs {
let field: &Field = field_by_name.get(arg).ok_or_else(|| {
syn::Error::new(Span::call_site(), format!("undefined field {}", arg))
})?;
let variant = field.construct_variant_self();
defs.extend(quote! { #variant, })
}
let defs = token_stream!(defs);
let ident = opcode.variant_identifier()?;
def_match_arms.push(quote! {
Opcode::#ident => vec![#defs],
});
// Generate uses.
let mut uses = Vec::new();
let mut special_uses = Vec::new();
for arg in &opcode.uses {
// Detect non-zero modifier.
let mut arg = arg.as_str();
let mut non_zero = false;
if let Some(substr) = arg.strip_suffix(".nz") {
non_zero = true;
arg = substr;
}
// Get underlying field.
let field: &Field = field_by_name.get(arg).ok_or_else(|| {
syn::Error::new(Span::call_site(), format!("undefined field {}", arg))
})?;
let variant = field.construct_variant_self();
if non_zero {
let value = field.express_value_self();
special_uses.extend(quote! {
if (#value) != 0 {
uses.push(#variant);
}
})
} else {
uses.extend(quote! {
#variant,
})
}
}
let uses = token_stream!(uses);
let ident = opcode.variant_identifier()?;
let special_uses = token_stream!(special_uses);
use_match_arms.push(quote! {
Opcode::#ident => {
let mut uses = vec![#uses];
#special_uses
uses
},
});
// Generate instruction simplification.
if let Some(mnemonics) = mnemonics_by_opcode.get(&opcode.name) {
let mut simplified_conditions = Vec::new();
for mnemonic in mnemonics {
if mnemonic.condition.is_empty() {
continue; // TODO else branch
}
simplified_conditions.push(quote!(if));
simplified_conditions.push(compile_mnemonic_condition(
&field_by_name,
&mnemonic.condition,
)?);
// Emit branch.
let mnemonic_lit = LitStr::new(&mnemonic.name, Span::call_site());
// Emit suffix.
let modifiers = mnemonic.modifiers.as_ref().unwrap_or(&opcode.modifiers);
let suffix = express_suffix(&modifier_by_name, &field_by_name, modifiers)?;
// Extract arguments.
let mut args = Vec::new();
for arg in &mnemonic.args {
let (field_name, expression) = arg.split_once('=').unwrap_or((arg, arg));
let field = field_by_name
.get(field_name)
.unwrap_or_else(|| panic!("field not found: {}", arg));
let variant = Ident::new(field.arg.as_ref().unwrap(), Span::call_site());
let value = compile_mnemonic_condition(&field_by_name, expression)?;
args.push(quote!(Argument::#variant(#variant((#value) as _)),));
}
let args = token_stream!(args);
simplified_conditions.push(quote! {
{
return SimplifiedIns {
mnemonic: #mnemonic_lit,
suffix: #suffix,
args: vec![#args],
ins: self,
};
}
});
}
let simplified_conditions = token_stream!(simplified_conditions);
simplified_ins_match_arms.push(quote! {
Opcode::#ident => {
#simplified_conditions
},
});
}
}
let field_match_arms = token_stream!(field_match_arms);
let def_match_arms = token_stream!(def_match_arms);
let use_match_arms = token_stream!(use_match_arms);
let suffix_match_arms = token_stream!(suffix_match_arms);
let simplified_ins_match_arms = token_stream!(simplified_ins_match_arms);
let field_accessors =
TokenStream::from_iter(self.fields.iter().map(|field| field.construct_accessor()));
let modifiers: Vec<TokenStream> = self
.modifiers
.iter()
.map(|modifier| modifier.construct_accessor(&field_by_name))
.try_collect()?;
let modifier_accessors = TokenStream::from_iter(modifiers);
// Generate final fields function.
let ins_impl = quote! {
#[allow(clippy::all, unused_mut)]
impl Ins {
pub(crate) fn _fields(&self) -> Vec<Field> {
match self.op {
Opcode::Illegal => vec![],
#field_match_arms
}
}
pub(crate) fn _defs(&self) -> Vec<Field> {
match self.op {
Opcode::Illegal => vec![],
#def_match_arms
}
}
pub(crate) fn _uses(&self) -> Vec<Field> {
match self.op {
Opcode::Illegal => vec![],
#use_match_arms
}
}
pub(crate) fn _suffix(&self) -> String {
match self.op {
Opcode::Illegal => String::new(),
#suffix_match_arms
}
}
pub(crate) fn _simplified(self) -> SimplifiedIns {
match self.op {
#simplified_ins_match_arms
_ => {}
}
SimplifiedIns::basic_form(self)
}
}
#[allow(clippy::all, non_snake_case)]
impl Ins {
#field_accessors
#modifier_accessors
}
};
Ok(ins_impl)
}
}
/// Converts the given key into an identifier.
fn to_rust_ident(prefix: &str, key: &str) -> TokenTree {
TokenTree::Ident(Ident::new(
&(prefix.to_owned() + &key.replace('.', "_")),
Span::call_site(),
))
}
/// Converts the given key into an enum variant key.
fn to_rust_variant(key: &str) -> Result<TokenTree> {
Ok(TokenTree::Ident(Ident::new(
&to_rust_variant_str(key)?,
Span::call_site(),
)))
}
fn to_rust_variant_str(key: &str) -> Result<String> {
let mut s = String::new();
let mut chars = key.chars();
loop {
// Make first char uppercase.
let c = match chars.next() {
None => return Ok(s),
Some(c) => c,
};
s.push(match c {
'a'..='z' => c.to_ascii_uppercase(),
'A'..='Z' => c,
_ => return Err(format!("invalid identifier: {}", key).into()),
});
loop {
let c = match chars.next() {
None => return Ok(s),
Some(c) => c,
};
match c.to_ascii_lowercase() {
'0'..='9' | 'a'..='z' => s.push(c),
'_' => break,
'.' => {
s.push('_');
break;
}
_ => return Err(format!("invalid character in opcode name: {}", key).into()),
}
}
}
}
/// Compiles conditions such as `S == B` into valid Rust expressions on a PowerPC instruction.
fn compile_mnemonic_condition(
field_by_name: &HashMap<String, &Field>,
code: &str,
) -> Result<TokenStream> {
let src_stream = TokenStream::from_str(code)?;
fn map_ident(field_by_name: &HashMap<String, &Field>, token: TokenTree) -> TokenStream {
match token {
TokenTree::Ident(ref ident) => {
if let Some(field) = field_by_name.get(&ident.to_string()) {
return field.express_value_self();
}
}
TokenTree::Group(ref group) => {
let iter = group
.stream()
.into_iter()
.flat_map(|token| map_ident(field_by_name, token));
let stream = TokenStream::from_iter(iter);
return TokenStream::from(TokenTree::Group(Group::new(group.delimiter(), stream)));
}
_ => {}
}
token.into()
}
let token_iter = src_stream
.into_iter()
.flat_map(|token| map_ident(field_by_name, token));
Ok(TokenStream::from_iter(token_iter))
}
fn express_suffix(
modifier_by_name: &HashMap<String, &Modifier>,
field_by_name: &HashMap<String, &Field>,
modifiers: &[String],
) -> Result<TokenStream> {
Ok(if modifiers.is_empty() {
quote!(String::new())
} else {
let mut chars = Vec::new();
for mod_name in modifiers {
let modifier: &Modifier = modifier_by_name
.get(mod_name)
.ok_or_else(|| Error::from(format!("undefined modifier {}", mod_name)))?;
let lit_char = LitChar::new(modifier.suffix, Span::call_site());
let modifier_bit = modifier.express_value_self(field_by_name)?;
chars.push(quote! {
if #modifier_bit {
s.push(#lit_char);
}
});
}
let chars = token_stream!(chars);
quote!({
{
let mut s = String::with_capacity(4);
#chars
s
}
})
})
}

111
isa.yaml
View File

@ -2,108 +2,134 @@ fields:
# Immediates
- name: simm
arg: Simm
desc: Signed Immediate
bits: 16..32
signed: true
- name: uimm
arg: Uimm
desc: Unsigned Immediate
bits: 16..32
- name: offset
arg: Offset
desc: Branch Offset
bits: 16..32
signed: true
- name: ps_offset
arg: Offset
desc: Paired Single Offset
bits: 20..32
signed: true
# Branch fields
- name: BO
arg: OpaqueU
desc: Branch Options
bits: 6..11
- name: BI
arg: CRBit
desc: Branch Condition Register Bit
bits: 11..16
- name: BD
arg: BranchDest
desc: Branch Destination (14-bit)
bits: 16..30
shift_left: 2
signed: true
- name: LI
arg: BranchDest
desc: Branch Destination (24-bit)
bits: 6..30
signed: true
shift_left: 2
# Shift/rotate type fields
- name: SH
arg: OpaqueU
desc: Shift
desc: Shift Amount
bits: 16..21
- name: MB
arg: OpaqueU
desc: Mask start
desc: Mask Begin
bits: 21..26
- name: ME
arg: OpaqueU
desc: Mask stop
desc: Mask End
bits: 26..31
# Registers
- name: rS
arg: GPR
desc: Source Register
bits: 6..11
- name: rD
arg: GPR
desc: Destination Register
bits: 6..11
- name: rA
arg: GPR
desc: Register A
bits: 11..16
- name: rA.nz
arg: GPR
desc: Register A (non-zero)
bits: 11..16
- name: rB
arg: GPR
desc: Register B
bits: 16..21
- name: sr
arg: SR
desc: Segment Register
bits: 12..16
- name: spr
arg: SPR
desc: Special Purpose Register
bits: 11..21
split: true
# Floating-point registers
- name: frS
arg: FPR
desc: Source Floating-Point Register
bits: 6..11
- name: frD
arg: FPR
desc: Destination Floating-Point Register
bits: 6..11
- name: frA
arg: FPR
desc: Floating-Point Register A
bits: 11..16
- name: frB
arg: FPR
desc: Floating-Point Register B
bits: 16..21
- name: frC
arg: FPR
desc: Floating-Point Register C
bits: 21..26
# Condition register bits
- name: crbD
arg: CRBit
desc: Condition Register Bit Destination
bits: 6..11
- name: crbA
arg: CRBit
desc: Condition Register Bit A
bits: 11..16
- name: crbB
arg: CRBit
desc: Condition Register Bit B
bits: 16..21
# Condition register fields
- name: crfD
arg: CRField
desc: Condition Register Field Destination
bits: 6..9
- name: crfS
arg: CRField
desc: Condition Register Field Source
bits: 11..14
# Condition register misc
- name: crm
arg: OpaqueU
desc: Condition Register Mask
bits: 12..20
# Paired single fields
- name: ps_I
@ -152,37 +178,46 @@ fields:
desc: Bitset for cmp, cmpi, cmpl, cmpli
bits: 10..11
- name: xer
desc: Fixed-Point Exception Register
- name: ctr
desc: Count Register
- name: lr
desc: Link Register
modifiers:
- name: OE
desc: Field used by XO-form instructions to enable setting OV and SO in the XER.
suffix: o
bit: 21
side_effects: [ xer ]
- name: Rc
desc: Record Bit
suffix: .
bit: 31
side_effects: [ cr0 ]
- name: LK
desc: Link Bit
suffix: l
bit: 31
side_effects: [ lr ]
- name: AA
desc: Absolute Address Bit
suffix: a
bit: 30
# Predict branch to be taken
- name: BP
desc: Predict branch to be taken
suffix: +
condition: BO & 1 == 1 && BD >= 0
# Predict branch not to be taken (fall through)
bit: 10
condition: BD >= 0
- name: BNP
desc: Predict branch not to be taken (fall through)
suffix: '-'
condition: BO & 1 == 1 && BD < 0
# Predict branch to be taken (implicit dest for LR/CTR)
bit: 10
condition: BD < 0
- name: BP_ND
desc: Predict branch to be taken (implicit dest for LR/CTR)
suffix: +
condition: BO & 1 == 1
bit: 10
opcodes:
- name: add
@ -1998,24 +2033,40 @@ mnemonics:
condition: rA == 0
- name: subis
opcode: addis
args: [ rD, rA, simm=-simm ]
args: [ rD, rA, simm ]
condition: simm < 0 && simm != -0x8000
replace:
simm: -simm
replace_assemble:
simm: -simm
- name: li
opcode: addi
args: [ rD, simm ]
condition: rA == 0
- name: subi
opcode: addi
args: [ rD, rA, simm=-simm ]
args: [ rD, rA, simm ]
condition: simm < 0 && simm != -0x8000
replace:
simm: -simm
replace_assemble:
simm: -simm
- name: subic
opcode: addic
args: [ rD, rA, simm=-simm ]
args: [ rD, rA, simm ]
condition: simm < 0 && simm != -0x8000
replace:
simm: -simm
replace_assemble:
simm: -simm
- name: subic.
opcode: addic.
args: [ rD, rA, simm=-simm ]
args: [ rD, rA, simm ]
condition: simm < 0 && simm != -0x8000
replace:
simm: -simm
replace_assemble:
simm: -simm
- name: mr
opcode: or
args: [ rA, rS ]
@ -2035,8 +2086,12 @@ mnemonics:
# Rotates/Shifts Immediate
- name: clrrwi
opcode: rlwinm
args: [ rA, rS, ME=31-ME ]
condition: SH == 0 && MB == 0 && ME < 32
args: [ rA, rS, ME ]
condition: SH == 0 && MB == 0
replace:
ME: 31 - ME
replace_assemble:
ME: 31 - ME
- name: clrlwi
opcode: rlwinm
args: [ rA, rS, MB ]
@ -2047,8 +2102,12 @@ mnemonics:
condition: MB == 0 && ME == 31 && SH <= 16
- name: rotrwi
opcode: rlwinm
args: [ rA, rS, SH=32-SH ]
args: [ rA, rS, SH ]
condition: MB == 0 && ME == 31 && SH > 16
replace:
SH: 32 - SH
replace_assemble:
SH: 32 - SH
- name: slwi
opcode: rlwinm
args: [ rA, rS, SH ]
@ -2059,16 +2118,30 @@ mnemonics:
condition: ME == 31 && SH == 32 - MB
- name: clrlslwi
opcode: rlwinm
args: [ rA, rS, MB=MB+SH, SH ]
args: [ rA, rS, MB, SH ]
condition: SH < 32 && ME == 31 - SH
replace:
MB: MB + SH
replace_assemble:
MB: MB - SH
- name: extlwi
opcode: rlwinm
args: [ rA, rS, ME=ME+1, SH ]
args: [ rA, rS, ME, SH ]
condition: MB == 0
replace:
ME: ME + 1
replace_assemble:
ME: ME - 1
- name: extrwi
opcode: rlwinm
args: [ rA, rS, MB=32-MB, SH=SH-(32-MB) ]
args: [ rA, rS, MB, SH ]
condition: ME == 31 && SH >= 32 - MB
replace:
MB: 32 - MB
SH: SH - (32 - MB)
replace_assemble:
MB: 32 - MB
SH: SH + MB
# Compares Word
- name: cmpwi

View File

@ -1,13 +0,0 @@
[package]
name = "ppc750cl-rand"
version = "0.2.0"
edition = "2021"
authors = ["Richard Patel <me@terorie.dev>"]
license = "GPL-3.0-or-later"
description = "Generate random PowerPC 750CL instructions"
repository = "https://github.com/terorie/ppc750cl"
[dependencies]
ppc750cl = { path = "../disasm", version = "0.2.0" }
rand_core = "0.6"
sfmt = "0.7"

View File

@ -1,16 +0,0 @@
use rand_core::{RngCore, SeedableRng};
use sfmt::SFMT;
use ppc750cl::formatter::FormattedIns;
use ppc750cl::{Ins, Opcode};
fn main() {
let mut rng = SFMT::seed_from_u64(42);
loop {
let ins = Ins::new(rng.next_u32(), 0);
if ins.op == Opcode::Illegal {
continue;
}
println!("{}", FormattedIns(ins));
}
}

2
rustfmt.toml Normal file
View File

@ -0,0 +1,2 @@
use_field_init_shorthand = true
use_small_heuristics = "Max"