mirror of https://github.com/AxioDL/metaforce.git
250 lines
8.4 KiB
C++
250 lines
8.4 KiB
C++
#include "common.hpp"
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#include "../gpu.hpp"
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#include "gx.hpp"
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namespace aurora::gfx {
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using namespace fmt::literals;
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static logvisor::Module Log("aurora::gfx::gx");
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std::unordered_map<ShaderRef, wgpu::ShaderModule> g_gxCachedShaders;
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static std::string color_arg_reg(GX::TevColorArg arg, size_t stageIdx) {
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switch (arg) {
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case GX::CC_CPREV:
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return "prev.rgb";
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case GX::CC_APREV:
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return "prev.a";
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case GX::CC_C0:
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case GX::CC_A0:
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case GX::CC_C1:
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case GX::CC_A1:
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case GX::CC_C2:
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case GX::CC_A2:
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Log.report(logvisor::Fatal, FMT_STRING("TODO {}"), arg);
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unreachable();
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case GX::CC_TEXC:
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return fmt::format(FMT_STRING("sampled{}.rgb"), stageIdx);
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case GX::CC_TEXA:
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return fmt::format(FMT_STRING("sampled{}.a"), stageIdx);
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case GX::CC_RASC:
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return "rast.rgb";
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case GX::CC_RASA:
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return "rast.a";
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case GX::CC_ONE:
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return "1.0";
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case GX::CC_HALF:
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return "0.5";
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case GX::CC_KONST:
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return fmt::format(FMT_STRING("ubuf.kcolor{}.rgb"), stageIdx);
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case GX::CC_ZERO:
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return "0.0";
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}
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}
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static std::string alpha_arg_reg(GX::TevAlphaArg arg, size_t stageIdx) {
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switch (arg) {
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case GX::CA_APREV:
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return "prev.a";
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case GX::CA_A0:
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case GX::CA_A1:
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case GX::CA_A2:
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Log.report(logvisor::Fatal, FMT_STRING("TODO {}"), arg);
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unreachable();
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case GX::CA_TEXA:
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return fmt::format(FMT_STRING("sampled{}.a"), stageIdx);
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case GX::CA_RASA:
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return "rast.a";
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case GX::CA_KONST:
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return fmt::format(FMT_STRING("ubuf.kcolor{}.a"), stageIdx);
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case GX::CA_ZERO:
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return "0.0";
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}
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}
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static std::string_view tev_op(GX::TevOp op) {
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switch (op) {
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case GX::TEV_ADD:
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return "+";
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case GX::TEV_SUB:
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return "-";
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default:
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Log.report(logvisor::Fatal, FMT_STRING("TODO {}"), op);
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unreachable();
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}
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}
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static std::string_view tev_bias(GX::TevBias bias) {
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switch (bias) {
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case GX::TB_ZERO:
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return " + 0.0";
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case GX::TB_ADDHALF:
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return " + 0.5";
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case GX::TB_SUBHALF:
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return " - 0.5";
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}
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}
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static std::string_view tev_scale(GX::TevScale scale) {
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switch (scale) {
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case GX::CS_SCALE_1:
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return " * 1.0";
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case GX::CS_SCALE_2:
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return " * 2.0";
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case GX::CS_SCALE_4:
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return " * 4.0";
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case GX::CS_DIVIDE_2:
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return " / 2.0";
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}
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}
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wgpu::ShaderModule build_shader(const GXShaderConfig& config) {
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const auto hash = xxh3_hash(config);
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if (g_gxCachedShaders.contains(hash)) {
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return g_gxCachedShaders[hash];
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}
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std::string uniBufAttrs;
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std::string sampBindings;
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std::string texBindings;
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std::string vtxOutAttrs;
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std::string vtxInAttrs;
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std::string vtxXfrAttrs;
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size_t locIdx = 0;
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if (config.denormalizedNorm) {
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vtxOutAttrs += fmt::format(FMT_STRING("\n @location({}) nrm: vec3<f32>;"), locIdx);
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vtxInAttrs += fmt::format(FMT_STRING("\n , @location({}) in_nrm: vec3<f32>"), ++locIdx);
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vtxXfrAttrs += fmt::format(FMT_STRING("\n out.nrm = in_nrm;"));
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}
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if (config.denormalizedColor) {
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vtxOutAttrs += fmt::format(FMT_STRING("\n @location({}) clr: vec4<f32>;"), locIdx);
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vtxInAttrs += fmt::format(FMT_STRING("\n , @location({}) in_clr: vec4<f32>"), ++locIdx);
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vtxXfrAttrs += fmt::format(FMT_STRING("\n out.clr = in_clr;"));
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}
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for (int i = 0; i < maxTextures; ++i) {
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if (!config.boundTextures.test(i)) {
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continue;
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}
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uniBufAttrs += fmt::format(FMT_STRING("\n tex{}_lod: f32;"), i);
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sampBindings += fmt::format(FMT_STRING("\n@group(1) @binding({0})\n"
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"var tex{0}_samp: sampler;"), i);
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texBindings += fmt::format(FMT_STRING("\n@group(2) @binding({0})\n"
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"var tex{0}: texture_2d<f32>;"), i);
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vtxOutAttrs += fmt::format(FMT_STRING("\n @location({}) tex{}_uv: vec2<f32>;"), locIdx, i);
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vtxInAttrs += fmt::format(FMT_STRING("\n , @location({}) in_tex{}_uv: vec2<f32>"), locIdx + 1, i);
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vtxXfrAttrs += fmt::format(FMT_STRING("\n out.tex{0}_uv = in_tex{0}_uv;"), i);
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locIdx++;
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}
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std::string fragmentFn;
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bool hasRast = false;
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for (size_t idx = 0; const auto& stage : config.tevStages) {
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if (!stage) {
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break;
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}
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if (stage->colorPass.x0_a == GX::TevColorArg::CC_TEXC || stage->colorPass.x4_b == GX::TevColorArg::CC_TEXC ||
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stage->colorPass.x8_c == GX::TevColorArg::CC_TEXC || stage->colorPass.xc_d == GX::TevColorArg::CC_TEXC ||
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stage->alphaPass.x0_a == GX::TevAlphaArg::CA_TEXA || stage->alphaPass.x4_b == GX::TevAlphaArg::CA_TEXA ||
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stage->alphaPass.x8_c == GX::TevAlphaArg::CA_TEXA || stage->alphaPass.xc_d == GX::TevAlphaArg::CA_TEXA) {
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fragmentFn += fmt::format(
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FMT_STRING("\n var sampled{0} = textureSampleBias(tex{0}, tex{0}_samp, in.tex{0}_uv, ubuf.tex{0}_lod);"),
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idx);
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}
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if (!hasRast) {
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if (stage->colorPass.x0_a == GX::TevColorArg::CC_RASC || stage->colorPass.x4_b == GX::TevColorArg::CC_RASC ||
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stage->colorPass.x8_c == GX::TevColorArg::CC_RASC || stage->colorPass.xc_d == GX::TevColorArg::CC_RASC ||
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stage->alphaPass.x0_a == GX::TevAlphaArg::CA_RASA || stage->alphaPass.x4_b == GX::TevAlphaArg::CA_RASA ||
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stage->alphaPass.x8_c == GX::TevAlphaArg::CA_RASA || stage->alphaPass.xc_d == GX::TevAlphaArg::CA_RASA) {
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fragmentFn += fmt::format(FMT_STRING("\n var rast = in.clr; // TODO lighting")); // TODO lighting
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hasRast = true;
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}
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}
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idx++;
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}
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for (size_t idx = 0; const auto& stage : config.tevStages) {
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if (!stage) {
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break;
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}
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{
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std::string op;
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std::string outReg;
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switch (stage->colorOp.x10_regId) {
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case GX::TevRegID::TEVPREV:
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outReg = "prev";
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break;
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default:
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Log.report(logvisor::Fatal, FMT_STRING("TODO: colorOp outReg {}"), stage->colorOp.x10_regId);
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}
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op = fmt::format(FMT_STRING("({3} {4} ((1.0 - {2}) * {0} + {2} * {1}){5}){6}"),
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color_arg_reg(stage->colorPass.x0_a, idx), color_arg_reg(stage->colorPass.x4_b, idx),
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color_arg_reg(stage->colorPass.x8_c, idx), color_arg_reg(stage->colorPass.xc_d, idx),
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tev_op(stage->colorOp.x4_op), tev_bias(stage->colorOp.x8_bias),
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tev_scale(stage->colorOp.xc_scale));
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fragmentFn += fmt::format(FMT_STRING("\n {0} = vec4<f32>({1}, {0}.a);"), outReg, op);
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}
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{
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std::string op;
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std::string outReg;
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switch (stage->alphaOp.x10_regId) {
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case GX::TevRegID::TEVPREV:
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outReg = "prev.a";
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break;
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default:
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Log.report(logvisor::Fatal, FMT_STRING("TODO: alphaOp outReg {}"), stage->alphaOp.x10_regId);
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}
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op = fmt::format(FMT_STRING("({3} {4} ((1.0 - {2}) * {0} + {2} * {1}){5}){6}"),
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alpha_arg_reg(stage->alphaPass.x0_a, idx), alpha_arg_reg(stage->alphaPass.x4_b, idx),
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alpha_arg_reg(stage->alphaPass.x8_c, idx), alpha_arg_reg(stage->alphaPass.xc_d, idx),
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tev_op(stage->alphaOp.x4_op), tev_bias(stage->alphaOp.x8_bias),
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tev_scale(stage->alphaOp.xc_scale));
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fragmentFn += fmt::format(FMT_STRING("\n {0} = {1};"), outReg, op);
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}
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idx++;
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}
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const auto shaderSource =
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fmt::format(FMT_STRING(R"""(
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struct Uniform {{
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xf: mat4x4<f32>;{uniBufAttrs}
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}};
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@group(0) @binding(0)
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var<uniform> ubuf: Uniform;{sampBindings}{texBindings}
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struct VertexOutput {{
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@builtin(position) pos: vec4<f32>;{vtxOutAttrs}
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}};
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@stage(vertex)
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fn vs_main(
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@location(0) in_pos: vec3<f32>{vtxInAttrs}
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) -> VertexOutput {{
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var out: VertexOutput;
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out.pos = ubuf.xf * vec4<f32>(in_pos, 1.0);{vtxXfrAttrs}
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return out;
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}}
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@stage(fragment)
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fn fs_main(in: VertexOutput) -> @location(0) vec4<f32> {{
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var prev: vec4<f32>;{fragmentFn}
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return prev;
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}}
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)"""),
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"uniBufAttrs"_a = uniBufAttrs, "sampBindings"_a = sampBindings, "texBindings"_a = texBindings,
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"vtxOutAttrs"_a = vtxOutAttrs, "vtxInAttrs"_a = vtxInAttrs, "vtxXfrAttrs"_a = vtxXfrAttrs,
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"fragmentFn"_a = fragmentFn);
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Log.report(logvisor::Info, FMT_STRING("Generated shader: {}"), shaderSource);
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wgpu::ShaderModuleWGSLDescriptor wgslDescriptor{};
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wgslDescriptor.source = shaderSource.c_str();
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const auto shaderDescriptor = wgpu::ShaderModuleDescriptor{
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.nextInChain = &wgslDescriptor,
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.label = "GX Shader",
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};
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auto shader = gpu::g_device.CreateShaderModule(&shaderDescriptor);
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g_gxCachedShaders.emplace(hash, shader);
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return shader;
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}
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} // namespace aurora::gfx
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